/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-min-max-inc.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 03:55:28,239 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 03:55:28,302 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 03:55:28,306 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 03:55:28,306 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 03:55:28,343 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 03:55:28,344 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 03:55:28,344 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 03:55:28,345 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 03:55:28,348 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 03:55:28,348 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 03:55:28,349 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 03:55:28,349 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 03:55:28,350 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 03:55:28,350 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 03:55:28,350 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 03:55:28,351 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 03:55:28,351 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 03:55:28,351 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 03:55:28,351 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 03:55:28,351 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 03:55:28,352 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 03:55:28,352 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 03:55:28,352 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 03:55:28,352 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 03:55:28,352 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 03:55:28,352 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 03:55:28,353 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 03:55:28,353 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 03:55:28,353 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 03:55:28,354 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 03:55:28,354 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 03:55:28,354 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 03:55:28,354 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 03:55:28,354 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 03:55:28,355 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 03:55:28,355 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 03:55:28,355 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 03:55:28,355 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 03:55:28,355 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-06 03:55:28,561 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 03:55:28,603 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 03:55:28,605 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 03:55:28,606 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 03:55:28,606 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 03:55:28,607 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-min-max-inc.wvr.c [2024-05-06 03:55:29,662 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 03:55:29,819 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 03:55:29,819 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc.wvr.c [2024-05-06 03:55:29,826 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/d3af7a2ec/bcdaa184d33540e8a02842f55234252b/FLAG1fe43b037 [2024-05-06 03:55:29,841 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/d3af7a2ec/bcdaa184d33540e8a02842f55234252b [2024-05-06 03:55:29,843 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 03:55:29,845 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 03:55:29,846 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 03:55:29,847 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 03:55:29,850 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 03:55:29,851 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 03:55:29" (1/1) ... [2024-05-06 03:55:29,852 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@71ff5b8d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:29, skipping insertion in model container [2024-05-06 03:55:29,852 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 03:55:29" (1/1) ... [2024-05-06 03:55:29,868 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 03:55:29,986 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc.wvr.c[3018,3031] [2024-05-06 03:55:29,991 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 03:55:29,997 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 03:55:30,015 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc.wvr.c[3018,3031] [2024-05-06 03:55:30,017 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 03:55:30,028 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 03:55:30,028 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 03:55:30,033 INFO L206 MainTranslator]: Completed translation [2024-05-06 03:55:30,033 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30 WrapperNode [2024-05-06 03:55:30,034 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 03:55:30,035 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 03:55:30,035 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 03:55:30,035 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 03:55:30,039 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,054 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,082 INFO L138 Inliner]: procedures = 26, calls = 63, calls flagged for inlining = 8, calls inlined = 8, statements flattened = 140 [2024-05-06 03:55:30,082 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 03:55:30,083 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 03:55:30,083 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 03:55:30,083 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 03:55:30,090 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,090 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,092 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,092 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,176 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,181 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,183 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,183 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,185 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 03:55:30,194 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 03:55:30,194 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 03:55:30,194 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 03:55:30,195 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (1/1) ... [2024-05-06 03:55:30,224 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 03:55:30,234 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:55:30,251 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 03:55:30,266 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 03:55:30,294 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 03:55:30,294 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 03:55:30,294 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 03:55:30,294 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 03:55:30,294 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 03:55:30,295 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 03:55:30,295 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 03:55:30,295 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 03:55:30,295 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 03:55:30,295 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 03:55:30,295 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 03:55:30,297 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 03:55:30,297 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 03:55:30,297 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 03:55:30,297 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 03:55:30,297 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 03:55:30,297 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 03:55:30,297 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 03:55:30,297 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 03:55:30,298 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 03:55:30,405 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 03:55:30,407 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 03:55:30,666 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 03:55:30,743 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 03:55:30,743 INFO L309 CfgBuilder]: Removed 4 assume(true) statements. [2024-05-06 03:55:30,744 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 03:55:30 BoogieIcfgContainer [2024-05-06 03:55:30,744 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 03:55:30,746 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 03:55:30,746 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 03:55:30,748 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 03:55:30,749 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 03:55:29" (1/3) ... [2024-05-06 03:55:30,749 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bfc91f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 03:55:30, skipping insertion in model container [2024-05-06 03:55:30,749 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 03:55:30" (2/3) ... [2024-05-06 03:55:30,749 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2bfc91f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 03:55:30, skipping insertion in model container [2024-05-06 03:55:30,749 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 03:55:30" (3/3) ... [2024-05-06 03:55:30,750 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-min-max-inc.wvr.c [2024-05-06 03:55:30,756 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 03:55:30,763 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 03:55:30,763 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 03:55:30,763 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 03:55:30,821 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-06 03:55:30,856 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 03:55:30,856 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 03:55:30,856 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:55:30,858 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 03:55:30,877 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 03:55:30,885 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 03:55:30,893 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:55:30,895 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 03:55:30,900 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@37c17ac7, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 03:55:30,900 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 03:55:31,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:31,470 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:31,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:31,570 INFO L85 PathProgramCache]: Analyzing trace with hash 440850748, now seen corresponding path program 1 times [2024-05-06 03:55:31,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:31,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:31,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:31,816 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:55:31,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:31,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:31,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:31,914 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:55:31,942 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 03:55:31,943 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 03:55:32,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:32,142 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:32,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:34,265 INFO L85 PathProgramCache]: Analyzing trace with hash 154181502, now seen corresponding path program 1 times [2024-05-06 03:55:34,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:34,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:34,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:34,445 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:34,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:34,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:34,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:34,561 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:34,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:55:34,679 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:34,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:55:34,705 INFO L85 PathProgramCache]: Analyzing trace with hash 2055622135, now seen corresponding path program 2 times [2024-05-06 03:55:34,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:34,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:34,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:34,874 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:34,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:34,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:34,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:34,981 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:34,982 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 03:55:34,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2024-05-06 03:55:35,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:35,243 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:35,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:37,307 INFO L85 PathProgramCache]: Analyzing trace with hash -229856278, now seen corresponding path program 1 times [2024-05-06 03:55:37,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:37,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:37,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:37,472 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:37,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:37,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:37,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:37,557 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:37,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:55:37,653 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:37,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:55:37,715 INFO L85 PathProgramCache]: Analyzing trace with hash 358425867, now seen corresponding path program 2 times [2024-05-06 03:55:37,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:37,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:37,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:37,948 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:37,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:37,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:37,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:38,075 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:38,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:38,170 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:38,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:40,223 INFO L85 PathProgramCache]: Analyzing trace with hash 1257764385, now seen corresponding path program 1 times [2024-05-06 03:55:40,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:40,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:40,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:40,404 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:40,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:40,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:40,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:40,563 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:40,600 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:40,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:42,707 INFO L85 PathProgramCache]: Analyzing trace with hash -766650886, now seen corresponding path program 1 times [2024-05-06 03:55:42,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:42,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:42,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:42,850 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:42,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:42,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:42,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:43,031 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:43,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:43,140 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:43,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:45,206 INFO L85 PathProgramCache]: Analyzing trace with hash 1239757295, now seen corresponding path program 2 times [2024-05-06 03:55:45,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:45,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:45,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:45,340 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:45,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:45,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:45,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:45,447 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:45,486 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:45,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:47,569 INFO L85 PathProgramCache]: Analyzing trace with hash -2120086952, now seen corresponding path program 2 times [2024-05-06 03:55:47,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:47,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:47,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:47,722 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:47,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:47,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:47,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:47,839 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:47,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:47,926 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:47,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:47,982 INFO L85 PathProgramCache]: Analyzing trace with hash -1250216473, now seen corresponding path program 3 times [2024-05-06 03:55:47,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:47,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:47,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:48,087 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:48,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:48,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:48,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:48,279 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:48,313 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:48,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:50,408 INFO L85 PathProgramCache]: Analyzing trace with hash -1510959552, now seen corresponding path program 3 times [2024-05-06 03:55:50,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:50,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:50,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:50,527 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:50,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:50,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:50,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:50,629 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:50,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:50,715 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:50,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:52,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1004622231, now seen corresponding path program 4 times [2024-05-06 03:55:52,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:52,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:52,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:52,883 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:52,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:52,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:52,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:53,011 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:53,044 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:53,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:55,137 INFO L85 PathProgramCache]: Analyzing trace with hash -333100514, now seen corresponding path program 4 times [2024-05-06 03:55:55,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:55,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:55,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:55,241 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:55,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:55,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:55,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:55,335 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:55:55,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:55,420 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:55,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:55:55,658 INFO L85 PathProgramCache]: Analyzing trace with hash 1863797475, now seen corresponding path program 5 times [2024-05-06 03:55:55,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:55,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:55,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:55,834 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:55,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:55,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:55,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:55,957 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:55,992 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:55:55,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:55:58,073 INFO L85 PathProgramCache]: Analyzing trace with hash 2074320956, now seen corresponding path program 5 times [2024-05-06 03:55:58,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:58,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:58,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:58,189 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:58,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:55:58,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:55:58,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:55:58,336 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:55:58,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:55:58,414 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:55:58,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:00,447 INFO L85 PathProgramCache]: Analyzing trace with hash 642804717, now seen corresponding path program 6 times [2024-05-06 03:56:00,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:00,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:00,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:00,537 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:00,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:00,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:00,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:00,627 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:00,660 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:00,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:02,714 INFO L85 PathProgramCache]: Analyzing trace with hash -1514053862, now seen corresponding path program 6 times [2024-05-06 03:56:02,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:02,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:02,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:02,802 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:02,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:02,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:02,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:02,965 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:03,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:03,049 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:03,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:05,087 INFO L85 PathProgramCache]: Analyzing trace with hash -1773699519, now seen corresponding path program 3 times [2024-05-06 03:56:05,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:05,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:05,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:05,228 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:05,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:05,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:05,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:05,306 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:05,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:05,379 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:05,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:05,395 INFO L85 PathProgramCache]: Analyzing trace with hash 849890254, now seen corresponding path program 4 times [2024-05-06 03:56:05,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:05,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:05,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:05,475 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:05,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:05,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:05,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:05,607 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:05,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:05,691 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:05,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:05,708 INFO L85 PathProgramCache]: Analyzing trace with hash 1117088227, now seen corresponding path program 7 times [2024-05-06 03:56:05,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:05,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:05,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:05,798 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:05,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:05,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:05,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:05,910 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:05,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:06,002 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:06,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:06,021 INFO L85 PathProgramCache]: Analyzing trace with hash 680518143, now seen corresponding path program 8 times [2024-05-06 03:56:06,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:06,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:06,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:06,105 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:56:06,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:06,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:06,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:06,239 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:56:06,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:06,319 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:06,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:08,350 INFO L85 PathProgramCache]: Analyzing trace with hash 680518143, now seen corresponding path program 9 times [2024-05-06 03:56:08,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:08,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:08,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:08,431 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:56:08,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:08,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:08,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:08,513 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:56:08,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:08,584 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:08,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:08,599 INFO L85 PathProgramCache]: Analyzing trace with hash -1774298156, now seen corresponding path program 10 times [2024-05-06 03:56:08,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:08,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:08,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:08,689 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:08,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:08,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:08,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:08,812 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:08,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:08,899 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:08,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:08,916 INFO L85 PathProgramCache]: Analyzing trace with hash -1965969463, now seen corresponding path program 11 times [2024-05-06 03:56:08,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:08,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:08,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,009 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:09,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,098 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:09,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:09,179 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:09,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:09,196 INFO L85 PathProgramCache]: Analyzing trace with hash -126047627, now seen corresponding path program 12 times [2024-05-06 03:56:09,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,292 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:09,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,427 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:09,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:09,508 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:09,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:09,525 INFO L85 PathProgramCache]: Analyzing trace with hash -892141432, now seen corresponding path program 13 times [2024-05-06 03:56:09,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,633 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:09,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,723 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:09,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:09,808 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:09,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:09,823 INFO L85 PathProgramCache]: Analyzing trace with hash -2053826830, now seen corresponding path program 14 times [2024-05-06 03:56:09,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:09,915 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:09,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:09,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:09,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:10,006 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:56:10,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:10,140 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:10,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:10,159 INFO L85 PathProgramCache]: Analyzing trace with hash -1147274773, now seen corresponding path program 15 times [2024-05-06 03:56:10,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:10,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:10,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:10,273 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:10,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:10,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:10,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:10,361 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:10,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:10,438 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:10,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:12,492 INFO L85 PathProgramCache]: Analyzing trace with hash -1732158298, now seen corresponding path program 16 times [2024-05-06 03:56:12,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:12,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:12,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:12,590 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:12,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:12,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:12,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:12,674 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:12,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:12,761 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:12,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:12,777 INFO L85 PathProgramCache]: Analyzing trace with hash 2137668115, now seen corresponding path program 17 times [2024-05-06 03:56:12,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:12,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:12,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:12,965 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:12,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:12,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:12,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:13,054 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:13,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:13,139 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:13,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:15,165 INFO L85 PathProgramCache]: Analyzing trace with hash 1843202633, now seen corresponding path program 18 times [2024-05-06 03:56:15,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:15,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:15,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:15,250 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:15,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:15,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:15,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:15,336 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:15,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:15,413 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:15,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:17,440 INFO L85 PathProgramCache]: Analyzing trace with hash 776362208, now seen corresponding path program 1 times [2024-05-06 03:56:17,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,571 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:56:17,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:17,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:17,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:17,653 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:56:17,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:17,727 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:17,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:18,111 INFO L85 PathProgramCache]: Analyzing trace with hash -985486280, now seen corresponding path program 2 times [2024-05-06 03:56:18,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,198 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:18,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:18,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:18,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:18,284 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:18,313 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:18,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:20,388 INFO L85 PathProgramCache]: Analyzing trace with hash 1874402129, now seen corresponding path program 1 times [2024-05-06 03:56:20,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:20,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:20,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:20,508 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:20,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:20,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:20,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:20,651 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:20,662 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 03:56:20,664 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:56:20,664 INFO L85 PathProgramCache]: Analyzing trace with hash -1283961915, now seen corresponding path program 1 times [2024-05-06 03:56:20,667 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:56:20,667 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761113593] [2024-05-06 03:56:20,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:20,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:20,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:20,824 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 41 proven. 2 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 03:56:20,824 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:56:20,826 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1761113593] [2024-05-06 03:56:20,827 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1761113593] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 03:56:20,827 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [683752756] [2024-05-06 03:56:20,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:20,827 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:56:20,827 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:56:20,829 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 03:56:20,839 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 03:56:21,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:21,084 INFO L262 TraceCheckSpWp]: Trace formula consists of 439 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 03:56:21,098 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 03:56:21,326 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 42 proven. 1 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 03:56:21,326 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 03:56:21,536 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 42 proven. 1 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-05-06 03:56:21,537 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [683752756] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 03:56:21,537 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 03:56:21,537 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2024-05-06 03:56:21,538 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1622225586] [2024-05-06 03:56:21,539 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 03:56:21,543 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-06 03:56:21,543 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:56:21,546 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-06 03:56:21,547 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=434, Unknown=0, NotChecked=0, Total=552 [2024-05-06 03:56:21,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:56:21,548 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:56:21,549 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 11.25) internal successors, (270), 24 states have internal predecessors, (270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:56:21,549 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:56:21,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:21,937 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:21,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:23,977 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867754, now seen corresponding path program 5 times [2024-05-06 03:56:23,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:23,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:23,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:24,045 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:56:24,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:24,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:24,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:24,150 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:56:24,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:24,230 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:24,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:24,247 INFO L85 PathProgramCache]: Analyzing trace with hash -2000312289, now seen corresponding path program 6 times [2024-05-06 03:56:24,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:24,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:24,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:56:24,304 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:56:24,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:56:24,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:24,477 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:24,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:26,548 INFO L85 PathProgramCache]: Analyzing trace with hash -186415563, now seen corresponding path program 19 times [2024-05-06 03:56:26,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:26,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:26,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:26,845 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:26,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:26,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:26,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:26,977 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:27,009 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:27,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:29,055 INFO L85 PathProgramCache]: Analyzing trace with hash -1729929970, now seen corresponding path program 7 times [2024-05-06 03:56:29,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:29,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:29,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:29,172 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:29,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:29,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:29,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:29,389 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:29,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:29,477 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:29,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:31,509 INFO L85 PathProgramCache]: Analyzing trace with hash -702749349, now seen corresponding path program 20 times [2024-05-06 03:56:31,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:31,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:31,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:31,625 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:31,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:31,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:31,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:31,724 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:31,756 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:31,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:33,837 INFO L85 PathProgramCache]: Analyzing trace with hash 730700396, now seen corresponding path program 8 times [2024-05-06 03:56:33,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:33,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:33,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:56:33,906 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:56:33,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:56:34,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:34,021 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:34,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:34,081 INFO L85 PathProgramCache]: Analyzing trace with hash 781407059, now seen corresponding path program 21 times [2024-05-06 03:56:34,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:34,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:34,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:34,193 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:34,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:34,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:34,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:34,353 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:34,384 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:34,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:36,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1506008236, now seen corresponding path program 9 times [2024-05-06 03:56:36,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:36,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:36,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:36,557 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:36,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:36,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:36,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:36,660 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:36,732 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:36,740 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:36,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:38,786 INFO L85 PathProgramCache]: Analyzing trace with hash -374547075, now seen corresponding path program 22 times [2024-05-06 03:56:38,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:38,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:38,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:38,895 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:38,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:38,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:38,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:39,047 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:39,078 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:39,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:41,152 INFO L85 PathProgramCache]: Analyzing trace with hash 1698523018, now seen corresponding path program 10 times [2024-05-06 03:56:41,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:56:41,176 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:56:41,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:56:41,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:41,281 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:41,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:41,552 INFO L85 PathProgramCache]: Analyzing trace with hash -1257254921, now seen corresponding path program 23 times [2024-05-06 03:56:41,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,662 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:41,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:41,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:41,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:41,769 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:41,802 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:41,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:43,890 INFO L85 PathProgramCache]: Analyzing trace with hash 509074512, now seen corresponding path program 11 times [2024-05-06 03:56:43,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:43,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:43,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:43,990 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:43,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:43,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:44,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:44,136 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:44,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:44,213 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:44,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:46,271 INFO L85 PathProgramCache]: Analyzing trace with hash -445248935, now seen corresponding path program 24 times [2024-05-06 03:56:46,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:46,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:46,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:46,365 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:46,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:46,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:46,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:46,461 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:46,495 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:56:46,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:56:48,568 INFO L85 PathProgramCache]: Analyzing trace with hash -340138962, now seen corresponding path program 12 times [2024-05-06 03:56:48,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:48,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:48,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:56:48,607 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:56:48,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:56:48,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:48,727 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:48,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:50,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1880138323, now seen corresponding path program 7 times [2024-05-06 03:56:50,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:50,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:50,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:50,931 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:56:50,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:50,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:50,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:50,990 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:56:51,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:51,072 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:51,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:51,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1845254626, now seen corresponding path program 8 times [2024-05-06 03:56:51,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,243 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:51,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,334 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:51,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:51,413 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:51,414 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:51,431 INFO L85 PathProgramCache]: Analyzing trace with hash 1028924407, now seen corresponding path program 25 times [2024-05-06 03:56:51,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,522 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:51,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,613 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:56:51,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:51,689 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:51,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:51,706 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 26 times [2024-05-06 03:56:51,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:51,898 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:51,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:51,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:51,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:52,076 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:52,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:52,163 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:52,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:56:54,212 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 27 times [2024-05-06 03:56:54,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:54,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:54,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:54,402 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:54,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:54,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:54,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:54,509 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:54,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:54,584 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:54,585 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:54,602 INFO L85 PathProgramCache]: Analyzing trace with hash 582293992, now seen corresponding path program 28 times [2024-05-06 03:56:54,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:54,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:54,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:55,703 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:56:55,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:55,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:55,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:55,940 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:56:56,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:56,028 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:56,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:56,048 INFO L85 PathProgramCache]: Analyzing trace with hash 431584565, now seen corresponding path program 29 times [2024-05-06 03:56:56,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:56,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:56,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:56,346 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:56,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:56,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:56,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:56,471 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:56,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:56,551 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:56,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:56,578 INFO L85 PathProgramCache]: Analyzing trace with hash -1712596511, now seen corresponding path program 30 times [2024-05-06 03:56:56,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:56,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:56,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:56,808 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:56:56,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:56,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:56,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:57,069 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:56:57,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:56:57,157 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:57,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:56:57,174 INFO L85 PathProgramCache]: Analyzing trace with hash -1368990308, now seen corresponding path program 31 times [2024-05-06 03:56:57,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:57,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:57,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:57,282 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:57,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:57,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:57,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:57,385 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:57,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:56:57,461 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:57,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:56:57,478 INFO L85 PathProgramCache]: Analyzing trace with hash -1827911162, now seen corresponding path program 32 times [2024-05-06 03:56:57,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:57,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:57,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:57,764 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:56:57,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:57,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:57,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:58,002 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:56:58,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:56:58,087 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:58,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:56:58,106 INFO L85 PathProgramCache]: Analyzing trace with hash 777005655, now seen corresponding path program 33 times [2024-05-06 03:56:58,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:58,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:58,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:58,208 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:58,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:56:58,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:56:58,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:56:58,388 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:56:58,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:56:58,472 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:56:58,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:00,529 INFO L85 PathProgramCache]: Analyzing trace with hash -422427462, now seen corresponding path program 34 times [2024-05-06 03:57:00,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:00,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:00,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:00,646 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:00,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:00,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:00,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:00,747 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:00,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:57:00,821 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:00,821 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:57:00,838 INFO L85 PathProgramCache]: Analyzing trace with hash -210348929, now seen corresponding path program 35 times [2024-05-06 03:57:00,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:00,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:00,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:01,070 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:01,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:01,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:01,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:01,344 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:01,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:01,428 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:01,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:03,456 INFO L85 PathProgramCache]: Analyzing trace with hash 2069118301, now seen corresponding path program 36 times [2024-05-06 03:57:03,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:03,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:03,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:03,981 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:03,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:03,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:03,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:04,259 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:04,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:04,343 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:04,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:06,395 INFO L85 PathProgramCache]: Analyzing trace with hash -1121051060, now seen corresponding path program 3 times [2024-05-06 03:57:06,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:06,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:06,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:07,327 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:07,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:07,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:07,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:07,553 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:07,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:07,641 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:07,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:09,686 INFO L85 PathProgramCache]: Analyzing trace with hash 348250444, now seen corresponding path program 4 times [2024-05-06 03:57:09,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:09,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:09,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:10,598 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:10,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:10,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:10,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:10,875 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:10,907 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:10,907 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:12,998 INFO L85 PathProgramCache]: Analyzing trace with hash -1487403163, now seen corresponding path program 2 times [2024-05-06 03:57:12,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:12,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:13,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:13,515 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:13,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:13,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:13,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:13,842 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:13,853 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 03:57:13,875 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-06 03:57:14,060 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable110,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable108,SelfDestructingSolverStorable109,SelfDestructingSolverStorable76,SelfDestructingSolverStorable104,SelfDestructingSolverStorable77,SelfDestructingSolverStorable105,SelfDestructingSolverStorable78,SelfDestructingSolverStorable106,SelfDestructingSolverStorable79,SelfDestructingSolverStorable107,SelfDestructingSolverStorable100,SelfDestructingSolverStorable101,SelfDestructingSolverStorable102,SelfDestructingSolverStorable103,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable82,SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,SelfDestructingSolverStorable86,SelfDestructingSolverStorable87,SelfDestructingSolverStorable88,SelfDestructingSolverStorable89,SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable98,SelfDestructingSolverStorable126,SelfDestructingSolverStorable99,SelfDestructingSolverStorable122,SelfDestructingSolverStorable123,SelfDestructingSolverStorable124,SelfDestructingSolverStorable125,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable120,SelfDestructingSolverStorable121,SelfDestructingSolverStorable119,SelfDestructingSolverStorable115,SelfDestructingSolverStorable116,SelfDestructingSolverStorable117,SelfDestructingSolverStorable68,SelfDestructingSolverStorable118,SelfDestructingSolverStorable69,SelfDestructingSolverStorable111,SelfDestructingSolverStorable112,SelfDestructingSolverStorable113,SelfDestructingSolverStorable114 [2024-05-06 03:57:14,061 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 03:57:14,061 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 03:57:14,061 INFO L85 PathProgramCache]: Analyzing trace with hash 1272527833, now seen corresponding path program 2 times [2024-05-06 03:57:14,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 03:57:14,061 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338063771] [2024-05-06 03:57:14,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:14,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:14,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:14,333 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 58 proven. 15 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-05-06 03:57:14,333 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 03:57:14,333 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1338063771] [2024-05-06 03:57:14,333 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1338063771] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 03:57:14,333 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2103923443] [2024-05-06 03:57:14,333 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 03:57:14,333 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 03:57:14,334 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 03:57:14,349 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 03:57:14,365 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 03:57:14,631 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 03:57:14,631 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 03:57:14,633 INFO L262 TraceCheckSpWp]: Trace formula consists of 317 conjuncts, 33 conjunts are in the unsatisfiable core [2024-05-06 03:57:14,642 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 03:57:14,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2024-05-06 03:57:14,670 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 03:57:14,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 13 [2024-05-06 03:57:14,695 INFO L349 Elim1Store]: treesize reduction 13, result has 40.9 percent of original size [2024-05-06 03:57:14,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 18 treesize of output 17 [2024-05-06 03:57:14,842 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:14,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 15 [2024-05-06 03:57:14,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-06 03:57:15,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-06 03:57:15,201 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2024-05-06 03:57:15,201 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 03:57:15,201 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2103923443] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 03:57:15,201 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 03:57:15,201 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [15] total 30 [2024-05-06 03:57:15,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [534801406] [2024-05-06 03:57:15,201 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 03:57:15,202 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2024-05-06 03:57:15,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 03:57:15,203 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-05-06 03:57:15,203 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=799, Unknown=0, NotChecked=0, Total=870 [2024-05-06 03:57:15,203 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:57:15,203 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 03:57:15,203 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 8.529411764705882) internal successors, (145), 17 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 03:57:15,203 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 03:57:15,203 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 03:57:15,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:15,816 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:15,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:15,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:17,938 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867754, now seen corresponding path program 9 times [2024-05-06 03:57:17,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:17,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:17,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:17,983 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:57:17,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:17,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:17,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:18,028 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:57:18,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:57:18,169 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:18,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:57:18,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:18,298 INFO L85 PathProgramCache]: Analyzing trace with hash -2000312289, now seen corresponding path program 10 times [2024-05-06 03:57:18,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:18,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:18,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:57:18,321 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:57:18,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:57:18,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:18,492 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:18,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:20,619 INFO L85 PathProgramCache]: Analyzing trace with hash -186415563, now seen corresponding path program 37 times [2024-05-06 03:57:20,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:20,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:20,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:20,726 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:20,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:20,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:20,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:20,869 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:21,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:21,031 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:21,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:21,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:23,218 INFO L85 PathProgramCache]: Analyzing trace with hash -702749349, now seen corresponding path program 38 times [2024-05-06 03:57:23,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:23,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:23,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:23,314 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:23,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:23,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:23,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:23,424 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:23,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:23,589 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:23,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:23,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:24,701 INFO L85 PathProgramCache]: Analyzing trace with hash 781407059, now seen corresponding path program 39 times [2024-05-06 03:57:24,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:24,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:24,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:24,804 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:24,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:24,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:24,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:24,968 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:25,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:25,151 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:25,151 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:25,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:27,278 INFO L85 PathProgramCache]: Analyzing trace with hash -374547075, now seen corresponding path program 40 times [2024-05-06 03:57:27,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:27,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:27,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:27,385 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:27,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:27,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:27,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:27,479 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:27,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:27,635 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:27,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:27,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:27,901 INFO L85 PathProgramCache]: Analyzing trace with hash -1257254921, now seen corresponding path program 41 times [2024-05-06 03:57:27,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:27,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:27,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:28,005 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:28,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:28,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:28,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:28,172 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:28,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:28,325 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:28,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:30,463 INFO L85 PathProgramCache]: Analyzing trace with hash -445248935, now seen corresponding path program 42 times [2024-05-06 03:57:30,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:30,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:30,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:30,563 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:30,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:30,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:30,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:30,661 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:30,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:30,817 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:30,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:31,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:33,293 INFO L85 PathProgramCache]: Analyzing trace with hash -1880138323, now seen corresponding path program 11 times [2024-05-06 03:57:33,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:33,349 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:57:33,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:33,405 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:57:33,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:57:33,552 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:33,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:57:33,632 INFO L85 PathProgramCache]: Analyzing trace with hash 1845254626, now seen corresponding path program 12 times [2024-05-06 03:57:33,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:33,766 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:33,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:33,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:33,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:33,852 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:33,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:57:33,995 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:33,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:57:34,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:34,059 INFO L85 PathProgramCache]: Analyzing trace with hash 1028924407, now seen corresponding path program 43 times [2024-05-06 03:57:34,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:34,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:34,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:34,170 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:34,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:34,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:34,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:34,268 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:34,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:57:34,420 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:34,420 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:57:34,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:34,511 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 44 times [2024-05-06 03:57:34,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:34,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:34,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:34,605 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:34,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:34,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:34,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:34,702 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:34,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:34,866 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:34,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:36,992 INFO L85 PathProgramCache]: Analyzing trace with hash 98024723, now seen corresponding path program 45 times [2024-05-06 03:57:36,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:36,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:37,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:37,111 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:37,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:37,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:37,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:37,218 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:37,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:57:37,364 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:37,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:57:37,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:37,448 INFO L85 PathProgramCache]: Analyzing trace with hash 582293992, now seen corresponding path program 46 times [2024-05-06 03:57:37,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:37,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:37,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:37,687 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:37,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:37,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:37,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:37,963 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:38,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:57:38,119 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:38,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:57:38,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:38,204 INFO L85 PathProgramCache]: Analyzing trace with hash 431584565, now seen corresponding path program 47 times [2024-05-06 03:57:38,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:38,312 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:38,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:38,416 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:38,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:57:38,559 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:38,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:57:38,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:38,649 INFO L85 PathProgramCache]: Analyzing trace with hash -1712596511, now seen corresponding path program 48 times [2024-05-06 03:57:38,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:38,942 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:38,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:38,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:38,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:39,190 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:39,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:57:39,343 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:39,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:57:39,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:39,413 INFO L85 PathProgramCache]: Analyzing trace with hash -1368990308, now seen corresponding path program 49 times [2024-05-06 03:57:39,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:39,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:39,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:39,511 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:39,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:39,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:39,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:39,657 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:39,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:57:39,792 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:39,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:57:39,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:39,853 INFO L85 PathProgramCache]: Analyzing trace with hash -1827911162, now seen corresponding path program 50 times [2024-05-06 03:57:39,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:39,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:39,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:40,077 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:40,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:40,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:40,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:40,397 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:40,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:57:40,538 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:40,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:57:40,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:40,618 INFO L85 PathProgramCache]: Analyzing trace with hash 777005655, now seen corresponding path program 51 times [2024-05-06 03:57:40,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:40,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:40,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:40,714 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:40,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:40,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:40,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:40,811 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:57:40,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:40,972 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:40,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:43,081 INFO L85 PathProgramCache]: Analyzing trace with hash -422427462, now seen corresponding path program 52 times [2024-05-06 03:57:43,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:43,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:43,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:43,188 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:43,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:43,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:43,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:43,285 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:57:43,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:57:43,493 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:43,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:57:43,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:43,576 INFO L85 PathProgramCache]: Analyzing trace with hash -210348929, now seen corresponding path program 53 times [2024-05-06 03:57:43,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:43,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:43,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:43,792 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:43,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:43,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:43,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:44,002 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:44,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:44,114 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:44,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:44,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:44,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:46,877 INFO L85 PathProgramCache]: Analyzing trace with hash 2069118301, now seen corresponding path program 54 times [2024-05-06 03:57:46,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:46,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:46,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:47,153 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:47,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:47,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:47,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:47,411 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:57:47,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:47,540 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:47,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:49,714 INFO L85 PathProgramCache]: Analyzing trace with hash -1121051060, now seen corresponding path program 5 times [2024-05-06 03:57:49,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:49,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:49,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:49,944 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:49,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:49,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:49,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:50,108 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:50,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:50,243 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:50,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:57:50,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:52,431 INFO L85 PathProgramCache]: Analyzing trace with hash 348250444, now seen corresponding path program 6 times [2024-05-06 03:57:52,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:52,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:52,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:52,706 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:52,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:52,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:52,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:52,933 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:53,016 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:53,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:53,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:55,345 INFO L85 PathProgramCache]: Analyzing trace with hash -49650012, now seen corresponding path program 1 times [2024-05-06 03:57:55,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:55,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:55,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:55,693 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:55,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:55,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:55,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:55,974 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:56,135 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:57:56,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:57:56,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:57:58,448 INFO L85 PathProgramCache]: Analyzing trace with hash -400848100, now seen corresponding path program 2 times [2024-05-06 03:57:58,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:58,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:58,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:59,033 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:59,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:57:59,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:57:59,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:57:59,234 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:57:59,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:57:59,379 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:57:59,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:01,518 INFO L85 PathProgramCache]: Analyzing trace with hash -2114372933, now seen corresponding path program 1 times [2024-05-06 03:58:01,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:01,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:01,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:01,696 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:01,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:01,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:01,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:01,916 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:02,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:02,041 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:02,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:02,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:02,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:04,283 INFO L85 PathProgramCache]: Analyzing trace with hash -2095417091, now seen corresponding path program 2 times [2024-05-06 03:58:04,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:04,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:04,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:04,507 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:04,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:04,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:04,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:04,775 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:04,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:04,929 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:04,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:05,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:05,826 INFO L85 PathProgramCache]: Analyzing trace with hash 70341742, now seen corresponding path program 1 times [2024-05-06 03:58:05,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:05,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:05,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:06,004 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:06,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:06,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:06,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:06,202 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:06,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:06,352 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:06,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:08,392 INFO L85 PathProgramCache]: Analyzing trace with hash 1099653866, now seen corresponding path program 2 times [2024-05-06 03:58:08,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:08,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:08,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:08,677 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:08,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:08,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:08,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:08,907 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:09,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:09,053 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:09,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:09,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:09,578 INFO L85 PathProgramCache]: Analyzing trace with hash -1937393571, now seen corresponding path program 1 times [2024-05-06 03:58:09,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:09,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:09,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:09,795 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:09,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:09,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:09,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:09,970 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:10,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:10,122 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:10,122 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:10,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:10,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:12,334 INFO L85 PathProgramCache]: Analyzing trace with hash -2035104997, now seen corresponding path program 2 times [2024-05-06 03:58:12,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:12,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:12,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:12,605 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:12,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:12,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:12,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:12,823 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:12,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:12,990 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:12,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:13,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:15,108 INFO L85 PathProgramCache]: Analyzing trace with hash -1725064559, now seen corresponding path program 55 times [2024-05-06 03:58:15,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:15,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:15,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:15,291 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:15,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:15,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:15,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:15,499 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:15,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:15,648 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:15,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:15,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:17,796 INFO L85 PathProgramCache]: Analyzing trace with hash 1319875175, now seen corresponding path program 56 times [2024-05-06 03:58:17,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:17,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:17,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:18,017 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:18,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:18,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:18,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:18,287 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:58:18,484 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:58:18,492 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:18,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:58:18,578 INFO L85 PathProgramCache]: Analyzing trace with hash -1549937964, now seen corresponding path program 1 times [2024-05-06 03:58:18,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:18,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:18,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:18,677 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:18,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:18,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:18,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:18,775 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:18,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:58:18,918 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:18,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:58:18,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:19,001 INFO L85 PathProgramCache]: Analyzing trace with hash 1461445790, now seen corresponding path program 2 times [2024-05-06 03:58:19,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:19,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:19,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:19,109 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:19,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:19,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:19,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:19,276 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:19,366 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:19,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:58:19,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:21,701 INFO L85 PathProgramCache]: Analyzing trace with hash -1664318736, now seen corresponding path program 3 times [2024-05-06 03:58:21,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:21,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:21,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:21,814 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:21,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:21,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:21,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:21,929 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:22,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:22,080 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:22,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:22,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:22,142 INFO L85 PathProgramCache]: Analyzing trace with hash -604187212, now seen corresponding path program 13 times [2024-05-06 03:58:22,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:22,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:22,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:22,238 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:22,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:22,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:22,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:22,412 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:22,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:22,590 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:22,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:22,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:22,669 INFO L85 PathProgramCache]: Analyzing trace with hash -130366018, now seen corresponding path program 14 times [2024-05-06 03:58:22,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:22,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:22,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:22,783 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:22,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:22,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:22,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:22,885 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:23,022 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:23,029 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:23,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:23,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:23,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1404963093, now seen corresponding path program 1 times [2024-05-06 03:58:23,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:23,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:23,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:23,222 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:23,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:23,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:23,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:23,323 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:23,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:23,507 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:23,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:23,617 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:23,635 INFO L85 PathProgramCache]: Analyzing trace with hash 960901031, now seen corresponding path program 2 times [2024-05-06 03:58:23,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:23,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:23,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:23,738 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:23,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:23,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:23,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:23,861 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:23,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:58:24,000 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:24,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:58:24,066 INFO L85 PathProgramCache]: Analyzing trace with hash -322416092, now seen corresponding path program 1 times [2024-05-06 03:58:24,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:24,161 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:24,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:24,255 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:24,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:58:24,407 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:24,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:58:24,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:24,500 INFO L85 PathProgramCache]: Analyzing trace with hash 794352462, now seen corresponding path program 2 times [2024-05-06 03:58:24,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:24,645 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:24,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:24,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:24,746 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:24,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:58:24,902 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:24,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:58:24,996 INFO L85 PathProgramCache]: Analyzing trace with hash -287495184, now seen corresponding path program 1 times [2024-05-06 03:58:24,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:24,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:25,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:25,107 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:25,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:25,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:25,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:25,207 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:25,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:25,361 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:25,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:25,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:25,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1475104766, now seen corresponding path program 2 times [2024-05-06 03:58:25,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:25,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:25,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:25,570 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:25,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:25,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:25,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:25,721 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:25,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:58:25,848 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:25,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:58:25,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:25,916 INFO L85 PathProgramCache]: Analyzing trace with hash -1256200026, now seen corresponding path program 1 times [2024-05-06 03:58:25,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:25,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:25,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:26,020 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:26,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:26,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:26,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:26,120 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:26,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:58:26,322 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:26,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:58:26,417 INFO L85 PathProgramCache]: Analyzing trace with hash -768266100, now seen corresponding path program 2 times [2024-05-06 03:58:26,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:26,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:26,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:26,524 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:26,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:26,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:26,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:26,675 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:26,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:26,850 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:26,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:26,960 INFO L85 PathProgramCache]: Analyzing trace with hash 98024754, now seen corresponding path program 1 times [2024-05-06 03:58:26,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:26,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:26,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:27,076 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:27,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:27,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:27,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:27,176 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:27,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:58:27,315 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:27,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:58:27,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:27,420 INFO L85 PathProgramCache]: Analyzing trace with hash 1142960768, now seen corresponding path program 2 times [2024-05-06 03:58:27,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:27,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:27,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:27,521 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:27,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:27,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:27,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:27,623 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:27,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:58:27,777 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:27,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:58:27,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:27,864 INFO L85 PathProgramCache]: Analyzing trace with hash 1942824745, now seen corresponding path program 57 times [2024-05-06 03:58:27,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:27,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:27,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:27,957 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:27,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:27,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:28,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:28,118 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 03:58:28,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:28,267 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:28,267 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:28,346 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:28,360 INFO L85 PathProgramCache]: Analyzing trace with hash 88652713, now seen corresponding path program 58 times [2024-05-06 03:58:28,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:28,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:28,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:28,461 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:28,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:28,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:28,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:28,560 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 03:58:28,657 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:58:28,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:58:28,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:30,991 INFO L85 PathProgramCache]: Analyzing trace with hash 1977853054, now seen corresponding path program 1 times [2024-05-06 03:58:30,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:30,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:31,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:58:31,006 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:58:31,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:58:31,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:31,209 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:31,210 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:31,266 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:33,389 INFO L85 PathProgramCache]: Analyzing trace with hash 1183903022, now seen corresponding path program 2 times [2024-05-06 03:58:33,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:33,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:33,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:33,435 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:58:33,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:33,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:33,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:33,480 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 03:58:33,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 03:58:33,482 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=420, Invalid=11136, Unknown=0, NotChecked=0, Total=11556 [2024-05-06 03:58:33,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:33,810 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:33,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:33,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:34,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:34,395 INFO L85 PathProgramCache]: Analyzing trace with hash -1685472241, now seen corresponding path program 59 times [2024-05-06 03:58:34,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:34,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:34,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:34,655 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 03:58:34,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:34,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:34,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:34,735 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 03:58:34,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:58:34,878 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:34,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:58:34,939 INFO L85 PathProgramCache]: Analyzing trace with hash 921527302, now seen corresponding path program 60 times [2024-05-06 03:58:34,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:34,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:34,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:35,027 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:35,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:35,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:35,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:35,114 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:35,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:35,246 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:35,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:35,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:35,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:35,920 INFO L85 PathProgramCache]: Analyzing trace with hash -1369120292, now seen corresponding path program 61 times [2024-05-06 03:58:35,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:35,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:35,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:36,120 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:36,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:36,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:36,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:36,222 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:36,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:36,377 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:36,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:38,528 INFO L85 PathProgramCache]: Analyzing trace with hash 935107924, now seen corresponding path program 62 times [2024-05-06 03:58:38,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:38,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:38,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:38,627 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:38,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:38,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:38,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:38,726 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:38,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:38,882 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:38,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:38,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:39,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:41,145 INFO L85 PathProgramCache]: Analyzing trace with hash -919312692, now seen corresponding path program 63 times [2024-05-06 03:58:41,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:41,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:41,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:41,245 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:41,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:41,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:41,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:41,345 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:41,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:41,580 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:41,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:43,824 INFO L85 PathProgramCache]: Analyzing trace with hash 1202307684, now seen corresponding path program 64 times [2024-05-06 03:58:43,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:43,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:43,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:43,968 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:43,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:43,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:43,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:44,082 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:44,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:44,219 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:44,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:46,432 INFO L85 PathProgramCache]: Analyzing trace with hash 1320282462, now seen corresponding path program 65 times [2024-05-06 03:58:46,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:46,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:46,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:46,530 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:46,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:46,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:46,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:46,648 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:46,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:46,806 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:46,806 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:48,988 INFO L85 PathProgramCache]: Analyzing trace with hash -2056950638, now seen corresponding path program 66 times [2024-05-06 03:58:48,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:48,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:49,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:49,087 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:49,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:49,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:49,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:49,254 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:49,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:49,406 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:49,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:49,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:51,540 INFO L85 PathProgramCache]: Analyzing trace with hash -1497424218, now seen corresponding path program 67 times [2024-05-06 03:58:51,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:51,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:51,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:51,651 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:51,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:51,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:51,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:51,752 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:51,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:58:51,897 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:51,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:58:51,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:51,979 INFO L85 PathProgramCache]: Analyzing trace with hash 824489993, now seen corresponding path program 68 times [2024-05-06 03:58:51,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:51,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:52,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:52,114 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:52,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:52,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:52,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:52,226 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:52,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:52,373 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:52,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:52,467 INFO L85 PathProgramCache]: Analyzing trace with hash 262892318, now seen corresponding path program 69 times [2024-05-06 03:58:52,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:52,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:52,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:52,589 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:52,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:52,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:52,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:52,688 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 03:58:52,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:52,866 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:52,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:52,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:53,005 INFO L85 PathProgramCache]: Analyzing trace with hash 1685113594, now seen corresponding path program 70 times [2024-05-06 03:58:53,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:53,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:53,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:53,197 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:53,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:53,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:53,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:53,317 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:53,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:58:53,424 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:53,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:58:55,518 INFO L85 PathProgramCache]: Analyzing trace with hash 1685113594, now seen corresponding path program 71 times [2024-05-06 03:58:55,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:55,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:55,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:55,618 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:55,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:55,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:55,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:55,719 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:58:55,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:58:55,852 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:55,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:58:55,924 INFO L85 PathProgramCache]: Analyzing trace with hash -1463608305, now seen corresponding path program 72 times [2024-05-06 03:58:55,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:55,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:55,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:57,448 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:58:57,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:57,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:57,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:57,739 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:58:57,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:57,884 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:57,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:57,968 INFO L85 PathProgramCache]: Analyzing trace with hash 236877486, now seen corresponding path program 73 times [2024-05-06 03:58:57,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:57,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:57,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:58,332 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:58:58,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:58,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:58,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:58,670 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:58:58,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:58:58,825 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:58,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:58:58,887 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:58:58,902 INFO L85 PathProgramCache]: Analyzing trace with hash -393120038, now seen corresponding path program 74 times [2024-05-06 03:58:58,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:58,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:58,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:59,196 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:58:59,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:59,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:59,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:58:59,558 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:58:59,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:58:59,700 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:58:59,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:58:59,784 INFO L85 PathProgramCache]: Analyzing trace with hash -821081853, now seen corresponding path program 75 times [2024-05-06 03:58:59,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:58:59,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:58:59,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:00,059 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:00,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:00,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:00,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:00,353 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:00,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:00,506 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:00,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:00,590 INFO L85 PathProgramCache]: Analyzing trace with hash 154315245, now seen corresponding path program 76 times [2024-05-06 03:59:00,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:00,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:00,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:00,930 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:00,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:00,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:00,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:01,227 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:01,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:01,344 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:01,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:01,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:01,432 INFO L85 PathProgramCache]: Analyzing trace with hash -590793200, now seen corresponding path program 77 times [2024-05-06 03:59:01,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:01,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:01,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:01,715 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:01,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:01,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:01,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:02,024 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:02,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:02,156 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:02,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:02,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:04,399 INFO L85 PathProgramCache]: Analyzing trace with hash 2131587681, now seen corresponding path program 78 times [2024-05-06 03:59:04,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:04,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:04,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:05,037 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:05,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:05,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:05,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:05,436 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:05,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:05,587 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:05,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:05,663 INFO L85 PathProgramCache]: Analyzing trace with hash 1654709176, now seen corresponding path program 79 times [2024-05-06 03:59:05,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:05,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:05,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:05,962 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:05,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:05,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:05,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:06,284 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:06,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:06,549 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:06,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:08,734 INFO L85 PathProgramCache]: Analyzing trace with hash -243622588, now seen corresponding path program 80 times [2024-05-06 03:59:08,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:08,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:08,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:09,191 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:09,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:09,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:09,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:09,477 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:09,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:09,598 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:09,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:09,753 INFO L85 PathProgramCache]: Analyzing trace with hash -1315758139, now seen corresponding path program 7 times [2024-05-06 03:59:09,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:09,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:09,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:09,922 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:09,922 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:09,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:09,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:10,041 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:10,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:10,197 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:10,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:10,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:12,379 INFO L85 PathProgramCache]: Analyzing trace with hash 1502387891, now seen corresponding path program 8 times [2024-05-06 03:59:12,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:12,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:12,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:12,496 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:12,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:12,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:12,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:12,622 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:12,694 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:12,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:59:12,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:14,917 INFO L85 PathProgramCache]: Analyzing trace with hash -292099939, now seen corresponding path program 4 times [2024-05-06 03:59:14,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:14,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:14,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:15,067 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:15,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:15,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:15,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:15,204 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:15,305 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:15,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:59:15,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:17,631 INFO L85 PathProgramCache]: Analyzing trace with hash 1294630997, now seen corresponding path program 5 times [2024-05-06 03:59:17,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:17,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:17,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:17,752 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:17,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:17,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:17,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:17,871 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:18,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:18,009 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:18,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:18,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:18,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:20,745 INFO L85 PathProgramCache]: Analyzing trace with hash -1566464478, now seen corresponding path program 3 times [2024-05-06 03:59:20,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:20,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:20,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:20,858 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:20,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:20,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:20,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:20,983 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:21,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:21,145 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:21,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:21,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:23,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1226902858, now seen corresponding path program 4 times [2024-05-06 03:59:23,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:23,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:23,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:23,413 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:23,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:23,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:23,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:23,618 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:23,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:23,770 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:23,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:25,958 INFO L85 PathProgramCache]: Analyzing trace with hash -1297457113, now seen corresponding path program 3 times [2024-05-06 03:59:25,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:25,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:25,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:26,076 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:26,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:26,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:26,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:26,188 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:26,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:26,332 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:26,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:26,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:27,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:29,306 INFO L85 PathProgramCache]: Analyzing trace with hash -119255535, now seen corresponding path program 4 times [2024-05-06 03:59:29,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:29,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:29,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:29,450 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:29,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:29,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:29,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:29,575 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:29,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:29,728 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:29,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:29,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:31,919 INFO L85 PathProgramCache]: Analyzing trace with hash 927977860, now seen corresponding path program 3 times [2024-05-06 03:59:31,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:31,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:32,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:32,113 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:32,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:32,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:32,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:32,227 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:32,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:32,377 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:32,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:34,806 INFO L85 PathProgramCache]: Analyzing trace with hash 1250711316, now seen corresponding path program 4 times [2024-05-06 03:59:34,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:34,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:34,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:34,925 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:34,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:34,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:34,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:35,049 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:35,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:35,184 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:35,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:35,505 INFO L85 PathProgramCache]: Analyzing trace with hash -1078443894, now seen corresponding path program 81 times [2024-05-06 03:59:35,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:35,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:35,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:35,629 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:35,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:35,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:35,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:35,842 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:35,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 03:59:35,995 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:35,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 03:59:36,273 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:38,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1841511246, now seen corresponding path program 82 times [2024-05-06 03:59:38,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:38,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:38,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:38,775 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:38,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:38,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:38,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:38,891 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:39,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:59:39,034 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:39,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:59:39,122 INFO L85 PathProgramCache]: Analyzing trace with hash 1480103803, now seen corresponding path program 3 times [2024-05-06 03:59:39,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:39,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:39,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:39,269 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:39,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:39,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:39,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:39,385 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:39,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:39,550 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:39,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:39,627 INFO L85 PathProgramCache]: Analyzing trace with hash 1867013399, now seen corresponding path program 4 times [2024-05-06 03:59:39,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:39,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:39,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:39,816 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:39,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:39,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:39,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:39,943 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:40,020 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 03:59:40,020 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 03:59:40,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:42,270 INFO L85 PathProgramCache]: Analyzing trace with hash 31160361, now seen corresponding path program 6 times [2024-05-06 03:59:42,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:42,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:42,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:42,393 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:42,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:42,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:42,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:42,513 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:42,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:42,674 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:42,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:42,753 INFO L85 PathProgramCache]: Analyzing trace with hash 1848860717, now seen corresponding path program 15 times [2024-05-06 03:59:42,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:42,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:42,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:42,862 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:42,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:42,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:42,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:42,976 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:43,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:43,150 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:43,151 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:43,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:43,235 INFO L85 PathProgramCache]: Analyzing trace with hash 852548133, now seen corresponding path program 16 times [2024-05-06 03:59:43,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:43,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:43,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:43,434 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:43,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:43,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:43,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:43,564 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:43,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:43,715 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:43,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:43,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:43,797 INFO L85 PathProgramCache]: Analyzing trace with hash -633095854, now seen corresponding path program 3 times [2024-05-06 03:59:43,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:43,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:43,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:43,904 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:43,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:43,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:43,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:44,012 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:44,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:44,147 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:44,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:44,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:44,227 INFO L85 PathProgramCache]: Analyzing trace with hash 1962439264, now seen corresponding path program 4 times [2024-05-06 03:59:44,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:44,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:44,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:44,345 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:44,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:44,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:44,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:44,460 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:44,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:59:44,612 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:44,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:59:44,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:44,697 INFO L85 PathProgramCache]: Analyzing trace with hash 1642145501, now seen corresponding path program 3 times [2024-05-06 03:59:44,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:44,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:44,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:44,870 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:44,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:44,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:44,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:44,974 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:45,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:45,126 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:45,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:45,214 INFO L85 PathProgramCache]: Analyzing trace with hash -1251549835, now seen corresponding path program 4 times [2024-05-06 03:59:45,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:45,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:45,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:45,331 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:45,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:45,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:45,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:45,445 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:45,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:45,600 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:45,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:45,684 INFO L85 PathProgramCache]: Analyzing trace with hash 191519767, now seen corresponding path program 3 times [2024-05-06 03:59:45,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:45,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:45,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:45,790 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:45,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:45,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:45,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:45,895 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:46,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:59:46,046 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:46,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:59:46,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:46,125 INFO L85 PathProgramCache]: Analyzing trace with hash -155628293, now seen corresponding path program 4 times [2024-05-06 03:59:46,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:46,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:46,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:46,321 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:46,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:46,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:46,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:46,446 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:46,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:59:46,597 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:46,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:59:46,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:46,679 INFO L85 PathProgramCache]: Analyzing trace with hash 698914719, now seen corresponding path program 3 times [2024-05-06 03:59:46,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:46,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:46,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:46,790 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:46,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:46,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:46,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:46,898 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:47,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:59:47,054 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:47,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:59:47,142 INFO L85 PathProgramCache]: Analyzing trace with hash 1213960307, now seen corresponding path program 4 times [2024-05-06 03:59:47,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:47,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:47,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:47,256 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:47,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:47,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:47,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:47,369 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:47,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:59:47,602 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:47,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:59:47,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:47,707 INFO L85 PathProgramCache]: Analyzing trace with hash 1685113625, now seen corresponding path program 3 times [2024-05-06 03:59:47,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:47,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:47,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:47,810 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:47,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:47,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:47,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:47,913 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:48,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:48,057 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:48,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:48,156 INFO L85 PathProgramCache]: Analyzing trace with hash -1286948423, now seen corresponding path program 4 times [2024-05-06 03:59:48,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:48,267 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:48,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:48,398 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 03:59:48,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:48,544 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:48,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:48,626 INFO L85 PathProgramCache]: Analyzing trace with hash -361283486, now seen corresponding path program 83 times [2024-05-06 03:59:48,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:48,738 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:48,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:48,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:48,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:48,855 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 03:59:49,061 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:49,069 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:49,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:49,164 INFO L85 PathProgramCache]: Analyzing trace with hash -1652299440, now seen corresponding path program 84 times [2024-05-06 03:59:49,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:49,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:49,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:49,663 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:49,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:49,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:49,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:49,931 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:50,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:59:50,184 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:50,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:59:50,253 INFO L85 PathProgramCache]: Analyzing trace with hash -931689407, now seen corresponding path program 13 times [2024-05-06 03:59:50,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:50,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:50,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:50,274 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:50,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:50,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:50,455 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:50,455 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:50,599 INFO L85 PathProgramCache]: Analyzing trace with hash 1355418816, now seen corresponding path program 14 times [2024-05-06 03:59:50,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:50,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:50,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:50,622 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:50,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:50,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:50,828 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:50,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:50,931 INFO L85 PathProgramCache]: Analyzing trace with hash 1844838499, now seen corresponding path program 15 times [2024-05-06 03:59:50,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:50,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:50,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:50,961 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:50,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:51,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:51,393 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:51,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:51,514 INFO L85 PathProgramCache]: Analyzing trace with hash 1844838530, now seen corresponding path program 1 times [2024-05-06 03:59:51,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:51,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:51,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:52,373 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:52,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:52,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:52,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:52,466 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:52,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:52,627 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:52,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:52,716 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:52,731 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867741, now seen corresponding path program 16 times [2024-05-06 03:59:52,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:52,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:52,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:52,753 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:52,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:53,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 03:59:53,332 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:53,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 03:59:53,428 INFO L85 PathProgramCache]: Analyzing trace with hash 2056135130, now seen corresponding path program 1 times [2024-05-06 03:59:53,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:53,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:53,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:53,446 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:53,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:54,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 37 [2024-05-06 03:59:54,471 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:54,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 24 [2024-05-06 03:59:54,568 INFO L85 PathProgramCache]: Analyzing trace with hash 971577004, now seen corresponding path program 1 times [2024-05-06 03:59:54,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:54,598 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:54,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:54,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 03:59:54,794 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:54,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 03:59:54,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:54,928 INFO L85 PathProgramCache]: Analyzing trace with hash -1042051599, now seen corresponding path program 1 times [2024-05-06 03:59:54,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:54,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:54,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:54,949 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:54,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:55,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:55,147 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:55,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:55,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:55,243 INFO L85 PathProgramCache]: Analyzing trace with hash 129845306, now seen corresponding path program 1 times [2024-05-06 03:59:55,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:55,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:55,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:55,333 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:55,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:55,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:55,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:55,423 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:55,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 03:59:55,595 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:55,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 03:59:55,728 INFO L85 PathProgramCache]: Analyzing trace with hash -1688331357, now seen corresponding path program 2 times [2024-05-06 03:59:55,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:55,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:55,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:55,749 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:55,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:55,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 03:59:55,962 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:55,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 03:59:56,089 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:56,133 INFO L85 PathProgramCache]: Analyzing trace with hash 733550021, now seen corresponding path program 1 times [2024-05-06 03:59:56,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:56,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:56,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:56,154 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:56,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:56,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 03:59:56,365 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:56,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 03:59:56,608 INFO L85 PathProgramCache]: Analyzing trace with hash -726351048, now seen corresponding path program 1 times [2024-05-06 03:59:56,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:56,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:56,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:56,627 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:56,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:56,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:56,809 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:56,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:56,916 INFO L85 PathProgramCache]: Analyzing trace with hash 1392243011, now seen corresponding path program 1 times [2024-05-06 03:59:56,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:56,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:56,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:57,005 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:57,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:57,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:57,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:57,098 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 03:59:57,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:57,255 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:57,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:57,356 INFO L85 PathProgramCache]: Analyzing trace with hash 668610810, now seen corresponding path program 2 times [2024-05-06 03:59:57,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:57,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:57,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:57,376 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:57,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:57,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 03:59:57,567 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:57,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 03:59:57,685 INFO L85 PathProgramCache]: Analyzing trace with hash -962804210, now seen corresponding path program 1 times [2024-05-06 03:59:57,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:57,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:57,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:57,701 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:57,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:57,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 03:59:57,898 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:57,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 03:59:57,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:58,013 INFO L85 PathProgramCache]: Analyzing trace with hash -439072433, now seen corresponding path program 1 times [2024-05-06 03:59:58,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:58,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:58,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:58,032 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:58,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:58,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 03:59:58,300 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:58,466 INFO L85 PathProgramCache]: Analyzing trace with hash -1942043374, now seen corresponding path program 1 times [2024-05-06 03:59:58,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:58,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:58,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:58,488 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 03:59:58,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 03:59:58,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 03:59:58,662 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:58,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 03:59:58,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:58,825 INFO L85 PathProgramCache]: Analyzing trace with hash 2086605437, now seen corresponding path program 1 times [2024-05-06 03:59:58,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:58,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:58,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,247 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:59:59,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:59,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,285 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:59:59,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 03:59:59,446 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:59,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 03:59:59,564 INFO L85 PathProgramCache]: Analyzing trace with hash 260259612, now seen corresponding path program 2 times [2024-05-06 03:59:59,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:59,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,655 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:59,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:59,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,738 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 03:59:59,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 03:59:59,887 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 03:59:59,887 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 03:59:59,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 03:59:59,948 INFO L85 PathProgramCache]: Analyzing trace with hash -521886112, now seen corresponding path program 3 times [2024-05-06 03:59:59,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 03:59:59,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 03:59:59,986 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 03:59:59,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 03:59:59,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:00,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:00,026 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:00,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:00,154 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:00,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:00,215 INFO L85 PathProgramCache]: Analyzing trace with hash 325762656, now seen corresponding path program 4 times [2024-05-06 04:00:00,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:00,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:00,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:00,304 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:00,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:00,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:00,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:00,393 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:00,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:00,519 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:00,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:00,577 INFO L85 PathProgramCache]: Analyzing trace with hash -1179616151, now seen corresponding path program 5 times [2024-05-06 04:00:00,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:00,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:00,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:00,615 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:00,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:00,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:00,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:00,727 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:00,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:00,886 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:00,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:00,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:00,971 INFO L85 PathProgramCache]: Analyzing trace with hash 1624515839, now seen corresponding path program 6 times [2024-05-06 04:00:00,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:00,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:00,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:01,011 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:01,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:01,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:01,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:01,050 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:01,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:00:01,203 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:01,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:00:01,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:01,309 INFO L85 PathProgramCache]: Analyzing trace with hash 1556995969, now seen corresponding path program 7 times [2024-05-06 04:00:01,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:01,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:01,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:01,334 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:01,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:01,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:01,478 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:01,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:01,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:01,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1556995969, now seen corresponding path program 8 times [2024-05-06 04:00:01,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:01,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:01,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:01,606 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:01,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:01,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:01,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:01,658 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:01,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:01,827 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:01,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:01,920 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:01,932 INFO L85 PathProgramCache]: Analyzing trace with hash 1745608350, now seen corresponding path program 1 times [2024-05-06 04:00:01,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:01,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:01,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:02,148 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:02,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:02,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:02,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:02,197 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:02,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:02,354 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:02,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:02,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:02,449 INFO L85 PathProgramCache]: Analyzing trace with hash -82237399, now seen corresponding path program 1 times [2024-05-06 04:00:02,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:02,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:02,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:02,499 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:02,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:02,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:02,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:02,548 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:02,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:02,678 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:02,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:02,780 INFO L85 PathProgramCache]: Analyzing trace with hash -1111031488, now seen corresponding path program 1 times [2024-05-06 04:00:02,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:02,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:02,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:02,914 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:02,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:02,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:02,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:02,964 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:03,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:03,126 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:03,126 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:03,210 INFO L85 PathProgramCache]: Analyzing trace with hash -2114049717, now seen corresponding path program 1 times [2024-05-06 04:00:03,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:03,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:03,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:03,257 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:03,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:03,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:03,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:03,304 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:03,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:00:03,457 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:03,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:00:03,519 INFO L85 PathProgramCache]: Analyzing trace with hash 1871467491, now seen corresponding path program 9 times [2024-05-06 04:00:03,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:03,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:03,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:03,580 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:03,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:03,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:03,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:03,645 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:00:03,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:00:03,829 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:03,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:00:03,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:03,922 INFO L85 PathProgramCache]: Analyzing trace with hash -73801945, now seen corresponding path program 2 times [2024-05-06 04:00:03,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:03,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:03,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:03,939 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:03,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:04,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:04,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:04,297 INFO L85 PathProgramCache]: Analyzing trace with hash 2007107509, now seen corresponding path program 3 times [2024-05-06 04:00:04,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:04,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:04,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:04,317 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:04,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:04,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:04,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:04,698 INFO L85 PathProgramCache]: Analyzing trace with hash -1032477900, now seen corresponding path program 1 times [2024-05-06 04:00:04,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:04,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:04,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:04,719 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:04,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:05,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:05,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:05,262 INFO L85 PathProgramCache]: Analyzing trace with hash -726042412, now seen corresponding path program 1 times [2024-05-06 04:00:05,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:05,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:05,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:05,284 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:05,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:05,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:05,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:05,710 INFO L85 PathProgramCache]: Analyzing trace with hash -439062730, now seen corresponding path program 1 times [2024-05-06 04:00:05,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:05,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:05,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:05,739 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:05,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:05,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 04:00:05,936 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:05,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 04:00:06,050 INFO L85 PathProgramCache]: Analyzing trace with hash 540026006, now seen corresponding path program 1 times [2024-05-06 04:00:06,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:06,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:06,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:06,069 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:06,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:06,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:06,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:06,512 INFO L85 PathProgramCache]: Analyzing trace with hash 540026006, now seen corresponding path program 2 times [2024-05-06 04:00:06,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:06,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:06,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:06,529 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:06,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:06,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:06,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:06,885 INFO L85 PathProgramCache]: Analyzing trace with hash -1031523596, now seen corresponding path program 1 times [2024-05-06 04:00:06,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:06,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:06,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:07,126 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:07,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:07,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:07,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:07,178 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:07,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:07,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:07,553 INFO L85 PathProgramCache]: Analyzing trace with hash -726011629, now seen corresponding path program 1 times [2024-05-06 04:00:07,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:07,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:07,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:07,606 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:07,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:07,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:07,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:07,659 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:07,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:07,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:08,066 INFO L85 PathProgramCache]: Analyzing trace with hash -439061738, now seen corresponding path program 1 times [2024-05-06 04:00:08,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:08,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:08,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:08,122 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:08,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:08,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:08,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:08,260 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:08,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:08,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:08,672 INFO L85 PathProgramCache]: Analyzing trace with hash 540026037, now seen corresponding path program 1 times [2024-05-06 04:00:08,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:08,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:08,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:08,724 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:08,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:08,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:08,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:08,776 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:00:08,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:00:09,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:09,192 INFO L85 PathProgramCache]: Analyzing trace with hash 987251513, now seen corresponding path program 1 times [2024-05-06 04:00:09,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:09,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:09,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:09,210 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:00:09,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:00:09,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:00:09,409 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:09,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:00:09,539 INFO L85 PathProgramCache]: Analyzing trace with hash -736812741, now seen corresponding path program 1 times [2024-05-06 04:00:09,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:09,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:09,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:09,761 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:00:09,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:09,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:09,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:09,803 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:00:09,804 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-06 04:00:09,809 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=717, Invalid=26015, Unknown=0, NotChecked=0, Total=26732 [2024-05-06 04:00:10,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:10,080 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:10,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:10,351 INFO L85 PathProgramCache]: Analyzing trace with hash -1685472241, now seen corresponding path program 85 times [2024-05-06 04:00:10,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:10,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:10,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:10,435 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:00:10,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:10,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:10,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:10,515 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:00:10,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:00:10,675 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:10,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:00:10,763 INFO L85 PathProgramCache]: Analyzing trace with hash 921527302, now seen corresponding path program 86 times [2024-05-06 04:00:10,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:10,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:10,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:10,863 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:10,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:10,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:10,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:11,060 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:11,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:11,220 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:11,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:11,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:13,526 INFO L85 PathProgramCache]: Analyzing trace with hash -1369120292, now seen corresponding path program 87 times [2024-05-06 04:00:13,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:13,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:13,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:13,636 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:13,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:13,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:13,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:13,742 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:13,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:13,909 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:13,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:13,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:16,093 INFO L85 PathProgramCache]: Analyzing trace with hash 935107924, now seen corresponding path program 88 times [2024-05-06 04:00:16,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:16,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:16,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:16,193 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:16,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:16,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:16,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:16,293 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:16,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:16,410 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:16,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:18,555 INFO L85 PathProgramCache]: Analyzing trace with hash -919312692, now seen corresponding path program 89 times [2024-05-06 04:00:18,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:18,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:18,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:18,689 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:18,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:18,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:18,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:18,797 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:19,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:19,040 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:19,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:21,274 INFO L85 PathProgramCache]: Analyzing trace with hash 1202307684, now seen corresponding path program 90 times [2024-05-06 04:00:21,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:21,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:21,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:21,417 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:21,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:21,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:21,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:21,564 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:21,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:21,774 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:21,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:25,467 INFO L85 PathProgramCache]: Analyzing trace with hash 1320282462, now seen corresponding path program 91 times [2024-05-06 04:00:25,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:25,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:25,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:25,571 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:25,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:25,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:25,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:25,673 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:25,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:25,817 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:25,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:28,970 INFO L85 PathProgramCache]: Analyzing trace with hash -2056950638, now seen corresponding path program 92 times [2024-05-06 04:00:28,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:28,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:28,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:29,072 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:29,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:29,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:29,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:29,179 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:29,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:29,331 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:29,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:29,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:31,487 INFO L85 PathProgramCache]: Analyzing trace with hash -1497424218, now seen corresponding path program 93 times [2024-05-06 04:00:31,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:31,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:31,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:31,654 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:31,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:31,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:31,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:31,759 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:31,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:00:31,909 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:31,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:00:31,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:31,984 INFO L85 PathProgramCache]: Analyzing trace with hash 824489993, now seen corresponding path program 94 times [2024-05-06 04:00:31,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:31,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:32,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:32,085 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:32,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:32,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:32,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:32,185 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:32,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:00:32,318 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:32,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:00:32,390 INFO L85 PathProgramCache]: Analyzing trace with hash 262892318, now seen corresponding path program 95 times [2024-05-06 04:00:32,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:32,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:32,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:32,489 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:32,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:32,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:32,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:32,590 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:00:32,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:00:32,725 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:32,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:00:32,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1685113594, now seen corresponding path program 96 times [2024-05-06 04:00:32,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:32,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:32,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:32,910 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:32,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:32,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:32,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:33,098 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:33,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:33,250 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:33,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:35,446 INFO L85 PathProgramCache]: Analyzing trace with hash 1685113594, now seen corresponding path program 97 times [2024-05-06 04:00:35,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:35,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:35,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:35,546 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:35,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:35,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:35,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:35,675 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:35,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:00:35,825 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:35,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:00:35,915 INFO L85 PathProgramCache]: Analyzing trace with hash -1463608305, now seen corresponding path program 98 times [2024-05-06 04:00:35,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:35,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:35,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:36,210 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:36,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:36,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:36,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:36,593 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:36,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:00:36,709 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:36,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:00:36,774 INFO L85 PathProgramCache]: Analyzing trace with hash 236877486, now seen corresponding path program 99 times [2024-05-06 04:00:36,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:36,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:36,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:37,038 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:37,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:37,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:37,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:37,292 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:37,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:00:37,400 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:37,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:00:37,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:37,459 INFO L85 PathProgramCache]: Analyzing trace with hash -393120038, now seen corresponding path program 100 times [2024-05-06 04:00:37,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:37,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:37,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:37,806 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:37,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:37,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:37,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:38,131 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:38,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:00:38,282 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:38,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:00:38,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:38,345 INFO L85 PathProgramCache]: Analyzing trace with hash -821081853, now seen corresponding path program 101 times [2024-05-06 04:00:38,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:38,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:38,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:38,606 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:38,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:38,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:38,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:38,950 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:39,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:00:39,064 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:39,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:00:39,124 INFO L85 PathProgramCache]: Analyzing trace with hash 154315245, now seen corresponding path program 102 times [2024-05-06 04:00:39,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:39,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:39,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:39,416 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:39,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:39,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:39,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:39,702 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 5 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:39,833 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:00:39,839 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:39,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:00:39,905 INFO L85 PathProgramCache]: Analyzing trace with hash -590793200, now seen corresponding path program 103 times [2024-05-06 04:00:39,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:39,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:39,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:40,292 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:40,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:40,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:40,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:40,577 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 4 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:40,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:40,692 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:40,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:40,920 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:40,944 INFO L85 PathProgramCache]: Analyzing trace with hash 2131587681, now seen corresponding path program 104 times [2024-05-06 04:00:40,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:40,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:40,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:41,313 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:41,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:41,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:41,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:41,710 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:41,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:00:41,875 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:41,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:00:41,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:41,965 INFO L85 PathProgramCache]: Analyzing trace with hash 1654709176, now seen corresponding path program 105 times [2024-05-06 04:00:41,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:41,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:41,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:42,326 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:42,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:42,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:42,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:42,685 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:42,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:42,830 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:42,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:45,045 INFO L85 PathProgramCache]: Analyzing trace with hash -243622588, now seen corresponding path program 106 times [2024-05-06 04:00:45,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:45,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:45,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:45,342 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:45,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:45,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:45,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:45,638 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:00:45,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:45,768 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:45,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:47,914 INFO L85 PathProgramCache]: Analyzing trace with hash -1315758139, now seen corresponding path program 9 times [2024-05-06 04:00:47,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:47,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:47,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:48,023 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:48,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:48,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:48,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:48,187 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:48,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:48,344 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:48,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:48,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:48,636 INFO L85 PathProgramCache]: Analyzing trace with hash 1502387891, now seen corresponding path program 10 times [2024-05-06 04:00:48,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:48,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:48,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:48,769 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:00:48,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:48,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:48,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:48,903 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:00:48,996 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:48,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:00:49,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:51,353 INFO L85 PathProgramCache]: Analyzing trace with hash -292099939, now seen corresponding path program 7 times [2024-05-06 04:00:51,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:51,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:51,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:51,495 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:00:51,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:51,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:51,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:51,679 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:00:51,775 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:00:51,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:00:51,883 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:54,159 INFO L85 PathProgramCache]: Analyzing trace with hash 1294630997, now seen corresponding path program 8 times [2024-05-06 04:00:54,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:54,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:54,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:54,370 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:54,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:54,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:54,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:54,500 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:54,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:54,638 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:54,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:54,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:00:56,860 INFO L85 PathProgramCache]: Analyzing trace with hash -1566464478, now seen corresponding path program 5 times [2024-05-06 04:00:56,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:56,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:56,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:56,974 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:56,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:56,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:56,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:57,092 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:00:57,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:57,245 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:57,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:00:59,549 INFO L85 PathProgramCache]: Analyzing trace with hash -1226902858, now seen corresponding path program 6 times [2024-05-06 04:00:59,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:59,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:59,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:59,674 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:00:59,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:00:59,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:00:59,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:00:59,809 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:00:59,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:00:59,969 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:00:59,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:02,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1297457113, now seen corresponding path program 5 times [2024-05-06 04:01:02,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:02,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:02,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:02,446 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:02,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:02,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:02,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:02,565 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:02,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:02,718 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:02,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:03,077 INFO L85 PathProgramCache]: Analyzing trace with hash -119255535, now seen corresponding path program 6 times [2024-05-06 04:01:03,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:03,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:03,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:03,197 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:03,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:03,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:03,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:03,317 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:03,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:03,469 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:03,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:03,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:05,849 INFO L85 PathProgramCache]: Analyzing trace with hash 927977860, now seen corresponding path program 5 times [2024-05-06 04:01:05,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:05,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:05,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:06,009 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:06,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:06,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:06,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:06,248 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:06,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:06,392 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:06,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:06,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:06,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:08,771 INFO L85 PathProgramCache]: Analyzing trace with hash 1250711316, now seen corresponding path program 6 times [2024-05-06 04:01:08,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:08,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:08,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:08,913 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:08,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:08,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:08,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:09,030 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:09,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:09,169 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:09,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:11,338 INFO L85 PathProgramCache]: Analyzing trace with hash -1078443894, now seen corresponding path program 107 times [2024-05-06 04:01:11,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:11,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:11,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:11,481 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:11,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:11,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:11,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:11,622 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:11,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:11,770 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:11,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:13,939 INFO L85 PathProgramCache]: Analyzing trace with hash 1841511246, now seen corresponding path program 108 times [2024-05-06 04:01:13,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:13,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:13,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:14,171 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:14,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:14,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:14,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:14,326 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:14,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:14,486 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:14,487 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:14,562 INFO L85 PathProgramCache]: Analyzing trace with hash 1480103803, now seen corresponding path program 5 times [2024-05-06 04:01:14,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:14,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:14,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:14,701 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:14,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:14,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:14,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:14,839 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:14,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:01:14,982 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:14,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:01:15,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:15,062 INFO L85 PathProgramCache]: Analyzing trace with hash 1867013399, now seen corresponding path program 6 times [2024-05-06 04:01:15,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,208 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:15,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,332 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:15,422 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:01:15,422 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:01:15,497 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:17,727 INFO L85 PathProgramCache]: Analyzing trace with hash 31160361, now seen corresponding path program 9 times [2024-05-06 04:01:17,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:17,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:17,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:17,918 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:17,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:17,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:17,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:18,046 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:18,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:18,223 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:18,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:18,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:18,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1848860717, now seen corresponding path program 17 times [2024-05-06 04:01:18,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:18,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:18,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:18,433 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:18,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:18,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:18,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:18,568 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:18,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:18,714 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:18,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:18,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:18,797 INFO L85 PathProgramCache]: Analyzing trace with hash 852548133, now seen corresponding path program 18 times [2024-05-06 04:01:18,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:18,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:18,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:18,911 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:18,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:18,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:18,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,027 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:19,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:19,231 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:19,231 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:19,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:19,314 INFO L85 PathProgramCache]: Analyzing trace with hash -633095854, now seen corresponding path program 5 times [2024-05-06 04:01:19,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:19,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:19,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,422 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:19,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:19,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:19,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,530 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:19,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:19,673 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:19,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:01:19,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:19,742 INFO L85 PathProgramCache]: Analyzing trace with hash 1962439264, now seen corresponding path program 6 times [2024-05-06 04:01:19,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:19,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:19,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,852 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:19,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:19,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:19,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,965 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:20,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:01:20,084 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:20,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:01:20,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:20,139 INFO L85 PathProgramCache]: Analyzing trace with hash 1642145501, now seen corresponding path program 5 times [2024-05-06 04:01:20,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:20,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:20,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:20,246 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:20,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:20,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:20,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:20,354 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:20,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:01:20,569 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:20,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:01:20,656 INFO L85 PathProgramCache]: Analyzing trace with hash -1251549835, now seen corresponding path program 6 times [2024-05-06 04:01:20,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:20,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:20,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:20,771 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:20,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:20,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:20,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:20,887 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:21,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:21,044 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:21,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:21,150 INFO L85 PathProgramCache]: Analyzing trace with hash 191519767, now seen corresponding path program 5 times [2024-05-06 04:01:21,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,268 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:21,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,378 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:21,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:01:21,496 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:21,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:01:21,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:21,553 INFO L85 PathProgramCache]: Analyzing trace with hash -155628293, now seen corresponding path program 6 times [2024-05-06 04:01:21,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,664 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:21,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,886 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:21,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:22,001 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:22,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:22,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:22,063 INFO L85 PathProgramCache]: Analyzing trace with hash 698914719, now seen corresponding path program 5 times [2024-05-06 04:01:22,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,175 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:22,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,281 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:22,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:22,396 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:22,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:01:22,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1213960307, now seen corresponding path program 6 times [2024-05-06 04:01:22,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,576 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:22,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,687 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:22,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:22,833 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:22,833 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:22,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:22,937 INFO L85 PathProgramCache]: Analyzing trace with hash 1685113625, now seen corresponding path program 5 times [2024-05-06 04:01:22,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:23,041 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:23,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:23,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:23,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:23,223 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:23,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:23,407 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:23,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:23,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:23,543 INFO L85 PathProgramCache]: Analyzing trace with hash -1286948423, now seen corresponding path program 6 times [2024-05-06 04:01:23,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:23,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:23,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:23,665 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:23,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:23,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:23,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:23,791 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:23,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:23,955 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:23,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:01:24,052 INFO L85 PathProgramCache]: Analyzing trace with hash -361283486, now seen corresponding path program 109 times [2024-05-06 04:01:24,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:24,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:24,171 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:24,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:24,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:24,277 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:01:24,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:24,416 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:24,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:24,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:24,484 INFO L85 PathProgramCache]: Analyzing trace with hash -1652299440, now seen corresponding path program 110 times [2024-05-06 04:01:24,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:24,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:24,830 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:24,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:24,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,096 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 5 proven. 31 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:25,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:25,402 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:25,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:01:25,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:25,501 INFO L85 PathProgramCache]: Analyzing trace with hash -931689407, now seen corresponding path program 17 times [2024-05-06 04:01:25,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:25,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:25,529 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:25,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:25,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:25,735 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:25,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:01:25,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:25,851 INFO L85 PathProgramCache]: Analyzing trace with hash 1355418816, now seen corresponding path program 18 times [2024-05-06 04:01:25,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:25,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:25,874 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:25,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:26,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:26,143 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:26,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:26,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:26,243 INFO L85 PathProgramCache]: Analyzing trace with hash 1844838499, now seen corresponding path program 19 times [2024-05-06 04:01:26,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:26,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:26,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:26,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:26,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:26,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:26,526 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:26,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:26,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:26,614 INFO L85 PathProgramCache]: Analyzing trace with hash 1844838530, now seen corresponding path program 2 times [2024-05-06 04:01:26,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:26,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:26,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:26,684 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:26,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:26,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:26,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:26,753 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:26,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:01:26,877 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:26,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:01:26,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:26,963 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867741, now seen corresponding path program 20 times [2024-05-06 04:01:26,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:26,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:26,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:26,983 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:27,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:27,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:27,534 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:27,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:01:27,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:27,620 INFO L85 PathProgramCache]: Analyzing trace with hash 2056135130, now seen corresponding path program 2 times [2024-05-06 04:01:27,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:27,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:27,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:27,637 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:27,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:28,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:01:28,591 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:28,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:01:28,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:28,729 INFO L85 PathProgramCache]: Analyzing trace with hash 971577004, now seen corresponding path program 2 times [2024-05-06 04:01:28,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:28,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:28,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:28,762 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:28,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:28,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:01:28,952 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:28,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:01:29,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:29,087 INFO L85 PathProgramCache]: Analyzing trace with hash -1042051599, now seen corresponding path program 2 times [2024-05-06 04:01:29,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:29,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:29,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:29,108 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:29,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:29,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:01:29,295 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:29,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:01:29,400 INFO L85 PathProgramCache]: Analyzing trace with hash 129845306, now seen corresponding path program 3 times [2024-05-06 04:01:29,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:29,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:29,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:29,491 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:29,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:29,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:29,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:29,580 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:29,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:29,740 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:29,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:29,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:29,847 INFO L85 PathProgramCache]: Analyzing trace with hash -1688331357, now seen corresponding path program 4 times [2024-05-06 04:01:29,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:29,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:29,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:29,868 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:29,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:30,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:01:30,077 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:30,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:01:30,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:30,196 INFO L85 PathProgramCache]: Analyzing trace with hash 733550021, now seen corresponding path program 2 times [2024-05-06 04:01:30,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:30,216 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:30,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:30,461 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2024-05-06 04:01:30,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:30,565 INFO L85 PathProgramCache]: Analyzing trace with hash -726351048, now seen corresponding path program 2 times [2024-05-06 04:01:30,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:30,584 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:30,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:30,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 37 [2024-05-06 04:01:30,789 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:30,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 24 [2024-05-06 04:01:30,911 INFO L85 PathProgramCache]: Analyzing trace with hash 971171976, now seen corresponding path program 1 times [2024-05-06 04:01:30,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:30,930 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:30,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:31,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:01:31,105 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:31,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:01:31,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:31,213 INFO L85 PathProgramCache]: Analyzing trace with hash 1392243011, now seen corresponding path program 3 times [2024-05-06 04:01:31,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:31,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:31,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:31,302 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:31,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:31,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:31,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:31,410 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:01:31,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:31,564 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:31,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:31,669 INFO L85 PathProgramCache]: Analyzing trace with hash 668610810, now seen corresponding path program 4 times [2024-05-06 04:01:31,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:31,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:31,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:31,715 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:31,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:31,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:01:31,911 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:31,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:01:31,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:31,998 INFO L85 PathProgramCache]: Analyzing trace with hash -962804210, now seen corresponding path program 2 times [2024-05-06 04:01:31,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:31,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:32,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:32,016 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:32,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:32,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2024-05-06 04:01:32,244 INFO L85 PathProgramCache]: Analyzing trace with hash -439072433, now seen corresponding path program 2 times [2024-05-06 04:01:32,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:32,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:32,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:32,331 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:32,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:32,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 37 [2024-05-06 04:01:32,483 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:32,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 24 [2024-05-06 04:01:32,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:32,558 INFO L85 PathProgramCache]: Analyzing trace with hash -725182255, now seen corresponding path program 1 times [2024-05-06 04:01:32,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:32,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:32,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:32,578 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:32,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:32,708 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:01:32,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:32,889 INFO L85 PathProgramCache]: Analyzing trace with hash -1942043374, now seen corresponding path program 4 times [2024-05-06 04:01:32,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:32,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:32,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:32,909 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:32,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:33,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:33,056 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:33,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:33,118 INFO L85 PathProgramCache]: Analyzing trace with hash 2086605437, now seen corresponding path program 10 times [2024-05-06 04:01:33,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,157 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:33,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,197 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:33,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:01:33,335 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:33,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:01:33,407 INFO L85 PathProgramCache]: Analyzing trace with hash 260259612, now seen corresponding path program 11 times [2024-05-06 04:01:33,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,491 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:33,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,575 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:33,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:33,697 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:33,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:33,763 INFO L85 PathProgramCache]: Analyzing trace with hash -521886112, now seen corresponding path program 12 times [2024-05-06 04:01:33,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,881 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:33,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,948 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:34,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:34,107 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:34,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:34,193 INFO L85 PathProgramCache]: Analyzing trace with hash 325762656, now seen corresponding path program 13 times [2024-05-06 04:01:34,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:34,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:34,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:34,284 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:34,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:34,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:34,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:34,372 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:34,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:34,491 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:34,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:34,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:34,565 INFO L85 PathProgramCache]: Analyzing trace with hash -1179616151, now seen corresponding path program 14 times [2024-05-06 04:01:34,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:34,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:34,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:34,602 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:34,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:34,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:34,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:34,640 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:34,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:34,756 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:34,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:34,818 INFO L85 PathProgramCache]: Analyzing trace with hash 1624515839, now seen corresponding path program 15 times [2024-05-06 04:01:34,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:34,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:34,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:34,856 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:34,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:34,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:34,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:34,897 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:35,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:35,017 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:35,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:01:35,090 INFO L85 PathProgramCache]: Analyzing trace with hash 1556995969, now seen corresponding path program 16 times [2024-05-06 04:01:35,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:35,109 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:35,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:35,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:35,314 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:35,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:35,381 INFO L85 PathProgramCache]: Analyzing trace with hash 1556995969, now seen corresponding path program 17 times [2024-05-06 04:01:35,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:35,419 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:35,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:35,456 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:35,571 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:35,576 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:35,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:35,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:35,633 INFO L85 PathProgramCache]: Analyzing trace with hash 1745608350, now seen corresponding path program 2 times [2024-05-06 04:01:35,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:35,682 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:35,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:35,730 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:35,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:35,845 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:35,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:35,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:35,948 INFO L85 PathProgramCache]: Analyzing trace with hash -82237399, now seen corresponding path program 2 times [2024-05-06 04:01:35,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:35,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:35,998 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:35,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:35,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:36,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:36,048 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:36,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:36,208 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:36,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:36,274 INFO L85 PathProgramCache]: Analyzing trace with hash -1111031488, now seen corresponding path program 2 times [2024-05-06 04:01:36,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:36,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:36,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:36,322 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:36,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:36,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:36,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:36,370 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:36,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:36,530 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:36,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:36,657 INFO L85 PathProgramCache]: Analyzing trace with hash -2114049717, now seen corresponding path program 2 times [2024-05-06 04:01:36,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:36,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:36,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:36,707 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:36,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:36,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:36,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:36,756 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:36,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:36,911 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:36,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:36,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:36,996 INFO L85 PathProgramCache]: Analyzing trace with hash 1871467491, now seen corresponding path program 18 times [2024-05-06 04:01:36,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:36,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:37,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:37,047 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:37,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:37,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:37,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:37,098 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:37,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 37 [2024-05-06 04:01:37,260 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:37,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 24 [2024-05-06 04:01:37,383 INFO L85 PathProgramCache]: Analyzing trace with hash -73801945, now seen corresponding path program 5 times [2024-05-06 04:01:37,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:37,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:37,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:37,404 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:37,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:37,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:01:37,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:37,823 INFO L85 PathProgramCache]: Analyzing trace with hash 2007107509, now seen corresponding path program 6 times [2024-05-06 04:01:37,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:37,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:37,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:37,842 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:37,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:38,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:01:38,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:38,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1032477900, now seen corresponding path program 2 times [2024-05-06 04:01:38,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:38,259 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:38,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:38,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:01:38,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:38,697 INFO L85 PathProgramCache]: Analyzing trace with hash -726042412, now seen corresponding path program 2 times [2024-05-06 04:01:38,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:38,717 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:01:38,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:01:38,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:01:38,886 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:38,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:01:38,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:38,979 INFO L85 PathProgramCache]: Analyzing trace with hash -2084875156, now seen corresponding path program 1 times [2024-05-06 04:01:38,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:38,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:38,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:39,026 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:39,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:39,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:39,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:39,073 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:39,074 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 04:01:39,079 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=737, Invalid=26323, Unknown=0, NotChecked=0, Total=27060 [2024-05-06 04:01:39,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:39,391 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:39,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:39,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:41,582 INFO L85 PathProgramCache]: Analyzing trace with hash 1843462966, now seen corresponding path program 111 times [2024-05-06 04:01:41,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:41,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:41,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:41,688 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 36 proven. 33 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:41,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:41,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:41,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:41,792 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 36 proven. 33 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:41,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:41,950 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:41,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:01:42,035 INFO L85 PathProgramCache]: Analyzing trace with hash -1382580929, now seen corresponding path program 112 times [2024-05-06 04:01:42,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:42,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:42,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:42,160 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 20 proven. 47 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:42,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:42,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:42,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:42,267 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 20 proven. 47 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:42,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:42,457 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:42,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:44,589 INFO L85 PathProgramCache]: Analyzing trace with hash -1563827371, now seen corresponding path program 113 times [2024-05-06 04:01:44,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:44,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:44,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:45,302 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:45,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:45,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:45,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:45,607 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:45,740 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:45,745 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:45,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:47,879 INFO L85 PathProgramCache]: Analyzing trace with hash 817419323, now seen corresponding path program 114 times [2024-05-06 04:01:47,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:47,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:47,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:48,299 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:48,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:48,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:48,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:48,557 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:48,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:48,691 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:48,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:51,356 INFO L85 PathProgramCache]: Analyzing trace with hash -371404237, now seen corresponding path program 115 times [2024-05-06 04:01:51,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:51,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:51,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:51,662 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:51,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:51,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:51,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:52,014 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:52,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:52,165 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:52,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:52,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:54,334 INFO L85 PathProgramCache]: Analyzing trace with hash 644321949, now seen corresponding path program 116 times [2024-05-06 04:01:54,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,595 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:54,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,901 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:55,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:55,064 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:55,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:57,208 INFO L85 PathProgramCache]: Analyzing trace with hash -47516393, now seen corresponding path program 117 times [2024-05-06 04:01:57,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:57,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:57,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:57,490 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:57,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:57,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:57,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:57,785 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:57,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:57,918 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:57,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:57,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:01:58,124 INFO L85 PathProgramCache]: Analyzing trace with hash 973091129, now seen corresponding path program 118 times [2024-05-06 04:01:58,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:58,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:58,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:58,438 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:58,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:58,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:58,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:58,713 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:01:58,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:01:58,846 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:58,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:01:59,054 INFO L85 PathProgramCache]: Analyzing trace with hash 89664653, now seen corresponding path program 119 times [2024-05-06 04:01:59,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:59,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:59,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:59,175 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 19 proven. 48 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:59,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:59,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:59,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:59,297 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 19 proven. 48 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:59,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:01:59,423 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:59,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:01:59,502 INFO L85 PathProgramCache]: Analyzing trace with hash -1515362558, now seen corresponding path program 120 times [2024-05-06 04:01:59,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:59,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:59,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:59,668 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 20 proven. 47 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:59,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:59,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:59,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:59,779 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 20 proven. 47 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:01:59,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:01:59,931 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:59,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:02:00,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:00,025 INFO L85 PathProgramCache]: Analyzing trace with hash 909512983, now seen corresponding path program 121 times [2024-05-06 04:02:00,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:00,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:00,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:00,574 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:00,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:00,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:00,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:00,839 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:00,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:02:01,000 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:01,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:02:01,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:01,154 INFO L85 PathProgramCache]: Analyzing trace with hash -744795597, now seen corresponding path program 122 times [2024-05-06 04:02:01,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:01,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:01,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:01,854 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 26 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:01,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:01,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:01,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:02,150 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 26 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:02,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:02,315 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:02,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:04,455 INFO L85 PathProgramCache]: Analyzing trace with hash -744795597, now seen corresponding path program 123 times [2024-05-06 04:02:04,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:04,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:04,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,056 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:05,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:05,348 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:05,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:02:05,479 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:05,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:02:05,549 INFO L85 PathProgramCache]: Analyzing trace with hash 99198728, now seen corresponding path program 124 times [2024-05-06 04:02:05,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:05,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:05,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:07,333 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 27 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:07,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:07,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:07,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:07,718 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 27 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:07,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:02:07,869 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:07,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:02:07,947 INFO L85 PathProgramCache]: Analyzing trace with hash 1391014933, now seen corresponding path program 125 times [2024-05-06 04:02:07,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:07,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:07,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:08,453 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 26 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:08,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:08,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:08,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:08,836 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 26 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:08,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:02:09,000 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:09,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:02:09,082 INFO L85 PathProgramCache]: Analyzing trace with hash 627124417, now seen corresponding path program 126 times [2024-05-06 04:02:09,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:09,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:09,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:09,587 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 27 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:09,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:09,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:09,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:09,954 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 27 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:10,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:02:10,106 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:10,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:02:10,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:10,202 INFO L85 PathProgramCache]: Analyzing trace with hash 47432380, now seen corresponding path program 127 times [2024-05-06 04:02:10,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:10,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:10,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:10,600 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 26 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:10,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:10,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:10,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:10,985 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 26 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:11,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:02:11,147 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:11,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:02:11,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:11,232 INFO L85 PathProgramCache]: Analyzing trace with hash 1849794342, now seen corresponding path program 128 times [2024-05-06 04:02:11,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:11,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:11,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:11,650 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 27 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:11,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:11,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:11,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:12,014 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 27 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:12,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:02:12,163 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:12,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:02:12,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:12,251 INFO L85 PathProgramCache]: Analyzing trace with hash -1809702601, now seen corresponding path program 129 times [2024-05-06 04:02:12,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:12,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:12,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:12,645 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 26 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:12,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:12,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:12,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:12,991 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 26 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:13,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:13,138 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:13,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:13,200 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:15,351 INFO L85 PathProgramCache]: Analyzing trace with hash -744857126, now seen corresponding path program 130 times [2024-05-06 04:02:15,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:15,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:15,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:16,289 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:16,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:16,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:16,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:16,639 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:16,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:02:16,779 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:16,780 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:02:16,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:16,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1615733921, now seen corresponding path program 131 times [2024-05-06 04:02:16,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:16,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:16,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:17,249 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:17,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:17,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:17,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:17,597 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:17,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:17,723 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:17,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:17,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:18,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:20,076 INFO L85 PathProgramCache]: Analyzing trace with hash 1451856509, now seen corresponding path program 132 times [2024-05-06 04:02:20,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:20,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:20,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:20,768 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:20,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:20,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:20,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:21,272 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:21,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:21,456 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:21,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:21,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:23,649 INFO L85 PathProgramCache]: Analyzing trace with hash -161620692, now seen corresponding path program 11 times [2024-05-06 04:02:23,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:23,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:23,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:23,921 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:23,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:23,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:23,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:24,048 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:24,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:24,208 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:24,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:24,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:27,324 INFO L85 PathProgramCache]: Analyzing trace with hash 436242028, now seen corresponding path program 12 times [2024-05-06 04:02:27,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:27,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:27,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:27,479 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:27,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:27,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:27,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:27,632 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:27,706 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:02:27,706 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:02:27,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:29,949 INFO L85 PathProgramCache]: Analyzing trace with hash 456725892, now seen corresponding path program 10 times [2024-05-06 04:02:29,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:29,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:29,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:30,088 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:30,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:30,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:30,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:30,318 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:30,407 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:02:30,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:02:30,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:32,614 INFO L85 PathProgramCache]: Analyzing trace with hash 1026380284, now seen corresponding path program 11 times [2024-05-06 04:02:32,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:32,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:32,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:32,748 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:32,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:32,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:32,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:32,886 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:33,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:33,040 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:33,040 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:33,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:33,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:35,702 INFO L85 PathProgramCache]: Analyzing trace with hash -697950245, now seen corresponding path program 7 times [2024-05-06 04:02:35,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:35,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:35,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:35,831 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:35,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:35,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:35,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:36,084 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:36,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:36,253 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:36,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:36,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:37,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:38,023 INFO L85 PathProgramCache]: Analyzing trace with hash -152916003, now seen corresponding path program 8 times [2024-05-06 04:02:38,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:38,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:38,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:38,169 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:38,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:38,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:38,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:38,313 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:38,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:38,446 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:38,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:38,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:39,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:41,319 INFO L85 PathProgramCache]: Analyzing trace with hash 1778600782, now seen corresponding path program 7 times [2024-05-06 04:02:41,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:41,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:41,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:41,445 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:41,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:41,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:41,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:41,573 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:41,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:41,815 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:41,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:41,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:43,977 INFO L85 PathProgramCache]: Analyzing trace with hash -361705462, now seen corresponding path program 8 times [2024-05-06 04:02:43,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:43,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:44,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:44,112 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:44,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:44,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:44,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:44,247 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:44,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:44,410 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:44,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:46,626 INFO L85 PathProgramCache]: Analyzing trace with hash -81173123, now seen corresponding path program 7 times [2024-05-06 04:02:46,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:46,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:46,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:46,759 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:46,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:46,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:46,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:46,882 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:47,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:47,037 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:47,037 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:47,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:47,365 INFO L85 PathProgramCache]: Analyzing trace with hash 1658532347, now seen corresponding path program 8 times [2024-05-06 04:02:47,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:47,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:47,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:47,607 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:47,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:47,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:47,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:47,761 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:47,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:47,926 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:47,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:50,119 INFO L85 PathProgramCache]: Analyzing trace with hash -556807823, now seen corresponding path program 133 times [2024-05-06 04:02:50,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:50,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:50,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:50,541 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 26 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:50,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:50,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:50,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:50,941 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 26 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:51,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:02:51,109 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:51,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:02:51,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:53,315 INFO L85 PathProgramCache]: Analyzing trace with hash 1716119431, now seen corresponding path program 134 times [2024-05-06 04:02:53,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:53,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:53,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:54,731 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 26 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:54,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:54,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:54,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:55,229 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 26 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:02:55,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:02:55,395 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:55,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:02:55,451 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:55,474 INFO L85 PathProgramCache]: Analyzing trace with hash 1885671412, now seen corresponding path program 7 times [2024-05-06 04:02:55,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:55,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:55,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:55,598 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:55,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:55,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:55,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:55,779 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:55,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:02:55,934 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:55,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:02:56,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:56,036 INFO L85 PathProgramCache]: Analyzing trace with hash 2005844862, now seen corresponding path program 8 times [2024-05-06 04:02:56,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:56,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:56,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:56,176 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:56,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:56,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:56,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:56,306 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:56,388 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:02:56,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:02:56,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:58,665 INFO L85 PathProgramCache]: Analyzing trace with hash -237090352, now seen corresponding path program 12 times [2024-05-06 04:02:58,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:58,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:58,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:58,804 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:58,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:58,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:58,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:59,035 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:59,180 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:02:59,188 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:59,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:02:59,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:02:59,296 INFO L85 PathProgramCache]: Analyzing trace with hash -1463192428, now seen corresponding path program 19 times [2024-05-06 04:02:59,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:59,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:59,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:59,417 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:59,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:59,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:59,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:59,537 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:59,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:02:59,683 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:59,683 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:02:59,768 INFO L85 PathProgramCache]: Analyzing trace with hash -528446754, now seen corresponding path program 20 times [2024-05-06 04:02:59,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:59,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:59,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:59,894 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:02:59,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:59,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:59,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:00,022 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:00,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:00,258 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:00,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:00,344 INFO L85 PathProgramCache]: Analyzing trace with hash 368442379, now seen corresponding path program 7 times [2024-05-06 04:03:00,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:00,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:00,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:00,486 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:00,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:00,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:00,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:00,625 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:00,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:00,785 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:00,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:00,873 INFO L85 PathProgramCache]: Analyzing trace with hash -1130150265, now seen corresponding path program 8 times [2024-05-06 04:03:00,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:00,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:00,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:01,026 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:01,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:01,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:01,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:01,180 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:01,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:03:01,344 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:01,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:03:01,434 INFO L85 PathProgramCache]: Analyzing trace with hash -403756796, now seen corresponding path program 7 times [2024-05-06 04:03:01,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:01,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:01,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:01,648 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:01,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:01,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:01,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:01,788 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:01,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:03:01,945 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:01,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:03:02,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:02,026 INFO L85 PathProgramCache]: Analyzing trace with hash 311257198, now seen corresponding path program 8 times [2024-05-06 04:03:02,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:02,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:02,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:02,189 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:02,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:02,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:02,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:02,316 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:02,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:03:02,488 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:02,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:03:02,583 INFO L85 PathProgramCache]: Analyzing trace with hash 1510996240, now seen corresponding path program 7 times [2024-05-06 04:03:02,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:02,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:02,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:02,775 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:02,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:02,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:02,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:02,892 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:03,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:03,080 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:03,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:03,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:03,169 INFO L85 PathProgramCache]: Analyzing trace with hash 864616162, now seen corresponding path program 8 times [2024-05-06 04:03:03,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:03,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:03,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:03,298 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:03,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:03,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:03,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:03,425 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:03,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:03,554 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:03,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:03,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:03,629 INFO L85 PathProgramCache]: Analyzing trace with hash -1613826170, now seen corresponding path program 7 times [2024-05-06 04:03:03,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:03,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:03,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:03,751 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:03,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:03,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:03,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:03,940 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:04,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:04,089 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:04,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:04,162 INFO L85 PathProgramCache]: Analyzing trace with hash -1385527892, now seen corresponding path program 8 times [2024-05-06 04:03:04,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:04,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:04,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:04,288 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:04,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:04,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:04,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:04,411 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:04,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:04,561 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:04,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:04,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:04,659 INFO L85 PathProgramCache]: Analyzing trace with hash -744795566, now seen corresponding path program 7 times [2024-05-06 04:03:04,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:04,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:04,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:04,774 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:04,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:04,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:04,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:04,978 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:05,139 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:03:05,147 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:05,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:03:05,275 INFO L85 PathProgramCache]: Analyzing trace with hash -262424224, now seen corresponding path program 8 times [2024-05-06 04:03:05,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:05,424 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:05,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:05,570 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 50 proven. 19 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:05,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:05,733 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:05,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:05,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:05,819 INFO L85 PathProgramCache]: Analyzing trace with hash -2102235639, now seen corresponding path program 135 times [2024-05-06 04:03:05,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:06,400 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 26 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:03:06,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:06,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:06,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:06,770 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 26 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:03:06,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:03:06,934 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:06,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:03:07,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:07,026 INFO L85 PathProgramCache]: Analyzing trace with hash -233776951, now seen corresponding path program 136 times [2024-05-06 04:03:07,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:07,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:07,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:07,916 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:03:07,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:07,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:07,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:08,299 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 27 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:03:08,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:08,476 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:08,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:08,614 INFO L85 PathProgramCache]: Analyzing trace with hash -1685472241, now seen corresponding path program 137 times [2024-05-06 04:03:08,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:08,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:08,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:08,773 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:08,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:08,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:08,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:08,883 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:09,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:09,026 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:09,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:09,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:09,091 INFO L85 PathProgramCache]: Analyzing trace with hash 921527302, now seen corresponding path program 138 times [2024-05-06 04:03:09,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:09,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:09,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:09,206 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:09,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:09,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:09,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:09,322 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:09,453 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:09,459 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:09,459 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:09,531 INFO L85 PathProgramCache]: Analyzing trace with hash 2061408244, now seen corresponding path program 139 times [2024-05-06 04:03:09,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:09,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:09,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:09,647 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:09,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:09,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:09,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:09,836 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:10,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:10,033 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:10,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:10,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:10,137 INFO L85 PathProgramCache]: Analyzing trace with hash -210597660, now seen corresponding path program 140 times [2024-05-06 04:03:10,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:10,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:10,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:10,273 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:10,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:10,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:10,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:10,412 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:10,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:10,612 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:10,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:10,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:10,719 INFO L85 PathProgramCache]: Analyzing trace with hash 824490486, now seen corresponding path program 141 times [2024-05-06 04:03:10,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:10,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:10,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:10,857 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:10,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:10,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:10,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:10,994 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:11,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:11,187 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:11,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:11,361 INFO L85 PathProgramCache]: Analyzing trace with hash -1497424218, now seen corresponding path program 142 times [2024-05-06 04:03:11,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:11,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:11,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:11,513 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:11,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:11,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:11,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:11,631 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:11,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:11,816 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:11,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:11,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:11,943 INFO L85 PathProgramCache]: Analyzing trace with hash 824489993, now seen corresponding path program 143 times [2024-05-06 04:03:11,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:11,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:11,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:12,069 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:12,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:12,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:12,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:12,199 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:12,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:12,403 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:12,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:12,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:12,488 INFO L85 PathProgramCache]: Analyzing trace with hash 2062362548, now seen corresponding path program 13 times [2024-05-06 04:03:12,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:12,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:12,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:12,672 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:12,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:12,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:12,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:12,816 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:12,921 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:03:12,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:03:13,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:15,340 INFO L85 PathProgramCache]: Analyzing trace with hash 516897148, now seen corresponding path program 13 times [2024-05-06 04:03:15,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,453 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:15,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,562 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:15,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:15,728 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:15,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:15,828 INFO L85 PathProgramCache]: Analyzing trace with hash -210566877, now seen corresponding path program 9 times [2024-05-06 04:03:15,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,939 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:15,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,049 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:16,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:16,301 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:16,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:16,424 INFO L85 PathProgramCache]: Analyzing trace with hash 824491478, now seen corresponding path program 9 times [2024-05-06 04:03:16,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:16,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:16,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,558 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:16,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:16,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:16,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,816 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:17,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:17,077 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:17,077 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:17,180 INFO L85 PathProgramCache]: Analyzing trace with hash -1497424187, now seen corresponding path program 9 times [2024-05-06 04:03:17,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:17,309 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:17,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:17,439 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:17,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:17,613 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:17,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:17,705 INFO L85 PathProgramCache]: Analyzing trace with hash 921527289, now seen corresponding path program 144 times [2024-05-06 04:03:17,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:17,831 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:17,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,039 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:18,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:18,208 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:18,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:18,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:18,332 INFO L85 PathProgramCache]: Analyzing trace with hash 168274007, now seen corresponding path program 145 times [2024-05-06 04:03:18,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,434 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:18,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,537 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:18,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:18,701 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:18,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:18,785 INFO L85 PathProgramCache]: Analyzing trace with hash 559617512, now seen corresponding path program 146 times [2024-05-06 04:03:18,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,886 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:18,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,987 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:19,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:19,155 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:19,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:19,249 INFO L85 PathProgramCache]: Analyzing trace with hash -536137159, now seen corresponding path program 147 times [2024-05-06 04:03:19,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:19,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:19,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:19,426 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:19,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:19,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:19,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:19,527 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:19,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:19,677 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:19,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:19,755 INFO L85 PathProgramCache]: Analyzing trace with hash -710031414, now seen corresponding path program 148 times [2024-05-06 04:03:19,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:19,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:19,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:19,852 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:19,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:19,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:19,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:19,948 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:20,089 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:20,096 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:20,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:20,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:20,189 INFO L85 PathProgramCache]: Analyzing trace with hash -536136846, now seen corresponding path program 149 times [2024-05-06 04:03:20,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:20,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:20,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:20,286 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:20,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:20,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:20,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:20,381 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 12 proven. 18 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:20,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:20,506 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:20,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:20,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:20,578 INFO L85 PathProgramCache]: Analyzing trace with hash -809679861, now seen corresponding path program 9 times [2024-05-06 04:03:20,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:20,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:20,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:20,770 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:20,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:20,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:20,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:20,922 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:21,029 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:03:21,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:03:21,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:23,356 INFO L85 PathProgramCache]: Analyzing trace with hash -1185140484, now seen corresponding path program 14 times [2024-05-06 04:03:23,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:23,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:23,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:23,398 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:23,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:23,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:03:23,600 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:23,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:03:23,704 INFO L85 PathProgramCache]: Analyzing trace with hash -580307929, now seen corresponding path program 21 times [2024-05-06 04:03:23,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:23,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:23,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:23,851 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:23,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:23,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:23,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:23,963 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:24,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:24,086 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:24,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:24,170 INFO L85 PathProgramCache]: Analyzing trace with hash 951111842, now seen corresponding path program 9 times [2024-05-06 04:03:24,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:24,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:24,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:24,271 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:24,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:24,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:24,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:24,372 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:24,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:24,519 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:24,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:24,586 INFO L85 PathProgramCache]: Analyzing trace with hash 169228311, now seen corresponding path program 9 times [2024-05-06 04:03:24,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:24,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:24,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:24,768 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:24,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:24,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:24,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:24,865 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:24,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:24,986 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:24,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:25,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:25,060 INFO L85 PathProgramCache]: Analyzing trace with hash 559648295, now seen corresponding path program 9 times [2024-05-06 04:03:25,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:25,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:25,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:25,160 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:25,160 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:25,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:25,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:25,263 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:25,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:25,414 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:25,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:25,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:25,507 INFO L85 PathProgramCache]: Analyzing trace with hash -536136167, now seen corresponding path program 9 times [2024-05-06 04:03:25,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:25,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:25,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:25,611 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:25,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:25,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:25,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:25,728 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:25,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:03:25,879 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:25,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:03:26,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:26,029 INFO L85 PathProgramCache]: Analyzing trace with hash -710031383, now seen corresponding path program 9 times [2024-05-06 04:03:26,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:26,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:26,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:26,227 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:26,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:26,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:26,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:26,341 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:26,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:26,523 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:26,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:26,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:26,614 INFO L85 PathProgramCache]: Analyzing trace with hash -1685472228, now seen corresponding path program 150 times [2024-05-06 04:03:26,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:26,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:26,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:26,731 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:26,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:26,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:26,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:26,847 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 5 proven. 25 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:27,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:27,062 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:27,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:27,167 INFO L85 PathProgramCache]: Analyzing trace with hash 1542275713, now seen corresponding path program 151 times [2024-05-06 04:03:27,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:27,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:27,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:27,193 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:27,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:27,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:03:27,392 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:27,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:03:27,491 INFO L85 PathProgramCache]: Analyzing trace with hash -1889911702, now seen corresponding path program 152 times [2024-05-06 04:03:27,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:27,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:27,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:27,516 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:27,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:27,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:27,741 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:27,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:27,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:27,832 INFO L85 PathProgramCache]: Analyzing trace with hash 216129951, now seen corresponding path program 153 times [2024-05-06 04:03:27,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:27,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:27,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:27,858 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:27,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:28,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:28,121 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:28,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:28,217 INFO L85 PathProgramCache]: Analyzing trace with hash -270122488, now seen corresponding path program 154 times [2024-05-06 04:03:28,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:28,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:28,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:28,244 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:28,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:28,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:28,432 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:28,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:28,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:28,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1839064505, now seen corresponding path program 155 times [2024-05-06 04:03:28,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:28,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:28,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:28,543 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:28,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:28,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:28,831 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:28,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:28,919 INFO L85 PathProgramCache]: Analyzing trace with hash -1880338003, now seen corresponding path program 156 times [2024-05-06 04:03:28,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:28,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:28,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:28,945 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:28,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:29,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:29,154 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:29,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:29,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:29,239 INFO L85 PathProgramCache]: Analyzing trace with hash 216438587, now seen corresponding path program 157 times [2024-05-06 04:03:29,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:29,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:29,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:29,262 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:29,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:29,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:29,450 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:29,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:29,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:29,512 INFO L85 PathProgramCache]: Analyzing trace with hash -270112785, now seen corresponding path program 158 times [2024-05-06 04:03:29,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:29,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:29,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:29,543 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:29,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:29,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:29,701 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:29,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:29,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:29,770 INFO L85 PathProgramCache]: Analyzing trace with hash 1376759997, now seen corresponding path program 159 times [2024-05-06 04:03:29,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:29,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:29,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:29,795 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:29,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:29,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:29,941 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:29,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:30,011 INFO L85 PathProgramCache]: Analyzing trace with hash 1376759997, now seen corresponding path program 160 times [2024-05-06 04:03:30,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:30,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:30,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:30,041 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:30,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:30,217 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:30,225 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:30,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:30,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:30,321 INFO L85 PathProgramCache]: Analyzing trace with hash -1879383699, now seen corresponding path program 14 times [2024-05-06 04:03:30,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:30,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:30,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:30,744 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:03:30,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:30,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:30,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:30,822 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:03:30,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:30,951 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:30,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:31,015 INFO L85 PathProgramCache]: Analyzing trace with hash 216469370, now seen corresponding path program 10 times [2024-05-06 04:03:31,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:31,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:31,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:31,317 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:03:31,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:31,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:31,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:31,402 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:03:31,556 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:31,563 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:31,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:31,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:31,655 INFO L85 PathProgramCache]: Analyzing trace with hash -270111793, now seen corresponding path program 10 times [2024-05-06 04:03:31,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:31,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:31,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:31,737 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:03:31,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:31,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:31,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:31,814 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:03:31,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:31,946 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:31,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:32,013 INFO L85 PathProgramCache]: Analyzing trace with hash 1376760028, now seen corresponding path program 10 times [2024-05-06 04:03:32,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:32,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:32,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:32,089 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:03:32,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:32,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:32,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:32,164 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:03:32,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:03:32,282 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:32,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:03:32,348 INFO L85 PathProgramCache]: Analyzing trace with hash -1202514382, now seen corresponding path program 161 times [2024-05-06 04:03:32,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:32,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:32,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:32,370 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:32,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:32,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:32,514 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:32,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:32,579 INFO L85 PathProgramCache]: Analyzing trace with hash 1243577948, now seen corresponding path program 10 times [2024-05-06 04:03:32,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:32,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:32,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:32,657 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:32,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:32,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:32,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:32,737 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:32,883 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 04:03:32,883 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 04:03:33,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:35,312 INFO L85 PathProgramCache]: Analyzing trace with hash 384015205, now seen corresponding path program 15 times [2024-05-06 04:03:35,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:35,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:35,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:35,403 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:35,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:35,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:35,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:35,497 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:35,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:35,664 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:35,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:35,764 INFO L85 PathProgramCache]: Analyzing trace with hash -1068259494, now seen corresponding path program 22 times [2024-05-06 04:03:35,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:35,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:35,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:35,854 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:35,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:35,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:35,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:35,947 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:36,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:36,106 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:36,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:36,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:36,193 INFO L85 PathProgramCache]: Analyzing trace with hash -1835570843, now seen corresponding path program 10 times [2024-05-06 04:03:36,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:36,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:36,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:36,287 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:36,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:36,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:36,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:36,369 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:36,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:36,530 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:36,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:36,621 INFO L85 PathProgramCache]: Analyzing trace with hash -1860328278, now seen corresponding path program 10 times [2024-05-06 04:03:36,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:36,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:36,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:36,701 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:36,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:36,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:36,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:36,885 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:37,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:37,052 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:37,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:37,153 INFO L85 PathProgramCache]: Analyzing trace with hash 217084224, now seen corresponding path program 10 times [2024-05-06 04:03:37,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:37,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:37,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:37,234 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:37,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:37,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:37,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:37,315 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:37,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:37,467 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:37,468 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:37,564 INFO L85 PathProgramCache]: Analyzing trace with hash -270091736, now seen corresponding path program 10 times [2024-05-06 04:03:37,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:37,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:37,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:37,646 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:37,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:37,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:37,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:37,726 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:37,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:03:37,896 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:37,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:03:38,028 INFO L85 PathProgramCache]: Analyzing trace with hash 1376760958, now seen corresponding path program 10 times [2024-05-06 04:03:38,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:38,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:38,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:38,112 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:38,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:38,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:38,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:38,195 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:38,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:03:38,363 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:38,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:03:38,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:38,452 INFO L85 PathProgramCache]: Analyzing trace with hash -1202513979, now seen corresponding path program 162 times [2024-05-06 04:03:38,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:38,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:38,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:38,634 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:38,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:39,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 04:03:39,224 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:39,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 04:03:39,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:39,344 INFO L85 PathProgramCache]: Analyzing trace with hash -2000312289, now seen corresponding path program 21 times [2024-05-06 04:03:39,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:39,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:39,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:39,374 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:39,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:39,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:39,587 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:39,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:39,803 INFO L85 PathProgramCache]: Analyzing trace with hash 709873321, now seen corresponding path program 22 times [2024-05-06 04:03:39,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:39,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:39,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:40,341 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:40,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:40,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:40,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:40,442 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:40,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:40,687 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:40,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:40,906 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:40,938 INFO L85 PathProgramCache]: Analyzing trace with hash -582367986, now seen corresponding path program 23 times [2024-05-06 04:03:40,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:40,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:40,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:41,072 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:41,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:41,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:41,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:41,204 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:41,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:41,374 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:41,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:41,464 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:41,485 INFO L85 PathProgramCache]: Analyzing trace with hash -711522733, now seen corresponding path program 24 times [2024-05-06 04:03:41,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:41,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:41,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:41,604 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:41,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:41,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:41,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:41,717 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:41,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 04:03:41,897 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:41,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 04:03:42,009 INFO L85 PathProgramCache]: Analyzing trace with hash 531236976, now seen corresponding path program 25 times [2024-05-06 04:03:42,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:42,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:42,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:42,126 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:42,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:42,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:42,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:42,228 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:42,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:42,396 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:42,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:42,466 INFO L85 PathProgramCache]: Analyzing trace with hash -711522420, now seen corresponding path program 26 times [2024-05-06 04:03:42,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:42,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:42,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:42,621 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:42,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:42,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:42,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:42,723 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:42,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:42,846 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:42,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:42,932 INFO L85 PathProgramCache]: Analyzing trace with hash -1999376335, now seen corresponding path program 1 times [2024-05-06 04:03:42,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:42,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:42,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:43,041 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:43,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:43,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:43,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:43,148 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:43,218 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-05-06 04:03:43,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 28 [2024-05-06 04:03:43,266 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:45,373 INFO L85 PathProgramCache]: Analyzing trace with hash 6892694, now seen corresponding path program 1 times [2024-05-06 04:03:45,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:45,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:45,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:45,404 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:45,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:45,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:45,614 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:45,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:45,710 INFO L85 PathProgramCache]: Analyzing trace with hash -1034327231, now seen corresponding path program 1 times [2024-05-06 04:03:45,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:45,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:45,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:45,809 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:45,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:45,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:45,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:46,005 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:46,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 04:03:46,188 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:46,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 04:03:46,314 INFO L85 PathProgramCache]: Analyzing trace with hash -1280291256, now seen corresponding path program 1 times [2024-05-06 04:03:46,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:46,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:46,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:46,446 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:46,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:46,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:46,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:46,564 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:46,741 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:46,750 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:46,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:46,853 INFO L85 PathProgramCache]: Analyzing trace with hash -872583759, now seen corresponding path program 1 times [2024-05-06 04:03:46,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:46,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:46,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:46,972 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:46,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:46,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:46,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,090 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:47,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:47,263 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:47,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:47,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:47,372 INFO L85 PathProgramCache]: Analyzing trace with hash -582337203, now seen corresponding path program 1 times [2024-05-06 04:03:47,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,488 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:47,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,685 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:47,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:47,864 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:47,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:47,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:47,964 INFO L85 PathProgramCache]: Analyzing trace with hash -711521741, now seen corresponding path program 1 times [2024-05-06 04:03:47,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:48,099 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:48,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:48,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:48,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:48,200 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:48,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:48,382 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:48,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:48,538 INFO L85 PathProgramCache]: Analyzing trace with hash 531237007, now seen corresponding path program 3 times [2024-05-06 04:03:48,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:48,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:48,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:48,640 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:48,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:48,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:48,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:48,746 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:48,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:48,925 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:48,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:49,026 INFO L85 PathProgramCache]: Analyzing trace with hash 709873334, now seen corresponding path program 27 times [2024-05-06 04:03:49,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:49,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:49,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:49,126 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:49,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:49,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:49,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:49,379 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:49,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:49,557 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:49,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:49,656 INFO L85 PathProgramCache]: Analyzing trace with hash -531290227, now seen corresponding path program 28 times [2024-05-06 04:03:49,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:49,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:49,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:49,734 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:49,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:49,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:49,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:49,799 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:49,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:49,961 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:49,961 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:50,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:50,047 INFO L85 PathProgramCache]: Analyzing trace with hash 1368334891, now seen corresponding path program 29 times [2024-05-06 04:03:50,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:50,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:50,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:50,101 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:50,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:50,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:50,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:50,154 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:50,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:50,304 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:50,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:50,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:50,367 INFO L85 PathProgramCache]: Analyzing trace with hash 1845255119, now seen corresponding path program 30 times [2024-05-06 04:03:50,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:50,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:50,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:50,419 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:50,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:50,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:50,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:50,470 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:50,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:50,592 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:50,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:50,668 INFO L85 PathProgramCache]: Analyzing trace with hash -1880138323, now seen corresponding path program 31 times [2024-05-06 04:03:50,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:50,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:50,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:50,722 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:50,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:50,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:50,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:50,921 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:51,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 37 [2024-05-06 04:03:51,084 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:51,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 24 [2024-05-06 04:03:51,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:51,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1845254626, now seen corresponding path program 32 times [2024-05-06 04:03:51,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:51,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:51,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:51,314 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:51,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:51,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:51,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:51,437 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:51,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:51,579 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:51,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:51,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:51,642 INFO L85 PathProgramCache]: Analyzing trace with hash -530335923, now seen corresponding path program 1 times [2024-05-06 04:03:51,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:51,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:51,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:51,752 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:51,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:51,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:51,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:51,832 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:51,903 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-05-06 04:03:51,903 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 28 [2024-05-06 04:03:51,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:54,164 INFO L85 PathProgramCache]: Analyzing trace with hash -2060640235, now seen corresponding path program 2 times [2024-05-06 04:03:54,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:54,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:54,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:54,251 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:54,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:54,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:54,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:54,342 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:54,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:54,503 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:54,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:54,573 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:54,591 INFO L85 PathProgramCache]: Analyzing trace with hash 1368365674, now seen corresponding path program 1 times [2024-05-06 04:03:54,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:54,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:54,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:54,672 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:54,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:54,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:54,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:54,931 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:55,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:55,120 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:55,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:55,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:55,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1845256111, now seen corresponding path program 1 times [2024-05-06 04:03:55,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:55,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:55,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:55,326 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:55,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:55,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:55,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:55,471 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:55,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:55,651 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:55,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:55,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:55,752 INFO L85 PathProgramCache]: Analyzing trace with hash -1880138292, now seen corresponding path program 1 times [2024-05-06 04:03:55,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:55,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:55,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:55,859 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:55,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:55,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:55,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:55,968 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:56,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 44 [2024-05-06 04:03:56,165 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:56,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 38 [2024-05-06 04:03:56,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:56,256 INFO L85 PathProgramCache]: Analyzing trace with hash -2000312302, now seen corresponding path program 33 times [2024-05-06 04:03:56,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:56,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:56,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:56,317 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:56,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:56,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:56,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:56,377 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:56,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:56,562 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:56,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:56,663 INFO L85 PathProgramCache]: Analyzing trace with hash 1182399774, now seen corresponding path program 34 times [2024-05-06 04:03:56,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:56,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:56,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:56,693 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:56,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:56,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 37 [2024-05-06 04:03:56,904 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:56,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 24 [2024-05-06 04:03:57,075 INFO L85 PathProgramCache]: Analyzing trace with hash -931689407, now seen corresponding path program 35 times [2024-05-06 04:03:57,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:57,206 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:57,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:57,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:57,404 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:57,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:57,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1355418816, now seen corresponding path program 36 times [2024-05-06 04:03:57,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:57,563 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:57,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:57,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 04:03:57,772 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:57,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 04:03:57,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:57,901 INFO L85 PathProgramCache]: Analyzing trace with hash 1844838499, now seen corresponding path program 37 times [2024-05-06 04:03:57,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:57,928 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:57,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:58,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 04:03:58,301 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:58,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 04:03:58,457 INFO L85 PathProgramCache]: Analyzing trace with hash 1844838530, now seen corresponding path program 4 times [2024-05-06 04:03:58,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:58,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:58,541 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:58,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:58,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:58,624 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:03:58,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:03:58,798 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:58,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:03:58,910 INFO L85 PathProgramCache]: Analyzing trace with hash -1048867741, now seen corresponding path program 38 times [2024-05-06 04:03:58,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:58,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:58,936 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:58,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:59,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 53 [2024-05-06 04:03:59,557 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:59,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 41 [2024-05-06 04:03:59,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:03:59,689 INFO L85 PathProgramCache]: Analyzing trace with hash 2056135130, now seen corresponding path program 3 times [2024-05-06 04:03:59,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:59,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:59,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:03:59,713 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:03:59,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:00,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:04:00,805 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:00,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:04:00,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:00,935 INFO L85 PathProgramCache]: Analyzing trace with hash 971577004, now seen corresponding path program 3 times [2024-05-06 04:04:00,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:00,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:00,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:00,961 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:00,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:01,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:04:01,187 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:01,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:04:01,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:01,325 INFO L85 PathProgramCache]: Analyzing trace with hash -1042051599, now seen corresponding path program 3 times [2024-05-06 04:04:01,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:01,350 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:01,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:01,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:04:01,553 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:01,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:04:01,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:01,662 INFO L85 PathProgramCache]: Analyzing trace with hash 1714465903, now seen corresponding path program 5 times [2024-05-06 04:04:01,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,773 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 25 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:04:01,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,896 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 25 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:04:02,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:04:02,064 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:02,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:04:02,163 INFO L85 PathProgramCache]: Analyzing trace with hash -1143985586, now seen corresponding path program 6 times [2024-05-06 04:04:02,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:02,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:02,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:02,268 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:04:02,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:02,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:02,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:02,467 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:04:02,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:04:02,652 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:02,652 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:04:02,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:02,771 INFO L85 PathProgramCache]: Analyzing trace with hash 129845306, now seen corresponding path program 7 times [2024-05-06 04:04:02,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:02,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:02,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:02,884 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:04:02,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:02,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:02,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:02,997 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:04:03,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:04:03,187 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:03,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:04:03,317 INFO L85 PathProgramCache]: Analyzing trace with hash -1688331357, now seen corresponding path program 8 times [2024-05-06 04:04:03,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:03,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:03,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:03,357 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:03,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:03,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:04:03,616 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:03,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:04:03,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:03,763 INFO L85 PathProgramCache]: Analyzing trace with hash 733550021, now seen corresponding path program 3 times [2024-05-06 04:04:03,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:03,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:03,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:03,801 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:03,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:04,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2024-05-06 04:04:04,238 INFO L85 PathProgramCache]: Analyzing trace with hash -726351048, now seen corresponding path program 3 times [2024-05-06 04:04:04,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:04,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:04,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:04,266 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:04,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:04,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 72 [2024-05-06 04:04:04,640 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:04,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 81 treesize of output 55 [2024-05-06 04:04:04,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:04,795 INFO L85 PathProgramCache]: Analyzing trace with hash -1924688584, now seen corresponding path program 2 times [2024-05-06 04:04:04,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:04,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:04,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:04,897 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:04,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:04,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:04,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:04,992 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:05,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-06 04:04:05,165 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:05,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-06 04:04:05,270 INFO L85 PathProgramCache]: Analyzing trace with hash 1912233528, now seen corresponding path program 5 times [2024-05-06 04:04:05,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:05,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:05,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:05,375 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 25 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:04:05,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:05,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:05,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:05,479 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 11 proven. 25 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:04:05,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:04:05,642 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:05,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:04:05,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:05,752 INFO L85 PathProgramCache]: Analyzing trace with hash 967753445, now seen corresponding path program 6 times [2024-05-06 04:04:05,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:05,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:05,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:05,862 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:04:05,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:05,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:05,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:06,064 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:04:06,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:04:06,281 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:06,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:04:06,410 INFO L85 PathProgramCache]: Analyzing trace with hash 1392243011, now seen corresponding path program 7 times [2024-05-06 04:04:06,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:06,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:06,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:06,510 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:04:06,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:06,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:06,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:06,609 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:04:06,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:04:06,803 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:06,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:04:06,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:06,926 INFO L85 PathProgramCache]: Analyzing trace with hash 668610810, now seen corresponding path program 8 times [2024-05-06 04:04:06,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:06,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:06,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:06,951 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:06,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:07,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:04:07,130 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:07,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:04:07,284 INFO L85 PathProgramCache]: Analyzing trace with hash -962804210, now seen corresponding path program 3 times [2024-05-06 04:04:07,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:07,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:07,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:07,310 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:07,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:07,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2024-05-06 04:04:07,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:07,619 INFO L85 PathProgramCache]: Analyzing trace with hash -439072433, now seen corresponding path program 3 times [2024-05-06 04:04:07,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:07,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:07,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:07,642 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:07,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:07,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 72 [2024-05-06 04:04:07,969 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:07,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 81 treesize of output 55 [2024-05-06 04:04:08,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:08,085 INFO L85 PathProgramCache]: Analyzing trace with hash 432253583, now seen corresponding path program 2 times [2024-05-06 04:04:08,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:08,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:08,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:08,252 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:08,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:08,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:08,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:08,347 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:08,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:08,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:08,762 INFO L85 PathProgramCache]: Analyzing trace with hash -1942043374, now seen corresponding path program 7 times [2024-05-06 04:04:08,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:08,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:08,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:08,787 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:08,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:09,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:09,176 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:09,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:09,271 INFO L85 PathProgramCache]: Analyzing trace with hash -908470744, now seen corresponding path program 19 times [2024-05-06 04:04:09,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:09,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:09,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:09,393 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 17 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:09,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:09,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:09,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:09,516 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 17 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:09,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:04:09,698 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:09,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:04:09,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1902178513, now seen corresponding path program 20 times [2024-05-06 04:04:09,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:09,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:09,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:09,950 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:09,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:09,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:09,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:10,086 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 9 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:10,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:10,279 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:10,280 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:10,384 INFO L85 PathProgramCache]: Analyzing trace with hash -1162007733, now seen corresponding path program 21 times [2024-05-06 04:04:10,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:10,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:10,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:12,187 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 8 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:12,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:12,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:12,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:12,349 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 8 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:12,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:12,522 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:12,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:12,626 INFO L85 PathProgramCache]: Analyzing trace with hash 1900516437, now seen corresponding path program 22 times [2024-05-06 04:04:12,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:12,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:12,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:13,054 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 8 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:13,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:13,217 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 8 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:13,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:13,414 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:13,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:13,476 INFO L85 PathProgramCache]: Analyzing trace with hash 524883806, now seen corresponding path program 23 times [2024-05-06 04:04:13,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:13,588 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:13,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:13,689 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 15 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:13,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:13,838 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:13,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:13,916 INFO L85 PathProgramCache]: Analyzing trace with hash -1091446934, now seen corresponding path program 24 times [2024-05-06 04:04:13,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:14,019 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 13 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:14,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:14,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:14,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:14,119 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 13 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:14,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:04:14,258 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:14,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:04:14,356 INFO L85 PathProgramCache]: Analyzing trace with hash 284897452, now seen corresponding path program 25 times [2024-05-06 04:04:14,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:14,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:14,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:14,457 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:14,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:14,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:14,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:14,671 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:14,876 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:14,883 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:14,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:14,985 INFO L85 PathProgramCache]: Analyzing trace with hash 284897452, now seen corresponding path program 26 times [2024-05-06 04:04:14,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:14,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:15,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:15,108 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:15,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:15,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:15,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:15,229 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:15,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:15,424 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:15,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:15,537 INFO L85 PathProgramCache]: Analyzing trace with hash -1039463597, now seen corresponding path program 3 times [2024-05-06 04:04:15,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:15,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:15,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:15,698 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:15,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:15,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:15,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:15,873 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:16,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:16,065 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:16,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:16,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:16,158 INFO L85 PathProgramCache]: Analyzing trace with hash 1490489556, now seen corresponding path program 3 times [2024-05-06 04:04:16,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:16,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:16,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:16,285 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:16,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:16,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:16,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:16,505 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:16,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:16,688 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:16,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:16,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:16,801 INFO L85 PathProgramCache]: Analyzing trace with hash 463722293, now seen corresponding path program 3 times [2024-05-06 04:04:16,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:16,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:16,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:16,931 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:16,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:16,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:16,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:17,055 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:17,221 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:17,227 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:17,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:17,314 INFO L85 PathProgramCache]: Analyzing trace with hash 14958774, now seen corresponding path program 3 times [2024-05-06 04:04:17,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:17,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:17,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:17,473 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:17,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:17,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:17,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:17,579 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:17,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:17,749 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:17,754 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:17,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:17,848 INFO L85 PathProgramCache]: Analyzing trace with hash 1663050520, now seen corresponding path program 27 times [2024-05-06 04:04:17,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:17,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:17,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:18,040 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:18,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:18,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:18,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:18,147 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 11 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:18,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 04:04:18,324 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:18,324 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 04:04:18,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:18,445 INFO L85 PathProgramCache]: Analyzing trace with hash 260259612, now seen corresponding path program 28 times [2024-05-06 04:04:18,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:18,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:18,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:18,540 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:18,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:18,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:18,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:18,635 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:19,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:04:19,358 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:19,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:04:19,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:19,442 INFO L85 PathProgramCache]: Analyzing trace with hash 1556995969, now seen corresponding path program 29 times [2024-05-06 04:04:19,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:19,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:19,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:19,466 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:19,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:20,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 60 [2024-05-06 04:04:20,351 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:20,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 55 [2024-05-06 04:04:20,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:20,436 INFO L85 PathProgramCache]: Analyzing trace with hash -73801945, now seen corresponding path program 8 times [2024-05-06 04:04:20,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:20,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:20,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:20,459 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:20,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:20,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:20,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:20,809 INFO L85 PathProgramCache]: Analyzing trace with hash 2007107509, now seen corresponding path program 9 times [2024-05-06 04:04:20,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:20,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:20,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:20,837 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:20,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:21,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:21,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:21,259 INFO L85 PathProgramCache]: Analyzing trace with hash -1032477900, now seen corresponding path program 3 times [2024-05-06 04:04:21,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:21,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:21,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:21,283 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:21,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:21,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:21,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:21,697 INFO L85 PathProgramCache]: Analyzing trace with hash -726042412, now seen corresponding path program 3 times [2024-05-06 04:04:21,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:21,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:21,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:21,721 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:21,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:22,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:22,124 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:22,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:22,249 INFO L85 PathProgramCache]: Analyzing trace with hash -972359724, now seen corresponding path program 2 times [2024-05-06 04:04:22,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:22,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:22,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:22,312 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:22,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:22,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:22,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:22,375 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:22,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:22,683 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:22,858 INFO L85 PathProgramCache]: Analyzing trace with hash -439062730, now seen corresponding path program 2 times [2024-05-06 04:04:22,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:22,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:22,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:22,883 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:22,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:23,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:23,264 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:23,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:23,335 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:23,373 INFO L85 PathProgramCache]: Analyzing trace with hash -2114528330, now seen corresponding path program 1 times [2024-05-06 04:04:23,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:23,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:23,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:23,433 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:23,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:23,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:23,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:23,493 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:23,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 14 [2024-05-06 04:04:23,785 INFO L85 PathProgramCache]: Analyzing trace with hash 540026006, now seen corresponding path program 3 times [2024-05-06 04:04:23,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:23,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:23,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:23,919 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:23,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:24,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:24,337 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:24,540 INFO L85 PathProgramCache]: Analyzing trace with hash 540026006, now seen corresponding path program 4 times [2024-05-06 04:04:24,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:24,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:24,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:24,565 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:24,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:25,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 72 [2024-05-06 04:04:25,076 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:25,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 81 treesize of output 55 [2024-05-06 04:04:25,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:25,193 INFO L85 PathProgramCache]: Analyzing trace with hash 1320638742, now seen corresponding path program 1 times [2024-05-06 04:04:25,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:25,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:25,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:25,303 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:25,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:25,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:25,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:25,466 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:25,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 52 [2024-05-06 04:04:25,667 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:25,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 56 treesize of output 38 [2024-05-06 04:04:25,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:25,772 INFO L85 PathProgramCache]: Analyzing trace with hash 1320638742, now seen corresponding path program 2 times [2024-05-06 04:04:25,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:25,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:25,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:25,825 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:25,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:25,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:25,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:25,878 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:26,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:26,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:26,377 INFO L85 PathProgramCache]: Analyzing trace with hash -1031523596, now seen corresponding path program 2 times [2024-05-06 04:04:26,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:26,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:26,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:26,439 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:04:26,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:26,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:26,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:26,526 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:04:26,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:26,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:26,913 INFO L85 PathProgramCache]: Analyzing trace with hash -726011629, now seen corresponding path program 2 times [2024-05-06 04:04:26,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:26,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:26,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:26,983 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:04:26,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:26,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:27,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:27,043 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:04:27,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:27,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:27,453 INFO L85 PathProgramCache]: Analyzing trace with hash -439061738, now seen corresponding path program 2 times [2024-05-06 04:04:27,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:27,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:27,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:27,519 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:04:27,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:27,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:27,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:27,591 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:04:27,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2024-05-06 04:04:27,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:28,112 INFO L85 PathProgramCache]: Analyzing trace with hash 540026037, now seen corresponding path program 2 times [2024-05-06 04:04:28,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:28,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:28,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:28,246 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:04:28,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:28,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:28,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:28,304 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:04:28,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:04:28,487 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:28,487 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:04:28,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:28,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:28,963 INFO L85 PathProgramCache]: Analyzing trace with hash 1802645227, now seen corresponding path program 1 times [2024-05-06 04:04:28,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:28,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:28,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:29,127 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-06 04:04:29,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:29,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:29,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:29,179 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-06 04:04:29,180 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-06 04:04:29,184 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1337, Invalid=56023, Unknown=0, NotChecked=0, Total=57360 [2024-05-06 04:04:29,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:04:29,399 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:29,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:04:29,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:31,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1843462966, now seen corresponding path program 163 times [2024-05-06 04:04:31,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:31,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:31,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:31,625 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 36 proven. 33 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:31,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:31,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:31,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:31,746 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 36 proven. 33 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:31,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 04:04:31,891 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:31,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 04:04:32,078 INFO L85 PathProgramCache]: Analyzing trace with hash -1382580929, now seen corresponding path program 164 times [2024-05-06 04:04:32,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:32,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:32,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:32,207 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 20 proven. 47 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:32,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:32,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:32,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:32,337 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 20 proven. 47 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:32,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:04:32,472 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:32,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:04:34,634 INFO L85 PathProgramCache]: Analyzing trace with hash -1563827371, now seen corresponding path program 165 times [2024-05-06 04:04:34,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:34,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:34,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:34,929 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:34,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:34,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:34,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:35,317 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:35,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:04:35,470 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:35,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:04:35,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:35,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:35,713 INFO L85 PathProgramCache]: Analyzing trace with hash 817419323, now seen corresponding path program 166 times [2024-05-06 04:04:35,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:35,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:35,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:36,014 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:36,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:36,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:36,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:36,386 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:36,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:04:36,529 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:36,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:04:36,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:38,692 INFO L85 PathProgramCache]: Analyzing trace with hash -371404237, now seen corresponding path program 167 times [2024-05-06 04:04:38,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:38,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:38,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:38,995 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:38,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:38,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:39,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:39,348 INFO L134 CoverageAnalysis]: Checked inductivity of 77 backedges. 25 proven. 52 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:39,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:04:39,485 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:39,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:04:41,663 INFO L85 PathProgramCache]: Analyzing trace with hash 644321949, now seen corresponding path program 168 times [2024-05-06 04:04:41,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:41,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:41,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:41,940 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:41,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:41,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:41,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:42,316 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 25 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:04:42,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 04:04:42,477 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:42,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 04:04:42,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:44,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2024-05-06 04:04:45,042 WARN L249 Executor]: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-05-06 04:04:45,050 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 101 [2024-05-06 04:04:45,050 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-05-06 04:04:45,244 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable790,SelfDestructingSolverStorable670,SelfDestructingSolverStorable791,SelfDestructingSolverStorable550,SelfDestructingSolverStorable671,SelfDestructingSolverStorable792,SelfDestructingSolverStorable306,SelfDestructingSolverStorable427,SelfDestructingSolverStorable548,SelfDestructingSolverStorable669,SelfDestructingSolverStorable307,SelfDestructingSolverStorable428,SelfDestructingSolverStorable549,SelfDestructingSolverStorable308,SelfDestructingSolverStorable429,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable423,SelfDestructingSolverStorable544,SelfDestructingSolverStorable665,SelfDestructingSolverStorable786,SelfDestructingSolverStorable303,SelfDestructingSolverStorable424,SelfDestructingSolverStorable545,SelfDestructingSolverStorable666,SelfDestructingSolverStorable787,SelfDestructingSolverStorable304,SelfDestructingSolverStorable425,SelfDestructingSolverStorable546,SelfDestructingSolverStorable667,SelfDestructingSolverStorable788,SelfDestructingSolverStorable305,SelfDestructingSolverStorable426,SelfDestructingSolverStorable547,SelfDestructingSolverStorable668,SelfDestructingSolverStorable789,SelfDestructingSolverStorable540,SelfDestructingSolverStorable661,SelfDestructingSolverStorable782,SelfDestructingSolverStorable420,SelfDestructingSolverStorable541,SelfDestructingSolverStorable662,SelfDestructingSolverStorable783,SelfDestructingSolverStorable300,SelfDestructingSolverStorable421,SelfDestructingSolverStorable542,SelfDestructingSolverStorable663,SelfDestructingSolverStorable784,SelfDestructingSolverStorable301,SelfDestructingSolverStorable422,SelfDestructingSolverStorable543,SelfDestructingSolverStorable664,SelfDestructingSolverStorable785,SelfDestructingSolverStorable780,SelfDestructingSolverStorable660,SelfDestructingSolverStorable781,SelfDestructingSolverStorable416,SelfDestructingSolverStorable537,SelfDestructingSolverStorable658,SelfDestructingSolverStorable779,SelfDestructingSolverStorable417,SelfDestructingSolverStorable538,SelfDestructingSolverStorable659,SelfDestructingSolverStorable418,SelfDestructingSolverStorable539,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable533,SelfDestructingSolverStorable654,SelfDestructingSolverStorable775,SelfDestructingSolverStorable413,SelfDestructingSolverStorable534,SelfDestructingSolverStorable655,SelfDestructingSolverStorable776,SelfDestructingSolverStorable414,SelfDestructingSolverStorable535,SelfDestructingSolverStorable656,SelfDestructingSolverStorable777,SelfDestructingSolverStorable415,SelfDestructingSolverStorable536,SelfDestructingSolverStorable657,SelfDestructingSolverStorable778,SelfDestructingSolverStorable650,SelfDestructingSolverStorable771,SelfDestructingSolverStorable530,SelfDestructingSolverStorable651,SelfDestructingSolverStorable772,SelfDestructingSolverStorable410,SelfDestructingSolverStorable531,SelfDestructingSolverStorable652,SelfDestructingSolverStorable773,SelfDestructingSolverStorable411,SelfDestructingSolverStorable532,SelfDestructingSolverStorable653,SelfDestructingSolverStorable774,SelfDestructingSolverStorable690,SelfDestructingSolverStorable570,SelfDestructingSolverStorable691,SelfDestructingSolverStorable450,SelfDestructingSolverStorable571,SelfDestructingSolverStorable692,SelfDestructingSolverStorable330,SelfDestructingSolverStorable451,SelfDestructingSolverStorable572,SelfDestructingSolverStorable693,SelfDestructingSolverStorable207,SelfDestructingSolverStorable328,SelfDestructingSolverStorable449,SelfDestructingSolverStorable208,SelfDestructingSolverStorable329,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable324,SelfDestructingSolverStorable445,SelfDestructingSolverStorable566,SelfDestructingSolverStorable687,SelfDestructingSolverStorable204,SelfDestructingSolverStorable325,SelfDestructingSolverStorable446,SelfDestructingSolverStorable567,SelfDestructingSolverStorable688,SelfDestructingSolverStorable205,SelfDestructingSolverStorable326,SelfDestructingSolverStorable447,SelfDestructingSolverStorable568,SelfDestructingSolverStorable689,SelfDestructingSolverStorable206,SelfDestructingSolverStorable327,SelfDestructingSolverStorable448,SelfDestructingSolverStorable569,SelfDestructingSolverStorable320,SelfDestructingSolverStorable441,SelfDestructingSolverStorable562,SelfDestructingSolverStorable683,SelfDestructingSolverStorable200,SelfDestructingSolverStorable321,SelfDestructingSolverStorable442,SelfDestructingSolverStorable563,SelfDestructingSolverStorable684,SelfDestructingSolverStorable201,SelfDestructingSolverStorable322,SelfDestructingSolverStorable443,SelfDestructingSolverStorable564,SelfDestructingSolverStorable685,SelfDestructingSolverStorable202,SelfDestructingSolverStorable323,SelfDestructingSolverStorable444,SelfDestructingSolverStorable565,SelfDestructingSolverStorable686,SelfDestructingSolverStorable680,SelfDestructingSolverStorable560,SelfDestructingSolverStorable681,SelfDestructingSolverStorable440,SelfDestructingSolverStorable561,SelfDestructingSolverStorable682,SelfDestructingSolverStorable317,SelfDestructingSolverStorable438,SelfDestructingSolverStorable559,SelfDestructingSolverStorable318,SelfDestructingSolverStorable439,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable434,SelfDestructingSolverStorable555,SelfDestructingSolverStorable676,SelfDestructingSolverStorable797,SelfDestructingSolverStorable314,SelfDestructingSolverStorable435,SelfDestructingSolverStorable556,SelfDestructingSolverStorable677,SelfDestructingSolverStorable798,SelfDestructingSolverStorable315,SelfDestructingSolverStorable436,SelfDestructingSolverStorable557,SelfDestructingSolverStorable678,SelfDestructingSolverStorable799,SelfDestructingSolverStorable316,SelfDestructingSolverStorable437,SelfDestructingSolverStorable558,SelfDestructingSolverStorable679,SelfDestructingSolverStorable430,SelfDestructingSolverStorable551,SelfDestructingSolverStorable672,SelfDestructingSolverStorable793,SelfDestructingSolverStorable310,SelfDestructingSolverStorable431,SelfDestructingSolverStorable552,SelfDestructingSolverStorable673,SelfDestructingSolverStorable794,SelfDestructingSolverStorable311,SelfDestructingSolverStorable432,SelfDestructingSolverStorable553,SelfDestructingSolverStorable674,SelfDestructingSolverStorable795,SelfDestructingSolverStorable312,SelfDestructingSolverStorable433,SelfDestructingSolverStorable554,SelfDestructingSolverStorable675,SelfDestructingSolverStorable796,SelfDestructingSolverStorable508,SelfDestructingSolverStorable629,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable625,SelfDestructingSolverStorable746,SelfDestructingSolverStorable867,SelfDestructingSolverStorable505,SelfDestructingSolverStorable626,SelfDestructingSolverStorable747,SelfDestructingSolverStorable868,SelfDestructingSolverStorable506,SelfDestructingSolverStorable627,SelfDestructingSolverStorable748,SelfDestructingSolverStorable869,SelfDestructingSolverStorable507,SelfDestructingSolverStorable628,SelfDestructingSolverStorable749,SelfDestructingSolverStorable500,SelfDestructingSolverStorable621,SelfDestructingSolverStorable742,SelfDestructingSolverStorable863,SelfDestructingSolverStorable501,SelfDestructingSolverStorable622,SelfDestructingSolverStorable743,SelfDestructingSolverStorable864,SelfDestructingSolverStorable502,SelfDestructingSolverStorable623,SelfDestructingSolverStorable744,SelfDestructingSolverStorable865,SelfDestructingSolverStorable503,SelfDestructingSolverStorable624,SelfDestructingSolverStorable745,SelfDestructingSolverStorable866,SelfDestructingSolverStorable860,SelfDestructingSolverStorable740,SelfDestructingSolverStorable861,SelfDestructingSolverStorable620,SelfDestructingSolverStorable741,SelfDestructingSolverStorable862,SelfDestructingSolverStorable618,SelfDestructingSolverStorable739,SelfDestructingSolverStorable619,SelfDestructingSolverStorable614,SelfDestructingSolverStorable735,SelfDestructingSolverStorable856,SelfDestructingSolverStorable615,SelfDestructingSolverStorable736,SelfDestructingSolverStorable857,SelfDestructingSolverStorable616,SelfDestructingSolverStorable737,SelfDestructingSolverStorable858,SelfDestructingSolverStorable617,SelfDestructingSolverStorable738,SelfDestructingSolverStorable859,SelfDestructingSolverStorable610,SelfDestructingSolverStorable731,SelfDestructingSolverStorable852,SelfDestructingSolverStorable611,SelfDestructingSolverStorable732,SelfDestructingSolverStorable853,SelfDestructingSolverStorable612,SelfDestructingSolverStorable733,SelfDestructingSolverStorable854,SelfDestructingSolverStorable613,SelfDestructingSolverStorable734,SelfDestructingSolverStorable855,SelfDestructingSolverStorable850,SelfDestructingSolverStorable730,SelfDestructingSolverStorable851,SelfDestructingSolverStorable890,SelfDestructingSolverStorable770,SelfDestructingSolverStorable891,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable526,SelfDestructingSolverStorable647,SelfDestructingSolverStorable768,SelfDestructingSolverStorable889,SelfDestructingSolverStorable406,SelfDestructingSolverStorable527,SelfDestructingSolverStorable648,SelfDestructingSolverStorable769,SelfDestructingSolverStorable407,SelfDestructingSolverStorable528,SelfDestructingSolverStorable649,SelfDestructingSolverStorable408,SelfDestructingSolverStorable529,SelfDestructingSolverStorable401,SelfDestructingSolverStorable522,SelfDestructingSolverStorable643,SelfDestructingSolverStorable764,SelfDestructingSolverStorable885,SelfDestructingSolverStorable402,SelfDestructingSolverStorable523,SelfDestructingSolverStorable644,SelfDestructingSolverStorable765,SelfDestructingSolverStorable886,SelfDestructingSolverStorable403,SelfDestructingSolverStorable524,SelfDestructingSolverStorable645,SelfDestructingSolverStorable766,SelfDestructingSolverStorable887,SelfDestructingSolverStorable404,SelfDestructingSolverStorable525,SelfDestructingSolverStorable646,SelfDestructingSolverStorable767,SelfDestructingSolverStorable888,SelfDestructingSolverStorable760,SelfDestructingSolverStorable881,SelfDestructingSolverStorable640,SelfDestructingSolverStorable761,SelfDestructingSolverStorable882,SelfDestructingSolverStorable520,SelfDestructingSolverStorable641,SelfDestructingSolverStorable762,SelfDestructingSolverStorable883,SelfDestructingSolverStorable400,SelfDestructingSolverStorable521,SelfDestructingSolverStorable642,SelfDestructingSolverStorable763,SelfDestructingSolverStorable884,SelfDestructingSolverStorable880,SelfDestructingSolverStorable519,SelfDestructingSolverStorable515,SelfDestructingSolverStorable636,SelfDestructingSolverStorable757,SelfDestructingSolverStorable878,SelfDestructingSolverStorable516,SelfDestructingSolverStorable637,SelfDestructingSolverStorable758,SelfDestructingSolverStorable879,SelfDestructingSolverStorable517,SelfDestructingSolverStorable638,SelfDestructingSolverStorable759,SelfDestructingSolverStorable518,SelfDestructingSolverStorable639,SelfDestructingSolverStorable511,SelfDestructingSolverStorable632,SelfDestructingSolverStorable753,SelfDestructingSolverStorable874,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in 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[2024-05-06 04:04:45,245 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseCheckSatResult(Executor.java:281) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.checkSat(Scriptor.java:155) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.checkSat(WrapperScript.java:163) at de.uni_freiburg.informatik.ultimate.logic.Util.checkSat(Util.java:61) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.SmtUtils.checkSatTerm(SmtUtils.java:332) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:144) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:148) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.computeMUS(MaximumUniversalSetComputation.java:159) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.MaximumUniversalSetComputation.(MaximumUniversalSetComputation.java:94) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem(Abducer.java:208) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.abduce(Abducer.java:175) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.SemanticIndependenceConditionGenerator.generateCondition(SemanticIndependenceConditionGenerator.java:151) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityChecker.checkConditionalCommutativity(ConditionalCommutativityChecker.java:150) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:186) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:1) at de.uni_freiburg.informatik.ultimate.automata.partialorder.visitors.DeadEndOptimizingSearchVisitor.discoverState(DeadEndOptimizingSearchVisitor.java:73) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.visitState(DepthFirstTraversal.java:222) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:165) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.(DepthFirstTraversal.java:98) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:122) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.PartialOrderReductionFacade.apply(PartialOrderReductionFacade.java:321) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.concurrency.PartialOrderCegarLoop.isAbstractionEmpty(PartialOrderCegarLoop.java:371) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:466) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 47 more [2024-05-06 04:04:45,252 INFO L158 Benchmark]: Toolchain (without parser) took 555407.06ms. Allocated memory was 293.6MB in the beginning and 2.6GB in the end (delta: 2.4GB). Free memory was 223.8MB in the beginning and 766.2MB in the end (delta: -542.5MB). Peak memory consumption was 1.8GB. Max. memory is 8.0GB. [2024-05-06 04:04:45,252 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 164.6MB. Free memory is still 127.9MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 04:04:45,253 INFO L158 Benchmark]: CACSL2BoogieTranslator took 187.56ms. Allocated memory is still 293.6MB. Free memory was 223.6MB in the beginning and 211.3MB in the end (delta: 12.3MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 04:04:45,253 INFO L158 Benchmark]: Boogie Procedure Inliner took 48.01ms. Allocated memory is still 293.6MB. Free memory was 211.3MB in the beginning and 209.4MB in the end (delta: 1.9MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 04:04:45,253 INFO L158 Benchmark]: Boogie Preprocessor took 102.48ms. Allocated memory is still 293.6MB. Free memory was 209.4MB in the beginning and 262.0MB in the end (delta: -52.6MB). Peak memory consumption was 4.4MB. Max. memory is 8.0GB. [2024-05-06 04:04:45,253 INFO L158 Benchmark]: RCFGBuilder took 550.82ms. Allocated memory is still 293.6MB. Free memory was 262.0MB in the beginning and 235.8MB in the end (delta: 26.2MB). Peak memory consumption was 26.2MB. Max. memory is 8.0GB. [2024-05-06 04:04:45,253 INFO L158 Benchmark]: TraceAbstraction took 554505.84ms. Allocated memory was 293.6MB in the beginning and 2.6GB in the end (delta: 2.4GB). Free memory was 234.7MB in the beginning and 766.2MB in the end (delta: -531.5MB). Peak memory consumption was 1.8GB. Max. memory is 8.0GB. [2024-05-06 04:04:45,253 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 164.6MB. Free memory is still 127.9MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 187.56ms. Allocated memory is still 293.6MB. Free memory was 223.6MB in the beginning and 211.3MB in the end (delta: 12.3MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 48.01ms. Allocated memory is still 293.6MB. Free memory was 211.3MB in the beginning and 209.4MB in the end (delta: 1.9MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 102.48ms. Allocated memory is still 293.6MB. Free memory was 209.4MB in the beginning and 262.0MB in the end (delta: -52.6MB). Peak memory consumption was 4.4MB. Max. memory is 8.0GB. * RCFGBuilder took 550.82ms. Allocated memory is still 293.6MB. Free memory was 262.0MB in the beginning and 235.8MB in the end (delta: 26.2MB). Peak memory consumption was 26.2MB. Max. memory is 8.0GB. * TraceAbstraction took 554505.84ms. Allocated memory was 293.6MB in the beginning and 2.6GB in the end (delta: 2.4GB). Free memory was 234.7MB in the beginning and 766.2MB in the end (delta: -531.5MB). Peak memory consumption was 1.8GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. [2024-05-06 04:04:45,267 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 Received shutdown request...