/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-more-buffer-mult2.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 04:01:04,142 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 04:01:04,209 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 04:01:04,212 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 04:01:04,213 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 04:01:04,236 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 04:01:04,237 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 04:01:04,238 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 04:01:04,238 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 04:01:04,241 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 04:01:04,242 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 04:01:04,242 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 04:01:04,242 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 04:01:04,243 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 04:01:04,243 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 04:01:04,244 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 04:01:04,244 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 04:01:04,244 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 04:01:04,244 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 04:01:04,244 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 04:01:04,244 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 04:01:04,245 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 04:01:04,245 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 04:01:04,245 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 04:01:04,245 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 04:01:04,246 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 04:01:04,246 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 04:01:04,246 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 04:01:04,246 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 04:01:04,246 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 04:01:04,247 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 04:01:04,247 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 04:01:04,248 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 04:01:04,248 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 04:01:04,248 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 04:01:04,248 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 04:01:04,248 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 04:01:04,248 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 04:01:04,248 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 04:01:04,249 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-06 04:01:04,440 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 04:01:04,458 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 04:01:04,459 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 04:01:04,460 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 04:01:04,461 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 04:01:04,462 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-more-buffer-mult2.wvr.c [2024-05-06 04:01:05,387 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 04:01:05,574 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 04:01:05,574 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-mult2.wvr.c [2024-05-06 04:01:05,581 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/7d585bb98/5befde807aa4492b9d8c91fd110f71fc/FLAGdb306d6d8 [2024-05-06 04:01:05,592 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/7d585bb98/5befde807aa4492b9d8c91fd110f71fc [2024-05-06 04:01:05,594 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 04:01:05,595 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 04:01:05,596 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 04:01:05,596 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 04:01:05,600 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 04:01:05,600 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,601 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@743676ca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05, skipping insertion in model container [2024-05-06 04:01:05,601 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,621 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 04:01:05,747 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-mult2.wvr.c[4099,4112] [2024-05-06 04:01:05,760 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 04:01:05,767 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 04:01:05,796 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-mult2.wvr.c[4099,4112] [2024-05-06 04:01:05,806 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 04:01:05,812 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 04:01:05,812 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 04:01:05,818 INFO L206 MainTranslator]: Completed translation [2024-05-06 04:01:05,818 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05 WrapperNode [2024-05-06 04:01:05,818 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 04:01:05,819 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 04:01:05,819 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 04:01:05,819 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 04:01:05,825 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,848 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,871 INFO L138 Inliner]: procedures = 27, calls = 76, calls flagged for inlining = 18, calls inlined = 22, statements flattened = 312 [2024-05-06 04:01:05,872 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 04:01:05,872 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 04:01:05,872 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 04:01:05,872 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 04:01:05,882 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,882 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,888 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,888 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,899 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,904 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,906 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,908 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,911 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 04:01:05,912 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 04:01:05,925 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 04:01:05,925 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 04:01:05,926 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (1/1) ... [2024-05-06 04:01:05,930 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 04:01:05,938 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:01:05,958 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 04:01:05,963 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 04:01:05,992 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 04:01:05,993 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 04:01:05,993 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 04:01:05,993 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 04:01:05,993 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 04:01:05,993 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 04:01:05,993 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 04:01:05,993 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 04:01:05,993 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 04:01:05,993 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 04:01:05,993 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 04:01:05,993 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 04:01:05,993 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 04:01:05,994 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 04:01:05,994 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 04:01:05,994 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 04:01:05,994 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 04:01:05,994 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 04:01:05,994 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 04:01:05,995 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 04:01:06,075 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 04:01:06,076 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 04:01:06,405 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 04:01:06,564 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 04:01:06,564 INFO L309 CfgBuilder]: Removed 6 assume(true) statements. [2024-05-06 04:01:06,566 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:01:06 BoogieIcfgContainer [2024-05-06 04:01:06,566 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 04:01:06,569 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 04:01:06,569 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 04:01:06,571 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 04:01:06,572 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 04:01:05" (1/3) ... [2024-05-06 04:01:06,572 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e0c3355 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:01:06, skipping insertion in model container [2024-05-06 04:01:06,574 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:01:05" (2/3) ... [2024-05-06 04:01:06,574 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e0c3355 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:01:06, skipping insertion in model container [2024-05-06 04:01:06,574 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:01:06" (3/3) ... [2024-05-06 04:01:06,575 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-more-buffer-mult2.wvr.c [2024-05-06 04:01:06,582 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 04:01:06,590 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 04:01:06,590 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 04:01:06,590 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 04:01:06,673 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-06 04:01:06,718 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 04:01:06,718 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 04:01:06,719 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:01:06,720 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 04:01:06,721 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 04:01:06,747 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 04:01:06,756 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:01:06,758 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 04:01:06,763 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@6c4a7b67, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 04:01:06,763 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 04:01:07,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:01:07,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1431562088, now seen corresponding path program 1 times [2024-05-06 04:01:07,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:07,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:07,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:07,659 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:07,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:07,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:07,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:07,764 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:01:07,782 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 04:01:07,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 04:01:08,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:01:08,102 INFO L85 PathProgramCache]: Analyzing trace with hash -1707620430, now seen corresponding path program 1 times [2024-05-06 04:01:08,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:08,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:08,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:08,565 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:08,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:08,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:08,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:08,779 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:08,781 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 04:01:08,782 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-05-06 04:01:09,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:01:09,136 INFO L85 PathProgramCache]: Analyzing trace with hash 1131878477, now seen corresponding path program 1 times [2024-05-06 04:01:09,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:09,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:09,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:09,341 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:09,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:09,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:09,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:09,486 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:01:09,488 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 04:01:09,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2024-05-06 04:01:09,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:01:09,850 INFO L85 PathProgramCache]: Analyzing trace with hash 2142817914, now seen corresponding path program 1 times [2024-05-06 04:01:09,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:09,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:09,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,094 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:01:10,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,311 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:01:10,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:10,520 INFO L85 PathProgramCache]: Analyzing trace with hash 705539778, now seen corresponding path program 1 times [2024-05-06 04:01:10,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,741 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:01:10,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:10,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:10,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:10,952 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:01:11,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:11,150 INFO L85 PathProgramCache]: Analyzing trace with hash -214429050, now seen corresponding path program 2 times [2024-05-06 04:01:11,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:11,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:11,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:11,396 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:11,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:11,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:11,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:11,617 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:11,873 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:01:11,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:01:12,547 INFO L85 PathProgramCache]: Analyzing trace with hash -1666461903, now seen corresponding path program 3 times [2024-05-06 04:01:12,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:12,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:12,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:12,898 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:01:12,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:12,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:12,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:13,143 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:01:13,374 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:01:13,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:01:14,001 INFO L85 PathProgramCache]: Analyzing trace with hash -1647630288, now seen corresponding path program 4 times [2024-05-06 04:01:14,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:14,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:14,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:14,291 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:14,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:14,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:14,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:14,524 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:14,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:14,767 INFO L85 PathProgramCache]: Analyzing trace with hash -1946579772, now seen corresponding path program 5 times [2024-05-06 04:01:14,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:14,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:14,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,005 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:15,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,276 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:15,384 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:15,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:15,535 INFO L85 PathProgramCache]: Analyzing trace with hash -1526930349, now seen corresponding path program 6 times [2024-05-06 04:01:15,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,787 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:01:15,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:15,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:15,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:15,988 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:01:16,107 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:16,158 INFO L85 PathProgramCache]: Analyzing trace with hash -90199705, now seen corresponding path program 7 times [2024-05-06 04:01:16,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:16,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:16,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:16,372 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:01:16,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:16,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:16,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:16,604 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:01:16,738 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:16,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:16,887 INFO L85 PathProgramCache]: Analyzing trace with hash 1820382790, now seen corresponding path program 8 times [2024-05-06 04:01:16,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:16,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:16,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:17,069 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:17,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:17,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:17,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:17,301 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:17,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:17,512 INFO L85 PathProgramCache]: Analyzing trace with hash 2015417032, now seen corresponding path program 9 times [2024-05-06 04:01:17,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:17,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:17,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:17,678 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:17,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:17,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:17,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:17,847 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:18,049 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:01:18,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:01:18,616 INFO L85 PathProgramCache]: Analyzing trace with hash 66450725, now seen corresponding path program 10 times [2024-05-06 04:01:18,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:18,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:18,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:18,839 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:18,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:18,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:18,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,028 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:19,157 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:19,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:19,298 INFO L85 PathProgramCache]: Analyzing trace with hash 2059973314, now seen corresponding path program 11 times [2024-05-06 04:01:19,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:19,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:19,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,542 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:19,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:19,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:19,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:19,722 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:01:19,926 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:01:19,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:01:20,460 INFO L85 PathProgramCache]: Analyzing trace with hash -565335864, now seen corresponding path program 12 times [2024-05-06 04:01:20,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:20,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:20,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:20,683 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:20,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:20,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:20,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:20,918 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:21,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:21,087 INFO L85 PathProgramCache]: Analyzing trace with hash 341512765, now seen corresponding path program 1 times [2024-05-06 04:01:21,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,279 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:21,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:21,483 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:21,615 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:21,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:21,764 INFO L85 PathProgramCache]: Analyzing trace with hash -564010804, now seen corresponding path program 2 times [2024-05-06 04:01:21,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:21,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:21,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,010 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:22,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,202 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:22,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:22,372 INFO L85 PathProgramCache]: Analyzing trace with hash -304464882, now seen corresponding path program 3 times [2024-05-06 04:01:22,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,585 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:22,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:22,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:22,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:22,791 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:22,900 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:22,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:23,100 INFO L85 PathProgramCache]: Analyzing trace with hash -1144728467, now seen corresponding path program 4 times [2024-05-06 04:01:23,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:23,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:23,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:23,346 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:01:23,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:23,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:23,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:23,579 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:01:23,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:23,781 INFO L85 PathProgramCache]: Analyzing trace with hash 288111148, now seen corresponding path program 1 times [2024-05-06 04:01:23,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:23,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:23,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:24,013 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:24,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:24,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:24,195 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:24,296 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:24,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:24,780 INFO L85 PathProgramCache]: Analyzing trace with hash 1392486843, now seen corresponding path program 2 times [2024-05-06 04:01:24,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:24,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:24,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,031 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:25,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:25,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,213 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:25,334 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:25,396 INFO L85 PathProgramCache]: Analyzing trace with hash 217420031, now seen corresponding path program 3 times [2024-05-06 04:01:25,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:25,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,588 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:25,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:25,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:25,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:25,780 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:25,915 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:25,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:26,055 INFO L85 PathProgramCache]: Analyzing trace with hash 1047153118, now seen corresponding path program 4 times [2024-05-06 04:01:26,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:26,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:26,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:26,306 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:01:26,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:26,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:26,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:26,479 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:01:26,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:26,680 INFO L85 PathProgramCache]: Analyzing trace with hash -2068916129, now seen corresponding path program 1 times [2024-05-06 04:01:26,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:26,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:26,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:26,831 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:26,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:26,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:26,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:26,984 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:27,111 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:27,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:27,267 INFO L85 PathProgramCache]: Analyzing trace with hash -358193938, now seen corresponding path program 2 times [2024-05-06 04:01:27,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:27,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:27,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:27,440 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:27,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:27,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:27,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:27,663 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:27,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:27,870 INFO L85 PathProgramCache]: Analyzing trace with hash 1780890668, now seen corresponding path program 3 times [2024-05-06 04:01:27,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:27,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:27,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:28,048 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:28,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:28,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:28,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:28,222 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:28,360 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:28,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:30,486 INFO L85 PathProgramCache]: Analyzing trace with hash -1595829365, now seen corresponding path program 4 times [2024-05-06 04:01:30,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,653 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:01:30,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:30,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:30,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:30,818 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:01:30,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:31,008 INFO L85 PathProgramCache]: Analyzing trace with hash 1041639375, now seen corresponding path program 13 times [2024-05-06 04:01:31,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:31,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:31,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:31,262 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:31,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:31,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:31,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:31,447 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:31,590 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:31,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:31,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1228883038, now seen corresponding path program 14 times [2024-05-06 04:01:31,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:31,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:31,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:31,941 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:31,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:31,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:31,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:32,103 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:32,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:32,317 INFO L85 PathProgramCache]: Analyzing trace with hash -559330628, now seen corresponding path program 15 times [2024-05-06 04:01:32,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:32,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:32,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:32,493 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:32,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:32,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:32,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:32,665 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:01:32,889 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:32,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:33,032 INFO L85 PathProgramCache]: Analyzing trace with hash 1037199899, now seen corresponding path program 16 times [2024-05-06 04:01:33,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,197 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:01:33,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:33,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:33,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:33,354 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:01:33,553 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:01:33,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:01:42,115 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1~0.base_In_29 Int) (v_~q1_front~0_In_29 Int) (v_~q1~0.offset_In_29 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_29) (+ v_~q1~0.offset_In_29 (* v_~q1_front~0_In_29 4))))) (or (= .cse0 0) (< (+ .cse0 4294967295) 0) (< v_~q1_front~0_In_29 0) (< 4294967295 .cse0)))) (forall ((v_~q2~0.offset_In_9 Int) (v_~q2~0.base_In_9 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_9) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_9)) 0))) is different from false [2024-05-06 04:01:42,117 INFO L85 PathProgramCache]: Analyzing trace with hash 51259141, now seen corresponding path program 17 times [2024-05-06 04:01:42,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:42,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:42,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:42,282 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:42,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:42,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:42,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:42,414 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:42,539 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:42,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:42,685 INFO L85 PathProgramCache]: Analyzing trace with hash -1946427872, now seen corresponding path program 18 times [2024-05-06 04:01:42,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:42,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:42,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:42,823 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:42,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:42,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:42,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:43,042 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:43,225 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:01:43,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:01:53,592 WARN L293 SmtUtils]: Spent 6.20s on a formula simplification. DAG size of input: 34 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:01:53,615 INFO L85 PathProgramCache]: Analyzing trace with hash -209721025, now seen corresponding path program 19 times [2024-05-06 04:01:53,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:53,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:53,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:53,750 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:53,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:53,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:53,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:53,885 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:54,003 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:01:54,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:01:54,124 INFO L85 PathProgramCache]: Analyzing trace with hash 2088583683, now seen corresponding path program 20 times [2024-05-06 04:01:54,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,261 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:54,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,395 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:54,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:01:54,578 INFO L85 PathProgramCache]: Analyzing trace with hash 321585591, now seen corresponding path program 21 times [2024-05-06 04:01:54,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,714 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:54,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:54,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:54,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:54,928 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:55,109 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:01:55,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:01:55,856 INFO L85 PathProgramCache]: Analyzing trace with hash -1418887423, now seen corresponding path program 1 times [2024-05-06 04:01:55,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:55,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:55,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:56,037 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:56,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:01:56,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:01:56,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:01:56,202 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:01:56,387 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:01:56,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:03,339 INFO L85 PathProgramCache]: Analyzing trace with hash -1442066736, now seen corresponding path program 2 times [2024-05-06 04:02:03,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:03,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:03,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:03,544 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:03,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:03,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:03,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:03,822 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:04,018 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:04,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:07,163 INFO L85 PathProgramCache]: Analyzing trace with hash -184317861, now seen corresponding path program 1 times [2024-05-06 04:02:07,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:07,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:07,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:07,310 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:07,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:07,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:07,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:07,445 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:07,636 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:07,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:08,763 INFO L85 PathProgramCache]: Analyzing trace with hash 1073851062, now seen corresponding path program 2 times [2024-05-06 04:02:08,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:08,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:08,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:08,923 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:08,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:08,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:08,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:09,079 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:09,349 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:09,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:09,878 INFO L85 PathProgramCache]: Analyzing trace with hash 1379527732, now seen corresponding path program 1 times [2024-05-06 04:02:09,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:09,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:09,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:10,012 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:10,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:10,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:10,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:10,150 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:10,326 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:10,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:10,911 INFO L85 PathProgramCache]: Analyzing trace with hash -661943555, now seen corresponding path program 2 times [2024-05-06 04:02:10,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:10,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:10,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:11,070 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:11,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:11,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:11,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:11,226 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:11,413 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:11,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:16,656 INFO L85 PathProgramCache]: Analyzing trace with hash 321595516, now seen corresponding path program 1 times [2024-05-06 04:02:16,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:16,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:16,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:16,788 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:16,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:16,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:16,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:16,921 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:17,099 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:17,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:17,566 INFO L85 PathProgramCache]: Analyzing trace with hash -2115657803, now seen corresponding path program 2 times [2024-05-06 04:02:17,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:17,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:17,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:17,715 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:17,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:17,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:17,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:17,861 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:18,051 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:18,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:29,646 INFO L85 PathProgramCache]: Analyzing trace with hash 2088584021, now seen corresponding path program 1 times [2024-05-06 04:02:29,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:29,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:29,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:29,780 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:29,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:29,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:29,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:29,916 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:30,097 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:30,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:48,849 WARN L293 SmtUtils]: Spent 16.25s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:02:50,859 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_20 Int) (v_~q2~0.offset_In_20 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_20) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_20)) 0)) (forall ((v_~q1_front~0_In_43 Int) (v_~q1~0.offset_In_43 Int) (v_~q1~0.base_In_43 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_43) (+ (* v_~q1_front~0_In_43 4) v_~q1~0.offset_In_43)))) (or (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0) (= .cse0 0) (< v_~q1_front~0_In_43 0))))) is different from false [2024-05-06 04:02:50,861 INFO L85 PathProgramCache]: Analyzing trace with hash -57562884, now seen corresponding path program 2 times [2024-05-06 04:02:50,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:50,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:50,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:51,009 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:51,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:51,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:51,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:51,160 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:51,348 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:51,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:52,090 INFO L85 PathProgramCache]: Analyzing trace with hash -209720994, now seen corresponding path program 1 times [2024-05-06 04:02:52,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:52,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:52,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:52,224 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:52,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:52,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:52,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:52,357 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:52,552 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:52,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:53,036 INFO L85 PathProgramCache]: Analyzing trace with hash 2109652243, now seen corresponding path program 2 times [2024-05-06 04:02:53,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:53,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:53,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:53,186 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:53,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:53,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:53,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:53,333 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:53,543 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:53,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:54,187 INFO L85 PathProgramCache]: Analyzing trace with hash -1946427848, now seen corresponding path program 22 times [2024-05-06 04:02:54,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:54,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:54,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:54,319 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:54,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:54,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:54,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:54,455 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:02:54,648 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:54,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:02:55,179 INFO L85 PathProgramCache]: Analyzing trace with hash 1174379897, now seen corresponding path program 23 times [2024-05-06 04:02:55,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:55,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:55,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:55,329 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:55,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:55,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:55,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:55,482 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:55,618 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:02:55,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:02:55,741 INFO L85 PathProgramCache]: Analyzing trace with hash -1831100964, now seen corresponding path program 24 times [2024-05-06 04:02:55,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:55,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:55,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:55,864 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:55,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:55,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:55,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:56,076 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:56,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:02:56,273 INFO L85 PathProgramCache]: Analyzing trace with hash -929554178, now seen corresponding path program 25 times [2024-05-06 04:02:56,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:56,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:56,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:56,398 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:56,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:02:56,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:02:56,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:02:56,524 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:02:56,719 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:02:56,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:05,211 WARN L293 SmtUtils]: Spent 6.02s on a formula simplification. DAG size of input: 34 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:03:05,236 INFO L85 PathProgramCache]: Analyzing trace with hash 1601461878, now seen corresponding path program 26 times [2024-05-06 04:03:05,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:05,366 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:05,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:05,493 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:05,612 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:05,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:03:05,733 INFO L85 PathProgramCache]: Analyzing trace with hash 1601461878, now seen corresponding path program 27 times [2024-05-06 04:03:05,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:05,860 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:05,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:05,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:05,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:06,073 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:06,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:03:06,246 INFO L85 PathProgramCache]: Analyzing trace with hash -1894288476, now seen corresponding path program 28 times [2024-05-06 04:03:06,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:06,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:06,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:06,375 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:06,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:06,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:06,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:06,507 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:06,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:03:06,680 INFO L85 PathProgramCache]: Analyzing trace with hash 1406600254, now seen corresponding path program 29 times [2024-05-06 04:03:06,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:06,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:06,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:06,814 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:06,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:06,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:06,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:06,948 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:07,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:07,141 INFO L85 PathProgramCache]: Analyzing trace with hash 199236628, now seen corresponding path program 30 times [2024-05-06 04:03:07,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:07,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:07,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:07,261 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:07,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:07,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:07,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:07,380 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:07,525 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:03:07,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:03:07,670 INFO L85 PathProgramCache]: Analyzing trace with hash 603963064, now seen corresponding path program 31 times [2024-05-06 04:03:07,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:07,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:07,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:07,915 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:07,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:07,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:07,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:08,049 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:08,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:08,245 INFO L85 PathProgramCache]: Analyzing trace with hash 1542986666, now seen corresponding path program 32 times [2024-05-06 04:03:08,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:08,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:08,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:08,383 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:08,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:08,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:08,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:08,522 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:08,704 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:08,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:09,344 INFO L85 PathProgramCache]: Analyzing trace with hash 1542986655, now seen corresponding path program 33 times [2024-05-06 04:03:09,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:09,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:09,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:09,485 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:09,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:09,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:09,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:09,624 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:09,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:09,882 INFO L85 PathProgramCache]: Analyzing trace with hash 1046485799, now seen corresponding path program 34 times [2024-05-06 04:03:09,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:09,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:09,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:10,026 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:10,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:10,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:10,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:10,170 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:10,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:10,352 INFO L85 PathProgramCache]: Analyzing trace with hash -1308301888, now seen corresponding path program 35 times [2024-05-06 04:03:10,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:10,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:10,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:10,504 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:10,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:10,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:10,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:10,656 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:10,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:10,844 INFO L85 PathProgramCache]: Analyzing trace with hash -1204126938, now seen corresponding path program 36 times [2024-05-06 04:03:10,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:10,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:10,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:11,017 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:11,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:11,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:11,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:11,195 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:11,387 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:11,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:12,010 INFO L85 PathProgramCache]: Analyzing trace with hash -21717894, now seen corresponding path program 37 times [2024-05-06 04:03:12,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:12,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:12,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:12,147 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:12,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:12,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:12,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:12,289 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:12,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:12,464 INFO L85 PathProgramCache]: Analyzing trace with hash -673253848, now seen corresponding path program 38 times [2024-05-06 04:03:12,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:12,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:12,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:12,599 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:12,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:12,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:12,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:12,732 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:12,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:12,905 INFO L85 PathProgramCache]: Analyzing trace with hash 603968050, now seen corresponding path program 39 times [2024-05-06 04:03:12,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:12,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:12,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:13,050 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:13,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:13,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:13,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:13,288 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:13,471 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:13,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:13,937 INFO L85 PathProgramCache]: Analyzing trace with hash 1195316641, now seen corresponding path program 40 times [2024-05-06 04:03:13,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:13,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:13,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:14,086 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:14,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:14,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:14,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:14,233 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:14,426 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:14,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:15,301 INFO L85 PathProgramCache]: Analyzing trace with hash -1161726960, now seen corresponding path program 1 times [2024-05-06 04:03:15,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,456 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:15,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:15,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:15,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:15,618 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:15,834 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:15,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:16,496 INFO L85 PathProgramCache]: Analyzing trace with hash -1045882207, now seen corresponding path program 2 times [2024-05-06 04:03:16,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:16,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:16,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,667 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:16,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:16,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:16,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:16,838 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:17,029 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:17,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:17,779 INFO L85 PathProgramCache]: Analyzing trace with hash -2115685063, now seen corresponding path program 1 times [2024-05-06 04:03:17,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:17,934 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:17,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:17,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,088 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:18,277 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:18,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:29,880 INFO L85 PathProgramCache]: Analyzing trace with hash -806250600, now seen corresponding path program 2 times [2024-05-06 04:03:29,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:29,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:29,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:30,055 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:30,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:30,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:30,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:30,220 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:30,406 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:30,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:33,185 INFO L85 PathProgramCache]: Analyzing trace with hash -1038079246, now seen corresponding path program 1 times [2024-05-06 04:03:33,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:33,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:33,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:33,422 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:33,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:33,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:33,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:33,574 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:33,764 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:33,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:34,304 INFO L85 PathProgramCache]: Analyzing trace with hash 55378431, now seen corresponding path program 2 times [2024-05-06 04:03:34,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:34,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:34,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:34,481 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:34,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:34,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:34,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:34,655 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:34,850 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:34,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:45,802 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_43 Int) (v_~q2~0.offset_In_43 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_43) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_43)) 0)) (forall ((v_~q1_front~0_In_63 Int) (v_~q1~0.offset_In_63 Int) (v_~q1~0.base_In_63 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_63) (+ v_~q1~0.offset_In_63 (* v_~q1_front~0_In_63 4))))) (or (< (+ .cse0 4294967295) 0) (< v_~q1_front~0_In_63 0) (< 4294967295 .cse0) (= .cse0 0))))) is different from false [2024-05-06 04:03:45,804 INFO L85 PathProgramCache]: Analyzing trace with hash 105060892, now seen corresponding path program 41 times [2024-05-06 04:03:45,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:45,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:45,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:46,043 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:46,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:46,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:46,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:46,194 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:46,383 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:46,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:47,185 INFO L85 PathProgramCache]: Analyzing trace with hash -367820267, now seen corresponding path program 42 times [2024-05-06 04:03:47,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,352 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:47,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,518 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:03:47,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:47,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1943051662, now seen corresponding path program 43 times [2024-05-06 04:03:47,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,853 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:47,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:48,093 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:48,282 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:48,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:57,012 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_46 Int) (v_~q2~0.offset_In_46 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_46) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_46)) 0)) (forall ((v_~q1_front~0_In_65 Int) (v_~q1~0.offset_In_65 Int) (v_~q1~0.base_In_65 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_65) (+ (* v_~q1_front~0_In_65 4) v_~q1~0.offset_In_65)))) (or (= .cse0 0) (< (+ 4294967295 .cse0) 0) (< v_~q1_front~0_In_65 0) (< 4294967295 .cse0))))) is different from false [2024-05-06 04:03:57,015 INFO L85 PathProgramCache]: Analyzing trace with hash 1943051076, now seen corresponding path program 44 times [2024-05-06 04:03:57,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:57,173 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:57,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:57,327 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:57,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:57,512 INFO L85 PathProgramCache]: Analyzing trace with hash 344920714, now seen corresponding path program 45 times [2024-05-06 04:03:57,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:57,676 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:57,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:57,843 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:57,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:58,041 INFO L85 PathProgramCache]: Analyzing trace with hash 344951497, now seen corresponding path program 1 times [2024-05-06 04:03:58,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:58,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:58,289 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:58,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:58,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:58,449 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:58,568 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:58,626 INFO L85 PathProgramCache]: Analyzing trace with hash -2083480310, now seen corresponding path program 2 times [2024-05-06 04:03:58,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:58,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:58,877 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:03:58,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:58,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:59,056 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:03:59,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:59,245 INFO L85 PathProgramCache]: Analyzing trace with hash 1812242744, now seen corresponding path program 1 times [2024-05-06 04:03:59,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:59,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:59,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:59,409 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:59,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:59,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:59,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:59,568 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:59,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:03:59,751 INFO L85 PathProgramCache]: Analyzing trace with hash -74689669, now seen corresponding path program 2 times [2024-05-06 04:03:59,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:59,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:59,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:00,007 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:04:00,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:00,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:00,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:00,180 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:04:00,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:00,367 INFO L85 PathProgramCache]: Analyzing trace with hash -1049919253, now seen corresponding path program 1 times [2024-05-06 04:04:00,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:00,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:00,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:00,522 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:00,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:00,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:00,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:00,679 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:00,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:00,864 INFO L85 PathProgramCache]: Analyzing trace with hash 566914344, now seen corresponding path program 2 times [2024-05-06 04:04:00,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:00,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:00,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,047 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:04:01,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,235 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:04:01,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:01,516 INFO L85 PathProgramCache]: Analyzing trace with hash -1834983717, now seen corresponding path program 46 times [2024-05-06 04:04:01,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,671 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:01,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,831 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:01,958 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:01,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:04:02,081 INFO L85 PathProgramCache]: Analyzing trace with hash 254686058, now seen corresponding path program 47 times [2024-05-06 04:04:02,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:02,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:02,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:02,258 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:04:02,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:02,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:02,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:02,429 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:04:02,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:02,625 INFO L85 PathProgramCache]: Analyzing trace with hash -694665928, now seen corresponding path program 48 times [2024-05-06 04:04:02,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:02,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:02,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:02,803 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:04:02,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:02,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:02,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:03,086 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:04:03,214 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:03,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:04:03,359 INFO L85 PathProgramCache]: Analyzing trace with hash 520173719, now seen corresponding path program 49 times [2024-05-06 04:04:03,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:03,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:03,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:03,529 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:04:03,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:03,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:03,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:03,696 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:04:03,827 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:03,827 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:04:03,957 INFO L85 PathProgramCache]: Analyzing trace with hash -1138147500, now seen corresponding path program 50 times [2024-05-06 04:04:03,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:03,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:03,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:04,086 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:04:04,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:04,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:04,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:04,216 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:04:04,402 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:04,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:10,947 WARN L293 SmtUtils]: Spent 6.11s on a formula simplification. DAG size of input: 33 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:04:10,971 INFO L85 PathProgramCache]: Analyzing trace with hash -2079493759, now seen corresponding path program 51 times [2024-05-06 04:04:10,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:10,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:10,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:11,109 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:04:11,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:11,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:11,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:11,336 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:04:11,463 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:11,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:11,587 INFO L85 PathProgramCache]: Analyzing trace with hash 2068072062, now seen corresponding path program 52 times [2024-05-06 04:04:11,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:11,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:11,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:11,709 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:11,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:11,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:11,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:11,831 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:11,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:12,018 INFO L85 PathProgramCache]: Analyzing trace with hash -314274660, now seen corresponding path program 53 times [2024-05-06 04:04:12,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:12,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:12,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:12,147 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:12,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:12,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:12,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:12,276 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:12,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:12,456 INFO L85 PathProgramCache]: Analyzing trace with hash 1783161228, now seen corresponding path program 54 times [2024-05-06 04:04:12,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:12,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:12,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:12,588 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:12,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:12,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:12,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:12,720 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:12,836 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:12,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:13,048 INFO L85 PathProgramCache]: Analyzing trace with hash 2001470537, now seen corresponding path program 55 times [2024-05-06 04:04:13,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:13,181 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:13,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:13,316 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:13,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:13,491 INFO L85 PathProgramCache]: Analyzing trace with hash 1916045361, now seen corresponding path program 56 times [2024-05-06 04:04:13,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:13,632 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:13,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:13,772 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:13,887 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:13,967 INFO L85 PathProgramCache]: Analyzing trace with hash -732135106, now seen corresponding path program 57 times [2024-05-06 04:04:13,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:13,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:13,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:14,104 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:14,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:14,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:14,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:14,243 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:14,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:14,431 INFO L85 PathProgramCache]: Analyzing trace with hash 29956661, now seen corresponding path program 58 times [2024-05-06 04:04:14,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:14,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:14,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:14,670 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:14,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:14,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:14,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:14,835 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:14,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:15,015 INFO L85 PathProgramCache]: Analyzing trace with hash 1916045350, now seen corresponding path program 59 times [2024-05-06 04:04:15,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:15,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:15,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:15,154 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:15,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:15,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:15,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:15,295 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:15,479 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:15,480 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:18,121 INFO L85 PathProgramCache]: Analyzing trace with hash -1202221693, now seen corresponding path program 60 times [2024-05-06 04:04:18,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:18,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:18,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:18,272 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:18,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:18,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:18,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:18,420 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:18,539 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:18,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:18,678 INFO L85 PathProgramCache]: Analyzing trace with hash 1385834047, now seen corresponding path program 61 times [2024-05-06 04:04:18,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:18,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:18,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:18,911 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:18,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:18,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:18,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:19,060 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:19,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:19,262 INFO L85 PathProgramCache]: Analyzing trace with hash 11183355, now seen corresponding path program 62 times [2024-05-06 04:04:19,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:19,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:19,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:19,408 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:19,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:19,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:19,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:19,554 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:19,750 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:19,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:24,606 INFO L85 PathProgramCache]: Analyzing trace with hash -2137661003, now seen corresponding path program 63 times [2024-05-06 04:04:24,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:24,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:24,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:24,850 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:24,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:24,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:24,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:25,006 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:25,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:25,190 INFO L85 PathProgramCache]: Analyzing trace with hash -1842980787, now seen corresponding path program 64 times [2024-05-06 04:04:25,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:25,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:25,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:25,340 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:25,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:25,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:25,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:25,491 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:25,616 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:25,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:25,747 INFO L85 PathProgramCache]: Analyzing trace with hash -1842980787, now seen corresponding path program 65 times [2024-05-06 04:04:25,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:25,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:25,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:25,896 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:25,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:25,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:25,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:26,059 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:26,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:26,245 INFO L85 PathProgramCache]: Analyzing trace with hash -1297828691, now seen corresponding path program 66 times [2024-05-06 04:04:26,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:26,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:26,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:26,502 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:26,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:26,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:26,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:26,660 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:26,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:26,850 INFO L85 PathProgramCache]: Analyzing trace with hash -1297828691, now seen corresponding path program 67 times [2024-05-06 04:04:26,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:26,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:26,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:27,012 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:27,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:27,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:27,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:27,172 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:27,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:27,356 INFO L85 PathProgramCache]: Analyzing trace with hash -1577982897, now seen corresponding path program 68 times [2024-05-06 04:04:27,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:27,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:27,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:27,512 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:27,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:27,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:27,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:27,679 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:27,816 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:27,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:27,939 INFO L85 PathProgramCache]: Analyzing trace with hash -444657576, now seen corresponding path program 69 times [2024-05-06 04:04:27,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:27,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:27,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:28,216 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:28,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:28,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:28,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:28,389 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:28,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:28,563 INFO L85 PathProgramCache]: Analyzing trace with hash -899482110, now seen corresponding path program 70 times [2024-05-06 04:04:28,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:28,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:28,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:28,736 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:28,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:28,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:28,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:28,915 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:29,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:29,109 INFO L85 PathProgramCache]: Analyzing trace with hash -1269735085, now seen corresponding path program 71 times [2024-05-06 04:04:29,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:29,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:29,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:29,275 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:29,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:29,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:29,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:29,442 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:29,561 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:29,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:29,688 INFO L85 PathProgramCache]: Analyzing trace with hash -733695903, now seen corresponding path program 72 times [2024-05-06 04:04:29,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:29,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:29,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:29,943 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:29,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:29,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:29,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:30,118 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:30,307 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:30,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:30,954 INFO L85 PathProgramCache]: Analyzing trace with hash -1297810830, now seen corresponding path program 3 times [2024-05-06 04:04:30,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:30,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:30,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:31,104 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:31,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:31,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:31,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:31,255 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:31,375 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:31,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:31,503 INFO L85 PathProgramCache]: Analyzing trace with hash -1577429200, now seen corresponding path program 4 times [2024-05-06 04:04:31,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:31,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:31,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:31,651 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:31,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:31,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:31,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:31,889 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:32,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:32,062 INFO L85 PathProgramCache]: Analyzing trace with hash -1655664086, now seen corresponding path program 5 times [2024-05-06 04:04:32,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:32,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:32,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:32,220 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:32,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:32,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:32,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:32,372 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:32,588 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:32,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:33,266 INFO L85 PathProgramCache]: Analyzing trace with hash 1524707310, now seen corresponding path program 1 times [2024-05-06 04:04:33,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:33,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:33,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:33,470 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:04:33,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:33,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:33,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:33,664 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:04:33,686 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:04:33,687 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:04:33,687 INFO L85 PathProgramCache]: Analyzing trace with hash -318523973, now seen corresponding path program 1 times [2024-05-06 04:04:33,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:04:33,691 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475477620] [2024-05-06 04:04:33,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:33,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:33,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:33,999 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 55 proven. 52 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:04:33,999 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:04:33,999 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475477620] [2024-05-06 04:04:34,000 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1475477620] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:04:34,000 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1490672447] [2024-05-06 04:04:34,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:34,000 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:04:34,000 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:04:34,029 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:04:34,029 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 04:04:34,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:34,403 INFO L262 TraceCheckSpWp]: Trace formula consists of 691 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-06 04:04:34,421 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:04:34,602 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 55 proven. 1 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-05-06 04:04:34,602 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 04:04:34,829 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 53 proven. 3 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-05-06 04:04:34,829 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1490672447] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 04:04:34,829 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 04:04:34,829 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 19 [2024-05-06 04:04:34,831 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [405390529] [2024-05-06 04:04:34,831 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 04:04:34,834 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-05-06 04:04:34,834 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:04:34,836 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-05-06 04:04:34,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2024-05-06 04:04:34,837 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:04:34,837 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:04:34,837 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 15.31578947368421) internal successors, (291), 19 states have internal predecessors, (291), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:04:34,838 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:04:35,259 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:04:35,337 INFO L85 PathProgramCache]: Analyzing trace with hash -1221490411, now seen corresponding path program 2 times [2024-05-06 04:04:35,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:35,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:35,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:35,442 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:04:35,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:04:35,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:35,771 INFO L85 PathProgramCache]: Analyzing trace with hash 905496861, now seen corresponding path program 73 times [2024-05-06 04:04:35,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:35,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:35,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:35,974 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:04:35,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:35,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:35,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:36,114 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:04:36,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:36,341 INFO L85 PathProgramCache]: Analyzing trace with hash -1954571893, now seen corresponding path program 74 times [2024-05-06 04:04:36,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:36,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:36,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:36,621 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:36,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:36,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:36,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:36,817 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:37,129 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:37,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:37,657 INFO L85 PathProgramCache]: Analyzing trace with hash 1016350860, now seen corresponding path program 75 times [2024-05-06 04:04:37,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:37,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:37,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:37,826 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:37,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:37,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:37,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:37,989 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:38,198 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:38,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:40,670 INFO L85 PathProgramCache]: Analyzing trace with hash 691905717, now seen corresponding path program 76 times [2024-05-06 04:04:40,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:40,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:40,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:40,827 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:40,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:40,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:40,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:40,992 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:41,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:41,209 INFO L85 PathProgramCache]: Analyzing trace with hash 1322422559, now seen corresponding path program 77 times [2024-05-06 04:04:41,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:41,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:41,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:41,473 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:41,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:41,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:41,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:41,642 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:41,760 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:41,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:41,879 INFO L85 PathProgramCache]: Analyzing trace with hash 1155882414, now seen corresponding path program 78 times [2024-05-06 04:04:41,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:41,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:41,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:42,029 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:42,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:42,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:42,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:42,179 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:42,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:42,367 INFO L85 PathProgramCache]: Analyzing trace with hash 1472617324, now seen corresponding path program 79 times [2024-05-06 04:04:42,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:42,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:42,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:42,525 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:42,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:42,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:42,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:42,682 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:42,808 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:42,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:43,385 INFO L85 PathProgramCache]: Analyzing trace with hash -135048501, now seen corresponding path program 80 times [2024-05-06 04:04:43,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:43,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:43,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:43,621 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:43,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:43,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:43,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:43,772 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:43,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:44,008 INFO L85 PathProgramCache]: Analyzing trace with hash -1204267251, now seen corresponding path program 81 times [2024-05-06 04:04:44,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:44,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:44,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:44,173 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:44,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:44,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:44,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:44,330 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:04:44,519 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:44,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:48,446 INFO L85 PathProgramCache]: Analyzing trace with hash -1468543254, now seen corresponding path program 82 times [2024-05-06 04:04:48,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:48,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:48,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:48,586 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:48,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:48,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:48,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:48,721 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:48,840 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:48,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:48,973 INFO L85 PathProgramCache]: Analyzing trace with hash 1719800221, now seen corresponding path program 83 times [2024-05-06 04:04:48,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:48,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:49,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:49,200 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:49,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:49,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:49,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:49,355 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:49,536 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:49,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:50,138 INFO L85 PathProgramCache]: Analyzing trace with hash 1774200141, now seen corresponding path program 84 times [2024-05-06 04:04:50,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:50,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:50,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:50,301 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:50,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:50,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:50,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:50,472 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:50,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:50,665 INFO L85 PathProgramCache]: Analyzing trace with hash 991902146, now seen corresponding path program 5 times [2024-05-06 04:04:50,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:50,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:50,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:50,845 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:50,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:50,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:50,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:51,108 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:51,232 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:51,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:51,350 INFO L85 PathProgramCache]: Analyzing trace with hash 1973203793, now seen corresponding path program 6 times [2024-05-06 04:04:51,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:51,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:51,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:51,510 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:51,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:51,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:51,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:51,673 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:51,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:51,858 INFO L85 PathProgramCache]: Analyzing trace with hash 1039776297, now seen corresponding path program 7 times [2024-05-06 04:04:51,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:51,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:51,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:52,020 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:52,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:52,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:52,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:52,182 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:52,303 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:52,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:52,426 INFO L85 PathProgramCache]: Analyzing trace with hash -1619683320, now seen corresponding path program 8 times [2024-05-06 04:04:52,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:52,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:52,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:52,672 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:52,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:52,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:52,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:52,826 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:52,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:53,001 INFO L85 PathProgramCache]: Analyzing trace with hash 724733447, now seen corresponding path program 5 times [2024-05-06 04:04:53,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:53,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:53,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:53,183 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:53,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:53,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:53,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:53,371 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:53,492 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:53,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:53,631 INFO L85 PathProgramCache]: Analyzing trace with hash 227406486, now seen corresponding path program 6 times [2024-05-06 04:04:53,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:53,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:53,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:53,794 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:53,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:53,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:53,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:53,956 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:54,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:54,141 INFO L85 PathProgramCache]: Analyzing trace with hash -1540332668, now seen corresponding path program 7 times [2024-05-06 04:04:54,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:54,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:54,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:54,407 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:54,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:54,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:54,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:54,570 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:54,700 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:54,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:54,822 INFO L85 PathProgramCache]: Analyzing trace with hash -1877661981, now seen corresponding path program 8 times [2024-05-06 04:04:54,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:54,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:54,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:55,002 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:55,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:55,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:55,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:55,156 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:55,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:55,392 INFO L85 PathProgramCache]: Analyzing trace with hash 854662436, now seen corresponding path program 5 times [2024-05-06 04:04:55,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:55,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:55,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:55,576 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:55,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:55,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:55,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:55,757 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:55,877 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:55,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:56,094 INFO L85 PathProgramCache]: Analyzing trace with hash 2098074803, now seen corresponding path program 6 times [2024-05-06 04:04:56,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:56,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:56,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:56,256 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:56,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:56,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:56,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:56,416 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:56,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:56,603 INFO L85 PathProgramCache]: Analyzing trace with hash 615810311, now seen corresponding path program 7 times [2024-05-06 04:04:56,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:56,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:56,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:56,764 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:56,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:56,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:56,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:56,927 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:57,050 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:57,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:57,171 INFO L85 PathProgramCache]: Analyzing trace with hash -443252250, now seen corresponding path program 8 times [2024-05-06 04:04:57,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:57,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:57,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:57,329 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:57,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:57,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:57,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:57,484 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:04:57,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:57,744 INFO L85 PathProgramCache]: Analyzing trace with hash -2050640278, now seen corresponding path program 85 times [2024-05-06 04:04:57,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:57,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:57,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:57,920 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:57,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:57,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:57,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:58,101 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:04:58,236 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:58,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:04:58,969 INFO L85 PathProgramCache]: Analyzing trace with hash 753928185, now seen corresponding path program 86 times [2024-05-06 04:04:58,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:58,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:58,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:59,127 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:59,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:59,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:59,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:59,282 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:59,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:04:59,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1896938113, now seen corresponding path program 87 times [2024-05-06 04:04:59,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:59,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:59,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:59,610 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:59,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:59,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:59,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:59,860 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-05-06 04:04:59,980 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:04:59,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:05:00,100 INFO L85 PathProgramCache]: Analyzing trace with hash -1003830176, now seen corresponding path program 88 times [2024-05-06 04:05:00,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:00,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:00,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:00,252 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:05:00,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:00,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:00,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:00,403 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:05:00,600 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:00,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:01,126 INFO L85 PathProgramCache]: Analyzing trace with hash -1118570358, now seen corresponding path program 89 times [2024-05-06 04:05:01,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:01,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:01,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:01,278 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:01,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:01,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:01,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:01,432 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:01,549 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:05:01,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:05:02,202 INFO L85 PathProgramCache]: Analyzing trace with hash 1322574459, now seen corresponding path program 90 times [2024-05-06 04:05:02,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:02,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:02,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:02,451 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:02,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:02,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:02,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:02,611 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:02,800 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:02,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:03,406 INFO L85 PathProgramCache]: Analyzing trace with hash -1949863868, now seen corresponding path program 91 times [2024-05-06 04:05:03,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:03,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:03,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:03,568 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:03,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:03,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:03,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:03,730 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:03,865 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:05:03,865 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:05:04,013 INFO L85 PathProgramCache]: Analyzing trace with hash -316236898, now seen corresponding path program 92 times [2024-05-06 04:05:04,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:04,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:04,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:04,179 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:04,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:04,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:04,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:04,422 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:04,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:05:04,605 INFO L85 PathProgramCache]: Analyzing trace with hash -1213408388, now seen corresponding path program 93 times [2024-05-06 04:05:04,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:04,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:04,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:04,780 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:04,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:04,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:04,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:04,949 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:05,132 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:05,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:21,850 WARN L293 SmtUtils]: Spent 14.23s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:05:23,859 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1_front~0_In_118 Int) (v_~q1~0.base_In_118 Int) (v_~q1~0.offset_In_118 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_118) (+ v_~q1~0.offset_In_118 (* v_~q1_front~0_In_118 4))))) (or (= .cse0 0) (< v_~q1_front~0_In_118 0) (< (+ 4294967295 .cse0) 0) (< 4294967295 .cse0)))) (forall ((v_~q2~0.base_In_78 Int) (v_~q2~0.offset_In_78 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_78) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_78)) 0))) is different from false [2024-05-06 04:05:23,862 INFO L85 PathProgramCache]: Analyzing trace with hash -1907715300, now seen corresponding path program 3 times [2024-05-06 04:05:23,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:23,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:23,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:24,063 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:24,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:24,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:24,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:24,235 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:24,423 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:24,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:43,057 WARN L293 SmtUtils]: Spent 16.15s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:05:45,061 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1_front~0_In_119 Int) (v_~q1~0.base_In_119 Int) (v_~q1~0.offset_In_119 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_119) (+ v_~q1~0.offset_In_119 (* v_~q1_front~0_In_119 4))))) (or (< (+ .cse0 4294967295) 0) (< v_~q1_front~0_In_119 0) (= .cse0 0) (< 4294967295 .cse0)))) (forall ((v_~q2~0.base_In_79 Int) (v_~q2~0.offset_In_79 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_79) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_79)) 0))) is different from false [2024-05-06 04:05:45,063 INFO L85 PathProgramCache]: Analyzing trace with hash 811870485, now seen corresponding path program 4 times [2024-05-06 04:05:45,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:45,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:45,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:45,242 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:05:45,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:45,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:45,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:45,421 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:05:45,616 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:45,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:48,269 INFO L85 PathProgramCache]: Analyzing trace with hash -2139749152, now seen corresponding path program 3 times [2024-05-06 04:05:48,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:48,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:48,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:48,431 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:48,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:48,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:48,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:48,671 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:48,863 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:48,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:51,685 INFO L85 PathProgramCache]: Analyzing trace with hash -238914607, now seen corresponding path program 4 times [2024-05-06 04:05:51,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:51,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:51,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:51,865 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:05:51,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:51,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:51,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:52,045 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:05:52,233 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:52,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:54,819 INFO L85 PathProgramCache]: Analyzing trace with hash 1039354639, now seen corresponding path program 3 times [2024-05-06 04:05:54,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:54,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:54,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:54,981 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:54,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:54,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:55,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:55,228 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:05:55,418 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:55,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:55,927 INFO L85 PathProgramCache]: Analyzing trace with hash -11554174, now seen corresponding path program 4 times [2024-05-06 04:05:55,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:55,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:55,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:56,120 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:05:56,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:56,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:56,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:56,306 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:05:56,495 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:56,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:01,446 INFO L85 PathProgramCache]: Analyzing trace with hash -1213398463, now seen corresponding path program 3 times [2024-05-06 04:06:01,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:01,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:01,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:01,689 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:01,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:01,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:01,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:01,850 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:02,043 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:02,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:02,544 INFO L85 PathProgramCache]: Analyzing trace with hash -1679035504, now seen corresponding path program 4 times [2024-05-06 04:06:02,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:02,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:02,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:02,719 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:06:02,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:02,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:02,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:02,908 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:06:03,112 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:03,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:03,758 INFO L85 PathProgramCache]: Analyzing trace with hash -316236560, now seen corresponding path program 3 times [2024-05-06 04:06:03,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:03,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:03,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:04,009 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:04,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:04,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:04,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:04,166 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:04,350 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:04,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:04,897 INFO L85 PathProgramCache]: Analyzing trace with hash -1428951615, now seen corresponding path program 4 times [2024-05-06 04:06:04,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:04,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:04,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:05,070 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:06:05,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:05,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:05,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:05,244 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:06:05,450 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:05,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:06,133 INFO L85 PathProgramCache]: Analyzing trace with hash -1949863837, now seen corresponding path program 3 times [2024-05-06 04:06:06,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:06,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:06,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:06,373 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:06,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:06,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:06,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:06,531 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:06,733 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:06,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:11,601 INFO L85 PathProgramCache]: Analyzing trace with hash -982627410, now seen corresponding path program 4 times [2024-05-06 04:06:11,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:11,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:11,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:11,775 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:06:11,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:11,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:11,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:11,957 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:06:12,146 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:12,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:19,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1322574483, now seen corresponding path program 94 times [2024-05-06 04:06:19,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:19,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:19,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:19,767 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:19,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:19,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:19,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:19,922 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:20,113 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:20,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:20,730 INFO L85 PathProgramCache]: Analyzing trace with hash -1557770370, now seen corresponding path program 95 times [2024-05-06 04:06:20,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:20,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:20,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:20,906 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:06:20,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:20,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:20,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:21,161 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:06:21,288 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:06:21,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:06:21,429 INFO L85 PathProgramCache]: Analyzing trace with hash 477741687, now seen corresponding path program 96 times [2024-05-06 04:06:21,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:21,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:21,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:21,830 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:06:21,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:21,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:21,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:21,987 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:06:22,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:06:22,162 INFO L85 PathProgramCache]: Analyzing trace with hash 1925091267, now seen corresponding path program 97 times [2024-05-06 04:06:22,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:22,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:22,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:22,322 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:06:22,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:22,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:22,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:22,484 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:06:22,681 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:22,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:30,828 INFO L85 PathProgramCache]: Analyzing trace with hash -303514223, now seen corresponding path program 98 times [2024-05-06 04:06:30,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:30,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:30,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:31,074 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:06:31,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:31,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:31,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:31,247 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:06:31,399 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:06:31,399 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:06:31,595 INFO L85 PathProgramCache]: Analyzing trace with hash -303514223, now seen corresponding path program 99 times [2024-05-06 04:06:31,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:31,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:31,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:31,782 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:06:31,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:31,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:31,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:31,953 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:06:32,101 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:06:32,232 INFO L85 PathProgramCache]: Analyzing trace with hash -819005463, now seen corresponding path program 100 times [2024-05-06 04:06:32,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:32,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:32,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:32,408 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:06:32,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:32,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:32,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:32,588 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:06:32,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:06:32,895 INFO L85 PathProgramCache]: Analyzing trace with hash 380635289, now seen corresponding path program 101 times [2024-05-06 04:06:32,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:32,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:32,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:33,072 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:06:33,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:33,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:33,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:33,251 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:06:33,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:06:33,519 INFO L85 PathProgramCache]: Analyzing trace with hash 1801897519, now seen corresponding path program 102 times [2024-05-06 04:06:33,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:33,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:33,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:33,690 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:06:33,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:33,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:33,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:33,851 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 4 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:06:34,020 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:06:34,021 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:06:34,194 INFO L85 PathProgramCache]: Analyzing trace with hash 115135187, now seen corresponding path program 103 times [2024-05-06 04:06:34,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:34,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:34,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:34,372 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:34,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:34,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:34,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:34,652 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:34,828 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:06:34,941 INFO L85 PathProgramCache]: Analyzing trace with hash -725775633, now seen corresponding path program 104 times [2024-05-06 04:06:34,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:34,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:34,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:35,119 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:35,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:35,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:35,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:35,298 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:35,553 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:35,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:36,483 INFO L85 PathProgramCache]: Analyzing trace with hash -725775644, now seen corresponding path program 105 times [2024-05-06 04:06:36,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:36,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:36,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:36,665 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:36,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:36,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:36,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:36,948 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:37,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:06:37,178 INFO L85 PathProgramCache]: Analyzing trace with hash -1685664468, now seen corresponding path program 106 times [2024-05-06 04:06:37,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:37,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:37,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:37,357 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:37,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:37,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:37,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:37,542 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:37,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:06:37,789 INFO L85 PathProgramCache]: Analyzing trace with hash -871679589, now seen corresponding path program 107 times [2024-05-06 04:06:37,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:37,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:37,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:37,974 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:37,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:37,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:37,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:38,159 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:38,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:06:38,390 INFO L85 PathProgramCache]: Analyzing trace with hash -1679081791, now seen corresponding path program 108 times [2024-05-06 04:06:38,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:38,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:38,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:38,682 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:38,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:38,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:38,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:38,883 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:39,114 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:39,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:42,202 INFO L85 PathProgramCache]: Analyzing trace with hash -361890987, now seen corresponding path program 109 times [2024-05-06 04:06:42,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:42,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:42,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:42,372 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:42,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:42,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:42,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:42,540 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:42,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:06:42,778 INFO L85 PathProgramCache]: Analyzing trace with hash 1666282157, now seen corresponding path program 110 times [2024-05-06 04:06:42,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:42,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:42,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:42,950 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:42,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:42,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:42,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:43,207 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:43,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:06:43,441 INFO L85 PathProgramCache]: Analyzing trace with hash 115140173, now seen corresponding path program 111 times [2024-05-06 04:06:43,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:43,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:43,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:43,613 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:43,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:43,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:43,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:43,790 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:44,028 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:44,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:44,876 INFO L85 PathProgramCache]: Analyzing trace with hash -1536833626, now seen corresponding path program 112 times [2024-05-06 04:06:44,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:44,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:44,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:45,053 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:45,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:45,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:45,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:45,236 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:06:45,561 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:45,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:48,373 INFO L85 PathProgramCache]: Analyzing trace with hash 1092210261, now seen corresponding path program 6 times [2024-05-06 04:06:48,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:48,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:48,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:48,555 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:06:48,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:48,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:48,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:48,740 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:06:48,973 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:48,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:49,617 INFO L85 PathProgramCache]: Analyzing trace with hash -2015265284, now seen corresponding path program 7 times [2024-05-06 04:06:49,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:49,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:49,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:49,818 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:06:49,819 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:49,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:49,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:50,110 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:06:50,366 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:50,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:51,289 INFO L85 PathProgramCache]: Analyzing trace with hash 866516564, now seen corresponding path program 3 times [2024-05-06 04:06:51,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:51,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:51,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:51,472 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:06:51,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:51,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:51,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:51,653 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:06:51,874 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:51,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:54,945 INFO L85 PathProgramCache]: Analyzing trace with hash -2084447011, now seen corresponding path program 4 times [2024-05-06 04:06:54,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:54,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:54,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:55,148 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:06:55,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:55,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:55,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:55,350 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:06:55,593 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:55,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:14,413 WARN L293 SmtUtils]: Spent 16.18s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:07:16,416 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_108 Int) (v_~q2~0.offset_In_108 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_108) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_108)) 0)) (forall ((v_~q1~0.base_In_145 Int) (v_~q1~0.offset_In_145 Int) (v_~q1_front~0_In_145 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_145) (+ v_~q1~0.offset_In_145 (* v_~q1_front~0_In_145 4))))) (or (= .cse0 0) (< 4294967295 .cse0) (< (+ .cse0 4294967295) 0) (< v_~q1_front~0_In_145 0))))) is different from false [2024-05-06 04:07:16,418 INFO L85 PathProgramCache]: Analyzing trace with hash -387689865, now seen corresponding path program 3 times [2024-05-06 04:07:16,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:16,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:16,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:16,601 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:07:16,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:16,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:16,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:16,785 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:07:17,098 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:17,099 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:18,282 INFO L85 PathProgramCache]: Analyzing trace with hash 1399619610, now seen corresponding path program 4 times [2024-05-06 04:07:18,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:18,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:18,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:18,484 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:07:18,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:18,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:18,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:18,685 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:07:18,913 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:18,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:19,622 INFO L85 PathProgramCache]: Analyzing trace with hash 541683191, now seen corresponding path program 113 times [2024-05-06 04:07:19,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:19,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:19,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:19,884 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:07:19,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:19,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:19,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:20,067 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:07:20,346 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:20,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:21,020 INFO L85 PathProgramCache]: Analyzing trace with hash -2125572966, now seen corresponding path program 114 times [2024-05-06 04:07:21,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:21,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:21,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:21,223 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:07:21,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:21,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:21,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:21,426 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:07:21,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:21,672 INFO L85 PathProgramCache]: Analyzing trace with hash 571662931, now seen corresponding path program 115 times [2024-05-06 04:07:21,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:21,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:21,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:21,852 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:21,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:21,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:21,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:22,119 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:22,353 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:22,354 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:50,006 WARN L293 SmtUtils]: Spent 19.73s on a formula simplification. DAG size of input: 33 DAG size of output: 30 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:07:50,103 INFO L85 PathProgramCache]: Analyzing trace with hash 571662345, now seen corresponding path program 116 times [2024-05-06 04:07:50,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:50,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:50,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:50,293 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:50,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:50,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:50,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:50,488 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:50,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:50,738 INFO L85 PathProgramCache]: Analyzing trace with hash -1493777841, now seen corresponding path program 117 times [2024-05-06 04:07:50,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:50,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:50,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:51,018 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:07:51,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:51,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:51,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:51,217 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:07:51,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:51,513 INFO L85 PathProgramCache]: Analyzing trace with hash -1493747058, now seen corresponding path program 3 times [2024-05-06 04:07:51,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:51,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:51,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:51,706 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:51,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:51,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:51,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:51,900 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:52,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:52,162 INFO L85 PathProgramCache]: Analyzing trace with hash -433988891, now seen corresponding path program 4 times [2024-05-06 04:07:52,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:52,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:52,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:52,428 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:52,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:52,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:52,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:52,613 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:52,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:52,893 INFO L85 PathProgramCache]: Analyzing trace with hash 1337287891, now seen corresponding path program 3 times [2024-05-06 04:07:52,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:52,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:52,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:53,086 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:53,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:53,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:53,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:53,278 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:53,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:53,546 INFO L85 PathProgramCache]: Analyzing trace with hash 394161728, now seen corresponding path program 4 times [2024-05-06 04:07:53,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:53,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:53,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:53,727 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:53,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:53,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:53,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:53,996 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:54,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:54,262 INFO L85 PathProgramCache]: Analyzing trace with hash 320232944, now seen corresponding path program 3 times [2024-05-06 04:07:54,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:54,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:54,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:54,453 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:54,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:54,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:54,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:54,647 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:54,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:54,912 INFO L85 PathProgramCache]: Analyzing trace with hash 997680579, now seen corresponding path program 4 times [2024-05-06 04:07:54,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:54,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:54,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:55,091 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:55,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:55,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:55,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:55,271 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:55,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:55,559 INFO L85 PathProgramCache]: Analyzing trace with hash -682406602, now seen corresponding path program 118 times [2024-05-06 04:07:55,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:55,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:55,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:55,839 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:55,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:55,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:55,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:56,041 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:07:56,207 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:07:56,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:07:56,400 INFO L85 PathProgramCache]: Analyzing trace with hash -714697019, now seen corresponding path program 119 times [2024-05-06 04:07:56,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:56,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:56,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:56,577 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:56,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:56,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:56,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:56,756 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:56,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:07:57,011 INFO L85 PathProgramCache]: Analyzing trace with hash -680770243, now seen corresponding path program 120 times [2024-05-06 04:07:57,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:57,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:57,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:57,190 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:57,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:57,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:57,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:57,445 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:07:57,609 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:07:57,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:07:57,789 INFO L85 PathProgramCache]: Analyzing trace with hash -1237578980, now seen corresponding path program 121 times [2024-05-06 04:07:57,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:57,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:57,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:57,957 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:07:57,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:57,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:57,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:58,128 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:07:58,297 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:07:58,297 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:07:58,506 INFO L85 PathProgramCache]: Analyzing trace with hash 2130854831, now seen corresponding path program 122 times [2024-05-06 04:07:58,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:58,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:58,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:58,667 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:58,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:58,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:58,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:58,830 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:59,083 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:59,084 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:59,986 INFO L85 PathProgramCache]: Analyzing trace with hash 680479558, now seen corresponding path program 123 times [2024-05-06 04:07:59,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:59,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:00,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:00,153 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:00,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:00,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:00,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:00,319 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:00,487 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:08:00,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:08:02,676 INFO L85 PathProgramCache]: Analyzing trace with hash 627750211, now seen corresponding path program 124 times [2024-05-06 04:08:02,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:02,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:02,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:02,843 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:02,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:02,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:02,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:03,013 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:03,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:08:03,281 INFO L85 PathProgramCache]: Analyzing trace with hash -2014579081, now seen corresponding path program 125 times [2024-05-06 04:08:03,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:03,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:03,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:03,527 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:03,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:03,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:03,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:03,696 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 5 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:03,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:08:03,955 INFO L85 PathProgramCache]: Analyzing trace with hash 757196263, now seen corresponding path program 126 times [2024-05-06 04:08:03,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:03,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:03,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:04,133 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:04,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:04,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:04,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:04,313 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:04,477 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:08:04,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:08:04,684 INFO L85 PathProgramCache]: Analyzing trace with hash 466476558, now seen corresponding path program 127 times [2024-05-06 04:08:04,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:04,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:04,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:04,866 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:04,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:04,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:04,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:05,129 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:05,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:08:05,390 INFO L85 PathProgramCache]: Analyzing trace with hash 1575872268, now seen corresponding path program 128 times [2024-05-06 04:08:05,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:05,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:05,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:05,573 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:05,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:05,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:05,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:05,761 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:05,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:08:06,033 INFO L85 PathProgramCache]: Analyzing trace with hash 1607400899, now seen corresponding path program 129 times [2024-05-06 04:08:06,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:06,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:06,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:06,219 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:06,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:06,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:06,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:06,406 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:06,573 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:08:06,767 INFO L85 PathProgramCache]: Analyzing trace with hash -1282809008, now seen corresponding path program 130 times [2024-05-06 04:08:06,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:06,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:06,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:06,988 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:06,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:06,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:07,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:07,191 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:07,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:08:07,445 INFO L85 PathProgramCache]: Analyzing trace with hash 1575872257, now seen corresponding path program 131 times [2024-05-06 04:08:07,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:07,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:07,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:07,633 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:07,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:07,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:07,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:07,814 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:08,067 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:08,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:27,206 WARN L293 SmtUtils]: Spent 16.40s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:08:29,209 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1~0.base_In_155 Int) (v_~q1~0.offset_In_155 Int) (v_~q1_front~0_In_155 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_155) (+ v_~q1~0.offset_In_155 (* v_~q1_front~0_In_155 4))))) (or (< 4294967295 .cse0) (< (+ 4294967295 .cse0) 0) (= 0 .cse0) (< v_~q1_front~0_In_155 0)))) (forall ((v_~q2~0.offset_In_131 Int) (v_~q2~0.base_In_131 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_131) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_131)) 0))) is different from false [2024-05-06 04:08:29,211 INFO L85 PathProgramCache]: Analyzing trace with hash 1480591070, now seen corresponding path program 132 times [2024-05-06 04:08:29,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:29,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:29,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:29,398 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:29,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:29,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:29,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:29,585 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:29,737 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:08:29,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:08:29,906 INFO L85 PathProgramCache]: Analyzing trace with hash -1346316220, now seen corresponding path program 133 times [2024-05-06 04:08:29,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:29,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:29,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:30,094 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:30,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:30,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:30,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:30,283 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:30,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:08:30,500 INFO L85 PathProgramCache]: Analyzing trace with hash 1213870998, now seen corresponding path program 134 times [2024-05-06 04:08:30,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:30,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:30,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:30,770 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:30,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:30,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:30,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:30,961 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:08:31,197 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:31,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:48,122 WARN L293 SmtUtils]: Spent 14.22s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:08:50,131 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.offset_In_132 Int) (v_~q2~0.base_In_132 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_132) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_132)) 0)) (forall ((v_~q1_front~0_In_158 Int) (v_~q1~0.offset_In_158 Int) (v_~q1~0.base_In_158 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_158) (+ (* v_~q1_front~0_In_158 4) v_~q1~0.offset_In_158)))) (or (< (+ .cse0 4294967295) 0) (= .cse0 0) (< v_~q1_front~0_In_158 0) (< 4294967295 .cse0))))) is different from false [2024-05-06 04:08:50,134 INFO L85 PathProgramCache]: Analyzing trace with hash -1701038704, now seen corresponding path program 135 times [2024-05-06 04:08:50,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:50,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:50,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:50,351 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:50,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:50,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:50,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:50,639 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:50,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:08:50,885 INFO L85 PathProgramCache]: Analyzing trace with hash -1192591406, now seen corresponding path program 136 times [2024-05-06 04:08:50,886 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:50,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:50,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:51,101 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:51,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:51,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:51,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:51,302 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:51,464 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:08:51,464 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:08:51,633 INFO L85 PathProgramCache]: Analyzing trace with hash -1192591406, now seen corresponding path program 137 times [2024-05-06 04:08:51,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:51,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:51,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:51,834 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:51,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:51,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:51,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:52,149 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:52,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:08:52,402 INFO L85 PathProgramCache]: Analyzing trace with hash 1684372936, now seen corresponding path program 138 times [2024-05-06 04:08:52,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:52,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:52,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:52,604 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:52,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:52,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:52,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:52,803 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:52,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:08:53,061 INFO L85 PathProgramCache]: Analyzing trace with hash 1684372936, now seen corresponding path program 139 times [2024-05-06 04:08:53,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:53,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:53,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:53,262 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:53,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:53,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:53,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:53,463 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:53,691 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:08:53,770 INFO L85 PathProgramCache]: Analyzing trace with hash 675954324, now seen corresponding path program 140 times [2024-05-06 04:08:53,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:53,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:53,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:53,971 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:53,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:53,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:53,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:54,172 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:54,317 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:08:54,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:08:54,490 INFO L85 PathProgramCache]: Analyzing trace with hash 899583603, now seen corresponding path program 141 times [2024-05-06 04:08:54,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:54,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:54,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:54,692 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:08:54,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:54,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:54,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:54,894 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:08:55,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:08:55,190 INFO L85 PathProgramCache]: Analyzing trace with hash 2117288775, now seen corresponding path program 142 times [2024-05-06 04:08:55,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:55,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:55,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:55,397 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:08:55,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:55,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:55,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:55,603 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:08:55,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:08:55,839 INFO L85 PathProgramCache]: Analyzing trace with hash 1860151854, now seen corresponding path program 143 times [2024-05-06 04:08:55,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:55,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:55,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:56,047 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:56,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:56,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:56,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:56,250 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:56,407 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:08:56,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:08:56,664 INFO L85 PathProgramCache]: Analyzing trace with hash 1722572838, now seen corresponding path program 144 times [2024-05-06 04:08:56,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:56,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:56,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:56,862 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:56,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:56,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:56,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:57,063 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:57,304 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:57,305 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:58,418 INFO L85 PathProgramCache]: Analyzing trace with hash 1684390797, now seen corresponding path program 8 times [2024-05-06 04:08:58,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:58,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:58,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:58,614 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:58,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:58,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:58,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:58,882 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:59,026 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:08:59,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:08:59,189 INFO L85 PathProgramCache]: Analyzing trace with hash 676508021, now seen corresponding path program 9 times [2024-05-06 04:08:59,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:59,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:59,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:59,392 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:59,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:59,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:59,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:59,591 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:08:59,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:08:59,860 INFO L85 PathProgramCache]: Analyzing trace with hash -503086971, now seen corresponding path program 10 times [2024-05-06 04:08:59,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:59,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:59,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:00,058 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:09:00,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:00,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:00,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:00,333 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:09:00,566 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:00,566 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:23,573 WARN L293 SmtUtils]: Spent 20.18s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:09:25,576 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_137 Int) (v_~q2~0.offset_In_137 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_137) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_137)) 0)) (forall ((v_~q1~0.offset_In_168 Int) (v_~q1_front~0_In_168 Int) (v_~q1~0.base_In_168 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_168) (+ (* v_~q1_front~0_In_168 4) v_~q1~0.offset_In_168)))) (or (< (+ .cse0 4294967295) 0) (= .cse0 0) (< v_~q1_front~0_In_168 0) (< 4294967295 .cse0))))) is different from false [2024-05-06 04:09:25,578 INFO L85 PathProgramCache]: Analyzing trace with hash 240483657, now seen corresponding path program 2 times [2024-05-06 04:09:25,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:25,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:25,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:25,805 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:09:25,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:25,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:25,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:26,039 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:09:26,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 04:09:26,061 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-06 04:09:26,254 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable306,SelfDestructingSolverStorable427,SelfDestructingSolverStorable307,SelfDestructingSolverStorable428,SelfDestructingSolverStorable308,SelfDestructingSolverStorable429,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable423,SelfDestructingSolverStorable303,SelfDestructingSolverStorable424,SelfDestructingSolverStorable304,SelfDestructingSolverStorable425,SelfDestructingSolverStorable305,SelfDestructingSolverStorable426,SelfDestructingSolverStorable420,SelfDestructingSolverStorable300,SelfDestructingSolverStorable421,SelfDestructingSolverStorable301,SelfDestructingSolverStorable422,SelfDestructingSolverStorable416,SelfDestructingSolverStorable417,SelfDestructingSolverStorable418,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable413,SelfDestructingSolverStorable414,SelfDestructingSolverStorable415,SelfDestructingSolverStorable410,SelfDestructingSolverStorable411,SelfDestructingSolverStorable450,SelfDestructingSolverStorable330,SelfDestructingSolverStorable451,SelfDestructingSolverStorable328,SelfDestructingSolverStorable449,SelfDestructingSolverStorable329,SelfDestructingSolverStorable324,SelfDestructingSolverStorable445,SelfDestructingSolverStorable325,SelfDestructingSolverStorable446,SelfDestructingSolverStorable326,SelfDestructingSolverStorable447,SelfDestructingSolverStorable327,SelfDestructingSolverStorable448,SelfDestructingSolverStorable320,SelfDestructingSolverStorable441,SelfDestructingSolverStorable321,SelfDestructingSolverStorable442,SelfDestructingSolverStorable322,SelfDestructingSolverStorable443,SelfDestructingSolverStorable323,SelfDestructingSolverStorable444,SelfDestructingSolverStorable440,SelfDestructingSolverStorable317,SelfDestructingSolverStorable438,SelfDestructingSolverStorable318,SelfDestructingSolverStorable439,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable434,SelfDestructingSolverStorable314,SelfDestructingSolverStorable435,SelfDestructingSolverStorable315,SelfDestructingSolverStorable436,SelfDestructingSolverStorable316,SelfDestructingSolverStorable437,SelfDestructingSolverStorable430,SelfDestructingSolverStorable310,SelfDestructingSolverStorable431,SelfDestructingSolverStorable311,SelfDestructingSolverStorable432,SelfDestructingSolverStorable312,SelfDestructingSolverStorable433,SelfDestructingSolverStorable298,SelfDestructingSolverStorable299,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable406,SelfDestructingSolverStorable407,SelfDestructingSolverStorable408,SelfDestructingSolverStorable401,SelfDestructingSolverStorable402,SelfDestructingSolverStorable403,SelfDestructingSolverStorable404,SelfDestructingSolverStorable400,SelfDestructingSolverStorable272,SelfDestructingSolverStorable393,SelfDestructingSolverStorable273,SelfDestructingSolverStorable394,SelfDestructingSolverStorable274,SelfDestructingSolverStorable395,SelfDestructingSolverStorable275,SelfDestructingSolverStorable396,SelfDestructingSolverStorable390,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable271,SelfDestructingSolverStorable392,SelfDestructingSolverStorable269,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable267,SelfDestructingSolverStorable388,SelfDestructingSolverStorable268,SelfDestructingSolverStorable389,SelfDestructingSolverStorable261,SelfDestructingSolverStorable382,SelfDestructingSolverStorable262,SelfDestructingSolverStorable383,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable380,SelfDestructingSolverStorable260,SelfDestructingSolverStorable381,SelfDestructingSolverStorable258,SelfDestructingSolverStorable379,SelfDestructingSolverStorable259,SelfDestructingSolverStorable254,SelfDestructingSolverStorable375,SelfDestructingSolverStorable255,SelfDestructingSolverStorable376,SelfDestructingSolverStorable256,SelfDestructingSolverStorable377,SelfDestructingSolverStorable257,SelfDestructingSolverStorable378,SelfDestructingSolverStorable294,SelfDestructingSolverStorable295,SelfDestructingSolverStorable296,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable291,SelfDestructingSolverStorable292,SelfDestructingSolverStorable293,SelfDestructingSolverStorable287,SelfDestructingSolverStorable288,SelfDestructingSolverStorable289,SelfDestructingSolverStorable283,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable284,SelfDestructingSolverStorable285,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable281,SelfDestructingSolverStorable282,SelfDestructingSolverStorable276,SelfDestructingSolverStorable397,SelfDestructingSolverStorable277,SelfDestructingSolverStorable398,SelfDestructingSolverStorable278,SelfDestructingSolverStorable399,SelfDestructingSolverStorable279,SelfDestructingSolverStorable350,SelfDestructingSolverStorable351,SelfDestructingSolverStorable352,SelfDestructingSolverStorable346,SelfDestructingSolverStorable347,SelfDestructingSolverStorable348,SelfDestructingSolverStorable349,SelfDestructingSolverStorable342,SelfDestructingSolverStorable343,SelfDestructingSolverStorable344,SelfDestructingSolverStorable345,SelfDestructingSolverStorable340,SelfDestructingSolverStorable341,SelfDestructingSolverStorable339,SelfDestructingSolverStorable335,SelfDestructingSolverStorable456,SelfDestructingSolverStorable336,SelfDestructingSolverStorable457,SelfDestructingSolverStorable337,SelfDestructingSolverStorable338,SelfDestructingSolverStorable331,SelfDestructingSolverStorable452,SelfDestructingSolverStorable332,SelfDestructingSolverStorable453,SelfDestructingSolverStorable333,SelfDestructingSolverStorable454,SelfDestructingSolverStorable334,SelfDestructingSolverStorable455,SelfDestructingSolverStorable250,SelfDestructingSolverStorable371,SelfDestructingSolverStorable251,SelfDestructingSolverStorable372,SelfDestructingSolverStorable252,SelfDestructingSolverStorable373,SelfDestructingSolverStorable253,SelfDestructingSolverStorable374,SelfDestructingSolverStorable370,SelfDestructingSolverStorable247,SelfDestructingSolverStorable368,SelfDestructingSolverStorable248,SelfDestructingSolverStorable369,SelfDestructingSolverStorable249,SelfDestructingSolverStorable243,SelfDestructingSolverStorable364,SelfDestructingSolverStorable244,SelfDestructingSolverStorable365,SelfDestructingSolverStorable245,SelfDestructingSolverStorable366,SelfDestructingSolverStorable246,SelfDestructingSolverStorable367,SelfDestructingSolverStorable360,SelfDestructingSolverStorable240,SelfDestructingSolverStorable361,SelfDestructingSolverStorable241,SelfDestructingSolverStorable362,SelfDestructingSolverStorable242,SelfDestructingSolverStorable363,SelfDestructingSolverStorable236,SelfDestructingSolverStorable357,SelfDestructingSolverStorable237,SelfDestructingSolverStorable358,SelfDestructingSolverStorable238,SelfDestructingSolverStorable359,SelfDestructingSolverStorable239,SelfDestructingSolverStorable232,SelfDestructingSolverStorable353,SelfDestructingSolverStorable233,SelfDestructingSolverStorable354,SelfDestructingSolverStorable234,SelfDestructingSolverStorable355,SelfDestructingSolverStorable235,SelfDestructingSolverStorable356 [2024-05-06 04:09:26,255 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:09:26,255 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:09:26,255 INFO L85 PathProgramCache]: Analyzing trace with hash -56627946, now seen corresponding path program 2 times [2024-05-06 04:09:26,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:09:26,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1641009367] [2024-05-06 04:09:26,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:26,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:26,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:26,627 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 61 proven. 59 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2024-05-06 04:09:26,627 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:09:26,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1641009367] [2024-05-06 04:09:26,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1641009367] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:09:26,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1352088263] [2024-05-06 04:09:26,627 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 04:09:26,627 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:09:26,628 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:09:26,628 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:09:26,629 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 04:09:27,209 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 04:09:27,210 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 04:09:27,212 INFO L262 TraceCheckSpWp]: Trace formula consists of 705 conjuncts, 8 conjunts are in the unsatisfiable core [2024-05-06 04:09:27,222 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:09:27,519 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 98 proven. 7 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-05-06 04:09:27,519 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 04:09:28,239 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 62 proven. 76 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:09:28,240 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1352088263] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 04:09:28,240 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 04:09:28,240 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 4, 9] total 21 [2024-05-06 04:09:28,240 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146635938] [2024-05-06 04:09:28,240 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 04:09:28,241 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2024-05-06 04:09:28,241 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:09:28,243 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-05-06 04:09:28,243 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=346, Unknown=0, NotChecked=0, Total=420 [2024-05-06 04:09:28,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:09:28,244 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:09:28,244 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 25.095238095238095) internal successors, (527), 21 states have internal predecessors, (527), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:09:28,244 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 04:09:28,244 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:09:28,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:09:29,120 INFO L85 PathProgramCache]: Analyzing trace with hash 1958705328, now seen corresponding path program 3 times [2024-05-06 04:09:29,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:29,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:29,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:09:29,217 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:09:29,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:09:29,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:09:29,958 INFO L85 PathProgramCache]: Analyzing trace with hash -830646152, now seen corresponding path program 145 times [2024-05-06 04:09:29,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:29,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:29,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:30,088 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:09:30,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:30,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:30,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:30,281 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:09:30,501 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:09:30,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:09:30,746 INFO L85 PathProgramCache]: Analyzing trace with hash -318914367, now seen corresponding path program 146 times [2024-05-06 04:09:30,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:30,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:30,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:31,144 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 38 proven. 44 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:09:31,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:31,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:31,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:31,365 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 38 proven. 44 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:09:31,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:09:31,618 INFO L85 PathProgramCache]: Analyzing trace with hash -1296409927, now seen corresponding path program 147 times [2024-05-06 04:09:31,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:31,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:31,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:31,783 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 38 proven. 5 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 04:09:31,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:31,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:31,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:32,029 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 38 proven. 5 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-05-06 04:09:32,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:09:32,323 INFO L85 PathProgramCache]: Analyzing trace with hash 1460603303, now seen corresponding path program 148 times [2024-05-06 04:09:32,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:32,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:32,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:32,593 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 16 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:32,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:32,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:32,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:32,835 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 16 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:33,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:09:33,148 INFO L85 PathProgramCache]: Analyzing trace with hash 84153391, now seen corresponding path program 149 times [2024-05-06 04:09:33,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:33,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:33,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:33,448 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 25 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:33,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:33,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:33,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:33,717 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 25 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:33,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:09:33,991 INFO L85 PathProgramCache]: Analyzing trace with hash -480930631, now seen corresponding path program 150 times [2024-05-06 04:09:33,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:33,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:34,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:34,285 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:09:34,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:34,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:34,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:34,645 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:09:34,914 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:34,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:36,412 INFO L85 PathProgramCache]: Analyzing trace with hash -862716514, now seen corresponding path program 151 times [2024-05-06 04:09:36,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:36,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:36,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:36,725 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:09:36,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:36,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:36,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:37,012 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:09:37,410 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:37,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:43,328 INFO L85 PathProgramCache]: Analyzing trace with hash 1646680291, now seen corresponding path program 152 times [2024-05-06 04:09:43,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:43,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:43,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:43,625 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:09:43,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:43,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:43,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:43,993 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:09:44,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:09:44,261 INFO L85 PathProgramCache]: Analyzing trace with hash 400128049, now seen corresponding path program 153 times [2024-05-06 04:09:44,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:44,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:44,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:44,552 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:09:44,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:44,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:44,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:44,850 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:09:45,012 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:09:45,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:09:45,213 INFO L85 PathProgramCache]: Analyzing trace with hash -723184960, now seen corresponding path program 154 times [2024-05-06 04:09:45,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:45,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:45,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:45,573 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:09:45,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:45,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:45,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:45,871 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:09:46,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:09:46,129 INFO L85 PathProgramCache]: Analyzing trace with hash -943896422, now seen corresponding path program 155 times [2024-05-06 04:09:46,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:46,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:46,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:46,501 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:09:46,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:46,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:46,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:46,809 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:09:46,994 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:09:46,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:09:47,186 INFO L85 PathProgramCache]: Analyzing trace with hash 819726073, now seen corresponding path program 156 times [2024-05-06 04:09:47,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:47,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:47,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:47,487 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:09:47,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:47,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:47,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:47,849 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:09:48,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:09:48,163 INFO L85 PathProgramCache]: Analyzing trace with hash 705643963, now seen corresponding path program 157 times [2024-05-06 04:09:48,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:48,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:48,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:48,470 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:09:48,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:48,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:48,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:48,773 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:09:49,031 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:49,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:10:09,080 WARN L293 SmtUtils]: Spent 16.89s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:10:11,085 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.offset_In_142 Int) (v_~q2~0.base_In_142 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_142) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_142)) 0)) (forall ((v_~q1_front~0_In_182 Int) (v_~q1~0.base_In_181 Int) (v_~q1~0.offset_In_181 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_181) (+ (* v_~q1_front~0_In_182 4) v_~q1~0.offset_In_181)))) (or (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0) (= .cse0 0) (< v_~q1_front~0_In_182 0))))) is different from false [2024-05-06 04:10:11,088 INFO L85 PathProgramCache]: Analyzing trace with hash 1656469144, now seen corresponding path program 158 times [2024-05-06 04:10:11,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:11,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:11,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:11,396 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:11,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:11,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:11,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:11,686 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:11,857 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:11,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:12,092 INFO L85 PathProgramCache]: Analyzing trace with hash -189063249, now seen corresponding path program 159 times [2024-05-06 04:10:12,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:12,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:12,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:12,439 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:12,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:12,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:12,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:12,734 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:13,017 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:13,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:10:13,703 INFO L85 PathProgramCache]: Analyzing trace with hash -1565992581, now seen corresponding path program 160 times [2024-05-06 04:10:13,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:13,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:13,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:13,971 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:13,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:13,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:14,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:14,176 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:14,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:10:14,422 INFO L85 PathProgramCache]: Analyzing trace with hash -832577552, now seen corresponding path program 9 times [2024-05-06 04:10:14,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:14,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:14,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:14,648 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:14,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:14,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:14,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:14,860 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:15,011 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:15,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:15,200 INFO L85 PathProgramCache]: Analyzing trace with hash -853324929, now seen corresponding path program 10 times [2024-05-06 04:10:15,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:15,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:15,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:15,567 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:15,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:15,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:15,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:15,887 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:16,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:10:16,114 INFO L85 PathProgramCache]: Analyzing trace with hash -683268165, now seen corresponding path program 11 times [2024-05-06 04:10:16,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:16,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:16,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:16,493 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:16,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:16,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:16,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:16,804 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:16,958 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:16,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:17,136 INFO L85 PathProgramCache]: Analyzing trace with hash -1490313574, now seen corresponding path program 12 times [2024-05-06 04:10:17,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:17,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:17,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:17,516 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:17,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:17,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:17,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:17,825 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:17,977 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:10:18,066 INFO L85 PathProgramCache]: Analyzing trace with hash -1689425383, now seen corresponding path program 9 times [2024-05-06 04:10:18,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:18,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:18,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:18,281 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:18,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:18,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:18,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:18,561 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:18,720 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:18,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:18,913 INFO L85 PathProgramCache]: Analyzing trace with hash -2319192, now seen corresponding path program 10 times [2024-05-06 04:10:18,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:18,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:18,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:19,221 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:19,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:19,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:19,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:19,534 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:19,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:10:19,794 INFO L85 PathProgramCache]: Analyzing trace with hash -71894094, now seen corresponding path program 11 times [2024-05-06 04:10:19,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:19,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:19,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:20,170 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:20,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:20,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:20,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:20,494 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:20,662 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:20,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:20,832 INFO L85 PathProgramCache]: Analyzing trace with hash -1457846767, now seen corresponding path program 12 times [2024-05-06 04:10:20,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:20,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:20,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:21,186 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:21,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:21,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:21,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:21,485 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:21,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:10:21,713 INFO L85 PathProgramCache]: Analyzing trace with hash -2132707630, now seen corresponding path program 9 times [2024-05-06 04:10:21,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:21,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:21,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:21,926 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:21,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:21,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:21,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:22,234 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:22,418 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:22,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:22,651 INFO L85 PathProgramCache]: Analyzing trace with hash 1813569633, now seen corresponding path program 10 times [2024-05-06 04:10:22,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:22,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:22,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:23,047 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:23,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:23,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:23,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:23,519 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:23,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:10:23,761 INFO L85 PathProgramCache]: Analyzing trace with hash 386084633, now seen corresponding path program 11 times [2024-05-06 04:10:23,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:23,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:23,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:24,082 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:24,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:24,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:24,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:24,396 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:24,559 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:24,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:24,737 INFO L85 PathProgramCache]: Analyzing trace with hash -706804488, now seen corresponding path program 12 times [2024-05-06 04:10:24,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:24,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:24,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:25,075 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:25,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:25,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:25,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:25,400 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:25,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:10:25,698 INFO L85 PathProgramCache]: Analyzing trace with hash 346844924, now seen corresponding path program 161 times [2024-05-06 04:10:25,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:25,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:25,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:25,913 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:25,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:25,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:25,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:26,137 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:10:26,294 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:26,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:27,246 INFO L85 PathProgramCache]: Analyzing trace with hash 883297931, now seen corresponding path program 162 times [2024-05-06 04:10:27,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:27,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:27,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:27,600 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:27,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:27,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:27,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:27,916 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:28,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:10:28,154 INFO L85 PathProgramCache]: Analyzing trace with hash 1612432943, now seen corresponding path program 163 times [2024-05-06 04:10:28,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:28,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:28,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:28,475 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:28,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:28,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:28,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:28,864 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2024-05-06 04:10:29,027 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:29,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:29,237 INFO L85 PathProgramCache]: Analyzing trace with hash -1982163186, now seen corresponding path program 164 times [2024-05-06 04:10:29,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:29,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:29,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:29,567 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:29,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:29,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:29,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:29,896 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2024-05-06 04:10:30,203 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:30,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:10:41,876 INFO L85 PathProgramCache]: Analyzing trace with hash -741164360, now seen corresponding path program 165 times [2024-05-06 04:10:41,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:41,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:41,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:42,159 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:10:42,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:42,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:42,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:42,450 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:10:42,608 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:10:42,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:10:42,783 INFO L85 PathProgramCache]: Analyzing trace with hash 400279949, now seen corresponding path program 166 times [2024-05-06 04:10:42,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:42,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:42,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:43,124 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:10:43,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:43,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:43,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:43,411 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:10:43,648 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:43,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:02,654 WARN L293 SmtUtils]: Spent 16.23s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:11:04,662 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1_front~0_In_203 Int) (v_~q1~0.offset_In_202 Int) (v_~q1~0.base_In_202 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_202) (+ (* v_~q1_front~0_In_203 4) v_~q1~0.offset_In_202)))) (or (< (+ 4294967295 .cse0) 0) (< v_~q1_front~0_In_203 0) (= .cse0 0) (< 4294967295 .cse0)))) (forall ((v_~q2~0.offset_In_145 Int) (v_~q2~0.base_In_145 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_145) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_145)) 0))) is different from false [2024-05-06 04:11:04,665 INFO L85 PathProgramCache]: Analyzing trace with hash -476222606, now seen corresponding path program 167 times [2024-05-06 04:11:04,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:04,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:04,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:04,957 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:04,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:04,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:04,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:05,304 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:05,458 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:11:05,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:11:05,666 INFO L85 PathProgramCache]: Analyzing trace with hash -1877998032, now seen corresponding path program 168 times [2024-05-06 04:11:05,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:05,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:05,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:05,956 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:05,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:05,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:05,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:06,249 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:06,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:11:06,498 INFO L85 PathProgramCache]: Analyzing trace with hash 1911604010, now seen corresponding path program 169 times [2024-05-06 04:11:06,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:06,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:06,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:06,854 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:06,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:06,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:06,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:07,157 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:07,403 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:07,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:18,702 WARN L293 SmtUtils]: Spent 6.05s on a formula simplification. DAG size of input: 37 DAG size of output: 33 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:11:18,890 INFO L85 PathProgramCache]: Analyzing trace with hash 1920492718, now seen corresponding path program 5 times [2024-05-06 04:11:18,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:18,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:18,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:19,195 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:19,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:19,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:19,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:19,563 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:19,813 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:19,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:25,340 INFO L85 PathProgramCache]: Analyzing trace with hash -166462525, now seen corresponding path program 6 times [2024-05-06 04:11:25,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:25,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:25,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:25,561 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:11:25,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:25,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:25,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:25,880 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:11:26,165 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:26,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:27,058 INFO L85 PathProgramCache]: Analyzing trace with hash -1184974578, now seen corresponding path program 5 times [2024-05-06 04:11:27,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:27,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:27,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:27,354 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:27,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:27,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:27,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:27,649 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:27,906 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:27,906 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:28,692 INFO L85 PathProgramCache]: Analyzing trace with hash -963210397, now seen corresponding path program 6 times [2024-05-06 04:11:28,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:28,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:28,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:28,910 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:11:28,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:28,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:28,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:29,127 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:11:29,394 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:29,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:52,390 WARN L293 SmtUtils]: Spent 20.15s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:11:54,400 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.offset_In_150 Int) (v_~q2~0.base_In_150 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_150) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_150)) 0)) (forall ((v_~q1~0.base_In_209 Int) (v_~q1_front~0_In_210 Int) (v_~q1~0.offset_In_209 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_209) (+ v_~q1~0.offset_In_209 (* v_~q1_front~0_In_210 4))))) (or (< v_~q1_front~0_In_210 0) (< 4294967295 .cse0) (< (+ .cse0 4294967295) 0) (= .cse0 0))))) is different from false [2024-05-06 04:11:54,403 INFO L85 PathProgramCache]: Analyzing trace with hash -869508831, now seen corresponding path program 5 times [2024-05-06 04:11:54,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:54,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:54,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:54,775 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:54,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:54,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:54,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:55,085 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:55,351 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:55,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:56,390 INFO L85 PathProgramCache]: Analyzing trace with hash -1836033872, now seen corresponding path program 6 times [2024-05-06 04:11:56,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:56,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:56,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:56,606 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:11:56,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:56,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:56,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:56,904 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:11:57,169 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:57,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:57,952 INFO L85 PathProgramCache]: Analyzing trace with hash 1911613935, now seen corresponding path program 5 times [2024-05-06 04:11:57,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:57,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:57,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:58,243 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:58,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:58,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:58,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:58,546 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:11:58,782 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:58,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:02,847 INFO L85 PathProgramCache]: Analyzing trace with hash 201772962, now seen corresponding path program 6 times [2024-05-06 04:12:02,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:02,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:02,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:03,063 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:12:03,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:03,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:03,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:03,284 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:12:03,542 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:03,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:04,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1877997694, now seen corresponding path program 5 times [2024-05-06 04:12:04,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:04,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:04,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:04,626 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:12:04,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:04,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:04,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:04,920 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:12:05,186 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:05,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:08,231 INFO L85 PathProgramCache]: Analyzing trace with hash -121354385, now seen corresponding path program 6 times [2024-05-06 04:12:08,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:08,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:08,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:08,447 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:12:08,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:08,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:08,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:08,744 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:12:08,995 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:08,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:09,919 INFO L85 PathProgramCache]: Analyzing trace with hash -476222575, now seen corresponding path program 5 times [2024-05-06 04:12:09,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:09,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:09,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:10,213 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:12:10,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:10,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:10,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:10,507 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:12:10,763 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:10,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:29,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1414857792, now seen corresponding path program 6 times [2024-05-06 04:12:29,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:29,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:29,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:29,253 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:12:29,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:29,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:29,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:29,485 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:12:29,748 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:29,749 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:30,633 INFO L85 PathProgramCache]: Analyzing trace with hash 400279973, now seen corresponding path program 170 times [2024-05-06 04:12:30,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:30,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:30,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:30,929 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:12:30,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:30,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:30,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:31,223 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 2 proven. 49 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:12:31,477 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:31,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:32,732 INFO L85 PathProgramCache]: Analyzing trace with hash 320683180, now seen corresponding path program 171 times [2024-05-06 04:12:32,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:32,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:32,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:33,032 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:12:33,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:33,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:33,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:33,248 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:12:33,417 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:12:33,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:12:33,639 INFO L85 PathProgramCache]: Analyzing trace with hash 1379393289, now seen corresponding path program 172 times [2024-05-06 04:12:33,640 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:33,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:33,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:33,899 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:12:33,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:33,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:33,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:34,162 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 33 proven. 67 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:12:34,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:12:34,490 INFO L85 PathProgramCache]: Analyzing trace with hash -188480143, now seen corresponding path program 173 times [2024-05-06 04:12:34,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:34,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:34,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:34,680 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:12:34,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:34,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:34,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:34,868 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:12:35,128 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:35,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:45,620 WARN L293 SmtUtils]: Spent 7.69s on a formula simplification that was a NOOP. DAG size: 37 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:12:49,924 INFO L85 PathProgramCache]: Analyzing trace with hash -1488830173, now seen corresponding path program 174 times [2024-05-06 04:12:49,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:49,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:49,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:50,134 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:12:50,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:50,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:50,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:50,425 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:12:50,592 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:12:50,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:12:50,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1488830173, now seen corresponding path program 175 times [2024-05-06 04:12:50,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:50,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:50,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:50,984 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:12:50,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:50,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:51,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:51,188 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:12:51,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:12:51,463 INFO L85 PathProgramCache]: Analyzing trace with hash 1090905751, now seen corresponding path program 176 times [2024-05-06 04:12:51,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:51,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:51,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:51,679 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:12:51,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:51,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:51,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:51,993 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:12:52,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:12:52,304 INFO L85 PathProgramCache]: Analyzing trace with hash -541659221, now seen corresponding path program 177 times [2024-05-06 04:12:52,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:52,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:52,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:52,524 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:12:52,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:52,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:52,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:52,734 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 44 proven. 5 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:12:52,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:12:53,031 INFO L85 PathProgramCache]: Analyzing trace with hash -1312949311, now seen corresponding path program 178 times [2024-05-06 04:12:53,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:53,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:53,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:53,304 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 32 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:12:53,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:53,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:53,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:53,641 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 32 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:12:53,832 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:12:53,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:12:54,034 INFO L85 PathProgramCache]: Analyzing trace with hash -351624091, now seen corresponding path program 179 times [2024-05-06 04:12:54,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:54,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:54,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:54,257 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:54,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:54,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:54,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:54,467 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:54,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:12:54,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1984555933, now seen corresponding path program 180 times [2024-05-06 04:12:54,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:54,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:54,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:55,071 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:55,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:55,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:55,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:55,285 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:55,543 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:55,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:56,544 INFO L85 PathProgramCache]: Analyzing trace with hash 1984555922, now seen corresponding path program 181 times [2024-05-06 04:12:56,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:56,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:56,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:56,759 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:56,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:56,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:56,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:56,973 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:57,144 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:12:57,262 INFO L85 PathProgramCache]: Analyzing trace with hash 192789082, now seen corresponding path program 182 times [2024-05-06 04:12:57,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:57,262 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:57,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:57,598 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:57,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:57,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:57,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:57,824 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:58,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:12:58,091 INFO L85 PathProgramCache]: Analyzing trace with hash 1009128877, now seen corresponding path program 183 times [2024-05-06 04:12:58,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:58,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:58,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:58,313 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:58,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:58,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:58,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:58,538 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:58,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:12:58,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1549712045, now seen corresponding path program 184 times [2024-05-06 04:12:58,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:58,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:58,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:59,096 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:59,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:59,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:59,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:59,333 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:12:59,635 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:59,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:02,613 INFO L85 PathProgramCache]: Analyzing trace with hash 2024212839, now seen corresponding path program 185 times [2024-05-06 04:13:02,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:02,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:02,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:02,984 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:02,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:02,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:03,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:03,287 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:03,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:13:03,550 INFO L85 PathProgramCache]: Analyzing trace with hash -1673910565, now seen corresponding path program 186 times [2024-05-06 04:13:03,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:03,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:03,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:03,858 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:03,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:03,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:03,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:04,228 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:04,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:13:04,478 INFO L85 PathProgramCache]: Analyzing trace with hash -351619105, now seen corresponding path program 187 times [2024-05-06 04:13:04,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:04,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:04,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:04,688 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:04,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:04,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:04,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:04,898 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:05,154 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:05,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:06,200 INFO L85 PathProgramCache]: Analyzing trace with hash 341619924, now seen corresponding path program 188 times [2024-05-06 04:13:06,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:06,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:06,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:06,586 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:06,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:06,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:06,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:06,904 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:07,159 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:07,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:07,934 INFO L85 PathProgramCache]: Analyzing trace with hash 113877251, now seen corresponding path program 11 times [2024-05-06 04:13:07,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:07,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:08,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:08,317 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:13:08,317 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:08,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:08,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:08,655 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:13:08,935 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:08,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:21,855 INFO L85 PathProgramCache]: Analyzing trace with hash -3617010, now seen corresponding path program 12 times [2024-05-06 04:13:21,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:21,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:21,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:22,095 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:13:22,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:22,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:22,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:22,335 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:13:22,593 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:22,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:27,961 INFO L85 PathProgramCache]: Analyzing trace with hash 142220774, now seen corresponding path program 5 times [2024-05-06 04:13:27,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:27,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:27,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:28,288 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:13:28,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:28,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:28,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:28,621 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:13:28,890 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:28,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:31,836 INFO L85 PathProgramCache]: Analyzing trace with hash 335749515, now seen corresponding path program 6 times [2024-05-06 04:13:31,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:31,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:31,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:32,073 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:13:32,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:32,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:32,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:32,311 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:13:32,574 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:32,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:35,493 INFO L85 PathProgramCache]: Analyzing trace with hash 2082797733, now seen corresponding path program 5 times [2024-05-06 04:13:35,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:35,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:35,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:35,817 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:13:35,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:35,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:35,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:36,145 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:13:36,416 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:36,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:46,751 INFO L85 PathProgramCache]: Analyzing trace with hash -323424852, now seen corresponding path program 6 times [2024-05-06 04:13:46,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:46,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:46,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:46,993 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:13:46,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:46,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:47,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:47,232 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:13:47,489 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:47,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:53,005 INFO L85 PathProgramCache]: Analyzing trace with hash -1872475639, now seen corresponding path program 189 times [2024-05-06 04:13:53,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:53,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:53,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:53,331 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:13:53,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:53,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:53,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:53,656 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:13:53,917 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:53,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:54,822 INFO L85 PathProgramCache]: Analyzing trace with hash -657134392, now seen corresponding path program 190 times [2024-05-06 04:13:54,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:54,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:54,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:55,059 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:13:55,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:55,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:55,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:55,306 INFO L134 CoverageAnalysis]: Checked inductivity of 123 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:13:55,475 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:13:55,562 INFO L85 PathProgramCache]: Analyzing trace with hash 1879260161, now seen corresponding path program 191 times [2024-05-06 04:13:55,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:55,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:55,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:55,945 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:55,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:55,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:55,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:56,283 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:13:56,539 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:56,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:01,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1879259575, now seen corresponding path program 192 times [2024-05-06 04:14:01,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:01,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:01,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:02,169 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:02,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:02,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:02,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:02,488 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:02,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:02,744 INFO L85 PathProgramCache]: Analyzing trace with hash -1778283011, now seen corresponding path program 193 times [2024-05-06 04:14:02,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:02,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:02,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:03,037 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:14:03,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:03,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:03,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:03,266 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:14:03,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:03,528 INFO L85 PathProgramCache]: Analyzing trace with hash -1778252228, now seen corresponding path program 5 times [2024-05-06 04:14:03,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:03,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:03,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:03,756 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:03,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:03,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:03,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:04,055 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:04,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:04,345 INFO L85 PathProgramCache]: Analyzing trace with hash -1997122825, now seen corresponding path program 6 times [2024-05-06 04:14:04,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:04,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:04,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:04,596 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:04,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:04,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:04,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:04,849 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:05,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:05,125 INFO L85 PathProgramCache]: Analyzing trace with hash 1466657637, now seen corresponding path program 5 times [2024-05-06 04:14:05,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:05,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:05,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:05,414 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:05,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:05,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:05,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:05,641 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:05,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:05,914 INFO L85 PathProgramCache]: Analyzing trace with hash 1729211374, now seen corresponding path program 6 times [2024-05-06 04:14:05,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:05,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:05,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:06,170 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:06,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:06,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:06,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:06,491 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:06,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:06,795 INFO L85 PathProgramCache]: Analyzing trace with hash 740048158, now seen corresponding path program 5 times [2024-05-06 04:14:06,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:06,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:06,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:07,024 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:07,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:07,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:07,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:07,253 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:07,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:07,510 INFO L85 PathProgramCache]: Analyzing trace with hash 1456388693, now seen corresponding path program 6 times [2024-05-06 04:14:07,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:07,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:07,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:07,823 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:07,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:07,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:07,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:08,074 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:08,235 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:08,324 INFO L85 PathProgramCache]: Analyzing trace with hash -945958840, now seen corresponding path program 194 times [2024-05-06 04:14:08,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:08,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:08,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:08,553 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:08,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:08,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:08,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:08,839 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:14:09,007 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:09,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:14:09,207 INFO L85 PathProgramCache]: Analyzing trace with hash 1296951255, now seen corresponding path program 195 times [2024-05-06 04:14:09,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:09,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:09,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:09,467 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:09,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:09,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:09,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:09,716 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:09,888 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:10,052 INFO L85 PathProgramCache]: Analyzing trace with hash 1550784107, now seen corresponding path program 196 times [2024-05-06 04:14:10,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:10,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:10,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:10,372 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:10,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:10,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:10,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:10,722 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2024-05-06 04:14:10,922 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:10,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:14:11,172 INFO L85 PathProgramCache]: Analyzing trace with hash 230859594, now seen corresponding path program 197 times [2024-05-06 04:14:11,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:11,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:11,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:11,533 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2024-05-06 04:14:11,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:11,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:11,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:11,796 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2024-05-06 04:14:11,999 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:12,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:14:12,222 INFO L85 PathProgramCache]: Analyzing trace with hash 1208560321, now seen corresponding path program 198 times [2024-05-06 04:14:12,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:12,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:12,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:12,510 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:12,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:12,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:12,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:12,931 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:13,177 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:13,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:18,601 INFO L85 PathProgramCache]: Analyzing trace with hash -489475340, now seen corresponding path program 199 times [2024-05-06 04:14:18,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:18,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:18,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:18,898 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:18,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:18,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:18,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:19,267 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:19,462 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:19,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:14:19,725 INFO L85 PathProgramCache]: Analyzing trace with hash 195101683, now seen corresponding path program 200 times [2024-05-06 04:14:19,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:19,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:19,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:20,044 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 34 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:14:20,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:20,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:20,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:20,419 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 34 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:14:20,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:14:20,714 INFO L85 PathProgramCache]: Analyzing trace with hash 1753185735, now seen corresponding path program 201 times [2024-05-06 04:14:20,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:20,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:20,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:20,920 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:20,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:20,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:20,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:21,125 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:21,302 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:21,403 INFO L85 PathProgramCache]: Analyzing trace with hash -1940201192, now seen corresponding path program 202 times [2024-05-06 04:14:21,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:21,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:21,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:21,600 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:21,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:21,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:21,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:21,865 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:22,035 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:22,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:14:22,259 INFO L85 PathProgramCache]: Analyzing trace with hash 772722543, now seen corresponding path program 203 times [2024-05-06 04:14:22,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:22,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:22,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:22,467 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:22,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:22,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:22,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:22,675 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:22,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:14:22,948 INFO L85 PathProgramCache]: Analyzing trace with hash -1815404085, now seen corresponding path program 204 times [2024-05-06 04:14:22,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:22,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:22,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:23,219 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:23,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:23,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:23,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:23,479 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:23,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:14:23,806 INFO L85 PathProgramCache]: Analyzing trace with hash 1730411050, now seen corresponding path program 205 times [2024-05-06 04:14:23,806 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:23,806 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:23,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:24,064 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:24,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:24,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:24,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:24,352 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:24,562 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:24,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 20 [2024-05-06 04:14:24,779 INFO L85 PathProgramCache]: Analyzing trace with hash 887103658, now seen corresponding path program 206 times [2024-05-06 04:14:24,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:24,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:24,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:25,077 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 34 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:14:25,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:25,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:25,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:25,371 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 34 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:14:25,670 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:25,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:31,483 INFO L85 PathProgramCache]: Analyzing trace with hash -517535093, now seen corresponding path program 207 times [2024-05-06 04:14:31,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:31,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:31,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:31,760 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 34 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:14:31,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:31,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:31,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:32,073 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 34 proven. 67 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:14:32,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:32,346 INFO L85 PathProgramCache]: Analyzing trace with hash 865009427, now seen corresponding path program 208 times [2024-05-06 04:14:32,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:32,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:32,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:32,564 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:32,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:32,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:32,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:32,772 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:32,931 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2024-05-06 04:14:33,045 INFO L85 PathProgramCache]: Analyzing trace with hash -1949568330, now seen corresponding path program 209 times [2024-05-06 04:14:33,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:33,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:33,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:33,301 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:33,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:33,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:33,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:33,511 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:33,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:33,793 INFO L85 PathProgramCache]: Analyzing trace with hash -1808909975, now seen corresponding path program 210 times [2024-05-06 04:14:33,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:33,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:33,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:34,013 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:34,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:34,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:34,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:34,276 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:34,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:34,535 INFO L85 PathProgramCache]: Analyzing trace with hash 1992800596, now seen corresponding path program 211 times [2024-05-06 04:14:34,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:34,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:34,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:34,748 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:34,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:34,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:34,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:34,972 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:35,147 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:35,282 INFO L85 PathProgramCache]: Analyzing trace with hash -1018882558, now seen corresponding path program 7 times [2024-05-06 04:14:35,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:35,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:35,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:35,500 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:35,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:35,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:35,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:35,730 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:35,889 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:35,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:14:36,070 INFO L85 PathProgramCache]: Analyzing trace with hash -448509222, now seen corresponding path program 8 times [2024-05-06 04:14:36,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:36,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:36,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:36,340 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:36,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:36,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:36,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:36,554 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:36,721 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:36,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:14:36,918 INFO L85 PathProgramCache]: Analyzing trace with hash -1966781673, now seen corresponding path program 9 times [2024-05-06 04:14:36,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:36,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:36,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:37,133 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:37,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:37,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:37,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:37,412 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:37,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:37,678 INFO L85 PathProgramCache]: Analyzing trace with hash -840688853, now seen corresponding path program 10 times [2024-05-06 04:14:37,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:37,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:37,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:37,894 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:37,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:37,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:37,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:38,108 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:38,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:38,367 INFO L85 PathProgramCache]: Analyzing trace with hash -45258803, now seen corresponding path program 7 times [2024-05-06 04:14:38,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:38,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:38,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:38,649 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:38,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:38,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:38,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:38,876 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:39,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:39,145 INFO L85 PathProgramCache]: Analyzing trace with hash -404109968, now seen corresponding path program 8 times [2024-05-06 04:14:39,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:39,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:39,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:39,368 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:39,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:39,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:39,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:39,648 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:39,825 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:39,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:14:40,023 INFO L85 PathProgramCache]: Analyzing trace with hash -940785990, now seen corresponding path program 7 times [2024-05-06 04:14:40,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:40,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:40,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:40,248 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:40,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:40,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:40,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:40,531 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:40,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:40,789 INFO L85 PathProgramCache]: Analyzing trace with hash 900406248, now seen corresponding path program 8 times [2024-05-06 04:14:40,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:40,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:40,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:41,026 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:41,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:41,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:41,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:41,250 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:41,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:41,521 INFO L85 PathProgramCache]: Analyzing trace with hash -139526347, now seen corresponding path program 9 times [2024-05-06 04:14:41,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:41,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:41,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:41,800 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:41,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:41,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:41,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:42,019 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:42,194 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 04:14:42,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 42 treesize of output 22 [2024-05-06 04:14:42,393 INFO L85 PathProgramCache]: Analyzing trace with hash -835784889, now seen corresponding path program 10 times [2024-05-06 04:14:42,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:42,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:42,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:42,671 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:42,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:42,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:42,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:42,944 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:14:43,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:43,243 INFO L85 PathProgramCache]: Analyzing trace with hash -402096628, now seen corresponding path program 7 times [2024-05-06 04:14:43,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:43,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:43,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:43,465 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:14:43,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:43,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:43,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:43,690 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 45 proven. 5 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. Received shutdown request... [2024-05-06 04:14:43,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:14:43,935 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-06 04:14:43,957 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:14:43,957 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:14:43,957 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:14:44,132 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable670,SelfDestructingSolverStorable550,SelfDestructingSolverStorable671,SelfDestructingSolverStorable548,SelfDestructingSolverStorable669,SelfDestructingSolverStorable549,SelfDestructingSolverStorable544,SelfDestructingSolverStorable665,SelfDestructingSolverStorable545,SelfDestructingSolverStorable666,SelfDestructingSolverStorable546,SelfDestructingSolverStorable667,SelfDestructingSolverStorable547,SelfDestructingSolverStorable668,SelfDestructingSolverStorable540,SelfDestructingSolverStorable661,SelfDestructingSolverStorable541,SelfDestructingSolverStorable662,SelfDestructingSolverStorable542,SelfDestructingSolverStorable663,SelfDestructingSolverStorable543,SelfDestructingSolverStorable664,SelfDestructingSolverStorable660,SelfDestructingSolverStorable537,SelfDestructingSolverStorable658,SelfDestructingSolverStorable538,SelfDestructingSolverStorable659,SelfDestructingSolverStorable539,SelfDestructingSolverStorable533,SelfDestructingSolverStorable654,SelfDestructingSolverStorable534,SelfDestructingSolverStorable655,SelfDestructingSolverStorable535,SelfDestructingSolverStorable656,SelfDestructingSolverStorable536,SelfDestructingSolverStorable657,SelfDestructingSolverStorable650,SelfDestructingSolverStorable530,SelfDestructingSolverStorable651,SelfDestructingSolverStorable531,SelfDestructingSolverStorable652,SelfDestructingSolverStorable532,SelfDestructingSolverStorable653,SelfDestructingSolverStorable570,SelfDestructingSolverStorable571,SelfDestructingSolverStorable572,SelfDestructingSolverStorable566,SelfDestructingSolverStorable687,SelfDestructingSolverStorable567,SelfDestructingSolverStorable568,SelfDestructingSolverStorable569,SelfDestructingSolverStorable562,SelfDestructingSolverStorable683,SelfDestructingSolverStorable563,SelfDestructingSolverStorable684,SelfDestructingSolverStorable564,SelfDestructingSolverStorable685,SelfDestructingSolverStorable565,SelfDestructingSolverStorable686,SelfDestructingSolverStorable680,SelfDestructingSolverStorable560,SelfDestructingSolverStorable681,SelfDestructingSolverStorable561,SelfDestructingSolverStorable682,SelfDestructingSolverStorable559,SelfDestructingSolverStorable555,SelfDestructingSolverStorable676,SelfDestructingSolverStorable556,SelfDestructingSolverStorable677,SelfDestructingSolverStorable557,SelfDestructingSolverStorable678,SelfDestructingSolverStorable558,SelfDestructingSolverStorable679,SelfDestructingSolverStorable551,SelfDestructingSolverStorable672,SelfDestructingSolverStorable552,SelfDestructingSolverStorable673,SelfDestructingSolverStorable553,SelfDestructingSolverStorable674,SelfDestructingSolverStorable554,SelfDestructingSolverStorable675,SelfDestructingSolverStorable508,SelfDestructingSolverStorable629,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable625,SelfDestructingSolverStorable505,SelfDestructingSolverStorable626,SelfDestructingSolverStorable506,SelfDestructingSolverStorable627,SelfDestructingSolverStorable507,SelfDestructingSolverStorable628,SelfDestructingSolverStorable500,SelfDestructingSolverStorable621,SelfDestructingSolverStorable501,SelfDestructingSolverStorable622,SelfDestructingSolverStorable502,SelfDestructingSolverStorable623,SelfDestructingSolverStorable503,SelfDestructingSolverStorable624,SelfDestructingSolverStorable620,SelfDestructingSolverStorable618,SelfDestructingSolverStorable619,SelfDestructingSolverStorable614,SelfDestructingSolverStorable615,SelfDestructingSolverStorable616,SelfDestructingSolverStorable617,SelfDestructingSolverStorable610,SelfDestructingSolverStorable611,SelfDestructingSolverStorable612,SelfDestructingSolverStorable613,SelfDestructingSolverStorable526,SelfDestructingSolverStorable647,SelfDestructingSolverStorable527,SelfDestructingSolverStorable648,SelfDestructingSolverStorable528,SelfDestructingSolverStorable649,SelfDestructingSolverStorable529,SelfDestructingSolverStorable522,SelfDestructingSolverStorable643,SelfDestructingSolverStorable523,SelfDestructingSolverStorable644,SelfDestructingSolverStorable524,SelfDestructingSolverStorable645,SelfDestructingSolverStorable525,SelfDestructingSolverStorable646,SelfDestructingSolverStorable640,SelfDestructingSolverStorable520,SelfDestructingSolverStorable641,SelfDestructingSolverStorable521,SelfDestructingSolverStorable642,SelfDestructingSolverStorable519,SelfDestructingSolverStorable515,SelfDestructingSolverStorable636,SelfDestructingSolverStorable516,SelfDestructingSolverStorable637,SelfDestructingSolverStorable517,SelfDestructingSolverStorable638,SelfDestructingSolverStorable518,SelfDestructingSolverStorable639,SelfDestructingSolverStorable511,SelfDestructingSolverStorable632,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable512,SelfDestructingSolverStorable633,SelfDestructingSolverStorable513,SelfDestructingSolverStorable634,SelfDestructingSolverStorable514,SelfDestructingSolverStorable635,SelfDestructingSolverStorable630,SelfDestructingSolverStorable510,SelfDestructingSolverStorable631,SelfDestructingSolverStorable496,SelfDestructingSolverStorable497,SelfDestructingSolverStorable498,SelfDestructingSolverStorable499,SelfDestructingSolverStorable607,SelfDestructingSolverStorable608,SelfDestructingSolverStorable609,SelfDestructingSolverStorable603,SelfDestructingSolverStorable604,SelfDestructingSolverStorable605,SelfDestructingSolverStorable606,SelfDestructingSolverStorable600,SelfDestructingSolverStorable601,SelfDestructingSolverStorable602,SelfDestructingSolverStorable470,SelfDestructingSolverStorable591,SelfDestructingSolverStorable471,SelfDestructingSolverStorable592,SelfDestructingSolverStorable472,SelfDestructingSolverStorable593,SelfDestructingSolverStorable473,SelfDestructingSolverStorable594,SelfDestructingSolverStorable590,SelfDestructingSolverStorable467,SelfDestructingSolverStorable588,SelfDestructingSolverStorable468,SelfDestructingSolverStorable589,SelfDestructingSolverStorable469,SelfDestructingSolverStorable463,SelfDestructingSolverStorable584,SelfDestructingSolverStorable464,SelfDestructingSolverStorable585,SelfDestructingSolverStorable465,SelfDestructingSolverStorable586,SelfDestructingSolverStorable466,SelfDestructingSolverStorable587,SelfDestructingSolverStorable580,SelfDestructingSolverStorable460,SelfDestructingSolverStorable581,SelfDestructingSolverStorable461,SelfDestructingSolverStorable582,SelfDestructingSolverStorable462,SelfDestructingSolverStorable583,SelfDestructingSolverStorable577,SelfDestructingSolverStorable578,SelfDestructingSolverStorable458,SelfDestructingSolverStorable579,SelfDestructingSolverStorable459,SelfDestructingSolverStorable573,SelfDestructingSolverStorable574,SelfDestructingSolverStorable575,SelfDestructingSolverStorable576,SelfDestructingSolverStorable492,SelfDestructingSolverStorable493,SelfDestructingSolverStorable494,SelfDestructingSolverStorable495,SelfDestructingSolverStorable490,SelfDestructingSolverStorable491,SelfDestructingSolverStorable489,SelfDestructingSolverStorable485,SelfDestructingSolverStorable486,SelfDestructingSolverStorable487,SelfDestructingSolverStorable488,SelfDestructingSolverStorable481,SelfDestructingSolverStorable482,SelfDestructingSolverStorable483,SelfDestructingSolverStorable484,SelfDestructingSolverStorable480,SelfDestructingSolverStorable478,SelfDestructingSolverStorable599,SelfDestructingSolverStorable479,SelfDestructingSolverStorable474,SelfDestructingSolverStorable595,SelfDestructingSolverStorable475,SelfDestructingSolverStorable596,SelfDestructingSolverStorable476,SelfDestructingSolverStorable597,SelfDestructingSolverStorable477,SelfDestructingSolverStorable598 [2024-05-06 04:14:44,133 WARN L619 AbstractCegarLoop]: Verification canceled: while QuantifierPusher was running 1 iterations on subformula. [2024-05-06 04:14:44,135 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (4 of 5 remaining) [2024-05-06 04:14:44,135 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-06 04:14:44,135 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-06 04:14:44,135 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-06 04:14:44,135 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-06 04:14:44,138 INFO L448 BasicCegarLoop]: Path program histogram: [211, 12, 12, 12, 12, 10, 10, 8, 7, 6, 6, 6, 6, 6, 6, 6, 3, 2, 2, 1, 1, 1] [2024-05-06 04:14:44,139 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: clock still running: ConditionalCommutativityCheckTime at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) at de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData.aggregateBenchmarkData(StatisticsData.java:60) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2024-05-06 04:14:44,144 INFO L158 Benchmark]: Toolchain (without parser) took 818549.35ms. Allocated memory was 175.1MB in the beginning and 2.1GB in the end (delta: 2.0GB). Free memory was 106.1MB in the beginning and 1.0GB in the end (delta: -940.9MB). Peak memory consumption was 1.7GB. Max. memory is 8.0GB. [2024-05-06 04:14:44,144 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 175.1MB. Free memory is still 107.1MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 04:14:44,144 INFO L158 Benchmark]: CACSL2BoogieTranslator took 222.82ms. Allocated memory is still 175.1MB. Free memory was 105.8MB in the beginning and 92.7MB in the end (delta: 13.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 04:14:44,144 INFO L158 Benchmark]: Boogie Procedure Inliner took 52.79ms. Allocated memory was 175.1MB in the beginning and 273.7MB in the end (delta: 98.6MB). Free memory was 92.7MB in the beginning and 240.7MB in the end (delta: -147.9MB). Peak memory consumption was 7.9MB. Max. memory is 8.0GB. [2024-05-06 04:14:44,144 INFO L158 Benchmark]: Boogie Preprocessor took 39.11ms. Allocated memory is still 273.7MB. Free memory was 240.7MB in the beginning and 238.6MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 04:14:44,148 INFO L158 Benchmark]: RCFGBuilder took 654.30ms. Allocated memory is still 273.7MB. Free memory was 238.6MB in the beginning and 188.2MB in the end (delta: 50.3MB). Peak memory consumption was 50.3MB. Max. memory is 8.0GB. [2024-05-06 04:14:44,152 INFO L158 Benchmark]: TraceAbstraction took 817574.97ms. Allocated memory was 273.7MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 187.2MB in the beginning and 1.0GB in the end (delta: -859.8MB). Peak memory consumption was 1.7GB. Max. memory is 8.0GB. [2024-05-06 04:14:44,153 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 175.1MB. Free memory is still 107.1MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 222.82ms. Allocated memory is still 175.1MB. Free memory was 105.8MB in the beginning and 92.7MB in the end (delta: 13.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 52.79ms. Allocated memory was 175.1MB in the beginning and 273.7MB in the end (delta: 98.6MB). Free memory was 92.7MB in the beginning and 240.7MB in the end (delta: -147.9MB). Peak memory consumption was 7.9MB. Max. memory is 8.0GB. * Boogie Preprocessor took 39.11ms. Allocated memory is still 273.7MB. Free memory was 240.7MB in the beginning and 238.6MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 654.30ms. Allocated memory is still 273.7MB. Free memory was 238.6MB in the beginning and 188.2MB in the end (delta: 50.3MB). Peak memory consumption was 50.3MB. Max. memory is 8.0GB. * TraceAbstraction took 817574.97ms. Allocated memory was 273.7MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 187.2MB in the beginning and 1.0GB in the end (delta: -859.8MB). Peak memory consumption was 1.7GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 81631, independent: 77083, independent conditional: 41701, independent unconditional: 35382, dependent: 4548, dependent conditional: 4205, dependent unconditional: 343, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 77741, independent: 77083, independent conditional: 41701, independent unconditional: 35382, dependent: 658, dependent conditional: 315, dependent unconditional: 343, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 77741, independent: 77083, independent conditional: 41701, independent unconditional: 35382, dependent: 658, dependent conditional: 315, dependent unconditional: 343, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 77741, independent: 77083, independent conditional: 41701, independent unconditional: 35382, dependent: 658, dependent conditional: 315, dependent unconditional: 343, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 78712, independent: 77083, independent conditional: 868, independent unconditional: 76215, dependent: 1629, dependent conditional: 317, dependent unconditional: 1312, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 78712, independent: 77083, independent conditional: 85, independent unconditional: 76998, dependent: 1629, dependent conditional: 3, dependent unconditional: 1626, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 78712, independent: 77083, independent conditional: 85, independent unconditional: 76998, dependent: 1629, dependent conditional: 3, dependent unconditional: 1626, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 923, independent: 913, independent conditional: 0, independent unconditional: 913, dependent: 10, dependent conditional: 2, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 923, independent: 911, independent conditional: 0, independent unconditional: 911, dependent: 12, dependent conditional: 0, dependent unconditional: 12, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 12, independent: 2, independent conditional: 0, independent unconditional: 2, dependent: 10, dependent conditional: 2, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 12, independent: 2, independent conditional: 0, independent unconditional: 2, dependent: 10, dependent conditional: 2, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 78, independent: 5, independent conditional: 0, independent unconditional: 5, dependent: 72, dependent conditional: 5, dependent unconditional: 67, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 78712, independent: 76170, independent conditional: 85, independent unconditional: 76085, dependent: 1619, dependent conditional: 1, dependent unconditional: 1618, unknown: 923, unknown conditional: 2, unknown unconditional: 921] , Statistics on independence cache: Total cache size (in pairs): 923, Positive cache size: 913, Positive conditional cache size: 0, Positive unconditional cache size: 913, Negative cache size: 10, Negative conditional cache size: 2, Negative unconditional cache size: 8, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 1097, Maximal queried relation: 1, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 78712, independent: 77083, independent conditional: 868, independent unconditional: 76215, dependent: 1629, dependent conditional: 317, dependent unconditional: 1312, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 78712, independent: 77083, independent conditional: 85, independent unconditional: 76998, dependent: 1629, dependent conditional: 3, dependent unconditional: 1626, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 78712, independent: 77083, independent conditional: 85, independent unconditional: 76998, dependent: 1629, dependent conditional: 3, dependent unconditional: 1626, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 923, independent: 913, independent conditional: 0, independent unconditional: 913, dependent: 10, dependent conditional: 2, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 923, independent: 911, independent conditional: 0, independent unconditional: 911, dependent: 12, dependent conditional: 0, dependent unconditional: 12, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 12, independent: 2, independent conditional: 0, independent unconditional: 2, dependent: 10, dependent conditional: 2, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 12, independent: 2, independent conditional: 0, independent unconditional: 2, dependent: 10, dependent conditional: 2, dependent unconditional: 8, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 78, independent: 5, independent conditional: 0, independent unconditional: 5, dependent: 72, dependent conditional: 5, dependent unconditional: 67, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 78712, independent: 76170, independent conditional: 85, independent unconditional: 76085, dependent: 1619, dependent conditional: 1, dependent unconditional: 1618, unknown: 923, unknown conditional: 2, unknown unconditional: 921] , Statistics on independence cache: Total cache size (in pairs): 923, Positive cache size: 913, Positive conditional cache size: 0, Positive unconditional cache size: 913, Negative cache size: 10, Negative conditional cache size: 2, Negative unconditional cache size: 8, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 1097 ], Independence queries for same thread: 3890 - ExceptionOrErrorResult: AssertionError: clock still running: ConditionalCommutativityCheckTime de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: clock still running: ConditionalCommutativityCheckTime: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown