/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 04:03:14,634 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 04:03:14,670 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 04:03:14,677 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 04:03:14,677 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 04:03:14,704 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 04:03:14,704 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 04:03:14,705 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 04:03:14,705 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 04:03:14,705 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 04:03:14,705 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 04:03:14,706 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 04:03:14,706 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 04:03:14,706 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 04:03:14,706 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 04:03:14,707 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 04:03:14,707 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 04:03:14,707 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 04:03:14,707 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 04:03:14,708 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 04:03:14,708 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 04:03:14,708 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 04:03:14,708 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 04:03:14,709 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 04:03:14,709 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 04:03:14,709 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 04:03:14,709 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 04:03:14,710 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 04:03:14,710 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 04:03:14,710 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 04:03:14,710 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 04:03:14,711 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 04:03:14,711 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 04:03:14,711 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 04:03:14,711 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 04:03:14,711 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 04:03:14,712 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 04:03:14,712 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 04:03:14,712 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 04:03:14,712 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-06 04:03:14,950 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 04:03:14,969 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 04:03:14,971 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 04:03:14,973 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 04:03:14,974 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 04:03:14,974 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c [2024-05-06 04:03:15,922 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 04:03:16,050 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 04:03:16,051 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c [2024-05-06 04:03:16,062 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/9261ac00e/7fd3bd91c82848c0a8fdc793c627352d/FLAG0a6b6810c [2024-05-06 04:03:16,073 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/9261ac00e/7fd3bd91c82848c0a8fdc793c627352d [2024-05-06 04:03:16,075 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 04:03:16,076 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 04:03:16,077 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 04:03:16,077 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 04:03:16,082 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 04:03:16,083 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,083 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2cd09b5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16, skipping insertion in model container [2024-05-06 04:03:16,084 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,111 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 04:03:16,248 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c[4232,4245] [2024-05-06 04:03:16,254 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 04:03:16,261 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 04:03:16,282 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-buffer-series2.wvr.c[4232,4245] [2024-05-06 04:03:16,285 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 04:03:16,290 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 04:03:16,290 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 04:03:16,295 INFO L206 MainTranslator]: Completed translation [2024-05-06 04:03:16,296 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16 WrapperNode [2024-05-06 04:03:16,296 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 04:03:16,297 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 04:03:16,297 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 04:03:16,297 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 04:03:16,301 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,309 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,381 INFO L138 Inliner]: procedures = 27, calls = 83, calls flagged for inlining = 22, calls inlined = 28, statements flattened = 356 [2024-05-06 04:03:16,382 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 04:03:16,382 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 04:03:16,382 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 04:03:16,382 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 04:03:16,389 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,389 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,392 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,392 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,400 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,413 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,415 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,416 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,419 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 04:03:16,420 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 04:03:16,420 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 04:03:16,420 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 04:03:16,420 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (1/1) ... [2024-05-06 04:03:16,437 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 04:03:16,448 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:03:16,461 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 04:03:16,478 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 04:03:16,497 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 04:03:16,497 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 04:03:16,497 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 04:03:16,497 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 04:03:16,498 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 04:03:16,498 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 04:03:16,498 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 04:03:16,498 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 04:03:16,498 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 04:03:16,498 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 04:03:16,498 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 04:03:16,499 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 04:03:16,500 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 04:03:16,500 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 04:03:16,500 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 04:03:16,500 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 04:03:16,500 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 04:03:16,500 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 04:03:16,501 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 04:03:16,502 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 04:03:16,612 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 04:03:16,614 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 04:03:16,984 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 04:03:17,099 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 04:03:17,099 INFO L309 CfgBuilder]: Removed 7 assume(true) statements. [2024-05-06 04:03:17,101 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:03:17 BoogieIcfgContainer [2024-05-06 04:03:17,101 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 04:03:17,103 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 04:03:17,103 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 04:03:17,105 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 04:03:17,106 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 04:03:16" (1/3) ... [2024-05-06 04:03:17,106 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e2ae70b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:03:17, skipping insertion in model container [2024-05-06 04:03:17,106 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:03:16" (2/3) ... [2024-05-06 04:03:17,106 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e2ae70b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:03:17, skipping insertion in model container [2024-05-06 04:03:17,107 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:03:17" (3/3) ... [2024-05-06 04:03:17,107 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-more-buffer-series2.wvr.c [2024-05-06 04:03:17,113 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 04:03:17,120 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 04:03:17,120 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 04:03:17,121 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 04:03:17,187 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-06 04:03:17,227 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 04:03:17,227 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 04:03:17,227 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:03:17,230 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 04:03:17,235 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 04:03:17,262 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 04:03:17,274 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:03:17,276 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 04:03:17,282 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@71d58907, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 04:03:17,282 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 04:03:17,846 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:17,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:03:17,970 INFO L85 PathProgramCache]: Analyzing trace with hash 673047748, now seen corresponding path program 1 times [2024-05-06 04:03:17,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:17,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,212 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:03:18,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:18,303 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:03:18,320 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 04:03:18,320 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 04:03:18,635 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:18,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:03:18,739 INFO L85 PathProgramCache]: Analyzing trace with hash 826657852, now seen corresponding path program 1 times [2024-05-06 04:03:18,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:18,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:18,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:19,099 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:19,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:19,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:19,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:19,346 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:19,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 04:03:19,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-05-06 04:03:19,681 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:19,682 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:03:19,763 INFO L85 PathProgramCache]: Analyzing trace with hash -2014448275, now seen corresponding path program 1 times [2024-05-06 04:03:19,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:19,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:19,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:20,011 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:20,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:20,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:20,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:20,209 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:03:20,211 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 04:03:20,211 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2024-05-06 04:03:20,518 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:20,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:03:20,614 INFO L85 PathProgramCache]: Analyzing trace with hash -423135107, now seen corresponding path program 1 times [2024-05-06 04:03:20,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:20,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:20,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:20,884 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:20,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:20,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:20,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:21,130 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:21,290 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:21,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:21,422 INFO L85 PathProgramCache]: Analyzing trace with hash 836134917, now seen corresponding path program 1 times [2024-05-06 04:03:21,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:21,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:21,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:21,691 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:21,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:21,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:21,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:21,967 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:03:22,171 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:22,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:22,284 INFO L85 PathProgramCache]: Analyzing trace with hash -335412153, now seen corresponding path program 2 times [2024-05-06 04:03:22,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:22,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:22,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:22,564 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:22,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:22,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:22,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:22,931 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:23,165 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:23,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:28,390 INFO L85 PathProgramCache]: Analyzing trace with hash 812672372, now seen corresponding path program 3 times [2024-05-06 04:03:28,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:28,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:28,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:28,734 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:28,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:28,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:28,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:29,054 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:29,320 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:29,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:30,004 INFO L85 PathProgramCache]: Analyzing trace with hash 1495358065, now seen corresponding path program 4 times [2024-05-06 04:03:30,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:30,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:30,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:30,305 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:03:30,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:30,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:30,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:30,582 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:03:30,783 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:30,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:30,880 INFO L85 PathProgramCache]: Analyzing trace with hash -842103801, now seen corresponding path program 5 times [2024-05-06 04:03:30,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:30,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:30,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:31,094 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:31,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:31,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:31,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:31,342 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:31,501 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:31,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:31,703 INFO L85 PathProgramCache]: Analyzing trace with hash 952203926, now seen corresponding path program 6 times [2024-05-06 04:03:31,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:31,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:31,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:31,933 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:31,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:31,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:31,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:32,194 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:32,333 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:32,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:32,413 INFO L85 PathProgramCache]: Analyzing trace with hash -546448344, now seen corresponding path program 7 times [2024-05-06 04:03:32,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:32,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:32,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:32,662 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:32,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:32,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:32,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:32,986 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-06 04:03:33,129 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:33,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:35,377 INFO L85 PathProgramCache]: Analyzing trace with hash 668403847, now seen corresponding path program 8 times [2024-05-06 04:03:35,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:35,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:35,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:35,599 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:35,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:35,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:35,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:35,868 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:36,014 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:36,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:36,090 INFO L85 PathProgramCache]: Analyzing trace with hash -996996023, now seen corresponding path program 9 times [2024-05-06 04:03:36,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:36,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:36,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:36,274 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:36,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:36,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:36,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:36,489 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:36,730 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:36,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:37,893 INFO L85 PathProgramCache]: Analyzing trace with hash -234189018, now seen corresponding path program 10 times [2024-05-06 04:03:37,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:37,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:37,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:38,155 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:03:38,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:38,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:38,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:38,338 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:03:38,485 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:38,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:38,686 INFO L85 PathProgramCache]: Analyzing trace with hash 1330076037, now seen corresponding path program 11 times [2024-05-06 04:03:38,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:38,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:38,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:38,863 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:38,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:38,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:38,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:39,085 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:39,321 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:03:39,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:03:41,861 INFO L85 PathProgramCache]: Analyzing trace with hash -1717314807, now seen corresponding path program 12 times [2024-05-06 04:03:41,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:41,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:41,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:42,109 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:42,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:42,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:42,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:42,346 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:42,481 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:42,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:42,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1381169794, now seen corresponding path program 1 times [2024-05-06 04:03:42,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:42,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:42,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:42,782 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:42,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:42,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:42,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:43,071 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:43,218 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:43,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:45,375 INFO L85 PathProgramCache]: Analyzing trace with hash -1033988851, now seen corresponding path program 2 times [2024-05-06 04:03:45,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:45,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:45,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:45,590 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:45,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:45,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:45,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:45,811 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:46,014 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:46,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:46,088 INFO L85 PathProgramCache]: Analyzing trace with hash -1988882287, now seen corresponding path program 3 times [2024-05-06 04:03:46,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:46,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:46,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:46,300 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:03:46,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:46,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:46,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:46,527 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:03:46,692 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:46,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:46,898 INFO L85 PathProgramCache]: Analyzing trace with hash 1861343600, now seen corresponding path program 4 times [2024-05-06 04:03:46,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:46,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:46,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,129 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:47,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,320 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:47,442 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:47,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:47,535 INFO L85 PathProgramCache]: Analyzing trace with hash 1756561391, now seen corresponding path program 1 times [2024-05-06 04:03:47,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:47,819 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:47,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:47,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:47,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:48,079 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:48,244 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:48,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:50,728 INFO L85 PathProgramCache]: Analyzing trace with hash -285241730, now seen corresponding path program 2 times [2024-05-06 04:03:50,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:50,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:50,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:50,916 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:50,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:50,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:50,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:51,096 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:51,270 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:51,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:51,350 INFO L85 PathProgramCache]: Analyzing trace with hash -252558016, now seen corresponding path program 3 times [2024-05-06 04:03:51,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:51,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:51,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:51,551 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:03:51,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:51,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:51,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:51,822 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:03:52,039 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:52,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:54,248 INFO L85 PathProgramCache]: Analyzing trace with hash 728481183, now seen corresponding path program 4 times [2024-05-06 04:03:54,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:54,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:54,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:54,489 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:54,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:54,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:54,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:54,678 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:54,829 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:54,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:54,927 INFO L85 PathProgramCache]: Analyzing trace with hash 1857778528, now seen corresponding path program 1 times [2024-05-06 04:03:54,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:54,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:54,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:55,106 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:55,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:55,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:55,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:55,329 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:55,562 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:55,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:55,790 INFO L85 PathProgramCache]: Analyzing trace with hash -1659240209, now seen corresponding path program 2 times [2024-05-06 04:03:55,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:55,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:55,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:55,988 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:55,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:55,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:56,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:56,181 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:03:56,340 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:56,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:56,427 INFO L85 PathProgramCache]: Analyzing trace with hash 103162095, now seen corresponding path program 3 times [2024-05-06 04:03:56,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:56,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:56,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:56,688 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:03:56,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:56,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:56,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:56,958 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:03:57,144 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:57,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:03:57,351 INFO L85 PathProgramCache]: Analyzing trace with hash -1467561778, now seen corresponding path program 4 times [2024-05-06 04:03:57,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:57,541 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:57,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:57,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:57,740 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:57,886 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:03:57,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:03:57,987 INFO L85 PathProgramCache]: Analyzing trace with hash -217166382, now seen corresponding path program 13 times [2024-05-06 04:03:57,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:57,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:58,268 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:58,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:03:58,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:03:58,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:03:58,448 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:03:58,603 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:03:58,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:04:00,851 INFO L85 PathProgramCache]: Analyzing trace with hash -60012191, now seen corresponding path program 14 times [2024-05-06 04:04:00,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:00,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:00,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,048 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:01,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,255 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:01,395 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:04:01,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:04:01,458 INFO L85 PathProgramCache]: Analyzing trace with hash -1860376899, now seen corresponding path program 15 times [2024-05-06 04:04:01,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,737 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:04:01,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:01,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:01,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:01,965 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:04:02,129 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:04:02,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:04:04,244 INFO L85 PathProgramCache]: Analyzing trace with hash -898325092, now seen corresponding path program 16 times [2024-05-06 04:04:04,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:04,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:04,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:04,422 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:04,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:04,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:04,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:04,607 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:04,921 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:04,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:21,588 WARN L293 SmtUtils]: Spent 14.16s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:04:23,598 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1~0.base_In_29 Int) (v_~q1_front~0_In_29 Int) (v_~q1~0.offset_In_29 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_29) (+ v_~q1~0.offset_In_29 (* v_~q1_front~0_In_29 4))))) (or (= .cse0 0) (< (+ .cse0 4294967295) 0) (< v_~q1_front~0_In_29 0) (< 4294967295 .cse0)))) (forall ((v_~q2~0.offset_In_9 Int) (v_~q2~0.base_In_9 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_9) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_9)) 0))) is different from false [2024-05-06 04:04:23,601 INFO L85 PathProgramCache]: Analyzing trace with hash 1813485638, now seen corresponding path program 17 times [2024-05-06 04:04:23,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:23,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:23,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:23,812 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:23,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:23,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:23,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:23,965 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:24,123 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:04:24,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:04:24,301 INFO L85 PathProgramCache]: Analyzing trace with hash -841951901, now seen corresponding path program 18 times [2024-05-06 04:04:24,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:24,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:24,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:24,445 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:24,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:24,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:24,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:24,728 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:24,994 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:24,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:27,933 INFO L85 PathProgramCache]: Analyzing trace with hash -330704128, now seen corresponding path program 19 times [2024-05-06 04:04:27,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:27,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:27,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:28,084 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:28,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:28,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:28,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:28,241 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:28,405 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:04:28,405 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:04:32,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1661892346, now seen corresponding path program 20 times [2024-05-06 04:04:32,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:32,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:32,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:32,352 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:32,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:32,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:32,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:32,502 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:32,636 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:04:32,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:04:32,731 INFO L85 PathProgramCache]: Analyzing trace with hash 20945848, now seen corresponding path program 21 times [2024-05-06 04:04:32,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:32,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:32,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:32,900 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:32,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:32,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:32,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:33,068 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:33,287 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:33,287 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:33,960 INFO L85 PathProgramCache]: Analyzing trace with hash 1524404429, now seen corresponding path program 1 times [2024-05-06 04:04:33,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:33,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:33,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:34,239 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:34,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:34,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:34,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:34,416 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:34,653 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:34,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:35,144 INFO L85 PathProgramCache]: Analyzing trace with hash -11882200, now seen corresponding path program 2 times [2024-05-06 04:04:35,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:35,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:35,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:35,314 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:35,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:35,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:35,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:35,483 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:04:35,716 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:35,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:04:36,455 INFO L85 PathProgramCache]: Analyzing trace with hash -1336298819, now seen corresponding path program 1 times [2024-05-06 04:04:36,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:36,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:36,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:36,610 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:36,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:04:36,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:04:36,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:04:36,771 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:04:36,993 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:04:36,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:11,795 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1_front~0_In_37 Int) (v_~q1~0.offset_In_37 Int)) (let ((.cse0 (select (select |c_#memory_int| c_~q1~0.base) (+ v_~q1~0.offset_In_37 (* v_~q1_front~0_In_37 4))))) (or (< 4294967295 .cse0) (= .cse0 0) (< (+ 4294967295 .cse0) 0) (< v_~q1_front~0_In_37 0)))) (forall ((v_~q2~0.base_In_14 Int) (v_~q2~0.offset_In_14 Int)) (= 0 (select (select |c_#memory_int| v_~q2~0.base_In_14) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_14))))) is different from false [2024-05-06 04:05:11,798 INFO L85 PathProgramCache]: Analyzing trace with hash 48020792, now seen corresponding path program 2 times [2024-05-06 04:05:11,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:11,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:11,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:11,965 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:05:11,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:11,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:11,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:12,132 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:05:12,371 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:12,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:13,849 INFO L85 PathProgramCache]: Analyzing trace with hash 649630455, now seen corresponding path program 1 times [2024-05-06 04:05:13,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:13,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:13,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:14,064 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:05:14,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:14,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:14,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:14,211 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:05:14,423 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:14,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:14,906 INFO L85 PathProgramCache]: Analyzing trace with hash 1910341182, now seen corresponding path program 2 times [2024-05-06 04:05:14,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:14,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:14,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:15,073 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:05:15,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:15,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:15,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:15,242 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:05:15,489 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:15,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:36,541 WARN L293 SmtUtils]: Spent 16.16s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:05:38,550 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_17 Int) (v_~q2~0.offset_In_17 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_17) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_17)) 0)) (forall ((v_~q1~0.base_In_40 Int) (v_~q1_front~0_In_40 Int) (v_~q1~0.offset_In_40 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_40) (+ (* v_~q1_front~0_In_40 4) v_~q1~0.offset_In_40)))) (or (< v_~q1_front~0_In_40 0) (= .cse0 0) (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0))))) is different from false [2024-05-06 04:05:38,553 INFO L85 PathProgramCache]: Analyzing trace with hash 20955773, now seen corresponding path program 1 times [2024-05-06 04:05:38,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:38,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:38,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:38,700 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:05:38,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:38,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:38,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:38,848 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:05:39,071 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:39,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:39,689 INFO L85 PathProgramCache]: Analyzing trace with hash -647207560, now seen corresponding path program 2 times [2024-05-06 04:05:39,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:39,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:39,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:39,850 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:05:39,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:39,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:39,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:40,083 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:05:40,312 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:40,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:05:40,911 INFO L85 PathProgramCache]: Analyzing trace with hash -1661892008, now seen corresponding path program 1 times [2024-05-06 04:05:40,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:40,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:40,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:41,066 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:05:41,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:05:41,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:05:41,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:05:41,228 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:05:41,448 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:05:41,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:12,080 WARN L293 SmtUtils]: Spent 28.08s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:06:14,086 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_20 Int) (v_~q2~0.offset_In_20 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_20) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_20)) 0)) (forall ((v_~q1_front~0_In_43 Int) (v_~q1~0.offset_In_43 Int) (v_~q1~0.base_In_43 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_43) (+ (* v_~q1_front~0_In_43 4) v_~q1~0.offset_In_43)))) (or (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0) (= .cse0 0) (< v_~q1_front~0_In_43 0))))) is different from false [2024-05-06 04:06:14,089 INFO L85 PathProgramCache]: Analyzing trace with hash -425835523, now seen corresponding path program 2 times [2024-05-06 04:06:14,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:14,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:14,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:14,351 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:06:14,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:14,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:14,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:14,538 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:06:14,813 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:14,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:20,590 INFO L85 PathProgramCache]: Analyzing trace with hash -330704097, now seen corresponding path program 1 times [2024-05-06 04:06:20,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:20,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:20,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:20,745 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:20,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:20,745 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:20,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:20,895 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:21,196 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:21,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:21,808 INFO L85 PathProgramCache]: Analyzing trace with hash 850846486, now seen corresponding path program 2 times [2024-05-06 04:06:21,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:21,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:21,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:21,970 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:06:21,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:21,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:22,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:22,161 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:06:22,387 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:22,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:44,950 WARN L293 SmtUtils]: Spent 20.10s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:06:46,953 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1~0.offset_In_46 Int) (v_~q1_front~0_In_46 Int) (v_~q1~0.base_In_46 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_46) (+ v_~q1~0.offset_In_46 (* v_~q1_front~0_In_46 4))))) (or (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0) (< v_~q1_front~0_In_46 0) (= .cse0 0)))) (forall ((v_~q2~0.base_In_23 Int) (v_~q2~0.offset_In_23 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_23) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_23)) 0))) is different from false [2024-05-06 04:06:46,955 INFO L85 PathProgramCache]: Analyzing trace with hash -841951877, now seen corresponding path program 22 times [2024-05-06 04:06:46,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:46,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:46,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:47,171 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:47,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:47,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:47,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:47,319 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:47,551 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:47,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:48,036 INFO L85 PathProgramCache]: Analyzing trace with hash 718131258, now seen corresponding path program 23 times [2024-05-06 04:06:48,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:48,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:48,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:48,205 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:06:48,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:48,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:48,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:48,367 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:06:48,556 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:06:48,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:06:50,701 INFO L85 PathProgramCache]: Analyzing trace with hash -914553377, now seen corresponding path program 24 times [2024-05-06 04:06:50,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:50,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:50,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:50,903 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:06:50,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:50,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:50,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:51,042 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:06:51,192 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:06:51,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:06:51,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1713617407, now seen corresponding path program 25 times [2024-05-06 04:06:51,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:51,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:51,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:51,421 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:06:51,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:51,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:51,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:51,556 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:06:51,776 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:51,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:06:52,358 INFO L85 PathProgramCache]: Analyzing trace with hash 395908601, now seen corresponding path program 26 times [2024-05-06 04:06:52,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:52,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:52,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:52,568 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:52,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:52,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:52,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:52,714 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:52,866 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:06:52,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:06:53,099 INFO L85 PathProgramCache]: Analyzing trace with hash 395908601, now seen corresponding path program 27 times [2024-05-06 04:06:53,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:53,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:53,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:53,236 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:06:53,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:53,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:53,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:53,373 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:06:53,507 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:06:53,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:06:53,592 INFO L85 PathProgramCache]: Analyzing trace with hash -611734235, now seen corresponding path program 28 times [2024-05-06 04:06:53,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:53,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:53,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:53,735 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:53,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:53,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:53,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:53,952 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:54,098 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:06:54,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:06:54,176 INFO L85 PathProgramCache]: Analyzing trace with hash -1783891071, now seen corresponding path program 29 times [2024-05-06 04:06:54,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:54,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:54,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:54,321 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:54,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:54,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:54,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:54,474 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:06:54,686 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:06:54,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:06:54,771 INFO L85 PathProgramCache]: Analyzing trace with hash 1034729807, now seen corresponding path program 30 times [2024-05-06 04:06:54,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:54,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:54,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:54,896 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:54,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:54,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:54,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:55,033 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:55,200 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:55,200 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:06:55,285 INFO L85 PathProgramCache]: Analyzing trace with hash 2011853975, now seen corresponding path program 31 times [2024-05-06 04:06:55,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:55,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:55,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:55,494 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:55,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:55,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:55,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:55,630 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:55,815 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:06:55,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:06:55,884 INFO L85 PathProgramCache]: Analyzing trace with hash -747645637, now seen corresponding path program 32 times [2024-05-06 04:06:55,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:55,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:55,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:56,062 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:56,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:56,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:56,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:56,214 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:56,376 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:56,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:06:56,462 INFO L85 PathProgramCache]: Analyzing trace with hash -1702177237, now seen corresponding path program 33 times [2024-05-06 04:06:56,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:56,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:56,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:56,618 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:56,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:06:56,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:06:56,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:06:56,842 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:06:57,093 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:06:57,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:03,680 WARN L293 SmtUtils]: Spent 6.02s on a formula simplification. DAG size of input: 33 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:07:03,708 INFO L85 PathProgramCache]: Analyzing trace with hash -1702177248, now seen corresponding path program 34 times [2024-05-06 04:07:03,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:03,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:03,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:03,870 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:03,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:03,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:03,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:04,037 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:04,193 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:04,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:04,280 INFO L85 PathProgramCache]: Analyzing trace with hash 590237160, now seen corresponding path program 35 times [2024-05-06 04:07:04,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:04,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:04,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:04,448 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:04,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:04,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:04,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:04,678 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:04,831 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:04,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:04,904 INFO L85 PathProgramCache]: Analyzing trace with hash 160148355, now seen corresponding path program 36 times [2024-05-06 04:07:04,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:04,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:04,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:05,083 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:05,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:05,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:05,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:05,256 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:05,448 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:05,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:05,523 INFO L85 PathProgramCache]: Analyzing trace with hash 1801945129, now seen corresponding path program 37 times [2024-05-06 04:07:05,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:05,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:05,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:05,710 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:05,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:05,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:05,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:05,900 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:06,220 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:06,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:08,892 INFO L85 PathProgramCache]: Analyzing trace with hash -751615171, now seen corresponding path program 38 times [2024-05-06 04:07:08,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:08,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:08,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:09,046 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:09,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:09,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:09,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:09,210 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:09,407 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:09,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:09,482 INFO L85 PathProgramCache]: Analyzing trace with hash -1825232791, now seen corresponding path program 39 times [2024-05-06 04:07:09,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:09,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:09,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:09,634 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:09,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:09,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:09,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:09,865 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:10,027 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:10,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:10,099 INFO L85 PathProgramCache]: Analyzing trace with hash -747640651, now seen corresponding path program 40 times [2024-05-06 04:07:10,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:10,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:10,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:10,256 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:10,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:10,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:10,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:10,410 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:10,643 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:10,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:11,140 INFO L85 PathProgramCache]: Analyzing trace with hash 739068002, now seen corresponding path program 41 times [2024-05-06 04:07:11,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:11,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:11,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:11,300 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:11,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:11,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:11,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:11,533 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:11,759 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:11,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:15,054 INFO L85 PathProgramCache]: Analyzing trace with hash 1197715345, now seen corresponding path program 1 times [2024-05-06 04:07:15,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:15,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:15,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:15,224 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:15,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:15,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:15,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:15,395 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:15,615 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:15,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:18,426 INFO L85 PathProgramCache]: Analyzing trace with hash -568332572, now seen corresponding path program 2 times [2024-05-06 04:07:18,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:18,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:18,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:18,684 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:18,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:18,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:18,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:18,868 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:19,091 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:19,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:19,700 INFO L85 PathProgramCache]: Analyzing trace with hash 315730620, now seen corresponding path program 1 times [2024-05-06 04:07:19,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:19,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:19,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:19,865 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:19,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:19,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:19,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:20,099 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:20,318 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:20,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:20,963 INFO L85 PathProgramCache]: Analyzing trace with hash -1483582439, now seen corresponding path program 2 times [2024-05-06 04:07:20,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:20,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:20,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:21,153 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:21,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:21,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:21,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:21,334 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:21,559 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:21,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:22,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1534205491, now seen corresponding path program 1 times [2024-05-06 04:07:22,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:22,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:22,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:22,607 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:22,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:22,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:22,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:22,768 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:22,990 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:22,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:23,582 INFO L85 PathProgramCache]: Analyzing trace with hash -1629038974, now seen corresponding path program 2 times [2024-05-06 04:07:23,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:23,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:23,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:23,760 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:23,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:23,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:23,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:24,019 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:24,250 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:24,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:24,686 INFO L85 PathProgramCache]: Analyzing trace with hash 1573511135, now seen corresponding path program 42 times [2024-05-06 04:07:24,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:24,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:24,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:24,851 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:24,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:24,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:24,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:25,017 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:25,245 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:25,245 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:36,402 INFO L85 PathProgramCache]: Analyzing trace with hash -837798314, now seen corresponding path program 43 times [2024-05-06 04:07:36,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:36,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:36,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:36,592 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:36,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:36,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:36,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:36,793 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:07:36,965 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:36,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:37,047 INFO L85 PathProgramCache]: Analyzing trace with hash 1574779023, now seen corresponding path program 44 times [2024-05-06 04:07:37,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:37,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:37,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:37,240 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:37,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:37,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:37,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:37,412 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:37,693 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:37,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:07:46,173 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.base_In_47 Int) (v_~q2~0.offset_In_47 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_47) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_47)) 0)) (forall ((v_~q1_front~0_In_65 Int) (v_~q1~0.offset_In_65 Int) (v_~q1~0.base_In_65 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_65) (+ (* v_~q1_front~0_In_65 4) v_~q1~0.offset_In_65)))) (or (= .cse0 0) (< (+ 4294967295 .cse0) 0) (< v_~q1_front~0_In_65 0) (< 4294967295 .cse0))))) is different from false [2024-05-06 04:07:46,175 INFO L85 PathProgramCache]: Analyzing trace with hash 1574778437, now seen corresponding path program 45 times [2024-05-06 04:07:46,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:46,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:46,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:46,343 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:46,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:46,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:46,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:46,508 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:46,703 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:46,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:46,792 INFO L85 PathProgramCache]: Analyzing trace with hash -956125557, now seen corresponding path program 46 times [2024-05-06 04:07:46,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:46,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:46,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:46,965 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:46,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:46,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:46,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:47,205 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:07:47,366 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:47,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:47,431 INFO L85 PathProgramCache]: Analyzing trace with hash -956094774, now seen corresponding path program 1 times [2024-05-06 04:07:47,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:47,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:47,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:47,601 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:47,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:47,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:47,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:47,771 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:47,943 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:47,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:48,022 INFO L85 PathProgramCache]: Analyzing trace with hash 616210637, now seen corresponding path program 2 times [2024-05-06 04:07:48,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:48,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:48,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:48,278 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:48,278 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:48,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:48,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:48,536 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:48,707 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:48,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:48,785 INFO L85 PathProgramCache]: Analyzing trace with hash 523347515, now seen corresponding path program 1 times [2024-05-06 04:07:48,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:48,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:48,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:48,957 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:48,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:48,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:48,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:49,135 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:49,290 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:49,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:49,376 INFO L85 PathProgramCache]: Analyzing trace with hash 1674965116, now seen corresponding path program 2 times [2024-05-06 04:07:49,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:49,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:49,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:49,568 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:49,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:49,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:49,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:49,834 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:50,002 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:50,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:50,076 INFO L85 PathProgramCache]: Analyzing trace with hash -1368591188, now seen corresponding path program 1 times [2024-05-06 04:07:50,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:50,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:50,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:50,248 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:50,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:50,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:50,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:50,422 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:50,578 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:50,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:50,667 INFO L85 PathProgramCache]: Analyzing trace with hash -69381845, now seen corresponding path program 2 times [2024-05-06 04:07:50,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:50,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:50,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:50,865 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:50,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:50,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:50,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:51,158 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:51,331 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:51,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:51,413 INFO L85 PathProgramCache]: Analyzing trace with hash -1706716130, now seen corresponding path program 47 times [2024-05-06 04:07:51,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:51,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:51,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:51,592 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:51,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:51,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:51,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:51,768 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:07:51,954 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:07:51,955 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:07:52,027 INFO L85 PathProgramCache]: Analyzing trace with hash 732235693, now seen corresponding path program 48 times [2024-05-06 04:07:52,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:52,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:52,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:52,239 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:52,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:52,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:52,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:52,521 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:52,685 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:52,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:07:52,763 INFO L85 PathProgramCache]: Analyzing trace with hash 1224471033, now seen corresponding path program 49 times [2024-05-06 04:07:52,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:52,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:52,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:52,962 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:52,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:52,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:52,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:53,157 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:07:53,348 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:07:53,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:07:53,448 INFO L85 PathProgramCache]: Analyzing trace with hash 50195672, now seen corresponding path program 50 times [2024-05-06 04:07:53,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:53,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:53,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:53,632 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:07:53,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:53,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:53,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:53,816 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:07:54,073 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:07:54,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:07:54,141 INFO L85 PathProgramCache]: Analyzing trace with hash -33671529, now seen corresponding path program 51 times [2024-05-06 04:07:54,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:54,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:54,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:54,288 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:07:54,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:07:54,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:07:54,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:07:54,431 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:07:54,653 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:07:54,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:03,836 INFO L85 PathProgramCache]: Analyzing trace with hash 1914833794, now seen corresponding path program 52 times [2024-05-06 04:08:03,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:03,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:03,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:04,056 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:08:04,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:04,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:04,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:04,205 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:08:04,370 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:04,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:06,552 INFO L85 PathProgramCache]: Analyzing trace with hash 416276351, now seen corresponding path program 53 times [2024-05-06 04:08:06,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:06,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:06,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:06,685 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:08:06,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:06,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:06,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:06,818 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:08:06,948 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:06,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:07,044 INFO L85 PathProgramCache]: Analyzing trace with hash 19666015, now seen corresponding path program 54 times [2024-05-06 04:08:07,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:07,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:07,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:07,195 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:07,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:07,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:07,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:07,342 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:07,586 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:07,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:07,672 INFO L85 PathProgramCache]: Analyzing trace with hash -1407330097, now seen corresponding path program 55 times [2024-05-06 04:08:07,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:07,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:07,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:07,824 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:07,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:07,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:07,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:07,967 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:08,119 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:08,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:10,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1700830794, now seen corresponding path program 56 times [2024-05-06 04:08:10,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:10,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:10,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:10,456 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:08:10,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:10,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:10,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:10,614 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:08:10,757 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:10,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:10,846 INFO L85 PathProgramCache]: Analyzing trace with hash 1186148084, now seen corresponding path program 57 times [2024-05-06 04:08:10,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:10,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:10,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:11,121 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:11,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:11,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:11,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:11,275 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:11,438 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:11,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:11,518 INFO L85 PathProgramCache]: Analyzing trace with hash -1884114049, now seen corresponding path program 58 times [2024-05-06 04:08:11,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:11,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:11,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:11,675 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:11,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:11,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:11,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:11,835 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:11,999 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:11,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:12,093 INFO L85 PathProgramCache]: Analyzing trace with hash -1833594952, now seen corresponding path program 59 times [2024-05-06 04:08:12,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:12,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:12,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:12,269 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:12,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:12,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:12,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:12,523 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:12,688 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:12,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:12,767 INFO L85 PathProgramCache]: Analyzing trace with hash 1186148073, now seen corresponding path program 60 times [2024-05-06 04:08:12,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:12,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:12,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:12,920 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:12,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:12,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:12,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:13,069 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:13,289 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:13,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:13,841 INFO L85 PathProgramCache]: Analyzing trace with hash 1276912582, now seen corresponding path program 61 times [2024-05-06 04:08:13,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:13,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:13,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:13,997 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:13,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:13,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:14,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:14,220 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:14,374 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:14,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:14,625 INFO L85 PathProgramCache]: Analyzing trace with hash 929585408, now seen corresponding path program 62 times [2024-05-06 04:08:14,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:14,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:14,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:14,784 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:08:14,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:14,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:14,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:14,940 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:08:15,079 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:15,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:15,171 INFO L85 PathProgramCache]: Analyzing trace with hash -1247622402, now seen corresponding path program 63 times [2024-05-06 04:08:15,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:15,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:15,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:15,339 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:15,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:15,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:15,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:15,572 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:08:15,800 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:15,800 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:16,334 INFO L85 PathProgramCache]: Analyzing trace with hash -669210760, now seen corresponding path program 64 times [2024-05-06 04:08:16,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:16,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:16,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:16,502 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:16,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:16,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:16,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:16,670 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:16,837 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:16,837 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:16,905 INFO L85 PathProgramCache]: Analyzing trace with hash 729303950, now seen corresponding path program 65 times [2024-05-06 04:08:16,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:16,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:16,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:17,070 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:17,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:17,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:17,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:17,307 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:17,458 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:17,459 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:19,611 INFO L85 PathProgramCache]: Analyzing trace with hash 729303950, now seen corresponding path program 66 times [2024-05-06 04:08:19,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:19,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:19,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:19,774 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:08:19,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:19,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:19,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:19,945 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:08:20,089 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:20,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:20,161 INFO L85 PathProgramCache]: Analyzing trace with hash 1133586992, now seen corresponding path program 67 times [2024-05-06 04:08:20,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:20,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:20,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:20,340 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:20,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:20,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:20,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:20,603 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:20,784 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:20,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:20,869 INFO L85 PathProgramCache]: Analyzing trace with hash 1133586992, now seen corresponding path program 68 times [2024-05-06 04:08:20,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:20,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:20,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:21,048 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:21,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:21,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:21,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:21,247 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:21,433 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:21,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:21,514 INFO L85 PathProgramCache]: Analyzing trace with hash 781459408, now seen corresponding path program 69 times [2024-05-06 04:08:21,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:21,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:21,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:21,710 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:21,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:21,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:21,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:21,900 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:22,161 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:22,162 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:22,432 INFO L85 PathProgramCache]: Analyzing trace with hash -2129074981, now seen corresponding path program 70 times [2024-05-06 04:08:22,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:22,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:22,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:22,635 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:08:22,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:22,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:22,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:22,841 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:08:22,978 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:22,978 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:23,065 INFO L85 PathProgramCache]: Analyzing trace with hash -1576813949, now seen corresponding path program 71 times [2024-05-06 04:08:23,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:23,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:23,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:23,265 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:08:23,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:23,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:23,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:23,466 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 04:08:23,696 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:23,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:23,774 INFO L85 PathProgramCache]: Analyzing trace with hash 1347503638, now seen corresponding path program 72 times [2024-05-06 04:08:23,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:23,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:23,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:23,977 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:23,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:23,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:24,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:24,168 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:24,328 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:24,329 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:24,533 INFO L85 PathProgramCache]: Analyzing trace with hash -2034742174, now seen corresponding path program 73 times [2024-05-06 04:08:24,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:24,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:24,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:24,726 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:24,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:24,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:24,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:24,923 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:08:25,232 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:25,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:26,018 INFO L85 PathProgramCache]: Analyzing trace with hash 1133604853, now seen corresponding path program 3 times [2024-05-06 04:08:26,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:26,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:26,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:26,195 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:26,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:26,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:26,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:26,365 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:26,528 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:26,528 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:26,787 INFO L85 PathProgramCache]: Analyzing trace with hash 782013105, now seen corresponding path program 4 times [2024-05-06 04:08:26,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:26,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:26,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:26,957 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:08:26,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:26,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:26,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:27,209 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:08:27,344 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:27,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:27,421 INFO L85 PathProgramCache]: Analyzing trace with hash -1527396499, now seen corresponding path program 5 times [2024-05-06 04:08:27,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:27,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:27,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:27,595 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:27,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:27,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:27,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:27,769 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:08:28,012 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:28,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:28,796 INFO L85 PathProgramCache]: Analyzing trace with hash 1469462794, now seen corresponding path program 1 times [2024-05-06 04:08:28,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:28,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:28,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:29,081 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:08:29,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:29,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:29,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:29,305 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:08:29,315 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:08:29,316 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:08:29,316 INFO L85 PathProgramCache]: Analyzing trace with hash -6519584, now seen corresponding path program 1 times [2024-05-06 04:08:29,319 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:08:29,319 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467364663] [2024-05-06 04:08:29,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:29,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:29,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:29,574 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 55 proven. 52 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:08:29,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:08:29,575 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467364663] [2024-05-06 04:08:29,575 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1467364663] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:08:29,575 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [343449128] [2024-05-06 04:08:29,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:29,575 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:08:29,575 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:08:29,609 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:08:29,610 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 04:08:30,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:30,022 INFO L262 TraceCheckSpWp]: Trace formula consists of 759 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-06 04:08:30,032 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:08:30,235 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 55 proven. 1 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-05-06 04:08:30,235 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 04:08:30,494 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 53 proven. 3 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-05-06 04:08:30,494 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [343449128] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 04:08:30,494 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 04:08:30,495 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 19 [2024-05-06 04:08:30,496 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [593414103] [2024-05-06 04:08:30,496 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 04:08:30,499 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-05-06 04:08:30,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:08:30,501 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-05-06 04:08:30,501 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2024-05-06 04:08:30,502 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:08:30,502 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:08:30,503 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 16.57894736842105) internal successors, (315), 19 states have internal predecessors, (315), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:08:30,503 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:08:31,043 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:31,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:31,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1837031506, now seen corresponding path program 2 times [2024-05-06 04:08:31,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:31,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:31,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:31,538 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:08:31,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:31,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:31,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:31,819 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:08:31,820 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-06 04:08:31,820 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=1293, Unknown=6, NotChecked=462, Total=1892 [2024-05-06 04:08:32,172 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:32,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:32,386 INFO L85 PathProgramCache]: Analyzing trace with hash -386033840, now seen corresponding path program 1 times [2024-05-06 04:08:32,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:32,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:32,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:32,536 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:08:32,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:32,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:32,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:32,682 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:08:32,852 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:32,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:32,938 INFO L85 PathProgramCache]: Analyzing trace with hash 917853870, now seen corresponding path program 2 times [2024-05-06 04:08:32,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:32,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:32,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:33,089 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:08:33,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:33,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:33,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:33,237 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:08:33,529 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:33,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:08:33,629 INFO L85 PathProgramCache]: Analyzing trace with hash -181971108, now seen corresponding path program 3 times [2024-05-06 04:08:33,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:33,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:33,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:33,822 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:08:33,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:33,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:33,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:33,998 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:08:34,142 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:34,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:34,240 INFO L85 PathProgramCache]: Analyzing trace with hash 2028299172, now seen corresponding path program 4 times [2024-05-06 04:08:34,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:34,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:34,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:34,398 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:08:34,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:34,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:34,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:34,561 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:08:34,726 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:34,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:34,810 INFO L85 PathProgramCache]: Analyzing trace with hash 33806984, now seen corresponding path program 5 times [2024-05-06 04:08:34,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:34,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:34,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:35,149 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:08:35,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:35,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:35,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:35,463 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:08:35,725 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:35,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:36,367 INFO L85 PathProgramCache]: Analyzing trace with hash 587084819, now seen corresponding path program 6 times [2024-05-06 04:08:36,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:36,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:36,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:36,576 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:36,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:36,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:36,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:36,792 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:37,036 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:37,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:37,562 INFO L85 PathProgramCache]: Analyzing trace with hash 1373382706, now seen corresponding path program 7 times [2024-05-06 04:08:37,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:37,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:37,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:37,862 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:37,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:37,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:37,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:38,064 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:38,231 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:38,231 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:38,302 INFO L85 PathProgramCache]: Analyzing trace with hash -553098842, now seen corresponding path program 8 times [2024-05-06 04:08:38,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:38,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:38,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:38,537 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:08:38,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:38,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:38,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:38,776 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:08:38,953 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:38,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:41,123 INFO L85 PathProgramCache]: Analyzing trace with hash 726616373, now seen corresponding path program 9 times [2024-05-06 04:08:41,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:41,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:41,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:41,329 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:41,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:41,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:41,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:41,660 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:41,797 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:41,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:41,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1050272105, now seen corresponding path program 10 times [2024-05-06 04:08:41,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:41,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:41,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:42,081 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:42,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:42,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:42,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:42,265 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:42,441 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:42,442 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:42,707 INFO L85 PathProgramCache]: Analyzing trace with hash 546428488, now seen corresponding path program 11 times [2024-05-06 04:08:42,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:42,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:42,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:42,881 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:42,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:42,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:42,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:43,072 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:43,207 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:43,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:43,384 INFO L85 PathProgramCache]: Analyzing trace with hash -572031286, now seen corresponding path program 12 times [2024-05-06 04:08:43,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:43,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:43,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:43,664 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:08:43,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:43,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:43,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:43,871 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:08:44,085 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:44,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:47,199 INFO L85 PathProgramCache]: Analyzing trace with hash -1896883929, now seen corresponding path program 13 times [2024-05-06 04:08:47,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:47,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:47,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:47,373 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:47,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:47,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:47,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:47,543 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:47,742 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:47,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:47,945 INFO L85 PathProgramCache]: Analyzing trace with hash 1326141348, now seen corresponding path program 14 times [2024-05-06 04:08:47,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:47,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:47,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:48,246 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:48,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:48,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:48,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:48,414 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:48,635 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:08:48,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:08:51,241 INFO L85 PathProgramCache]: Analyzing trace with hash -1839290166, now seen corresponding path program 15 times [2024-05-06 04:08:51,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:51,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:51,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:51,455 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:51,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:51,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:51,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:51,667 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:51,810 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:51,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:51,887 INFO L85 PathProgramCache]: Analyzing trace with hash -522026433, now seen corresponding path program 1 times [2024-05-06 04:08:51,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:51,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:51,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:52,196 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:52,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:52,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:52,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:52,411 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:52,580 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:52,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:52,810 INFO L85 PathProgramCache]: Analyzing trace with hash -571490098, now seen corresponding path program 2 times [2024-05-06 04:08:52,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:52,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:52,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:53,005 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:53,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:53,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:53,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:53,206 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:53,336 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:53,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:53,440 INFO L85 PathProgramCache]: Analyzing trace with hash -536322832, now seen corresponding path program 3 times [2024-05-06 04:08:53,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:53,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:53,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:53,642 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:53,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:53,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:53,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:53,930 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:54,085 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:54,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:54,310 INFO L85 PathProgramCache]: Analyzing trace with hash -685691569, now seen corresponding path program 4 times [2024-05-06 04:08:54,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:54,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:54,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:54,504 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:54,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:54,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:54,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:54,698 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:54,841 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:54,841 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:54,931 INFO L85 PathProgramCache]: Analyzing trace with hash -1402312946, now seen corresponding path program 1 times [2024-05-06 04:08:54,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:54,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:54,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:55,176 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:55,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:55,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:55,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:55,414 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:55,569 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:55,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:55,770 INFO L85 PathProgramCache]: Analyzing trace with hash 145319581, now seen corresponding path program 2 times [2024-05-06 04:08:55,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:55,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:55,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:56,071 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:56,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:56,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:56,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:56,275 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:56,416 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:56,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:56,497 INFO L85 PathProgramCache]: Analyzing trace with hash 209940737, now seen corresponding path program 3 times [2024-05-06 04:08:56,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:56,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:56,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:56,702 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:56,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:56,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:56,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:56,899 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:08:57,062 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:57,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:08:57,272 INFO L85 PathProgramCache]: Analyzing trace with hash -1708985888, now seen corresponding path program 4 times [2024-05-06 04:08:57,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:57,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:57,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:57,458 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:57,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:57,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:57,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:57,736 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:57,897 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:08:57,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:08:57,993 INFO L85 PathProgramCache]: Analyzing trace with hash -1292161951, now seen corresponding path program 1 times [2024-05-06 04:08:57,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:57,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:58,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:58,223 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:58,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:08:58,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:08:58,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:08:58,437 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:08:58,597 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:08:58,597 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:09:00,755 INFO L85 PathProgramCache]: Analyzing trace with hash 987048176, now seen corresponding path program 2 times [2024-05-06 04:09:00,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:00,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:00,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:00,969 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:09:00,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:00,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:00,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:01,165 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:09:01,302 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:09:01,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:09:01,397 INFO L85 PathProgramCache]: Analyzing trace with hash 533723406, now seen corresponding path program 3 times [2024-05-06 04:09:01,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:01,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:01,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:01,692 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:09:01,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:01,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:01,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:01,891 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:09:02,052 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:09:02,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:09:02,277 INFO L85 PathProgramCache]: Analyzing trace with hash -437811091, now seen corresponding path program 4 times [2024-05-06 04:09:02,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:02,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:02,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:02,470 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:02,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:02,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:02,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:02,671 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:02,811 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:09:02,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:09:02,899 INFO L85 PathProgramCache]: Analyzing trace with hash 2036527281, now seen corresponding path program 16 times [2024-05-06 04:09:02,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:02,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:02,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:03,124 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:03,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:03,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:03,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:03,432 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:03,605 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:09:03,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:09:03,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1687919936, now seen corresponding path program 17 times [2024-05-06 04:09:03,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:03,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:03,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:03,997 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:09:03,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:03,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:04,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:04,190 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:09:04,341 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:09:04,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:09:04,419 INFO L85 PathProgramCache]: Analyzing trace with hash 785911486, now seen corresponding path program 18 times [2024-05-06 04:09:04,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:04,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:04,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:04,626 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:09:04,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:04,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:04,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:04,829 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:09:04,988 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:09:04,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:09:07,149 INFO L85 PathProgramCache]: Analyzing trace with hash 104723997, now seen corresponding path program 19 times [2024-05-06 04:09:07,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:07,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:07,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:07,437 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:07,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:07,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:07,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:07,635 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:07,879 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:07,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:10,800 INFO L85 PathProgramCache]: Analyzing trace with hash 1228453639, now seen corresponding path program 20 times [2024-05-06 04:09:10,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:10,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:10,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:11,024 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:11,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:11,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:11,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:11,229 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:11,384 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:09:11,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:09:13,530 INFO L85 PathProgramCache]: Analyzing trace with hash -552946942, now seen corresponding path program 21 times [2024-05-06 04:09:13,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:13,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:13,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:13,792 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:13,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:13,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:13,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:13,961 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:14,188 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:14,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:14,692 INFO L85 PathProgramCache]: Analyzing trace with hash 38515009, now seen corresponding path program 22 times [2024-05-06 04:09:14,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:14,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:14,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:14,905 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:14,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:14,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:14,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:15,122 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:15,285 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:09:15,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:09:17,388 INFO L85 PathProgramCache]: Analyzing trace with hash 1193966309, now seen corresponding path program 23 times [2024-05-06 04:09:17,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:17,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:17,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:17,565 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:17,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:17,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:17,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:17,829 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 4 proven. 8 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:17,974 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:09:17,974 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:09:18,060 INFO L85 PathProgramCache]: Analyzing trace with hash -1641749063, now seen corresponding path program 24 times [2024-05-06 04:09:18,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:18,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:18,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:18,276 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:18,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:18,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:18,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:18,479 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:18,710 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:18,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:19,650 INFO L85 PathProgramCache]: Analyzing trace with hash 2038135596, now seen corresponding path program 1 times [2024-05-06 04:09:19,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:19,651 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:19,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:19,859 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:19,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:19,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:19,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:20,156 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:20,385 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:20,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:21,128 INFO L85 PathProgramCache]: Analyzing trace with hash 991166889, now seen corresponding path program 2 times [2024-05-06 04:09:21,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:21,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:21,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:21,382 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:21,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:21,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:21,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:21,611 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:21,852 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:21,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:22,369 INFO L85 PathProgramCache]: Analyzing trace with hash -1458274178, now seen corresponding path program 1 times [2024-05-06 04:09:22,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:22,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:22,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:22,667 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:22,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:22,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:22,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:22,876 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:23,104 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:23,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:25,608 INFO L85 PathProgramCache]: Analyzing trace with hash 911661207, now seen corresponding path program 2 times [2024-05-06 04:09:25,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:25,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:25,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:25,841 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:25,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:25,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:25,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:26,100 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:26,333 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:26,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:29,059 INFO L85 PathProgramCache]: Analyzing trace with hash 645695766, now seen corresponding path program 1 times [2024-05-06 04:09:29,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:29,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:29,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:29,261 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:29,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:29,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:29,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:29,468 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:29,698 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:29,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:30,275 INFO L85 PathProgramCache]: Analyzing trace with hash -1525482753, now seen corresponding path program 2 times [2024-05-06 04:09:30,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:30,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:30,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:30,495 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:30,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:30,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:30,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:30,722 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:30,952 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:30,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:31,573 INFO L85 PathProgramCache]: Analyzing trace with hash -1641739138, now seen corresponding path program 1 times [2024-05-06 04:09:31,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:31,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:31,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:31,770 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:31,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:31,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:31,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:31,978 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:32,209 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:32,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:32,852 INFO L85 PathProgramCache]: Analyzing trace with hash 488885399, now seen corresponding path program 2 times [2024-05-06 04:09:32,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:32,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:32,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:33,076 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:33,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:33,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:33,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:33,385 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:33,605 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:33,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:36,175 INFO L85 PathProgramCache]: Analyzing trace with hash 1193966647, now seen corresponding path program 1 times [2024-05-06 04:09:36,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:36,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:36,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:36,371 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:36,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:36,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:36,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:36,566 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:36,788 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:36,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:41,795 INFO L85 PathProgramCache]: Analyzing trace with hash 719191294, now seen corresponding path program 2 times [2024-05-06 04:09:41,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:41,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:41,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:42,021 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:42,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:42,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:42,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:42,328 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:42,549 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:42,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:43,106 INFO L85 PathProgramCache]: Analyzing trace with hash 38515040, now seen corresponding path program 1 times [2024-05-06 04:09:43,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:43,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:43,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:43,313 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:43,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:43,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:43,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:43,510 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:43,743 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:43,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:48,855 INFO L85 PathProgramCache]: Analyzing trace with hash -1190427147, now seen corresponding path program 2 times [2024-05-06 04:09:48,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:48,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:48,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:49,098 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:49,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:49,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:49,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:49,333 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:49,562 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:49,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:56,555 INFO L85 PathProgramCache]: Analyzing trace with hash -552946918, now seen corresponding path program 25 times [2024-05-06 04:09:56,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:56,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:56,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:56,768 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:56,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:56,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:56,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:57,056 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2024-05-06 04:09:57,287 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:09:57,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:09:57,797 INFO L85 PathProgramCache]: Analyzing trace with hash -1980115589, now seen corresponding path program 26 times [2024-05-06 04:09:57,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:57,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:57,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:58,026 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:58,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:09:58,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:09:58,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:09:58,252 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-05-06 04:09:58,420 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:09:58,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:10:00,661 INFO L85 PathProgramCache]: Analyzing trace with hash -866564418, now seen corresponding path program 27 times [2024-05-06 04:10:00,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:00,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:00,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:00,859 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:10:00,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:00,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:00,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:01,018 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:10:01,019 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 04:10:01,019 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=1917, Unknown=6, NotChecked=558, Total=2652 [2024-05-06 04:10:01,403 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:10:01,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:10:01,666 INFO L85 PathProgramCache]: Analyzing trace with hash -386033840, now seen corresponding path program 28 times [2024-05-06 04:10:01,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:01,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:01,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:01,808 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:10:01,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:01,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:01,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:01,945 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:10:02,146 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:10:02,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:10:02,210 INFO L85 PathProgramCache]: Analyzing trace with hash 917853870, now seen corresponding path program 29 times [2024-05-06 04:10:02,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:02,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:02,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:02,348 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:10:02,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:02,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:02,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:02,471 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:10:02,693 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:02,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:10:02,843 INFO L85 PathProgramCache]: Analyzing trace with hash -181971108, now seen corresponding path program 30 times [2024-05-06 04:10:02,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:02,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:02,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:02,987 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:10:02,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:02,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:03,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:03,117 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:10:03,295 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:10:03,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:10:03,361 INFO L85 PathProgramCache]: Analyzing trace with hash 2028299172, now seen corresponding path program 31 times [2024-05-06 04:10:03,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:03,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:03,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:03,604 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:10:03,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:03,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:03,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:03,756 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:10:04,202 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:04,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:10:09,333 INFO L85 PathProgramCache]: Analyzing trace with hash -965475226, now seen corresponding path program 32 times [2024-05-06 04:10:09,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:09,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:09,502 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:09,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:09,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:09,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:09,668 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:10,004 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:10:10,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:10:10,062 INFO L85 PathProgramCache]: Analyzing trace with hash -108723298, now seen corresponding path program 33 times [2024-05-06 04:10:10,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:10,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:10,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:10,328 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:10,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:10,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:10,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:10,496 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:10,696 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:10,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:10:10,814 INFO L85 PathProgramCache]: Analyzing trace with hash 777792133, now seen corresponding path program 34 times [2024-05-06 04:10:10,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:10,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:10,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:11,003 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:10:11,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:11,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:11,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:11,184 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:10:11,424 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:11,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:10:11,551 INFO L85 PathProgramCache]: Analyzing trace with hash -471697620, now seen corresponding path program 35 times [2024-05-06 04:10:11,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:11,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:11,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:11,722 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:11,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:11,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:11,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:11,894 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:12,242 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:12,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:10:12,824 INFO L85 PathProgramCache]: Analyzing trace with hash -569127592, now seen corresponding path program 36 times [2024-05-06 04:10:12,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:12,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:12,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:12,994 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:12,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:12,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:13,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:13,170 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:13,488 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:10:13,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:10:13,552 INFO L85 PathProgramCache]: Analyzing trace with hash -1470736368, now seen corresponding path program 37 times [2024-05-06 04:10:13,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:13,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:13,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:13,742 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:13,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:13,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:13,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:13,934 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:10:14,236 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:14,236 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:10:17,127 INFO L85 PathProgramCache]: Analyzing trace with hash -903052571, now seen corresponding path program 3 times [2024-05-06 04:10:17,127 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:17,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:17,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:17,345 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:10:17,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:17,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:17,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:17,555 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:10:17,872 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:17,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:10:34,822 WARN L293 SmtUtils]: Spent 14.40s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:10:36,832 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q1_front~0_In_149 Int) (v_~q1~0.offset_In_146 Int) (v_~q1~0.base_In_146 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_146) (+ v_~q1~0.offset_In_146 (* v_~q1_front~0_In_149 4))))) (or (< v_~q1_front~0_In_149 0) (= .cse0 0) (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0)))) (forall ((v_~q2~0.offset_In_100 Int) (v_~q2~0.base_In_100 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_100) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_100)) 0))) is different from false [2024-05-06 04:10:36,834 INFO L85 PathProgramCache]: Analyzing trace with hash -197831528, now seen corresponding path program 4 times [2024-05-06 04:10:36,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:36,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:36,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:37,047 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:10:37,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:37,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:37,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:37,360 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:10:37,648 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:37,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:10:55,538 WARN L293 SmtUtils]: Spent 6.17s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:10:57,547 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.offset_In_101 Int) (v_~q2~0.base_In_101 Int)) (= 0 (select (select |c_#memory_int| v_~q2~0.base_In_101) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_101)))) (forall ((v_~q1~0.offset_In_147 Int) (v_~q1_front~0_In_150 Int) (v_~q1~0.base_In_147 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_147) (+ v_~q1~0.offset_In_147 (* v_~q1_front~0_In_150 4))))) (or (< (+ .cse0 4294967295) 0) (< 4294967295 .cse0) (= .cse0 0) (< v_~q1_front~0_In_150 0))))) is different from false [2024-05-06 04:10:57,549 INFO L85 PathProgramCache]: Analyzing trace with hash -961025527, now seen corresponding path program 3 times [2024-05-06 04:10:57,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:57,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:57,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:57,769 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:10:57,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:10:57,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:10:57,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:10:57,999 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:10:58,351 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:10:58,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:04,885 WARN L293 SmtUtils]: Spent 6.08s on a formula simplification. DAG size of input: 33 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:11:04,918 INFO L85 PathProgramCache]: Analyzing trace with hash -1807491084, now seen corresponding path program 4 times [2024-05-06 04:11:04,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:04,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:04,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:05,142 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:05,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:05,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:05,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:05,362 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:05,638 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:05,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:11,092 INFO L85 PathProgramCache]: Analyzing trace with hash -1616844401, now seen corresponding path program 3 times [2024-05-06 04:11:11,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:11,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:11,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:11,387 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:11,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:11,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:11,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:11,599 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:11,858 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:11,858 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:18,181 INFO L85 PathProgramCache]: Analyzing trace with hash 80248366, now seen corresponding path program 4 times [2024-05-06 04:11:18,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:18,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:18,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:18,395 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:18,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:18,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:18,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:18,616 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:18,974 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:18,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:19,961 INFO L85 PathProgramCache]: Analyzing trace with hash -211853239, now seen corresponding path program 3 times [2024-05-06 04:11:19,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:19,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:19,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:20,183 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:20,184 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:20,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:20,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:20,405 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:20,682 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:20,682 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:21,734 INFO L85 PathProgramCache]: Analyzing trace with hash 1249513908, now seen corresponding path program 4 times [2024-05-06 04:11:21,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:21,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:21,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:22,034 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:22,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:22,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:22,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:22,249 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:22,528 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:22,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:23,134 INFO L85 PathProgramCache]: Analyzing trace with hash -1798622736, now seen corresponding path program 3 times [2024-05-06 04:11:23,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:23,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:23,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:23,341 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:23,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:23,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:23,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:23,549 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:23,827 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:23,827 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:33,969 INFO L85 PathProgramCache]: Analyzing trace with hash -98240147, now seen corresponding path program 4 times [2024-05-06 04:11:33,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:33,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:34,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:34,181 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:34,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:34,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:34,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:34,395 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:34,672 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:34,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:35,308 INFO L85 PathProgramCache]: Analyzing trace with hash 91700843, now seen corresponding path program 3 times [2024-05-06 04:11:35,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:35,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:35,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:35,606 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:35,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:35,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:35,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:35,825 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:36,123 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:36,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:45,515 INFO L85 PathProgramCache]: Analyzing trace with hash 135378642, now seen corresponding path program 4 times [2024-05-06 04:11:45,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:45,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:45,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:45,729 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:45,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:45,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:45,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:46,035 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:46,325 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:46,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:11:47,095 INFO L85 PathProgramCache]: Analyzing trace with hash 1263828243, now seen corresponding path program 38 times [2024-05-06 04:11:47,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:47,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:47,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:47,325 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:47,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:11:47,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:11:47,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:11:47,575 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:11:47,870 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:11:47,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:08,561 WARN L293 SmtUtils]: Spent 18.14s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:12:10,566 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.offset_In_112 Int) (v_~q2~0.base_In_112 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_112) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_112)) 0)) (forall ((v_~q1~0.offset_In_158 Int) (v_~q1_front~0_In_161 Int) (v_~q1~0.base_In_158 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_158) (+ v_~q1~0.offset_In_158 (* v_~q1_front~0_In_161 4))))) (or (= .cse0 0) (< 4294967295 .cse0) (< (+ .cse0 4294967295) 0) (< v_~q1_front~0_In_161 0))))) is different from false [2024-05-06 04:12:10,567 INFO L85 PathProgramCache]: Analyzing trace with hash 1251293482, now seen corresponding path program 39 times [2024-05-06 04:12:10,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:10,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:10,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:10,877 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:12:10,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:10,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:10,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:11,089 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:12:11,261 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:11,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:11,322 INFO L85 PathProgramCache]: Analyzing trace with hash 421155041, now seen corresponding path program 40 times [2024-05-06 04:12:11,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:11,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:11,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:11,544 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:11,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:11,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:11,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:11,749 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:12,270 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:12:12,270 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:12:12,500 INFO L85 PathProgramCache]: Analyzing trace with hash 317458038, now seen corresponding path program 41 times [2024-05-06 04:12:12,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:12,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:12,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:12,791 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:12,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:12,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:12,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:13,017 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:13,182 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:13,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:13,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1251265608, now seen corresponding path program 42 times [2024-05-06 04:12:13,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:13,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:13,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:13,435 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:13,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:13,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:13,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:13,660 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:13,927 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:13,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:15,756 INFO L85 PathProgramCache]: Analyzing trace with hash 1250463790, now seen corresponding path program 43 times [2024-05-06 04:12:15,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:15,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:15,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:16,056 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:16,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:16,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:16,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:16,262 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:16,426 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:16,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:16,492 INFO L85 PathProgramCache]: Analyzing trace with hash -1205274663, now seen corresponding path program 44 times [2024-05-06 04:12:16,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:16,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:16,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:16,716 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:16,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:16,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:16,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:16,936 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:12:17,280 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:17,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:17,335 INFO L85 PathProgramCache]: Analyzing trace with hash 986685102, now seen corresponding path program 45 times [2024-05-06 04:12:17,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:17,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:17,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:17,645 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:12:17,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:17,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:17,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:17,883 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:12:18,158 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:18,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:18,785 INFO L85 PathProgramCache]: Analyzing trace with hash -419283222, now seen corresponding path program 46 times [2024-05-06 04:12:18,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:18,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:18,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:19,025 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:19,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:19,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:19,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:19,252 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:19,528 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:12:19,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:12:21,702 INFO L85 PathProgramCache]: Analyzing trace with hash -419283222, now seen corresponding path program 47 times [2024-05-06 04:12:21,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:21,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:21,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:21,940 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:21,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:21,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:21,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:22,179 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:22,345 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:22,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:22,405 INFO L85 PathProgramCache]: Analyzing trace with hash -112876972, now seen corresponding path program 48 times [2024-05-06 04:12:22,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:22,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:22,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:22,660 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:22,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:22,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:22,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:22,902 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:23,149 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:23,149 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:23,213 INFO L85 PathProgramCache]: Analyzing trace with hash 795782194, now seen corresponding path program 49 times [2024-05-06 04:12:23,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:23,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:23,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:23,465 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:23,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:23,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:23,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:23,698 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:23,872 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:23,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:23,933 INFO L85 PathProgramCache]: Analyzing trace with hash 955381970, now seen corresponding path program 5 times [2024-05-06 04:12:23,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:23,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:23,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:24,174 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:24,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:24,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:24,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:24,414 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:24,999 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:12:24,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:12:27,112 INFO L85 PathProgramCache]: Analyzing trace with hash 795823847, now seen corresponding path program 6 times [2024-05-06 04:12:27,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:27,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:27,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:27,362 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:27,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:27,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:27,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:27,631 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:27,802 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:27,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:27,862 INFO L85 PathProgramCache]: Analyzing trace with hash -1099263497, now seen corresponding path program 7 times [2024-05-06 04:12:27,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:27,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:27,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:28,134 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:28,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:28,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:28,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:28,479 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:28,677 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:12:28,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:12:30,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1426783734, now seen corresponding path program 5 times [2024-05-06 04:12:30,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:30,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:30,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:31,054 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:31,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:31,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:31,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:31,308 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:31,488 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:31,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:31,549 INFO L85 PathProgramCache]: Analyzing trace with hash 1280623816, now seen corresponding path program 6 times [2024-05-06 04:12:31,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:31,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:31,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:31,827 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:31,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:31,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:31,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:32,160 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:32,330 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:32,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:32,387 INFO L85 PathProgramCache]: Analyzing trace with hash 144501233, now seen corresponding path program 7 times [2024-05-06 04:12:32,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:32,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:32,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:32,617 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:32,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:32,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:32,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:32,844 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:33,396 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:12:33,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:12:35,632 INFO L85 PathProgramCache]: Analyzing trace with hash -460675271, now seen corresponding path program 5 times [2024-05-06 04:12:35,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:35,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:35,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:35,973 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:35,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:35,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:36,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:36,209 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:36,377 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:36,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:36,443 INFO L85 PathProgramCache]: Analyzing trace with hash -1396030491, now seen corresponding path program 6 times [2024-05-06 04:12:36,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:36,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:36,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:36,700 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:36,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:36,701 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:36,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:36,977 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:37,153 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:37,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:37,221 INFO L85 PathProgramCache]: Analyzing trace with hash 258738164, now seen corresponding path program 7 times [2024-05-06 04:12:37,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:37,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:37,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:37,548 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:37,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:37,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:37,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:37,821 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:38,339 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:12:38,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:12:38,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1448213337, now seen corresponding path program 50 times [2024-05-06 04:12:38,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:38,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:38,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:38,884 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:38,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:38,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:38,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:39,149 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:39,403 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:39,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:39,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1944941509, now seen corresponding path program 51 times [2024-05-06 04:12:39,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:39,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:39,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:39,716 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:39,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:39,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:39,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:39,968 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:12:40,144 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:12:40,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:12:40,206 INFO L85 PathProgramCache]: Analyzing trace with hash -1120279532, now seen corresponding path program 52 times [2024-05-06 04:12:40,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:40,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:40,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:40,462 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:40,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:40,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:40,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:40,788 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:12:41,404 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:41,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:42,146 INFO L85 PathProgramCache]: Analyzing trace with hash 115564086, now seen corresponding path program 5 times [2024-05-06 04:12:42,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:42,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:42,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:42,398 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:12:42,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:42,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:42,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:42,638 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:12:42,937 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:42,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:44,796 INFO L85 PathProgramCache]: Analyzing trace with hash 419375766, now seen corresponding path program 5 times [2024-05-06 04:12:44,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:44,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:44,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:45,030 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:12:45,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:45,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:45,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:45,293 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:12:45,582 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:45,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:55,877 WARN L293 SmtUtils]: Spent 9.69s on a formula simplification. DAG size of input: 33 DAG size of output: 14 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:12:55,908 INFO L85 PathProgramCache]: Analyzing trace with hash -402106548, now seen corresponding path program 5 times [2024-05-06 04:12:55,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:55,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:55,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:56,226 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:12:56,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:56,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:56,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:56,451 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:12:56,723 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:56,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:12:57,784 INFO L85 PathProgramCache]: Analyzing trace with hash -982803242, now seen corresponding path program 5 times [2024-05-06 04:12:57,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:57,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:57,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:58,015 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:12:58,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:12:58,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:12:58,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:12:58,303 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:12:58,579 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:12:58,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:03,740 INFO L85 PathProgramCache]: Analyzing trace with hash 522486283, now seen corresponding path program 5 times [2024-05-06 04:13:03,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:03,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:03,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:03,996 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:13:03,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:03,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:04,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:04,320 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:13:04,618 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:04,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:10,491 INFO L85 PathProgramCache]: Analyzing trace with hash 986686068, now seen corresponding path program 5 times [2024-05-06 04:13:10,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:10,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:10,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:10,735 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:13:10,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:10,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:10,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:10,991 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:13:11,353 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:11,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:23,035 INFO L85 PathProgramCache]: Analyzing trace with hash 1417302344, now seen corresponding path program 53 times [2024-05-06 04:13:23,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:23,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:23,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:23,285 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:13:23,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:23,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:23,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:23,542 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:13:24,053 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:24,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:26,848 INFO L85 PathProgramCache]: Analyzing trace with hash -494614898, now seen corresponding path program 54 times [2024-05-06 04:13:26,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:26,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:26,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:27,079 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:13:27,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:27,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:27,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:27,310 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:13:27,771 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:27,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:28,607 INFO L85 PathProgramCache]: Analyzing trace with hash 1001616111, now seen corresponding path program 6 times [2024-05-06 04:13:28,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:28,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:28,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:28,836 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:28,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:28,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:28,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:29,050 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:29,333 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:29,334 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:36,584 INFO L85 PathProgramCache]: Analyzing trace with hash -244784309, now seen corresponding path program 6 times [2024-05-06 04:13:36,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:36,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:36,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:36,948 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:36,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:36,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:36,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:37,181 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:37,452 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:37,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:38,047 INFO L85 PathProgramCache]: Analyzing trace with hash 961935257, now seen corresponding path program 6 times [2024-05-06 04:13:38,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:38,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:38,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:38,291 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:38,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:38,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:38,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:38,592 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:38,880 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:38,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:39,595 INFO L85 PathProgramCache]: Analyzing trace with hash 1416503435, now seen corresponding path program 6 times [2024-05-06 04:13:39,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:39,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:39,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:39,830 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:39,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:39,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:39,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:40,062 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:40,338 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:40,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:41,008 INFO L85 PathProgramCache]: Analyzing trace with hash 1846808954, now seen corresponding path program 6 times [2024-05-06 04:13:41,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:41,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:41,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:41,230 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:41,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:41,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:41,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:41,457 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:41,746 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:41,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:47,142 INFO L85 PathProgramCache]: Analyzing trace with hash -494614867, now seen corresponding path program 6 times [2024-05-06 04:13:47,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:47,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:47,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:47,362 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:47,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:47,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:47,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:47,604 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:47,877 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:47,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:48,608 INFO L85 PathProgramCache]: Analyzing trace with hash 1230970653, now seen corresponding path program 55 times [2024-05-06 04:13:48,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:48,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:48,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:48,912 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:48,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:48,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:48,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:49,152 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:50,402 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:50,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:51,311 INFO L85 PathProgramCache]: Analyzing trace with hash -403972598, now seen corresponding path program 56 times [2024-05-06 04:13:51,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:51,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:51,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:51,629 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:13:51,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:51,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:51,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:51,872 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:13:52,153 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:52,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:52,940 INFO L85 PathProgramCache]: Analyzing trace with hash 1014798747, now seen corresponding path program 57 times [2024-05-06 04:13:52,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:52,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:52,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:53,176 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:53,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:53,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:53,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:53,498 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:13:53,786 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:53,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:13:59,117 INFO L85 PathProgramCache]: Analyzing trace with hash -1987204702, now seen corresponding path program 58 times [2024-05-06 04:13:59,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:59,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:59,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:59,359 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-06 04:13:59,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:13:59,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:13:59,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:13:59,650 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-05-06 04:13:59,935 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:13:59,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:00,911 INFO L85 PathProgramCache]: Analyzing trace with hash 178271491, now seen corresponding path program 59 times [2024-05-06 04:14:00,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:00,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:00,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:01,131 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:14:01,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:01,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:01,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:01,436 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:14:01,609 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:14:01,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:14:01,678 INFO L85 PathProgramCache]: Analyzing trace with hash -895108005, now seen corresponding path program 60 times [2024-05-06 04:14:01,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:01,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:01,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:01,884 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:14:01,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:01,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:01,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:02,113 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:14:02,603 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:02,603 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:12,175 INFO L85 PathProgramCache]: Analyzing trace with hash 279043266, now seen corresponding path program 61 times [2024-05-06 04:14:12,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:12,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:12,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:12,364 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:12,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:12,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:12,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:12,560 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:12,929 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:14:12,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:14:16,161 INFO L85 PathProgramCache]: Analyzing trace with hash -1744735517, now seen corresponding path program 62 times [2024-05-06 04:14:16,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:16,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:16,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:16,340 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:16,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:16,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:16,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:16,585 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:16,876 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:16,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:19,945 INFO L85 PathProgramCache]: Analyzing trace with hash 1747774848, now seen corresponding path program 63 times [2024-05-06 04:14:19,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:19,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:19,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:20,146 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:20,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:20,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:20,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:20,332 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:20,527 INFO L349 Elim1Store]: treesize reduction 43, result has 8.5 percent of original size [2024-05-06 04:14:20,527 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 48 treesize of output 20 [2024-05-06 04:14:22,765 INFO L85 PathProgramCache]: Analyzing trace with hash -1653553530, now seen corresponding path program 64 times [2024-05-06 04:14:22,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:22,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:22,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:22,956 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:14:22,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:22,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:22,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:23,143 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:14:23,423 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:23,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:24,050 INFO L85 PathProgramCache]: Analyzing trace with hash -1403832296, now seen corresponding path program 65 times [2024-05-06 04:14:24,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:24,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:24,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:24,226 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:24,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:24,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:24,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:24,465 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:24,734 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:24,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:14:24,893 INFO L85 PathProgramCache]: Analyzing trace with hash -569127186, now seen corresponding path program 66 times [2024-05-06 04:14:24,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:24,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:24,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:25,078 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:25,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:25,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:25,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:25,252 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:25,601 INFO L349 Elim1Store]: treesize reduction 18, result has 5.3 percent of original size [2024-05-06 04:14:25,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 20 treesize of output 4 [2024-05-06 04:14:25,660 INFO L85 PathProgramCache]: Analyzing trace with hash -463072560, now seen corresponding path program 67 times [2024-05-06 04:14:25,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:25,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:25,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:25,913 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:25,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:25,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:25,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:26,095 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:26,305 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:26,306 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:14:26,420 INFO L85 PathProgramCache]: Analyzing trace with hash -463072560, now seen corresponding path program 68 times [2024-05-06 04:14:26,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:26,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:26,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:26,598 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:26,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:26,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:26,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:26,787 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:27,004 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:27,004 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:14:27,139 INFO L85 PathProgramCache]: Analyzing trace with hash -1470346448, now seen corresponding path program 69 times [2024-05-06 04:14:27,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:27,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:27,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:27,384 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:27,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:27,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:27,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:27,559 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:14:27,849 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:27,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:29,106 INFO L85 PathProgramCache]: Analyzing trace with hash -670327075, now seen corresponding path program 70 times [2024-05-06 04:14:29,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:29,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:29,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:29,425 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-06 04:14:29,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:29,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:29,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:29,648 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-06 04:14:29,881 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:29,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:14:30,009 INFO L85 PathProgramCache]: Analyzing trace with hash -1294637586, now seen corresponding path program 71 times [2024-05-06 04:14:30,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:30,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:30,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:30,274 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-05-06 04:14:30,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:30,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:30,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:30,588 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-05-06 04:14:30,831 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:30,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:14:30,983 INFO L85 PathProgramCache]: Analyzing trace with hash 1055136867, now seen corresponding path program 72 times [2024-05-06 04:14:30,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:30,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:31,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:31,259 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:31,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:31,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:31,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:31,533 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:31,871 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:31,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:33,264 INFO L85 PathProgramCache]: Analyzing trace with hash -1692745969, now seen corresponding path program 73 times [2024-05-06 04:14:33,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:33,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:33,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:33,483 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:33,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:33,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:33,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:33,697 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:33,929 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:33,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:14:34,076 INFO L85 PathProgramCache]: Analyzing trace with hash -935516457, now seen corresponding path program 74 times [2024-05-06 04:14:34,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:34,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:34,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:34,300 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:34,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:34,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:34,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:34,593 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:34,816 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:34,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:14:34,943 INFO L85 PathProgramCache]: Analyzing trace with hash 1063761927, now seen corresponding path program 75 times [2024-05-06 04:14:34,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:34,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:34,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:35,169 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:35,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:35,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:35,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:35,407 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:35,694 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:35,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:14:35,866 INFO L85 PathProgramCache]: Analyzing trace with hash -1383117607, now seen corresponding path program 76 times [2024-05-06 04:14:35,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:35,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:35,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:36,170 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:36,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:36,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:36,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:36,468 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:36,787 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:36,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:42,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1063779788, now seen corresponding path program 1 times [2024-05-06 04:14:42,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:42,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:42,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:42,515 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:42,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:42,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:42,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:42,734 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:43,018 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:43,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:45,727 INFO L85 PathProgramCache]: Analyzing trace with hash 1476424457, now seen corresponding path program 2 times [2024-05-06 04:14:45,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:45,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:45,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:45,990 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:14:45,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:45,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:46,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:46,220 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:14:46,500 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:46,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:47,216 INFO L85 PathProgramCache]: Analyzing trace with hash -935515871, now seen corresponding path program 1 times [2024-05-06 04:14:47,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:47,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:47,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:47,434 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:47,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:47,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:47,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:47,649 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:47,926 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:47,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:50,923 INFO L85 PathProgramCache]: Analyzing trace with hash 1630418772, now seen corresponding path program 2 times [2024-05-06 04:14:50,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:50,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:51,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:51,304 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:14:51,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:51,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:51,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:51,694 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:14:52,133 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:52,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:14:52,959 INFO L85 PathProgramCache]: Analyzing trace with hash -1692745938, now seen corresponding path program 1 times [2024-05-06 04:14:52,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:52,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:52,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:53,258 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:53,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:53,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:53,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:53,500 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:14:53,795 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:14:53,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:02,401 WARN L293 SmtUtils]: Spent 6.08s on a formula simplification. DAG size of input: 33 DAG size of output: 28 (called from [L 210] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.abduction.Abducer.solveAbductionProblem) [2024-05-06 04:15:04,410 WARN L854 $PredicateComparison]: unable to prove that (and (forall ((v_~q2~0.offset_In_152 Int) (v_~q2~0.base_In_152 Int)) (= (select (select |c_#memory_int| v_~q2~0.base_In_152) (+ (* c_~q2_front~0 4) v_~q2~0.offset_In_152)) 0)) (forall ((v_~q1_front~0_In_247 Int) (v_~q1~0.offset_In_236 Int) (v_~q1~0.base_In_236 Int)) (let ((.cse0 (select (select |c_#memory_int| v_~q1~0.base_In_236) (+ v_~q1~0.offset_In_236 (* v_~q1_front~0_In_247 4))))) (or (< 4294967295 .cse0) (< v_~q1_front~0_In_247 0) (< (+ .cse0 4294967295) 0) (= .cse0 0))))) is different from false [2024-05-06 04:15:04,412 INFO L85 PathProgramCache]: Analyzing trace with hash -420208665, now seen corresponding path program 2 times [2024-05-06 04:15:04,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:04,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:04,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:04,704 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:04,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:04,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:04,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:04,935 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:05,215 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:05,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:07,988 INFO L85 PathProgramCache]: Analyzing trace with hash 1885057924, now seen corresponding path program 77 times [2024-05-06 04:15:07,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:07,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:08,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:08,273 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:15:08,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:08,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:08,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:08,535 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:15:08,849 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:08,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:14,179 INFO L85 PathProgramCache]: Analyzing trace with hash 171027537, now seen corresponding path program 78 times [2024-05-06 04:15:14,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:14,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:14,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:14,490 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:14,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:14,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:14,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:14,727 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:14,965 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:14,966 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:15,124 INFO L85 PathProgramCache]: Analyzing trace with hash 60808266, now seen corresponding path program 79 times [2024-05-06 04:15:15,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:15,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:15,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:15,414 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:15:15,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:15,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:15,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:15,676 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:15:16,062 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:16,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:18,730 INFO L85 PathProgramCache]: Analyzing trace with hash 60807680, now seen corresponding path program 80 times [2024-05-06 04:15:18,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:18,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:18,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:18,945 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:18,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:18,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:19,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:19,219 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:19,438 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:19,439 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:19,553 INFO L85 PathProgramCache]: Analyzing trace with hash 1802463046, now seen corresponding path program 81 times [2024-05-06 04:15:19,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:19,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:19,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:19,773 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:15:19,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:19,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:19,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:20,063 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:15:20,309 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:20,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:20,437 INFO L85 PathProgramCache]: Analyzing trace with hash 1802493829, now seen corresponding path program 1 times [2024-05-06 04:15:20,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:20,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:20,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:20,719 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:20,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:20,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:20,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:21,019 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:21,285 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:21,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:21,413 INFO L85 PathProgramCache]: Analyzing trace with hash -188577166, now seen corresponding path program 2 times [2024-05-06 04:15:21,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:21,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:21,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:21,802 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:21,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:21,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:21,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:22,095 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:22,374 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:22,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:22,507 INFO L85 PathProgramCache]: Analyzing trace with hash 473786912, now seen corresponding path program 1 times [2024-05-06 04:15:22,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:22,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:22,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:22,817 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:22,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:22,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:22,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:23,034 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:23,252 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:23,252 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:23,359 INFO L85 PathProgramCache]: Analyzing trace with hash 1510456887, now seen corresponding path program 2 times [2024-05-06 04:15:23,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:23,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:23,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:23,605 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:23,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:23,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:23,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:23,920 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:24,132 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:24,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:24,257 INFO L85 PathProgramCache]: Analyzing trace with hash -1231642585, now seen corresponding path program 1 times [2024-05-06 04:15:24,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:24,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:24,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:24,487 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:24,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:24,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:24,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:24,715 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:25,000 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:25,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:25,168 INFO L85 PathProgramCache]: Analyzing trace with hash 2142068752, now seen corresponding path program 2 times [2024-05-06 04:15:25,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:25,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:25,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:25,464 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:25,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:25,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:25,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:25,764 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:26,028 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:26,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:26,183 INFO L85 PathProgramCache]: Analyzing trace with hash -1563751101, now seen corresponding path program 82 times [2024-05-06 04:15:26,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:26,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:26,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:26,516 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:26,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:26,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:26,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:26,789 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:15:27,106 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:15:27,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:15:27,220 INFO L85 PathProgramCache]: Analyzing trace with hash -1517974574, now seen corresponding path program 83 times [2024-05-06 04:15:27,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:27,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:27,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:27,620 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:27,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:27,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:27,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:27,872 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:28,103 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:28,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:28,222 INFO L85 PathProgramCache]: Analyzing trace with hash 187429492, now seen corresponding path program 84 times [2024-05-06 04:15:28,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:28,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:28,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:28,462 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:28,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:28,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:28,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:28,770 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2024-05-06 04:15:29,015 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:15:29,015 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:15:29,125 INFO L85 PathProgramCache]: Analyzing trace with hash 1059021523, now seen corresponding path program 85 times [2024-05-06 04:15:29,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:29,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:29,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:29,367 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:15:29,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:29,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:29,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:29,679 INFO L134 CoverageAnalysis]: Checked inductivity of 58 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2024-05-06 04:15:29,951 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:15:29,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:15:30,083 INFO L85 PathProgramCache]: Analyzing trace with hash -670172199, now seen corresponding path program 86 times [2024-05-06 04:15:30,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:30,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:30,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:30,448 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:15:30,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:30,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:30,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:30,714 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:15:31,048 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:31,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:36,200 INFO L85 PathProgramCache]: Analyzing trace with hash 699499330, now seen corresponding path program 87 times [2024-05-06 04:15:36,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:36,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:36,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:36,424 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:15:36,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:36,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:36,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:36,651 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:15:36,936 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:36,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:37,053 INFO L85 PathProgramCache]: Analyzing trace with hash -2090976630, now seen corresponding path program 88 times [2024-05-06 04:15:37,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:37,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:37,282 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:15:37,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:37,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:37,495 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:15:37,751 INFO L349 Elim1Store]: treesize reduction 23, result has 51.1 percent of original size [2024-05-06 04:15:37,752 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 63 treesize of output 46 [2024-05-06 04:15:37,861 INFO L85 PathProgramCache]: Analyzing trace with hash -1016255563, now seen corresponding path program 89 times [2024-05-06 04:15:37,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:37,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:38,155 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:15:38,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:38,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:38,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:38,401 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:15:38,733 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:38,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:44,000 INFO L85 PathProgramCache]: Analyzing trace with hash -44000860, now seen corresponding path program 90 times [2024-05-06 04:15:44,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:44,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:44,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:44,211 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:15:44,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:44,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:44,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:44,420 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-05-06 04:15:44,727 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:44,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:49,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1814633152, now seen corresponding path program 91 times [2024-05-06 04:15:49,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:49,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:49,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:49,974 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:49,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:49,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:50,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:50,166 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:50,524 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:50,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:51,214 INFO L85 PathProgramCache]: Analyzing trace with hash -1434349198, now seen corresponding path program 92 times [2024-05-06 04:15:51,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:51,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:51,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:51,411 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:51,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:51,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:51,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:51,688 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:51,967 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:51,967 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:15:52,106 INFO L85 PathProgramCache]: Analyzing trace with hash -1515151148, now seen corresponding path program 93 times [2024-05-06 04:15:52,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:52,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:52,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:52,397 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:52,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:52,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:52,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:52,647 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:52,985 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:52,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:54,034 INFO L85 PathProgramCache]: Analyzing trace with hash 274973551, now seen corresponding path program 3 times [2024-05-06 04:15:54,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:54,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:54,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:54,247 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:54,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:54,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:54,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:54,463 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:54,837 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:54,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:15:55,589 INFO L85 PathProgramCache]: Analyzing trace with hash -1515150562, now seen corresponding path program 3 times [2024-05-06 04:15:55,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:55,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:55,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:55,808 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:55,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:55,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:55,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:56,094 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:15:56,401 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:15:56,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:16:10,041 INFO L85 PathProgramCache]: Analyzing trace with hash -1434349167, now seen corresponding path program 3 times [2024-05-06 04:16:10,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:10,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:10,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:10,326 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:16:10,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:10,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:10,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:10,605 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:16:10,921 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:16:10,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:16:13,879 INFO L85 PathProgramCache]: Analyzing trace with hash -1016100671, now seen corresponding path program 94 times [2024-05-06 04:16:13,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:13,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:13,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:14,073 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:16:14,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:14,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:14,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:14,269 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:16:14,496 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:16:14,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 31 [2024-05-06 04:16:14,644 INFO L85 PathProgramCache]: Analyzing trace with hash 105769837, now seen corresponding path program 95 times [2024-05-06 04:16:14,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:14,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:14,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:14,912 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:16:14,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:14,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:14,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:15,154 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:16:15,480 INFO L349 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2024-05-06 04:16:15,481 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 51 [2024-05-06 04:16:16,939 INFO L85 PathProgramCache]: Analyzing trace with hash 105769251, now seen corresponding path program 96 times [2024-05-06 04:16:16,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:16,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:16,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:17,150 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 20 proven. 8 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:16:17,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:17,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:17,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat Received shutdown request... [2024-05-06 04:16:17,280 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:16:17,283 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:16:17,284 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:16:17,327 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-06 04:16:17,513 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable550,SelfDestructingSolverStorable306,SelfDestructingSolverStorable427,SelfDestructingSolverStorable548,SelfDestructingSolverStorable307,SelfDestructingSolverStorable428,SelfDestructingSolverStorable549,SelfDestructingSolverStorable308,SelfDestructingSolverStorable429,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable423,SelfDestructingSolverStorable544,SelfDestructingSolverStorable303,SelfDestructingSolverStorable424,SelfDestructingSolverStorable545,SelfDestructingSolverStorable304,SelfDestructingSolverStorable425,SelfDestructingSolverStorable546,SelfDestructingSolverStorable305,SelfDestructingSolverStorable426,SelfDestructingSolverStorable547,SelfDestructingSolverStorable540,SelfDestructingSolverStorable420,SelfDestructingSolverStorable541,SelfDestructingSolverStorable300,SelfDestructingSolverStorable421,SelfDestructingSolverStorable542,SelfDestructingSolverStorable301,SelfDestructingSolverStorable422,SelfDestructingSolverStorable543,SelfDestructingSolverStorable416,SelfDestructingSolverStorable537,SelfDestructingSolverStorable417,SelfDestructingSolverStorable538,SelfDestructingSolverStorable418,SelfDestructingSolverStorable539,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable533,SelfDestructingSolverStorable413,SelfDestructingSolverStorable534,SelfDestructingSolverStorable414,SelfDestructingSolverStorable535,SelfDestructingSolverStorable415,SelfDestructingSolverStorable536,SelfDestructingSolverStorable530,SelfDestructingSolverStorable410,SelfDestructingSolverStorable531,SelfDestructingSolverStorable411,SelfDestructingSolverStorable532,SelfDestructingSolverStorable570,SelfDestructingSolverStorable450,SelfDestructingSolverStorable571,SelfDestructingSolverStorable330,SelfDestructingSolverStorable451,SelfDestructingSolverStorable572,SelfDestructingSolverStorable328,SelfDestructingSolverStorable449,SelfDestructingSolverStorable329,SelfDestructingSolverStorable324,SelfDestructingSolverStorable445,SelfDestructingSolverStorable566,SelfDestructingSolverStorable325,SelfDestructingSolverStorable446,SelfDestructingSolverStorable567,SelfDestructingSolverStorable326,SelfDestructingSolverStorable447,SelfDestructingSolverStorable568,SelfDestructingSolverStorable327,SelfDestructingSolverStorable448,SelfDestructingSolverStorable569,SelfDestructingSolverStorable320,SelfDestructingSolverStorable441,SelfDestructingSolverStorable562,SelfDestructingSolverStorable321,SelfDestructingSolverStorable442,SelfDestructingSolverStorable563,SelfDestructingSolverStorable322,SelfDestructingSolverStorable443,SelfDestructingSolverStorable564,SelfDestructingSolverStorable323,SelfDestructingSolverStorable444,SelfDestructingSolverStorable565,SelfDestructingSolverStorable560,SelfDestructingSolverStorable440,SelfDestructingSolverStorable561,SelfDestructingSolverStorable317,SelfDestructingSolverStorable438,SelfDestructingSolverStorable559,SelfDestructingSolverStorable318,SelfDestructingSolverStorable439,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable434,SelfDestructingSolverStorable555,SelfDestructingSolverStorable314,SelfDestructingSolverStorable435,SelfDestructingSolverStorable556,SelfDestructingSolverStorable315,SelfDestructingSolverStorable436,SelfDestructingSolverStorable557,SelfDestructingSolverStorable316,SelfDestructingSolverStorable437,SelfDestructingSolverStorable558,SelfDestructingSolverStorable430,SelfDestructingSolverStorable551,SelfDestructingSolverStorable310,SelfDestructingSolverStorable431,SelfDestructingSolverStorable552,SelfDestructingSolverStorable311,SelfDestructingSolverStorable432,SelfDestructingSolverStorable553,SelfDestructingSolverStorable312,SelfDestructingSolverStorable433,SelfDestructingSolverStorable554,SelfDestructingSolverStorable508,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable505,SelfDestructingSolverStorable506,SelfDestructingSolverStorable507,SelfDestructingSolverStorable500,SelfDestructingSolverStorable501,SelfDestructingSolverStorable502,SelfDestructingSolverStorable503,SelfDestructingSolverStorable298,SelfDestructingSolverStorable299,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable526,SelfDestructingSolverStorable406,SelfDestructingSolverStorable527,SelfDestructingSolverStorable407,SelfDestructingSolverStorable528,SelfDestructingSolverStorable408,SelfDestructingSolverStorable529,SelfDestructingSolverStorable401,SelfDestructingSolverStorable522,SelfDestructingSolverStorable402,SelfDestructingSolverStorable523,SelfDestructingSolverStorable403,SelfDestructingSolverStorable524,SelfDestructingSolverStorable404,SelfDestructingSolverStorable525,SelfDestructingSolverStorable520,SelfDestructingSolverStorable400,SelfDestructingSolverStorable521,SelfDestructingSolverStorable519,SelfDestructingSolverStorable515,SelfDestructingSolverStorable516,SelfDestructingSolverStorable517,SelfDestructingSolverStorable518,SelfDestructingSolverStorable511,SelfDestructingSolverStorable512,SelfDestructingSolverStorable513,SelfDestructingSolverStorable514,SelfDestructingSolverStorable510,SelfDestructingSolverStorable272,SelfDestructingSolverStorable393,SelfDestructingSolverStorable273,SelfDestructingSolverStorable394,SelfDestructingSolverStorable274,SelfDestructingSolverStorable395,SelfDestructingSolverStorable275,SelfDestructingSolverStorable396,SelfDestructingSolverStorable390,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable271,SelfDestructingSolverStorable392,SelfDestructingSolverStorable269,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable267,SelfDestructingSolverStorable388,SelfDestructingSolverStorable268,SelfDestructingSolverStorable389,SelfDestructingSolverStorable261,SelfDestructingSolverStorable382,SelfDestructingSolverStorable262,SelfDestructingSolverStorable383,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable380,SelfDestructingSolverStorable260,SelfDestructingSolverStorable381,SelfDestructingSolverStorable258,SelfDestructingSolverStorable379,SelfDestructingSolverStorable259,SelfDestructingSolverStorable254,SelfDestructingSolverStorable375,SelfDestructingSolverStorable496,SelfDestructingSolverStorable255,SelfDestructingSolverStorable376,SelfDestructingSolverStorable497,SelfDestructingSolverStorable256,SelfDestructingSolverStorable377,SelfDestructingSolverStorable498,SelfDestructingSolverStorable257,SelfDestructingSolverStorable378,SelfDestructingSolverStorable499,SelfDestructingSolverStorable294,SelfDestructingSolverStorable295,SelfDestructingSolverStorable296,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable291,SelfDestructingSolverStorable292,SelfDestructingSolverStorable293,SelfDestructingSolverStorable287,SelfDestructingSolverStorable288,SelfDestructingSolverStorable289,SelfDestructingSolverStorable283,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable284,SelfDestructingSolverStorable285,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable281,SelfDestructingSolverStorable282,SelfDestructingSolverStorable276,SelfDestructingSolverStorable397,SelfDestructingSolverStorable277,SelfDestructingSolverStorable398,SelfDestructingSolverStorable278,SelfDestructingSolverStorable399,SelfDestructingSolverStorable279,SelfDestructingSolverStorable470,SelfDestructingSolverStorable350,SelfDestructingSolverStorable471,SelfDestructingSolverStorable351,SelfDestructingSolverStorable472,SelfDestructingSolverStorable352,SelfDestructingSolverStorable473,SelfDestructingSolverStorable346,SelfDestructingSolverStorable467,SelfDestructingSolverStorable347,SelfDestructingSolverStorable468,SelfDestructingSolverStorable348,SelfDestructingSolverStorable469,SelfDestructingSolverStorable349,SelfDestructingSolverStorable342,SelfDestructingSolverStorable463,SelfDestructingSolverStorable343,SelfDestructingSolverStorable464,SelfDestructingSolverStorable344,SelfDestructingSolverStorable465,SelfDestructingSolverStorable345,SelfDestructingSolverStorable466,SelfDestructingSolverStorable460,SelfDestructingSolverStorable340,SelfDestructingSolverStorable461,SelfDestructingSolverStorable341,SelfDestructingSolverStorable462,SelfDestructingSolverStorable339,SelfDestructingSolverStorable335,SelfDestructingSolverStorable456,SelfDestructingSolverStorable336,SelfDestructingSolverStorable457,SelfDestructingSolverStorable337,SelfDestructingSolverStorable458,SelfDestructingSolverStorable338,SelfDestructingSolverStorable459,SelfDestructingSolverStorable331,SelfDestructingSolverStorable452,SelfDestructingSolverStorable332,SelfDestructingSolverStorable453,SelfDestructingSolverStorable333,SelfDestructingSolverStorable454,SelfDestructingSolverStorable334,SelfDestructingSolverStorable455,SelfDestructingSolverStorable250,SelfDestructingSolverStorable371,SelfDestructingSolverStorable492,SelfDestructingSolverStorable251,SelfDestructingSolverStorable372,SelfDestructingSolverStorable493,SelfDestructingSolverStorable252,SelfDestructingSolverStorable373,SelfDestructingSolverStorable494,SelfDestructingSolverStorable253,SelfDestructingSolverStorable374,SelfDestructingSolverStorable495,SelfDestructingSolverStorable490,SelfDestructingSolverStorable370,SelfDestructingSolverStorable491,SelfDestructingSolverStorable247,SelfDestructingSolverStorable368,SelfDestructingSolverStorable489,SelfDestructingSolverStorable248,SelfDestructingSolverStorable369,SelfDestructingSolverStorable249,SelfDestructingSolverStorable243,SelfDestructingSolverStorable364,SelfDestructingSolverStorable485,SelfDestructingSolverStorable244,SelfDestructingSolverStorable365,SelfDestructingSolverStorable486,SelfDestructingSolverStorable245,SelfDestructingSolverStorable366,SelfDestructingSolverStorable487,SelfDestructingSolverStorable246,SelfDestructingSolverStorable367,SelfDestructingSolverStorable488,SelfDestructingSolverStorable360,SelfDestructingSolverStorable481,SelfDestructingSolverStorable240,SelfDestructingSolverStorable361,SelfDestructingSolverStorable482,SelfDestructingSolverStorable241,SelfDestructingSolverStorable362,SelfDestructingSolverStorable483,SelfDestructingSolverStorable242,SelfDestructingSolverStorable363,SelfDestructingSolverStorable484,SelfDestructingSolverStorable480,SelfDestructingSolverStorable236,SelfDestructingSolverStorable357,SelfDestructingSolverStorable478,SelfDestructingSolverStorable237,SelfDestructingSolverStorable358,SelfDestructingSolverStorable479,SelfDestructingSolverStorable238,SelfDestructingSolverStorable359,SelfDestructingSolverStorable239,SelfDestructingSolverStorable353,SelfDestructingSolverStorable474,SelfDestructingSolverStorable354,SelfDestructingSolverStorable475,SelfDestructingSolverStorable234,SelfDestructingSolverStorable355,SelfDestructingSolverStorable476,SelfDestructingSolverStorable235,SelfDestructingSolverStorable356,SelfDestructingSolverStorable477 [2024-05-06 04:16:17,514 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Termination requested (timeout or resource limit) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkResolutionNode(Interpolator.java:275) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator$ProofTreeWalker.walk(Interpolator.java:152) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:115) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:106) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.interpolate(Interpolator.java:260) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.getInterpolants(Interpolator.java:237) at de.uni_freiburg.informatik.ultimate.smtinterpol.smtlib2.SMTInterpol.getInterpolants(SMTInterpol.java:869) at de.uni_freiburg.informatik.ultimate.smtinterpol.smtlib2.SMTInterpol.getInterpolants(SMTInterpol.java:793) at de.uni_freiburg.informatik.ultimate.logic.NoopScript.getInterpolants(NoopScript.java:352) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.getInterpolants(WrapperScript.java:337) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.getInterpolants(WrapperScript.java:337) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.getInterpolants(ManagedScript.java:201) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.NestedInterpolantsBuilder.computeCraigInterpolants(NestedInterpolantsBuilder.java:283) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.NestedInterpolantsBuilder.(NestedInterpolantsBuilder.java:164) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolantsRecursive(InterpolatingTraceCheckCraig.java:327) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolants(InterpolatingTraceCheckCraig.java:229) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheckCraig.(InterpolatingTraceCheckCraig.java:97) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleCraigSleepSetPOR.construct(IpTcStrategyModuleCraigSleepSetPOR.java:104) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.PostConditionTraceChecker.checkTrace(PostConditionTraceChecker.java:112) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityChecker.checkConditionalCommutativity(ConditionalCommutativityChecker.java:161) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:186) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:1) at de.uni_freiburg.informatik.ultimate.automata.partialorder.visitors.DeadEndOptimizingSearchVisitor.discoverState(DeadEndOptimizingSearchVisitor.java:73) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.visitState(DepthFirstTraversal.java:222) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:165) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.(DepthFirstTraversal.java:98) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:122) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.PartialOrderReductionFacade.apply(PartialOrderReductionFacade.java:321) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.concurrency.PartialOrderCegarLoop.isAbstractionEmpty(PartialOrderCegarLoop.java:371) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:466) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2024-05-06 04:16:17,538 INFO L158 Benchmark]: Toolchain (without parser) took 781461.62ms. Allocated memory was 189.8MB in the beginning and 2.0GB in the end (delta: 1.9GB). Free memory was 110.8MB in the beginning and 497.0MB in the end (delta: -386.2MB). Peak memory consumption was 1.5GB. Max. memory is 8.0GB. [2024-05-06 04:16:17,538 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 189.8MB. Free memory is still 156.5MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 04:16:17,538 INFO L158 Benchmark]: CACSL2BoogieTranslator took 219.21ms. Allocated memory is still 189.8MB. Free memory was 110.5MB in the beginning and 97.5MB in the end (delta: 13.1MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. [2024-05-06 04:16:17,538 INFO L158 Benchmark]: Boogie Procedure Inliner took 85.10ms. Allocated memory was 189.8MB in the beginning and 308.3MB in the end (delta: 118.5MB). Free memory was 97.5MB in the beginning and 277.1MB in the end (delta: -179.7MB). Peak memory consumption was 7.3MB. Max. memory is 8.0GB. [2024-05-06 04:16:17,538 INFO L158 Benchmark]: Boogie Preprocessor took 36.93ms. Allocated memory is still 308.3MB. Free memory was 277.1MB in the beginning and 274.6MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 04:16:17,538 INFO L158 Benchmark]: RCFGBuilder took 681.40ms. Allocated memory is still 308.3MB. Free memory was 274.6MB in the beginning and 215.8MB in the end (delta: 58.7MB). Peak memory consumption was 58.7MB. Max. memory is 8.0GB. [2024-05-06 04:16:17,538 INFO L158 Benchmark]: TraceAbstraction took 780434.62ms. Allocated memory was 308.3MB in the beginning and 2.0GB in the end (delta: 1.7GB). Free memory was 214.8MB in the beginning and 497.0MB in the end (delta: -282.2MB). Peak memory consumption was 1.5GB. Max. memory is 8.0GB. [2024-05-06 04:16:17,539 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 189.8MB. Free memory is still 156.5MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 219.21ms. Allocated memory is still 189.8MB. Free memory was 110.5MB in the beginning and 97.5MB in the end (delta: 13.1MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 85.10ms. Allocated memory was 189.8MB in the beginning and 308.3MB in the end (delta: 118.5MB). Free memory was 97.5MB in the beginning and 277.1MB in the end (delta: -179.7MB). Peak memory consumption was 7.3MB. Max. memory is 8.0GB. * Boogie Preprocessor took 36.93ms. Allocated memory is still 308.3MB. Free memory was 277.1MB in the beginning and 274.6MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 681.40ms. Allocated memory is still 308.3MB. Free memory was 274.6MB in the beginning and 215.8MB in the end (delta: 58.7MB). Peak memory consumption was 58.7MB. Max. memory is 8.0GB. * TraceAbstraction took 780434.62ms. Allocated memory was 308.3MB in the beginning and 2.0GB in the end (delta: 1.7GB). Free memory was 214.8MB in the beginning and 497.0MB in the end (delta: -282.2MB). Peak memory consumption was 1.5GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: Termination requested (timeout or resource limit) de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: Termination requested (timeout or resource limit): de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkResolutionNode(Interpolator.java:275) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown [2024-05-06 04:16:17,564 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0