/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 04:14:47,969 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 04:14:48,033 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 04:14:48,037 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 04:14:48,038 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 04:14:48,065 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 04:14:48,066 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 04:14:48,066 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 04:14:48,067 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 04:14:48,070 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 04:14:48,070 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 04:14:48,070 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 04:14:48,070 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 04:14:48,072 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 04:14:48,072 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 04:14:48,072 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 04:14:48,072 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 04:14:48,073 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 04:14:48,073 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 04:14:48,073 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 04:14:48,073 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 04:14:48,073 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 04:14:48,073 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 04:14:48,075 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 04:14:48,075 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 04:14:48,075 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 04:14:48,075 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 04:14:48,075 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 04:14:48,075 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 04:14:48,075 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 04:14:48,076 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 04:14:48,077 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 04:14:48,077 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 04:14:48,077 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 04:14:48,077 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 04:14:48,077 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 04:14:48,077 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 04:14:48,077 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 04:14:48,077 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 04:14:48,078 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-06 04:14:48,281 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 04:14:48,304 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 04:14:48,306 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 04:14:48,307 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 04:14:48,307 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 04:14:48,309 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c [2024-05-06 04:14:49,315 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 04:14:49,473 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 04:14:49,473 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c [2024-05-06 04:14:49,478 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a937d770c/f49058e5c1a341eab3103766a589c3f8/FLAG90800123e [2024-05-06 04:14:49,487 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a937d770c/f49058e5c1a341eab3103766a589c3f8 [2024-05-06 04:14:49,489 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 04:14:49,490 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 04:14:49,491 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 04:14:49,491 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 04:14:49,494 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 04:14:49,495 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,495 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@70253889 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49, skipping insertion in model container [2024-05-06 04:14:49,496 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,513 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 04:14:49,650 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c[2598,2611] [2024-05-06 04:14:49,656 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 04:14:49,663 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 04:14:49,687 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-more-vector-add.wvr.c[2598,2611] [2024-05-06 04:14:49,698 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 04:14:49,708 INFO L206 MainTranslator]: Completed translation [2024-05-06 04:14:49,709 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49 WrapperNode [2024-05-06 04:14:49,709 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 04:14:49,709 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 04:14:49,710 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 04:14:49,710 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 04:14:49,714 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,732 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,765 INFO L138 Inliner]: procedures = 25, calls = 46, calls flagged for inlining = 11, calls inlined = 17, statements flattened = 203 [2024-05-06 04:14:49,765 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 04:14:49,766 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 04:14:49,766 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 04:14:49,766 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 04:14:49,773 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,774 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,784 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,784 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,790 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,793 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,794 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,795 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,797 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 04:14:49,798 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 04:14:49,798 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 04:14:49,798 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 04:14:49,813 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (1/1) ... [2024-05-06 04:14:49,817 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 04:14:49,825 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:14:49,845 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 04:14:49,868 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 04:14:49,888 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 04:14:49,889 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 04:14:49,889 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 04:14:49,889 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 04:14:49,889 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 04:14:49,889 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 04:14:49,889 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 04:14:49,889 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 04:14:49,890 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 04:14:49,890 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 04:14:49,890 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 04:14:49,890 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 04:14:49,891 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 04:14:49,892 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 04:14:49,892 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 04:14:49,893 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 04:14:49,973 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 04:14:49,975 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 04:14:50,319 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 04:14:50,330 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 04:14:50,331 INFO L309 CfgBuilder]: Removed 7 assume(true) statements. [2024-05-06 04:14:50,332 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:14:50 BoogieIcfgContainer [2024-05-06 04:14:50,332 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 04:14:50,337 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 04:14:50,337 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 04:14:50,339 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 04:14:50,339 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 04:14:49" (1/3) ... [2024-05-06 04:14:50,340 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d54abb6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:14:50, skipping insertion in model container [2024-05-06 04:14:50,340 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:14:49" (2/3) ... [2024-05-06 04:14:50,340 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d54abb6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:14:50, skipping insertion in model container [2024-05-06 04:14:50,340 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:14:50" (3/3) ... [2024-05-06 04:14:50,341 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-more-vector-add.wvr.c [2024-05-06 04:14:50,347 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 04:14:50,355 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 04:14:50,355 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 04:14:50,355 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 04:14:50,412 INFO L144 ThreadInstanceAdder]: Constructed 3 joinOtherThreadTransitions. [2024-05-06 04:14:50,444 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 04:14:50,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 04:14:50,445 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:14:50,447 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 04:14:50,475 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 04:14:50,498 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 04:14:50,520 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:14:50,522 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 04:14:50,528 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@1ce96cf5, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 04:14:50,528 INFO L358 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2024-05-06 04:14:50,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:14:52,926 INFO L85 PathProgramCache]: Analyzing trace with hash 1002899142, now seen corresponding path program 1 times [2024-05-06 04:14:52,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:52,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:53,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:53,251 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:14:53,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:53,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:53,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:53,367 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:14:53,394 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 04:14:53,394 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 04:14:53,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:14:55,547 INFO L85 PathProgramCache]: Analyzing trace with hash -1910069838, now seen corresponding path program 1 times [2024-05-06 04:14:55,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:55,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:55,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:55,862 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:14:55,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:55,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:55,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:56,093 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:14:56,094 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 04:14:56,095 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-06 04:14:56,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:14:58,355 INFO L85 PathProgramCache]: Analyzing trace with hash 320810677, now seen corresponding path program 1 times [2024-05-06 04:14:58,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:58,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:58,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:58,631 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:14:58,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:14:58,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:14:58,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:14:58,867 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:14:58,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:01,007 INFO L85 PathProgramCache]: Analyzing trace with hash 1335141641, now seen corresponding path program 1 times [2024-05-06 04:15:01,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:01,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:01,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:01,202 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:01,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:01,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:01,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:01,390 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:01,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:03,508 INFO L85 PathProgramCache]: Analyzing trace with hash -1560281370, now seen corresponding path program 2 times [2024-05-06 04:15:03,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:03,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:03,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:03,695 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:03,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:03,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:03,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:03,854 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:03,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:15:04,091 INFO L85 PathProgramCache]: Analyzing trace with hash -1124081493, now seen corresponding path program 3 times [2024-05-06 04:15:04,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:04,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:04,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:04,264 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:04,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:04,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:04,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:04,477 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:04,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:06,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1730535696, now seen corresponding path program 2 times [2024-05-06 04:15:06,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:06,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:06,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:06,722 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:06,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:06,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:06,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:06,874 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:06,898 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:06,992 INFO L85 PathProgramCache]: Analyzing trace with hash -1560300495, now seen corresponding path program 4 times [2024-05-06 04:15:06,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:06,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:07,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:07,165 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:07,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:07,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:07,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:07,339 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:07,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:07,449 INFO L85 PathProgramCache]: Analyzing trace with hash 1335123821, now seen corresponding path program 5 times [2024-05-06 04:15:07,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:07,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:07,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:07,591 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:07,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:07,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:07,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:07,765 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:07,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:07,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1850681211, now seen corresponding path program 6 times [2024-05-06 04:15:07,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:07,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:07,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:07,997 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:07,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:07,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:08,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:08,158 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:08,189 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:10,266 INFO L85 PathProgramCache]: Analyzing trace with hash -1536541959, now seen corresponding path program 7 times [2024-05-06 04:15:10,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:10,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:10,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:10,393 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:10,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:10,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:10,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:10,519 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:10,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:15:11,800 INFO L85 PathProgramCache]: Analyzing trace with hash -388159737, now seen corresponding path program 8 times [2024-05-06 04:15:11,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:11,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:11,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:11,954 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:11,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:11,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:11,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:12,087 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:12,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:14,185 INFO L85 PathProgramCache]: Analyzing trace with hash -1536532254, now seen corresponding path program 9 times [2024-05-06 04:15:14,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:14,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:14,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:14,343 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:14,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:14,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:14,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:14,480 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:14,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:14,582 INFO L85 PathProgramCache]: Analyzing trace with hash -1850669271, now seen corresponding path program 10 times [2024-05-06 04:15:14,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:14,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:14,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:14,711 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:14,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:14,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:14,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:14,882 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:14,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:16,955 INFO L85 PathProgramCache]: Analyzing trace with hash -2092560529, now seen corresponding path program 1 times [2024-05-06 04:15:16,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:16,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:16,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:17,105 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:15:17,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:17,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:17,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:17,237 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:15:17,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:17,341 INFO L85 PathProgramCache]: Analyzing trace with hash 191230787, now seen corresponding path program 1 times [2024-05-06 04:15:17,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:17,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:17,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:17,542 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:17,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:17,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:17,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:17,674 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:17,694 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:17,760 INFO L85 PathProgramCache]: Analyzing trace with hash 1633187820, now seen corresponding path program 2 times [2024-05-06 04:15:17,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:17,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:17,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:17,887 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:17,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:17,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:17,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:18,031 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:18,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:15:18,222 INFO L85 PathProgramCache]: Analyzing trace with hash -910784411, now seen corresponding path program 3 times [2024-05-06 04:15:18,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:18,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:18,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:18,338 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:18,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:18,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:18,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:18,454 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:18,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:20,512 INFO L85 PathProgramCache]: Analyzing trace with hash -682835510, now seen corresponding path program 2 times [2024-05-06 04:15:20,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:20,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:20,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:20,685 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:20,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:20,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:20,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:20,804 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:20,822 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:20,900 INFO L85 PathProgramCache]: Analyzing trace with hash 1633168695, now seen corresponding path program 4 times [2024-05-06 04:15:20,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:20,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:20,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:21,021 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:21,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:21,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:21,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:21,218 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:21,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:21,349 INFO L85 PathProgramCache]: Analyzing trace with hash 191212967, now seen corresponding path program 5 times [2024-05-06 04:15:21,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:21,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:21,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:21,475 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:21,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:21,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:21,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:21,588 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:21,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:21,672 INFO L85 PathProgramCache]: Analyzing trace with hash -615137013, now seen corresponding path program 6 times [2024-05-06 04:15:21,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:21,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:21,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:21,814 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:21,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:21,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:21,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:21,925 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:21,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:22,010 INFO L85 PathProgramCache]: Analyzing trace with hash -1889377485, now seen corresponding path program 7 times [2024-05-06 04:15:22,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:22,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:22,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:22,123 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:22,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:22,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:22,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:22,232 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:22,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:15:24,412 INFO L85 PathProgramCache]: Analyzing trace with hash 1558840845, now seen corresponding path program 8 times [2024-05-06 04:15:24,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:24,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:24,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:24,555 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:24,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:24,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:24,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:24,668 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:24,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:24,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1889367780, now seen corresponding path program 9 times [2024-05-06 04:15:24,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:24,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:24,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:24,888 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:24,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:24,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:24,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:24,995 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:25,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:27,081 INFO L85 PathProgramCache]: Analyzing trace with hash -615125073, now seen corresponding path program 10 times [2024-05-06 04:15:27,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:27,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:27,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:27,227 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:27,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:27,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:27,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:27,339 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:27,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:29,411 INFO L85 PathProgramCache]: Analyzing trace with hash 1007960118, now seen corresponding path program 1 times [2024-05-06 04:15:29,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:29,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:29,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:29,525 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:15:29,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:29,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:29,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:29,643 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:15:29,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:29,749 INFO L85 PathProgramCache]: Analyzing trace with hash -525238, now seen corresponding path program 1 times [2024-05-06 04:15:29,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:29,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:29,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:29,934 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:29,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:29,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:29,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:30,062 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:30,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:30,146 INFO L85 PathProgramCache]: Analyzing trace with hash -16281659, now seen corresponding path program 2 times [2024-05-06 04:15:30,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:30,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:30,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:30,252 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:30,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:30,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:30,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:30,357 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:30,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:15:33,627 INFO L85 PathProgramCache]: Analyzing trace with hash -504730708, now seen corresponding path program 3 times [2024-05-06 04:15:33,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:33,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:33,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:33,780 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:33,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:33,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:33,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:33,887 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:33,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:35,947 INFO L85 PathProgramCache]: Analyzing trace with hash -1877282159, now seen corresponding path program 2 times [2024-05-06 04:15:35,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:35,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:35,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:36,057 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:36,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:36,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:36,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:36,168 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:36,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:36,280 INFO L85 PathProgramCache]: Analyzing trace with hash -16300784, now seen corresponding path program 4 times [2024-05-06 04:15:36,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:36,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:36,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:36,433 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:36,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:36,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:36,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:36,545 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:36,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:36,984 INFO L85 PathProgramCache]: Analyzing trace with hash -543058, now seen corresponding path program 5 times [2024-05-06 04:15:36,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:36,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:37,089 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:37,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:37,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:37,194 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:37,221 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:37,316 INFO L85 PathProgramCache]: Analyzing trace with hash 1087317028, now seen corresponding path program 6 times [2024-05-06 04:15:37,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:37,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:37,422 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:37,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:37,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:37,570 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:37,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:37,658 INFO L85 PathProgramCache]: Analyzing trace with hash -652909766, now seen corresponding path program 7 times [2024-05-06 04:15:37,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:37,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:37,760 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:37,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:37,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:37,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:37,861 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:37,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:15:40,027 INFO L85 PathProgramCache]: Analyzing trace with hash 1234634470, now seen corresponding path program 8 times [2024-05-06 04:15:40,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:40,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:40,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:40,129 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:40,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:40,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:40,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:40,292 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:40,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:40,402 INFO L85 PathProgramCache]: Analyzing trace with hash -652900061, now seen corresponding path program 9 times [2024-05-06 04:15:40,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:40,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:40,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:40,526 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:40,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:40,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:40,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:40,636 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:40,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:40,724 INFO L85 PathProgramCache]: Analyzing trace with hash 1087328968, now seen corresponding path program 10 times [2024-05-06 04:15:40,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:40,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:40,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:40,822 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:40,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:40,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:40,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:40,923 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:40,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:42,986 INFO L85 PathProgramCache]: Analyzing trace with hash -147166384, now seen corresponding path program 1 times [2024-05-06 04:15:42,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:42,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:43,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:43,094 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:15:43,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:43,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:43,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:43,243 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:15:43,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:45,330 INFO L85 PathProgramCache]: Analyzing trace with hash -1131397916, now seen corresponding path program 1 times [2024-05-06 04:15:45,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:45,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:45,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:45,431 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:45,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:45,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:45,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:45,533 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:45,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:45,607 INFO L85 PathProgramCache]: Analyzing trace with hash -713596309, now seen corresponding path program 2 times [2024-05-06 04:15:45,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:45,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:45,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:45,712 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:45,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:45,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:45,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:45,822 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:45,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:15:46,154 INFO L85 PathProgramCache]: Analyzing trace with hash -646648378, now seen corresponding path program 3 times [2024-05-06 04:15:46,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:46,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:46,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:46,308 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:46,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:46,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:46,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:46,410 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:46,430 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:48,468 INFO L85 PathProgramCache]: Analyzing trace with hash 1262558635, now seen corresponding path program 2 times [2024-05-06 04:15:48,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:48,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:48,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:48,576 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:48,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:48,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:48,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:48,683 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:48,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:48,777 INFO L85 PathProgramCache]: Analyzing trace with hash -713615434, now seen corresponding path program 4 times [2024-05-06 04:15:48,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:48,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:48,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:48,878 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:48,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:48,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:48,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:49,027 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:49,049 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:49,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1131415736, now seen corresponding path program 5 times [2024-05-06 04:15:49,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:49,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:49,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:49,226 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:49,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:49,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:49,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:49,326 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:49,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:49,451 INFO L85 PathProgramCache]: Analyzing trace with hash -243208630, now seen corresponding path program 6 times [2024-05-06 04:15:49,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:49,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:49,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:49,549 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:49,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:49,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:49,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:49,646 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:49,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:49,738 INFO L85 PathProgramCache]: Analyzing trace with hash 1050467796, now seen corresponding path program 7 times [2024-05-06 04:15:49,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:49,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:49,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:49,841 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:49,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:49,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:49,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:49,990 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:50,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:15:50,395 INFO L85 PathProgramCache]: Analyzing trace with hash -1795235956, now seen corresponding path program 8 times [2024-05-06 04:15:50,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:50,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:50,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:50,494 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:50,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:50,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:50,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:50,599 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:50,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:50,693 INFO L85 PathProgramCache]: Analyzing trace with hash 1050477501, now seen corresponding path program 9 times [2024-05-06 04:15:50,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:50,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:50,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:50,791 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:50,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:50,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:50,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:50,889 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:50,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:50,964 INFO L85 PathProgramCache]: Analyzing trace with hash -243196690, now seen corresponding path program 10 times [2024-05-06 04:15:50,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:50,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:50,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:51,148 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:51,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:51,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:51,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:51,280 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:51,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:53,348 INFO L85 PathProgramCache]: Analyzing trace with hash -54098505, now seen corresponding path program 1 times [2024-05-06 04:15:53,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:53,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:53,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:53,462 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:15:53,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:53,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:53,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:53,567 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:15:53,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:53,691 INFO L85 PathProgramCache]: Analyzing trace with hash 478381963, now seen corresponding path program 1 times [2024-05-06 04:15:53,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:53,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:53,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:53,792 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:53,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:53,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:53,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:53,892 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:53,910 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:53,987 INFO L85 PathProgramCache]: Analyzing trace with hash 1944939684, now seen corresponding path program 2 times [2024-05-06 04:15:53,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:53,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:54,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:54,143 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:54,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:54,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:54,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:54,245 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:54,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:15:55,094 INFO L85 PathProgramCache]: Analyzing trace with hash 163588781, now seen corresponding path program 3 times [2024-05-06 04:15:55,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:55,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:55,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:55,194 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:55,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:55,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:55,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:55,297 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:55,315 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:15:57,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1355626514, now seen corresponding path program 2 times [2024-05-06 04:15:57,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:57,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:57,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:57,456 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:57,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:57,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:57,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:57,560 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:57,579 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:57,631 INFO L85 PathProgramCache]: Analyzing trace with hash 1944920559, now seen corresponding path program 4 times [2024-05-06 04:15:57,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:57,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:57,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:57,791 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:57,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:57,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:57,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:57,890 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:57,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:15:58,006 INFO L85 PathProgramCache]: Analyzing trace with hash 478364143, now seen corresponding path program 5 times [2024-05-06 04:15:58,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:58,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:58,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:58,107 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:58,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:15:58,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:15:58,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:15:58,206 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:15:58,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:00,281 INFO L85 PathProgramCache]: Analyzing trace with hash 268090307, now seen corresponding path program 6 times [2024-05-06 04:16:00,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:00,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:00,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:00,377 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:00,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:00,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:00,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:00,473 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:00,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:00,567 INFO L85 PathProgramCache]: Analyzing trace with hash -279134341, now seen corresponding path program 7 times [2024-05-06 04:16:00,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:00,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:00,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:00,665 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:00,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:00,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:00,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:00,820 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:00,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:16:03,670 INFO L85 PathProgramCache]: Analyzing trace with hash -63229243, now seen corresponding path program 8 times [2024-05-06 04:16:03,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:03,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:03,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:03,774 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:03,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:03,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:03,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:03,873 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:03,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:05,967 INFO L85 PathProgramCache]: Analyzing trace with hash -279124636, now seen corresponding path program 9 times [2024-05-06 04:16:05,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:05,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:05,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:06,065 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:06,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:06,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:06,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:06,165 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:06,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:06,256 INFO L85 PathProgramCache]: Analyzing trace with hash 268102247, now seen corresponding path program 10 times [2024-05-06 04:16:06,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:06,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:06,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:06,354 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:06,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:06,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:06,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:06,525 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:06,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:06,600 INFO L85 PathProgramCache]: Analyzing trace with hash 1456879537, now seen corresponding path program 1 times [2024-05-06 04:16:06,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:06,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:06,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:06,698 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:06,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:06,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:06,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:06,793 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:06,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:06,892 INFO L85 PathProgramCache]: Analyzing trace with hash -2081373890, now seen corresponding path program 2 times [2024-05-06 04:16:06,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:06,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:06,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:06,995 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:06,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:06,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:07,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:07,098 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:07,117 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:16:07,752 INFO L85 PathProgramCache]: Analyzing trace with hash -98080429, now seen corresponding path program 3 times [2024-05-06 04:16:07,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:07,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:07,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:07,847 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:07,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:07,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:07,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:07,942 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:07,964 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:10,017 INFO L85 PathProgramCache]: Analyzing trace with hash 168886212, now seen corresponding path program 4 times [2024-05-06 04:16:10,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:10,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:10,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:10,195 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:10,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:10,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:10,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:10,318 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:10,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:10,406 INFO L85 PathProgramCache]: Analyzing trace with hash 940506010, now seen corresponding path program 5 times [2024-05-06 04:16:10,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:10,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:10,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:10,524 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:10,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:10,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:10,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:10,621 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:10,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:16:10,738 INFO L85 PathProgramCache]: Analyzing trace with hash -909084026, now seen corresponding path program 6 times [2024-05-06 04:16:10,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:10,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:10,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:10,896 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:10,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:10,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:10,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:11,021 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:11,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:11,101 INFO L85 PathProgramCache]: Analyzing trace with hash -11537712, now seen corresponding path program 1 times [2024-05-06 04:16:11,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:11,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:11,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:11,211 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:11,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:11,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:11,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:11,321 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:11,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:11,413 INFO L85 PathProgramCache]: Analyzing trace with hash -357668353, now seen corresponding path program 2 times [2024-05-06 04:16:11,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:11,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:11,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:11,584 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:11,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:11,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:11,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:11,698 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:11,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:16:11,975 INFO L85 PathProgramCache]: Analyzing trace with hash 1797183666, now seen corresponding path program 3 times [2024-05-06 04:16:11,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:11,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:11,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:12,084 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:12,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:12,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:12,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:12,199 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:12,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:16:14,263 INFO L85 PathProgramCache]: Analyzing trace with hash 1277560471, now seen corresponding path program 1 times [2024-05-06 04:16:14,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:14,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:14,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:14,378 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:14,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:14,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:14,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:14,491 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:14,525 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:14,620 INFO L85 PathProgramCache]: Analyzing trace with hash -357701893, now seen corresponding path program 4 times [2024-05-06 04:16:14,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:14,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:14,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:14,810 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:14,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:14,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:14,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:14,920 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:14,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:15,037 INFO L85 PathProgramCache]: Analyzing trace with hash -11570412, now seen corresponding path program 5 times [2024-05-06 04:16:15,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:15,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:15,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:15,146 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:15,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:15,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:15,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:15,256 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:15,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:15,353 INFO L85 PathProgramCache]: Analyzing trace with hash -268188226, now seen corresponding path program 6 times [2024-05-06 04:16:15,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:15,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:15,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:15,457 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:15,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:15,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:15,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:15,561 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:15,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:15,654 INFO L85 PathProgramCache]: Analyzing trace with hash 276100335, now seen corresponding path program 7 times [2024-05-06 04:16:15,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:15,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:15,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:15,771 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:15,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:15,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:15,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:15,876 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:15,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:16:18,477 INFO L85 PathProgramCache]: Analyzing trace with hash -30823456, now seen corresponding path program 8 times [2024-05-06 04:16:18,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:18,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:18,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:18,582 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:18,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:18,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:18,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:18,688 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:18,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:18,774 INFO L85 PathProgramCache]: Analyzing trace with hash 276124455, now seen corresponding path program 9 times [2024-05-06 04:16:18,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:18,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:18,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:18,879 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:18,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:18,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:18,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:18,988 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:19,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:21,078 INFO L85 PathProgramCache]: Analyzing trace with hash -268161406, now seen corresponding path program 10 times [2024-05-06 04:16:21,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:21,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:21,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:21,183 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:21,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:21,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:21,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:21,287 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:21,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:16:23,358 INFO L85 PathProgramCache]: Analyzing trace with hash 1066443753, now seen corresponding path program 2 times [2024-05-06 04:16:23,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:23,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:23,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:23,463 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:23,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:23,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:23,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:23,648 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:23,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:25,734 INFO L85 PathProgramCache]: Analyzing trace with hash -1225088731, now seen corresponding path program 11 times [2024-05-06 04:16:25,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:25,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:25,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:25,841 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:25,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:25,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:25,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:25,950 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:25,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:26,043 INFO L85 PathProgramCache]: Analyzing trace with hash 676955722, now seen corresponding path program 12 times [2024-05-06 04:16:26,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:26,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:26,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:26,151 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:26,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:26,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:26,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:26,258 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:26,273 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:16:26,478 INFO L85 PathProgramCache]: Analyzing trace with hash -489208377, now seen corresponding path program 13 times [2024-05-06 04:16:26,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:26,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:26,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:26,586 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:26,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:26,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:26,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:26,694 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:26,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:16:28,755 INFO L85 PathProgramCache]: Analyzing trace with hash 1247968300, now seen corresponding path program 3 times [2024-05-06 04:16:28,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:28,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:28,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:28,947 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:28,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:28,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:28,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:29,059 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:29,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:29,466 INFO L85 PathProgramCache]: Analyzing trace with hash 676922182, now seen corresponding path program 14 times [2024-05-06 04:16:29,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:29,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:29,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:29,574 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:29,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:29,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:29,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:29,681 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:29,703 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:29,923 INFO L85 PathProgramCache]: Analyzing trace with hash -1225121431, now seen corresponding path program 15 times [2024-05-06 04:16:29,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:29,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:29,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:30,033 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:30,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:30,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:30,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:30,149 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:30,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:32,247 INFO L85 PathProgramCache]: Analyzing trace with hash -1683180599, now seen corresponding path program 16 times [2024-05-06 04:16:32,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:32,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:32,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:32,354 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:32,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:32,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:32,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:32,536 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:32,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:32,611 INFO L85 PathProgramCache]: Analyzing trace with hash -638990268, now seen corresponding path program 17 times [2024-05-06 04:16:32,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:32,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:32,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:32,718 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:32,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:32,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:32,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:32,825 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:32,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:16:35,303 INFO L85 PathProgramCache]: Analyzing trace with hash 1666138923, now seen corresponding path program 18 times [2024-05-06 04:16:35,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:35,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:35,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:35,424 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:35,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:35,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:35,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:35,528 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:35,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:35,615 INFO L85 PathProgramCache]: Analyzing trace with hash -638966148, now seen corresponding path program 19 times [2024-05-06 04:16:35,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:35,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:35,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:35,720 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:35,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:35,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:35,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:35,826 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:35,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:35,903 INFO L85 PathProgramCache]: Analyzing trace with hash -1683153779, now seen corresponding path program 20 times [2024-05-06 04:16:35,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:35,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:35,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:36,081 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:36,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:36,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:36,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:36,188 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:36,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:16:38,250 INFO L85 PathProgramCache]: Analyzing trace with hash -787364674, now seen corresponding path program 4 times [2024-05-06 04:16:38,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:38,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:38,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:38,356 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:38,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:38,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:38,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:38,470 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:38,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:38,612 INFO L85 PathProgramCache]: Analyzing trace with hash 108049905, now seen corresponding path program 21 times [2024-05-06 04:16:38,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:38,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:38,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:38,722 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:38,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:38,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:38,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:38,830 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:38,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:40,266 INFO L85 PathProgramCache]: Analyzing trace with hash -945419522, now seen corresponding path program 22 times [2024-05-06 04:16:40,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:40,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:40,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:40,382 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:40,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:40,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:40,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:40,566 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:40,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:16:40,798 INFO L85 PathProgramCache]: Analyzing trace with hash 756766611, now seen corresponding path program 23 times [2024-05-06 04:16:40,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:40,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:40,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:40,908 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:40,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:40,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:40,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:41,023 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:41,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:16:41,098 INFO L85 PathProgramCache]: Analyzing trace with hash 310262776, now seen corresponding path program 5 times [2024-05-06 04:16:41,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:41,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:41,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:41,212 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:41,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:41,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:41,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:41,325 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:41,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:43,426 INFO L85 PathProgramCache]: Analyzing trace with hash -945453062, now seen corresponding path program 24 times [2024-05-06 04:16:43,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:43,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:43,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:43,536 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:43,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:43,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:43,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:43,646 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:43,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:43,737 INFO L85 PathProgramCache]: Analyzing trace with hash 108017205, now seen corresponding path program 25 times [2024-05-06 04:16:43,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:43,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:43,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:43,910 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:43,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:43,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:43,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:44,017 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:44,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:44,169 INFO L85 PathProgramCache]: Analyzing trace with hash -1648244355, now seen corresponding path program 26 times [2024-05-06 04:16:44,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:44,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:44,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:44,273 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:44,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:44,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:44,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:44,377 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:44,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:44,463 INFO L85 PathProgramCache]: Analyzing trace with hash 444033296, now seen corresponding path program 27 times [2024-05-06 04:16:44,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:44,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:44,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:44,568 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:44,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:44,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:44,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:44,672 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:44,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:16:45,821 INFO L85 PathProgramCache]: Analyzing trace with hash 880131039, now seen corresponding path program 28 times [2024-05-06 04:16:45,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:45,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:45,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:45,926 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:45,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:45,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:46,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:46,100 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:46,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:46,847 INFO L85 PathProgramCache]: Analyzing trace with hash 444057416, now seen corresponding path program 29 times [2024-05-06 04:16:46,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:46,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:46,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:46,951 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:46,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:46,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:46,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:47,057 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:47,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:49,146 INFO L85 PathProgramCache]: Analyzing trace with hash -1648217535, now seen corresponding path program 30 times [2024-05-06 04:16:49,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:49,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:49,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:49,250 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:49,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:49,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:49,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:49,354 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:49,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:16:51,413 INFO L85 PathProgramCache]: Analyzing trace with hash -586539126, now seen corresponding path program 6 times [2024-05-06 04:16:51,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:51,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:51,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:51,526 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:51,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:51,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:51,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:51,635 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:16:51,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:51,725 INFO L85 PathProgramCache]: Analyzing trace with hash -831964826, now seen corresponding path program 31 times [2024-05-06 04:16:51,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:51,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:51,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:51,959 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:51,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:51,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:51,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:52,066 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:52,085 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:52,167 INFO L85 PathProgramCache]: Analyzing trace with hash -21105111, now seen corresponding path program 32 times [2024-05-06 04:16:52,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:52,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:52,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:52,275 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:52,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:52,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:52,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:52,382 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:52,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:16:52,717 INFO L85 PathProgramCache]: Analyzing trace with hash -654257720, now seen corresponding path program 33 times [2024-05-06 04:16:52,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:52,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:52,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:52,825 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:52,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:52,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:52,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:52,935 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:52,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:16:55,009 INFO L85 PathProgramCache]: Analyzing trace with hash -518189395, now seen corresponding path program 7 times [2024-05-06 04:16:55,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:55,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:55,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:55,122 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:55,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:55,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:55,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:55,302 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:55,322 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:55,815 INFO L85 PathProgramCache]: Analyzing trace with hash -21138651, now seen corresponding path program 34 times [2024-05-06 04:16:55,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:55,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:55,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:55,924 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:55,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:55,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:55,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:56,037 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:56,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:16:58,130 INFO L85 PathProgramCache]: Analyzing trace with hash -831997526, now seen corresponding path program 35 times [2024-05-06 04:16:58,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:58,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:58,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:58,238 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:58,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:16:58,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:16:58,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:16:58,345 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:16:58,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:00,427 INFO L85 PathProgramCache]: Analyzing trace with hash -1427988888, now seen corresponding path program 36 times [2024-05-06 04:17:00,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:00,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:00,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:00,533 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:00,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:00,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:00,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:00,637 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:00,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:00,739 INFO L85 PathProgramCache]: Analyzing trace with hash -1317981819, now seen corresponding path program 37 times [2024-05-06 04:17:00,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:00,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:00,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:00,951 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:00,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:00,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:00,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:01,061 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:01,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:17:01,296 INFO L85 PathProgramCache]: Analyzing trace with hash 2092237322, now seen corresponding path program 38 times [2024-05-06 04:17:01,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:01,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:01,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:01,401 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:01,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:01,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:01,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:01,505 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:01,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:01,577 INFO L85 PathProgramCache]: Analyzing trace with hash -1317957699, now seen corresponding path program 39 times [2024-05-06 04:17:01,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:01,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:01,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:01,682 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:01,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:01,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:01,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:01,790 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:01,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:01,877 INFO L85 PathProgramCache]: Analyzing trace with hash -1427962068, now seen corresponding path program 40 times [2024-05-06 04:17:01,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:01,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:01,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:01,982 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:01,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:01,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:01,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:02,157 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:02,185 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:17:02,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1481680255, now seen corresponding path program 8 times [2024-05-06 04:17:02,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:02,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:02,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:02,345 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:02,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:02,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:02,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:02,451 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:02,474 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:02,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1341281554, now seen corresponding path program 41 times [2024-05-06 04:17:02,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:02,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:02,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:02,649 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:02,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:02,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:02,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:02,757 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:02,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:02,846 INFO L85 PathProgramCache]: Analyzing trace with hash -1369944067, now seen corresponding path program 42 times [2024-05-06 04:17:02,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:02,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:02,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:02,954 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:02,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:02,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:02,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:03,066 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:03,081 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:17:06,634 INFO L85 PathProgramCache]: Analyzing trace with hash 481407604, now seen corresponding path program 43 times [2024-05-06 04:17:06,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:06,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:06,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:06,814 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:06,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:06,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:06,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:06,923 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:06,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:17:08,979 INFO L85 PathProgramCache]: Analyzing trace with hash 42356057, now seen corresponding path program 9 times [2024-05-06 04:17:08,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:08,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:08,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:09,092 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:09,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:09,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:09,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:09,207 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:09,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:09,303 INFO L85 PathProgramCache]: Analyzing trace with hash -1369977607, now seen corresponding path program 44 times [2024-05-06 04:17:09,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:09,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:09,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:09,412 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:09,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:09,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:09,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:09,532 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:09,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:09,629 INFO L85 PathProgramCache]: Analyzing trace with hash 1341248854, now seen corresponding path program 45 times [2024-05-06 04:17:09,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:09,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:09,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:09,795 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:09,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:09,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:09,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:09,903 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:09,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:10,000 INFO L85 PathProgramCache]: Analyzing trace with hash 460812604, now seen corresponding path program 46 times [2024-05-06 04:17:10,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:10,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:10,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:10,106 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:10,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:10,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:10,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:10,211 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:10,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:10,313 INFO L85 PathProgramCache]: Analyzing trace with hash 1400289585, now seen corresponding path program 47 times [2024-05-06 04:17:10,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:10,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:10,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:10,418 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:10,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:10,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:10,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:10,522 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:10,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:17:12,748 INFO L85 PathProgramCache]: Analyzing trace with hash 459304926, now seen corresponding path program 48 times [2024-05-06 04:17:12,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:12,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:12,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:12,854 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:12,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:12,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:12,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:13,032 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:13,062 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:13,129 INFO L85 PathProgramCache]: Analyzing trace with hash 1400313705, now seen corresponding path program 49 times [2024-05-06 04:17:13,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:13,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:13,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:13,233 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:13,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:13,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:13,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:13,340 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:13,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:13,422 INFO L85 PathProgramCache]: Analyzing trace with hash 460839424, now seen corresponding path program 50 times [2024-05-06 04:17:13,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:13,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:13,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:13,528 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:13,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:13,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:13,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:13,636 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:13,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:17:15,696 INFO L85 PathProgramCache]: Analyzing trace with hash -407734485, now seen corresponding path program 10 times [2024-05-06 04:17:15,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:15,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:15,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:15,803 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:15,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:15,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:15,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:15,910 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:15,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:16,014 INFO L85 PathProgramCache]: Analyzing trace with hash 134212578, now seen corresponding path program 51 times [2024-05-06 04:17:16,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:16,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:16,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:16,183 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:16,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:16,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:16,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:16,285 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:16,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:16,360 INFO L85 PathProgramCache]: Analyzing trace with hash -134376659, now seen corresponding path program 52 times [2024-05-06 04:17:16,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:16,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:16,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:16,463 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:16,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:16,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:16,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:16,565 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:16,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:17:16,764 INFO L85 PathProgramCache]: Analyzing trace with hash 129291588, now seen corresponding path program 53 times [2024-05-06 04:17:16,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:16,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:16,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:16,867 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:16,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:16,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:16,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:16,971 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:16,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:17,142 INFO L85 PathProgramCache]: Analyzing trace with hash 2025773160, now seen corresponding path program 54 times [2024-05-06 04:17:17,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:17,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:17,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:17,254 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:17,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:17,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:17,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:17,366 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:17,386 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:17,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1625540731, now seen corresponding path program 55 times [2024-05-06 04:17:17,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:17,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:17,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:17,612 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:17,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:17,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:17,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:17,731 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:17,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:17:17,814 INFO L85 PathProgramCache]: Analyzing trace with hash 1147845642, now seen corresponding path program 56 times [2024-05-06 04:17:17,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:17,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:17,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:17,927 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:17,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:17,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:17,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:18,040 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:18,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:18,123 INFO L85 PathProgramCache]: Analyzing trace with hash -1625531026, now seen corresponding path program 57 times [2024-05-06 04:17:18,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:18,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:18,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:18,236 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:18,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:18,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:18,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:18,347 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:18,366 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:18,423 INFO L85 PathProgramCache]: Analyzing trace with hash 2025785100, now seen corresponding path program 58 times [2024-05-06 04:17:18,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:18,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:18,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:18,612 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:18,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:18,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:18,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:18,725 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:18,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:18,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1865354084, now seen corresponding path program 59 times [2024-05-06 04:17:18,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:18,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:18,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:18,925 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:18,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:18,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:18,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:19,033 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:19,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:19,103 INFO L85 PathProgramCache]: Analyzing trace with hash 1991402490, now seen corresponding path program 60 times [2024-05-06 04:17:19,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:19,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:19,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:19,212 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:19,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:19,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:19,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:19,320 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:19,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:17:19,392 INFO L85 PathProgramCache]: Analyzing trace with hash 1603935782, now seen corresponding path program 61 times [2024-05-06 04:17:19,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:19,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:19,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:19,501 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:19,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:19,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:19,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:19,675 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:19,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:19,785 INFO L85 PathProgramCache]: Analyzing trace with hash 1991383365, now seen corresponding path program 62 times [2024-05-06 04:17:19,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:19,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:19,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:19,896 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:19,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:19,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:19,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:20,005 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:20,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:20,080 INFO L85 PathProgramCache]: Analyzing trace with hash 1865336264, now seen corresponding path program 63 times [2024-05-06 04:17:20,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:20,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:20,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:20,188 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:20,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:20,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:20,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:20,298 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:20,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:20,449 INFO L85 PathProgramCache]: Analyzing trace with hash 45077650, now seen corresponding path program 64 times [2024-05-06 04:17:20,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:20,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:20,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:20,560 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:20,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:20,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:20,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:20,671 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:20,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:22,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1397407899, now seen corresponding path program 65 times [2024-05-06 04:17:22,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:22,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:22,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:22,919 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:22,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:22,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:22,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:23,031 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:23,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:17:23,116 INFO L85 PathProgramCache]: Analyzing trace with hash 369972660, now seen corresponding path program 66 times [2024-05-06 04:17:23,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:23,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:23,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:23,228 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:23,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:23,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:23,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:23,340 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:23,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:23,419 INFO L85 PathProgramCache]: Analyzing trace with hash 1397417604, now seen corresponding path program 67 times [2024-05-06 04:17:23,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:23,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:23,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:23,531 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:23,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:23,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:23,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:23,643 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:23,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:23,726 INFO L85 PathProgramCache]: Analyzing trace with hash 45089590, now seen corresponding path program 68 times [2024-05-06 04:17:23,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:23,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:23,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:23,908 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:23,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:23,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:23,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:24,020 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:24,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:24,113 INFO L85 PathProgramCache]: Analyzing trace with hash -504637446, now seen corresponding path program 69 times [2024-05-06 04:17:24,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:24,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:24,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:24,225 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:24,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:24,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:24,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:24,334 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:24,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:26,401 INFO L85 PathProgramCache]: Analyzing trace with hash 1536109092, now seen corresponding path program 70 times [2024-05-06 04:17:26,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:26,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:26,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:26,510 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:26,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:26,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:26,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:26,620 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:26,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:17:26,711 INFO L85 PathProgramCache]: Analyzing trace with hash 374742332, now seen corresponding path program 71 times [2024-05-06 04:17:26,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:26,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:26,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:26,821 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:26,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:26,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:26,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:27,004 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:27,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:27,109 INFO L85 PathProgramCache]: Analyzing trace with hash 1536089967, now seen corresponding path program 72 times [2024-05-06 04:17:27,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:27,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:27,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:27,220 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:27,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:27,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:27,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:27,332 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:27,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:27,459 INFO L85 PathProgramCache]: Analyzing trace with hash -504655266, now seen corresponding path program 73 times [2024-05-06 04:17:27,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:27,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:27,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:27,568 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:27,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:27,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:27,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:27,678 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:27,702 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:27,812 INFO L85 PathProgramCache]: Analyzing trace with hash 799280361, now seen corresponding path program 74 times [2024-05-06 04:17:27,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:27,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:27,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:27,969 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:27,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:27,969 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:27,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:28,089 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:28,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:28,175 INFO L85 PathProgramCache]: Analyzing trace with hash -992111836, now seen corresponding path program 75 times [2024-05-06 04:17:28,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:28,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:28,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:28,362 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:28,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:28,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:28,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:28,475 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:28,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:17:28,556 INFO L85 PathProgramCache]: Analyzing trace with hash -690695093, now seen corresponding path program 76 times [2024-05-06 04:17:28,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:28,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:28,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:28,669 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:28,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:28,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:28,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:28,782 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:28,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:28,870 INFO L85 PathProgramCache]: Analyzing trace with hash -992102131, now seen corresponding path program 77 times [2024-05-06 04:17:28,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:28,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:28,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:28,986 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:28,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:28,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:29,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:29,100 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:29,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:29,177 INFO L85 PathProgramCache]: Analyzing trace with hash 799292301, now seen corresponding path program 78 times [2024-05-06 04:17:29,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:29,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:29,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:29,357 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:29,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:29,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:29,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:29,469 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:29,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:29,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1023513027, now seen corresponding path program 79 times [2024-05-06 04:17:29,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:29,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:29,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:29,656 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:29,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:29,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:29,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:29,765 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:29,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:29,853 INFO L85 PathProgramCache]: Analyzing trace with hash 1664133499, now seen corresponding path program 80 times [2024-05-06 04:17:29,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:29,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:29,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:29,965 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:29,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:29,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:29,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:30,074 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:30,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:17:30,146 INFO L85 PathProgramCache]: Analyzing trace with hash 48531653, now seen corresponding path program 81 times [2024-05-06 04:17:30,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:30,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:30,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:30,258 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:30,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:30,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:30,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:30,478 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:30,498 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:30,571 INFO L85 PathProgramCache]: Analyzing trace with hash 1664114374, now seen corresponding path program 82 times [2024-05-06 04:17:30,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:30,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:30,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:30,708 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:30,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:30,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:30,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:30,827 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:30,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:30,954 INFO L85 PathProgramCache]: Analyzing trace with hash 1023495207, now seen corresponding path program 83 times [2024-05-06 04:17:30,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:30,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:30,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:31,063 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:31,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:31,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:31,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:31,171 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:31,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:31,246 INFO L85 PathProgramCache]: Analyzing trace with hash 1364610931, now seen corresponding path program 84 times [2024-05-06 04:17:31,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:31,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:31,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:31,358 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:31,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:31,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:31,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:31,468 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:31,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:31,552 INFO L85 PathProgramCache]: Analyzing trace with hash -646733350, now seen corresponding path program 85 times [2024-05-06 04:17:31,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:31,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:31,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:31,738 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:31,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:31,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:31,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:31,849 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:31,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:17:31,932 INFO L85 PathProgramCache]: Analyzing trace with hash 1426103381, now seen corresponding path program 86 times [2024-05-06 04:17:31,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:31,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:31,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:32,045 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:32,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:32,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:32,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:32,156 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:32,187 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:32,266 INFO L85 PathProgramCache]: Analyzing trace with hash -646723645, now seen corresponding path program 87 times [2024-05-06 04:17:32,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:32,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:32,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:32,379 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:32,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:32,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:32,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:32,490 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:32,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:32,561 INFO L85 PathProgramCache]: Analyzing trace with hash 1364622871, now seen corresponding path program 88 times [2024-05-06 04:17:32,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:32,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:32,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:32,673 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:32,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:32,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:32,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:32,786 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:32,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:32,883 INFO L85 PathProgramCache]: Analyzing trace with hash -786273287, now seen corresponding path program 89 times [2024-05-06 04:17:32,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:32,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:32,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:33,072 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:33,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:33,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:33,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:33,180 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:33,199 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:33,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1395332613, now seen corresponding path program 90 times [2024-05-06 04:17:33,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:33,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:33,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:33,537 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:33,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:33,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:33,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:33,646 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:33,658 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:17:33,738 INFO L85 PathProgramCache]: Analyzing trace with hash 305638779, now seen corresponding path program 91 times [2024-05-06 04:17:33,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:33,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:33,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:33,859 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:33,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:33,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:33,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:33,972 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:33,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:34,051 INFO L85 PathProgramCache]: Analyzing trace with hash 1395313488, now seen corresponding path program 92 times [2024-05-06 04:17:34,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:34,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:34,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:34,163 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:34,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:34,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:34,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:34,273 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:34,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:34,403 INFO L85 PathProgramCache]: Analyzing trace with hash -786291107, now seen corresponding path program 93 times [2024-05-06 04:17:34,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:34,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:34,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:34,589 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:34,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:34,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:34,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:34,698 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:34,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:34,781 INFO L85 PathProgramCache]: Analyzing trace with hash 538375530, now seen corresponding path program 94 times [2024-05-06 04:17:34,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:34,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:34,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:34,894 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:34,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:34,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:34,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:35,006 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:35,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:35,100 INFO L85 PathProgramCache]: Analyzing trace with hash -490227005, now seen corresponding path program 95 times [2024-05-06 04:17:35,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:35,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:35,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:35,213 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:35,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:35,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:35,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:35,326 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:35,340 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:17:35,412 INFO L85 PathProgramCache]: Analyzing trace with hash 1982832780, now seen corresponding path program 96 times [2024-05-06 04:17:35,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:35,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:35,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:35,524 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:35,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:35,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:35,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:35,637 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:35,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:35,751 INFO L85 PathProgramCache]: Analyzing trace with hash -490217300, now seen corresponding path program 97 times [2024-05-06 04:17:35,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:35,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:35,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:35,960 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:35,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:35,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:35,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:36,099 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:36,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:36,187 INFO L85 PathProgramCache]: Analyzing trace with hash 538387470, now seen corresponding path program 98 times [2024-05-06 04:17:36,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:36,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:36,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:36,319 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:36,319 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:36,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:36,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:36,432 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:36,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:36,539 INFO L85 PathProgramCache]: Analyzing trace with hash 759948322, now seen corresponding path program 99 times [2024-05-06 04:17:36,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:36,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:36,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:36,648 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:36,649 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:36,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:36,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:36,758 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:36,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:36,826 INFO L85 PathProgramCache]: Analyzing trace with hash 2083562236, now seen corresponding path program 100 times [2024-05-06 04:17:36,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:36,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:36,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:36,936 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:36,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:36,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:36,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:37,047 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:37,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:17:37,118 INFO L85 PathProgramCache]: Analyzing trace with hash 165920612, now seen corresponding path program 101 times [2024-05-06 04:17:37,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:37,118 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:37,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:37,229 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:37,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:37,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:37,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:37,442 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:37,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:37,529 INFO L85 PathProgramCache]: Analyzing trace with hash 2083543111, now seen corresponding path program 102 times [2024-05-06 04:17:37,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:37,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:37,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:37,641 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:37,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:37,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:37,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:37,751 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:37,769 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:37,831 INFO L85 PathProgramCache]: Analyzing trace with hash 759930502, now seen corresponding path program 103 times [2024-05-06 04:17:37,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:37,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:37,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:37,940 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:37,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:37,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:37,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:38,049 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:38,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:38,139 INFO L85 PathProgramCache]: Analyzing trace with hash 814811426, now seen corresponding path program 104 times [2024-05-06 04:17:38,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:38,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:38,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:38,245 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:38,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:38,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:38,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:38,353 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:38,371 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:38,433 INFO L85 PathProgramCache]: Analyzing trace with hash -510648821, now seen corresponding path program 105 times [2024-05-06 04:17:38,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:38,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:38,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:38,540 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:38,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:38,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:38,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:38,649 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:38,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:38,737 INFO L85 PathProgramCache]: Analyzing trace with hash -272919346, now seen corresponding path program 106 times [2024-05-06 04:17:38,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:38,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:38,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:38,847 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:38,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:38,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:38,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:39,050 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:39,068 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:39,138 INFO L85 PathProgramCache]: Analyzing trace with hash 129435582, now seen corresponding path program 107 times [2024-05-06 04:17:39,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:39,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:39,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:39,249 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:39,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:39,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:39,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:39,360 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:39,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:41,428 INFO L85 PathProgramCache]: Analyzing trace with hash -282463535, now seen corresponding path program 108 times [2024-05-06 04:17:41,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:41,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:41,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:41,541 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:41,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:41,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:41,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:41,653 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:41,671 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:43,735 INFO L85 PathProgramCache]: Analyzing trace with hash -282463535, now seen corresponding path program 109 times [2024-05-06 04:17:43,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:43,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:43,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:43,847 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:43,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:43,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:43,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:43,959 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:43,977 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:44,043 INFO L85 PathProgramCache]: Analyzing trace with hash -1533607204, now seen corresponding path program 110 times [2024-05-06 04:17:44,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:44,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:44,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:44,158 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:44,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:44,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:44,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:44,273 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:44,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:44,347 INFO L85 PathProgramCache]: Analyzing trace with hash -297182337, now seen corresponding path program 111 times [2024-05-06 04:17:44,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:44,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:44,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:44,552 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:44,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:44,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:44,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:44,671 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:44,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:44,753 INFO L85 PathProgramCache]: Analyzing trace with hash -622717121, now seen corresponding path program 112 times [2024-05-06 04:17:44,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:44,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:44,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:44,874 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:44,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:44,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:44,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:44,989 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:45,007 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:45,077 INFO L85 PathProgramCache]: Analyzing trace with hash -622717121, now seen corresponding path program 113 times [2024-05-06 04:17:45,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:45,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:45,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:45,192 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:45,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:45,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:45,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:45,307 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:45,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:47,389 INFO L85 PathProgramCache]: Analyzing trace with hash -1430675973, now seen corresponding path program 114 times [2024-05-06 04:17:47,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:47,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:47,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:47,508 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:47,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:47,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:47,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:47,624 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:47,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:49,706 INFO L85 PathProgramCache]: Analyzing trace with hash -1401281478, now seen corresponding path program 115 times [2024-05-06 04:17:49,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:49,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:49,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:49,824 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:49,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:49,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:49,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:50,074 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:50,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:50,152 INFO L85 PathProgramCache]: Analyzing trace with hash -490052132, now seen corresponding path program 116 times [2024-05-06 04:17:50,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:50,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:50,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:50,298 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:50,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:50,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:50,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:50,434 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:50,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:50,513 INFO L85 PathProgramCache]: Analyzing trace with hash 1988253819, now seen corresponding path program 117 times [2024-05-06 04:17:50,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:50,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:50,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:50,629 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:50,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:50,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:50,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:50,748 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:50,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:50,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1506326973, now seen corresponding path program 118 times [2024-05-06 04:17:50,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:50,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:50,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:50,943 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:50,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:50,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:50,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:51,060 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:51,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:51,193 INFO L85 PathProgramCache]: Analyzing trace with hash -548503364, now seen corresponding path program 119 times [2024-05-06 04:17:51,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:51,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:51,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:51,311 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:51,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:51,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:51,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:51,428 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:51,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:51,499 INFO L85 PathProgramCache]: Analyzing trace with hash 176265616, now seen corresponding path program 120 times [2024-05-06 04:17:51,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:51,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:51,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:51,619 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:51,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:51,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:51,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:51,834 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:51,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:51,912 INFO L85 PathProgramCache]: Analyzing trace with hash 1169267519, now seen corresponding path program 121 times [2024-05-06 04:17:51,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:51,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:51,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:52,030 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:52,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:52,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:52,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:52,148 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:52,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:52,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1169267519, now seen corresponding path program 122 times [2024-05-06 04:17:52,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:52,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:52,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:52,387 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:52,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:52,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:52,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:52,513 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:52,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:53,221 INFO L85 PathProgramCache]: Analyzing trace with hash -1615321714, now seen corresponding path program 123 times [2024-05-06 04:17:53,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:53,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:53,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:53,340 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:53,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:53,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:53,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:53,460 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:53,478 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:53,556 INFO L85 PathProgramCache]: Analyzing trace with hash 1464635173, now seen corresponding path program 124 times [2024-05-06 04:17:53,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:53,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:53,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:53,677 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:53,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:53,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:53,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:53,797 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:53,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:53,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1840949137, now seen corresponding path program 125 times [2024-05-06 04:17:53,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:53,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:53,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:54,011 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:54,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:54,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:54,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:54,246 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:54,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:56,312 INFO L85 PathProgramCache]: Analyzing trace with hash -1234847642, now seen corresponding path program 126 times [2024-05-06 04:17:56,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:56,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:56,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:56,435 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:56,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:56,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:56,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:56,554 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:56,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:56,644 INFO L85 PathProgramCache]: Analyzing trace with hash 374429520, now seen corresponding path program 127 times [2024-05-06 04:17:56,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:56,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:56,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:56,770 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:56,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:56,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:56,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:56,893 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:56,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:57,642 INFO L85 PathProgramCache]: Analyzing trace with hash -1277586009, now seen corresponding path program 128 times [2024-05-06 04:17:57,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:57,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:57,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:57,764 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:57,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:57,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:57,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:57,895 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:57,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:57,987 INFO L85 PathProgramCache]: Analyzing trace with hash -950459869, now seen corresponding path program 129 times [2024-05-06 04:17:57,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:57,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:58,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:58,108 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:58,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:58,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:58,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:58,231 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:58,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:58,326 INFO L85 PathProgramCache]: Analyzing trace with hash 600515882, now seen corresponding path program 130 times [2024-05-06 04:17:58,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:58,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:58,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:58,448 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:58,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:58,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:58,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:58,680 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:58,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:58,918 INFO L85 PathProgramCache]: Analyzing trace with hash 600515882, now seen corresponding path program 131 times [2024-05-06 04:17:58,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:58,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:58,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:59,040 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:59,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:59,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:59,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:59,161 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:17:59,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:59,247 INFO L85 PathProgramCache]: Analyzing trace with hash 1570168537, now seen corresponding path program 132 times [2024-05-06 04:17:59,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:59,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:59,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:59,369 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:59,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:59,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:59,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:59,491 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:59,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:17:59,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1430585131, now seen corresponding path program 133 times [2024-05-06 04:17:59,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:59,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:59,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:59,711 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:59,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:17:59,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:17:59,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:17:59,833 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:17:59,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:00,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1398466842, now seen corresponding path program 134 times [2024-05-06 04:18:00,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:00,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:00,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:00,157 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:00,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:00,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:00,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:00,281 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:00,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:00,358 INFO L85 PathProgramCache]: Analyzing trace with hash 402799884, now seen corresponding path program 135 times [2024-05-06 04:18:00,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:00,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:00,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:00,579 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:00,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:00,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:00,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:00,711 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:00,729 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:00,798 INFO L85 PathProgramCache]: Analyzing trace with hash -398104741, now seen corresponding path program 136 times [2024-05-06 04:18:00,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:00,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:00,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:00,923 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:00,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:00,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:00,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:01,048 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:01,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:01,134 INFO L85 PathProgramCache]: Analyzing trace with hash 543655661, now seen corresponding path program 137 times [2024-05-06 04:18:01,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:01,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:01,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:01,263 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:01,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:01,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:01,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:01,388 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:01,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:01,505 INFO L85 PathProgramCache]: Analyzing trace with hash 1088563841, now seen corresponding path program 138 times [2024-05-06 04:18:01,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:01,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:01,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:01,635 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:01,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:01,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:01,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:01,760 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:01,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:01,850 INFO L85 PathProgramCache]: Analyzing trace with hash -614258566, now seen corresponding path program 139 times [2024-05-06 04:18:01,850 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:01,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:01,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:01,975 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:01,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:01,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:01,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:02,100 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:02,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:02,191 INFO L85 PathProgramCache]: Analyzing trace with hash -1862145628, now seen corresponding path program 140 times [2024-05-06 04:18:02,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:02,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:02,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:02,417 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:02,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:02,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:02,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:02,541 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:02,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:02,616 INFO L85 PathProgramCache]: Analyzing trace with hash -1862145628, now seen corresponding path program 141 times [2024-05-06 04:18:02,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:02,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:02,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:02,740 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:02,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:02,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:02,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:02,864 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:18:02,886 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:02,935 INFO L85 PathProgramCache]: Analyzing trace with hash -964239607, now seen corresponding path program 142 times [2024-05-06 04:18:02,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:02,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:02,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:03,062 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:18:03,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:03,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:03,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:03,188 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:18:03,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:05,255 INFO L85 PathProgramCache]: Analyzing trace with hash 173344001, now seen corresponding path program 143 times [2024-05-06 04:18:05,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:05,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:05,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:05,385 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:18:05,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:05,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:05,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:05,513 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:18:05,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:05,582 INFO L85 PathProgramCache]: Analyzing trace with hash 1078697484, now seen corresponding path program 144 times [2024-05-06 04:18:05,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:05,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:05,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:05,710 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:18:05,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:05,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:05,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:05,945 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:18:05,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:06,013 INFO L85 PathProgramCache]: Analyzing trace with hash 1078697484, now seen corresponding path program 145 times [2024-05-06 04:18:06,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:06,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:06,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:06,142 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:18:06,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:06,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:06,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:06,270 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:18:06,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:08,350 INFO L85 PathProgramCache]: Analyzing trace with hash 574863600, now seen corresponding path program 146 times [2024-05-06 04:18:08,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:08,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:08,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:08,480 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:18:08,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:08,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:08,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:08,613 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:18:08,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:08,688 INFO L85 PathProgramCache]: Analyzing trace with hash 652822001, now seen corresponding path program 11 times [2024-05-06 04:18:08,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:08,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:08,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:08,823 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:18:08,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:08,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:08,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:08,957 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:18:08,975 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:09,031 INFO L85 PathProgramCache]: Analyzing trace with hash -1237353860, now seen corresponding path program 1 times [2024-05-06 04:18:09,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:09,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:09,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:09,167 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:18:09,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:09,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:09,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:09,303 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 04:18:09,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:09,403 INFO L85 PathProgramCache]: Analyzing trace with hash -150995487, now seen corresponding path program 2 times [2024-05-06 04:18:09,403 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:09,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:09,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:09,653 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:18:09,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:09,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:09,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:09,798 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:18:09,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:09,975 INFO L85 PathProgramCache]: Analyzing trace with hash 1688333752, now seen corresponding path program 3 times [2024-05-06 04:18:09,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:09,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:10,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:10,123 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:18:10,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:10,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:10,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:10,273 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:18:10,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:10,365 INFO L85 PathProgramCache]: Analyzing trace with hash 798739494, now seen corresponding path program 4 times [2024-05-06 04:18:10,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:10,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:10,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:10,513 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:18:10,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:10,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:10,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:10,661 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:18:10,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:18:10,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1008878726, now seen corresponding path program 5 times [2024-05-06 04:18:10,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:10,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:10,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:10,891 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:18:10,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:10,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:10,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:11,159 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:18:11,178 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:13,232 INFO L85 PathProgramCache]: Analyzing trace with hash 705328053, now seen corresponding path program 1 times [2024-05-06 04:18:13,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:13,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:13,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:13,381 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:18:13,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:13,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:13,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:13,531 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 04:18:13,546 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 04:18:13,547 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:18:13,547 INFO L85 PathProgramCache]: Analyzing trace with hash -566126889, now seen corresponding path program 1 times [2024-05-06 04:18:13,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:18:13,550 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198257923] [2024-05-06 04:18:13,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:13,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:13,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:13,767 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-06 04:18:13,767 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:18:13,767 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198257923] [2024-05-06 04:18:13,768 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1198257923] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:18:13,768 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1120423998] [2024-05-06 04:18:13,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:13,768 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:18:13,768 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:18:13,821 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:18:13,821 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 04:18:14,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:14,683 INFO L262 TraceCheckSpWp]: Trace formula consists of 778 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 04:18:14,695 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:18:15,063 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-06 04:18:15,064 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 04:18:15,390 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 97 proven. 1 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2024-05-06 04:18:15,390 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1120423998] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 04:18:15,390 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 04:18:15,391 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 11] total 25 [2024-05-06 04:18:15,392 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992937410] [2024-05-06 04:18:15,392 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 04:18:15,395 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2024-05-06 04:18:15,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:18:15,397 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-05-06 04:18:15,398 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=116, Invalid=484, Unknown=0, NotChecked=0, Total=600 [2024-05-06 04:18:15,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:18:15,398 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:18:15,399 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 14.96) internal successors, (374), 25 states have internal predecessors, (374), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:18:15,399 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:18:15,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:15,988 INFO L85 PathProgramCache]: Analyzing trace with hash 858876178, now seen corresponding path program 3 times [2024-05-06 04:18:15,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:15,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:16,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:16,294 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:16,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:16,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:16,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:16,453 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:16,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:18,543 INFO L85 PathProgramCache]: Analyzing trace with hash 113612326, now seen corresponding path program 11 times [2024-05-06 04:18:18,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:18,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:18,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:18,784 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:18,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:18,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:18,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:18,930 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:18,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:19,028 INFO L85 PathProgramCache]: Analyzing trace with hash -772984471, now seen corresponding path program 12 times [2024-05-06 04:18:19,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:19,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:19,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:19,175 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:19,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:19,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:19,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:19,321 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:19,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:18:19,774 INFO L85 PathProgramCache]: Analyzing trace with hash 1807285896, now seen corresponding path program 13 times [2024-05-06 04:18:19,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:19,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:19,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:19,921 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:19,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:19,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:19,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:20,069 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:20,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:20,151 INFO L85 PathProgramCache]: Analyzing trace with hash -2026366099, now seen corresponding path program 4 times [2024-05-06 04:18:20,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:20,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:20,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:20,306 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:20,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:20,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:20,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:20,552 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:20,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:22,617 INFO L85 PathProgramCache]: Analyzing trace with hash -773003596, now seen corresponding path program 14 times [2024-05-06 04:18:22,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:22,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:22,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:22,770 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:22,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:22,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:22,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:22,920 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:22,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:23,005 INFO L85 PathProgramCache]: Analyzing trace with hash 113594506, now seen corresponding path program 15 times [2024-05-06 04:18:23,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:23,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:23,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:23,153 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:23,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:23,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:23,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:23,299 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:23,327 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:23,462 INFO L85 PathProgramCache]: Analyzing trace with hash -555760952, now seen corresponding path program 16 times [2024-05-06 04:18:23,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:23,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:23,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:23,605 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:23,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:23,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:23,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:23,745 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:23,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:23,837 INFO L85 PathProgramCache]: Analyzing trace with hash -48719594, now seen corresponding path program 17 times [2024-05-06 04:18:23,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:23,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:23,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:23,980 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:23,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:23,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:24,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:24,216 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:24,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:18:26,368 INFO L85 PathProgramCache]: Analyzing trace with hash -1510306678, now seen corresponding path program 18 times [2024-05-06 04:18:26,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:26,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:26,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:26,511 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:26,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:26,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:26,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:26,654 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:26,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:26,741 INFO L85 PathProgramCache]: Analyzing trace with hash -48709889, now seen corresponding path program 19 times [2024-05-06 04:18:26,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:26,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:26,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:26,884 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:26,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:26,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:26,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:27,026 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:27,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:29,093 INFO L85 PathProgramCache]: Analyzing trace with hash -555749012, now seen corresponding path program 20 times [2024-05-06 04:18:29,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:29,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:29,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:29,236 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:29,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:29,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:29,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:29,378 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:29,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:31,443 INFO L85 PathProgramCache]: Analyzing trace with hash 1527027058, now seen corresponding path program 3 times [2024-05-06 04:18:31,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:31,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:31,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:31,682 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:31,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:31,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:31,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:31,835 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:31,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:31,955 INFO L85 PathProgramCache]: Analyzing trace with hash -1510741370, now seen corresponding path program 11 times [2024-05-06 04:18:31,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:31,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:31,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:32,105 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:32,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:32,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:32,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:32,254 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:32,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:32,337 INFO L85 PathProgramCache]: Analyzing trace with hash 411658505, now seen corresponding path program 12 times [2024-05-06 04:18:32,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:32,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:32,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:32,483 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:32,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:32,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:32,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:32,629 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:32,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:18:33,547 INFO L85 PathProgramCache]: Analyzing trace with hash -123487512, now seen corresponding path program 13 times [2024-05-06 04:18:33,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:33,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:33,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:33,695 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:33,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:33,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:33,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:33,939 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:33,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:35,993 INFO L85 PathProgramCache]: Analyzing trace with hash -1358215219, now seen corresponding path program 4 times [2024-05-06 04:18:35,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:35,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:36,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:36,146 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:36,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:36,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:36,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:36,300 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:36,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:38,383 INFO L85 PathProgramCache]: Analyzing trace with hash 411639380, now seen corresponding path program 14 times [2024-05-06 04:18:38,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:38,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:38,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:38,529 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:38,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:38,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:38,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:38,676 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:38,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:40,754 INFO L85 PathProgramCache]: Analyzing trace with hash -1510759190, now seen corresponding path program 15 times [2024-05-06 04:18:40,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:40,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:40,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:40,900 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:40,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:40,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:40,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:41,052 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:41,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:41,149 INFO L85 PathProgramCache]: Analyzing trace with hash -850460056, now seen corresponding path program 16 times [2024-05-06 04:18:41,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:41,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:41,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:41,394 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:41,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:41,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:41,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:41,535 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:41,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:41,629 INFO L85 PathProgramCache]: Analyzing trace with hash -594457226, now seen corresponding path program 17 times [2024-05-06 04:18:41,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:41,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:41,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:41,781 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:41,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:41,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:41,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:41,924 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:41,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:18:42,449 INFO L85 PathProgramCache]: Analyzing trace with hash -1248304086, now seen corresponding path program 18 times [2024-05-06 04:18:42,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:42,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:42,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:42,591 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:42,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:42,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:42,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:42,733 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:42,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:44,800 INFO L85 PathProgramCache]: Analyzing trace with hash -594447521, now seen corresponding path program 19 times [2024-05-06 04:18:44,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:44,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:44,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:44,942 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:44,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:44,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:45,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:45,169 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:45,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:45,260 INFO L85 PathProgramCache]: Analyzing trace with hash -850448116, now seen corresponding path program 20 times [2024-05-06 04:18:45,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:45,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:45,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:45,401 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:45,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:45,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:45,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:45,542 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:45,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:47,610 INFO L85 PathProgramCache]: Analyzing trace with hash 154889683, now seen corresponding path program 3 times [2024-05-06 04:18:47,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:47,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:47,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:47,764 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:47,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:47,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:47,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:47,916 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:47,939 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:48,006 INFO L85 PathProgramCache]: Analyzing trace with hash 637309095, now seen corresponding path program 11 times [2024-05-06 04:18:48,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:48,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:48,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:48,158 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:48,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:48,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:48,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:48,384 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:48,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:50,462 INFO L85 PathProgramCache]: Analyzing trace with hash -1718253816, now seen corresponding path program 12 times [2024-05-06 04:18:50,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:50,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:50,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:50,606 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:50,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:50,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:50,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:50,751 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:50,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:18:53,062 INFO L85 PathProgramCache]: Analyzing trace with hash -1726260023, now seen corresponding path program 13 times [2024-05-06 04:18:53,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:53,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:53,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:53,212 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:53,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:53,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:53,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:53,361 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:53,380 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:53,449 INFO L85 PathProgramCache]: Analyzing trace with hash 1564614702, now seen corresponding path program 4 times [2024-05-06 04:18:53,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:53,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:53,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:53,603 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:53,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:53,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:53,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:53,756 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:53,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:53,830 INFO L85 PathProgramCache]: Analyzing trace with hash -1718272941, now seen corresponding path program 14 times [2024-05-06 04:18:53,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:53,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:53,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:54,056 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:54,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:54,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:54,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:54,204 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:54,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:54,296 INFO L85 PathProgramCache]: Analyzing trace with hash 637291275, now seen corresponding path program 15 times [2024-05-06 04:18:54,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:54,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:54,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:54,442 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:54,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:54,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:54,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:54,587 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:54,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:55,246 INFO L85 PathProgramCache]: Analyzing trace with hash 2049557287, now seen corresponding path program 16 times [2024-05-06 04:18:55,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:55,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:55,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:55,388 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:55,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:55,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:55,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:55,532 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:55,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:55,788 INFO L85 PathProgramCache]: Analyzing trace with hash -888232809, now seen corresponding path program 17 times [2024-05-06 04:18:55,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:55,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:55,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:56,017 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:56,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:56,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:56,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:56,158 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:56,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:18:57,295 INFO L85 PathProgramCache]: Analyzing trace with hash -1765412567, now seen corresponding path program 18 times [2024-05-06 04:18:57,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:57,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:57,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:57,439 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:57,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:57,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:57,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:57,581 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:57,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:57,796 INFO L85 PathProgramCache]: Analyzing trace with hash -888223104, now seen corresponding path program 19 times [2024-05-06 04:18:57,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:57,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:57,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:57,938 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:57,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:57,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:57,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:58,082 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:58,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:58,162 INFO L85 PathProgramCache]: Analyzing trace with hash 2049569227, now seen corresponding path program 20 times [2024-05-06 04:18:58,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:58,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:58,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:58,307 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:58,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:58,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:58,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:58,544 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:58,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:18:58,634 INFO L85 PathProgramCache]: Analyzing trace with hash -36137453, now seen corresponding path program 3 times [2024-05-06 04:18:58,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:58,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:58,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:58,794 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:58,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:58,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:58,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:58,949 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:58,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:59,049 INFO L85 PathProgramCache]: Analyzing trace with hash 967387367, now seen corresponding path program 11 times [2024-05-06 04:18:59,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:59,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:59,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:59,196 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:59,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:59,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:59,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:59,343 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:59,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:18:59,427 INFO L85 PathProgramCache]: Analyzing trace with hash -75761976, now seen corresponding path program 12 times [2024-05-06 04:18:59,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:59,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:59,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:59,574 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:59,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:18:59,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:18:59,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:18:59,802 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:18:59,817 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:19:02,561 INFO L85 PathProgramCache]: Analyzing trace with hash 1946346761, now seen corresponding path program 13 times [2024-05-06 04:19:02,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:02,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:02,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:02,707 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:02,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:02,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:02,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:02,853 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:02,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:19:04,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1373587566, now seen corresponding path program 4 times [2024-05-06 04:19:04,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:04,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:04,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:05,065 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:05,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:05,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:05,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:05,219 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:05,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:07,285 INFO L85 PathProgramCache]: Analyzing trace with hash -75781101, now seen corresponding path program 14 times [2024-05-06 04:19:07,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:07,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:07,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:07,432 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:07,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:07,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:07,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:07,664 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:07,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:07,764 INFO L85 PathProgramCache]: Analyzing trace with hash 967369547, now seen corresponding path program 15 times [2024-05-06 04:19:07,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:07,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:07,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:07,911 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:07,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:07,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:07,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:08,058 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:08,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:08,154 INFO L85 PathProgramCache]: Analyzing trace with hash 480568039, now seen corresponding path program 16 times [2024-05-06 04:19:08,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:08,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:08,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:08,300 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:08,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:08,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:08,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:08,443 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:08,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:08,529 INFO L85 PathProgramCache]: Analyzing trace with hash 2012708055, now seen corresponding path program 17 times [2024-05-06 04:19:08,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:08,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:08,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:08,671 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:08,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:08,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:08,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:08,893 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:08,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:19:09,052 INFO L85 PathProgramCache]: Analyzing trace with hash -2030558999, now seen corresponding path program 18 times [2024-05-06 04:19:09,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:09,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:09,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:09,195 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:09,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:09,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:09,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:09,337 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:09,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:09,453 INFO L85 PathProgramCache]: Analyzing trace with hash 2012717760, now seen corresponding path program 19 times [2024-05-06 04:19:09,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:09,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:09,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:09,597 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:09,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:09,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:09,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:09,738 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:09,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:09,839 INFO L85 PathProgramCache]: Analyzing trace with hash 480579979, now seen corresponding path program 20 times [2024-05-06 04:19:09,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:09,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:09,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:09,983 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:09,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:09,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:10,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:10,216 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:10,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:19:10,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1574537580, now seen corresponding path program 3 times [2024-05-06 04:19:10,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:10,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:10,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:10,463 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:10,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:10,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:10,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:10,616 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:10,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:10,721 INFO L85 PathProgramCache]: Analyzing trace with hash -1670672600, now seen corresponding path program 11 times [2024-05-06 04:19:10,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:10,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:10,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:10,868 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:10,868 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:10,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:10,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:11,020 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:11,038 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:11,103 INFO L85 PathProgramCache]: Analyzing trace with hash -251242329, now seen corresponding path program 12 times [2024-05-06 04:19:11,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:11,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:11,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:11,249 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:11,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:11,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:11,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:11,484 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:11,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:19:13,624 INFO L85 PathProgramCache]: Analyzing trace with hash 801423114, now seen corresponding path program 13 times [2024-05-06 04:19:13,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:13,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:13,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:13,773 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:13,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:13,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:13,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:13,925 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:13,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:19:14,038 INFO L85 PathProgramCache]: Analyzing trace with hash -164812561, now seen corresponding path program 4 times [2024-05-06 04:19:14,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:14,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:14,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:14,193 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:14,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:14,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:14,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:14,347 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:14,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:14,462 INFO L85 PathProgramCache]: Analyzing trace with hash -251261454, now seen corresponding path program 14 times [2024-05-06 04:19:14,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:14,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:14,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:14,610 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:14,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:14,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:14,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:14,844 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:14,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:14,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1670690420, now seen corresponding path program 15 times [2024-05-06 04:19:14,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:14,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:14,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:15,102 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:15,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:15,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:15,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:15,248 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:15,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:15,335 INFO L85 PathProgramCache]: Analyzing trace with hash 845627270, now seen corresponding path program 16 times [2024-05-06 04:19:15,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:15,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:15,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:15,477 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:15,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:15,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:15,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:15,619 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:15,638 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:15,695 INFO L85 PathProgramCache]: Analyzing trace with hash 444642328, now seen corresponding path program 17 times [2024-05-06 04:19:15,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:15,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:15,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:15,912 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:15,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:15,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:15,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:16,057 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:16,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:19:16,308 INFO L85 PathProgramCache]: Analyzing trace with hash 899011016, now seen corresponding path program 18 times [2024-05-06 04:19:16,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:16,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:16,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:16,456 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:16,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:16,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:16,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:16,605 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:16,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:16,689 INFO L85 PathProgramCache]: Analyzing trace with hash 444652033, now seen corresponding path program 19 times [2024-05-06 04:19:16,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:16,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:16,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:16,832 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:16,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:16,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:16,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:16,977 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:16,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:17,063 INFO L85 PathProgramCache]: Analyzing trace with hash 845639210, now seen corresponding path program 20 times [2024-05-06 04:19:17,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:17,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:17,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:17,285 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:17,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:17,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:17,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:17,426 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:17,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:18,239 INFO L85 PathProgramCache]: Analyzing trace with hash 1414075636, now seen corresponding path program 7 times [2024-05-06 04:19:18,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:18,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:18,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:19:18,341 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:19:18,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:19:18,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:18,559 INFO L85 PathProgramCache]: Analyzing trace with hash 886672475, now seen corresponding path program 8 times [2024-05-06 04:19:18,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:18,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:18,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:19:18,629 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:19:18,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:19:18,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:19:19,112 INFO L85 PathProgramCache]: Analyzing trace with hash 1717043670, now seen corresponding path program 9 times [2024-05-06 04:19:19,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:19,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:19,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:19:19,152 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:19:19,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:19:19,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:19,366 INFO L85 PathProgramCache]: Analyzing trace with hash 1656708577, now seen corresponding path program 10 times [2024-05-06 04:19:19,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:19,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:19,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:19,553 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:19,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:19,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:19,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:19,718 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:19,734 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:19,802 INFO L85 PathProgramCache]: Analyzing trace with hash -181640931, now seen corresponding path program 11 times [2024-05-06 04:19:19,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:19,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:19,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:20,098 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:20,099 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:20,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:20,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:20,400 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:20,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:19:20,517 INFO L85 PathProgramCache]: Analyzing trace with hash -1335900829, now seen corresponding path program 12 times [2024-05-06 04:19:20,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:20,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:20,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:20,753 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-06 04:19:20,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:20,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:20,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:20,919 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 37 trivial. 0 not checked. [2024-05-06 04:19:20,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:21,022 INFO L85 PathProgramCache]: Analyzing trace with hash -53234003, now seen corresponding path program 147 times [2024-05-06 04:19:21,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:21,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:21,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:21,296 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:21,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:21,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:21,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:21,715 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:21,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:21,861 INFO L85 PathProgramCache]: Analyzing trace with hash -1650253374, now seen corresponding path program 148 times [2024-05-06 04:19:21,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:21,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:21,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:22,269 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:22,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:22,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:22,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:22,579 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:22,598 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:19:24,820 INFO L85 PathProgramCache]: Analyzing trace with hash 381753679, now seen corresponding path program 149 times [2024-05-06 04:19:24,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:24,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:24,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:24,994 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:24,994 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:24,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:25,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:25,166 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:25,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:19:27,243 INFO L85 PathProgramCache]: Analyzing trace with hash -1664924748, now seen corresponding path program 12 times [2024-05-06 04:19:27,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:27,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:27,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:27,419 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:27,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:27,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:27,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:27,728 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:27,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:27,821 INFO L85 PathProgramCache]: Analyzing trace with hash -1650286914, now seen corresponding path program 150 times [2024-05-06 04:19:27,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:27,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:27,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:27,987 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:27,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:27,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:28,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:28,154 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:28,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:28,244 INFO L85 PathProgramCache]: Analyzing trace with hash -53266703, now seen corresponding path program 151 times [2024-05-06 04:19:28,244 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:28,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:28,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:28,412 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:28,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:28,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:28,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:28,573 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:28,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:30,671 INFO L85 PathProgramCache]: Analyzing trace with hash 514049345, now seen corresponding path program 152 times [2024-05-06 04:19:30,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:30,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:30,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:31,032 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:31,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:31,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:31,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:31,209 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:31,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:31,422 INFO L85 PathProgramCache]: Analyzing trace with hash -1244338740, now seen corresponding path program 153 times [2024-05-06 04:19:31,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:31,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:31,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:31,608 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:31,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:31,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:31,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:31,799 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:31,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:19:34,062 INFO L85 PathProgramCache]: Analyzing trace with hash 80205475, now seen corresponding path program 154 times [2024-05-06 04:19:34,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:34,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:34,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:34,287 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:34,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:34,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:34,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:34,443 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:34,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:34,524 INFO L85 PathProgramCache]: Analyzing trace with hash -1244314620, now seen corresponding path program 155 times [2024-05-06 04:19:34,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:34,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:34,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:34,678 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:34,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:34,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:34,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:34,836 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:34,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:34,961 INFO L85 PathProgramCache]: Analyzing trace with hash 514076165, now seen corresponding path program 156 times [2024-05-06 04:19:34,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:34,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:34,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:35,120 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:35,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:35,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:35,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:35,362 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:35,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:19:35,502 INFO L85 PathProgramCache]: Analyzing trace with hash 1604509254, now seen corresponding path program 13 times [2024-05-06 04:19:35,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:35,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:35,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:35,769 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:35,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:35,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:35,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:35,953 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:35,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:36,122 INFO L85 PathProgramCache]: Analyzing trace with hash -533697112, now seen corresponding path program 157 times [2024-05-06 04:19:36,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:36,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:36,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:36,304 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:36,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:36,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:36,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:36,529 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:36,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:36,630 INFO L85 PathProgramCache]: Analyzing trace with hash 635259431, now seen corresponding path program 158 times [2024-05-06 04:19:36,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:36,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:36,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:36,877 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:36,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:36,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:36,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:37,102 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:37,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:19:38,058 INFO L85 PathProgramCache]: Analyzing trace with hash -1781793398, now seen corresponding path program 159 times [2024-05-06 04:19:38,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:38,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:38,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:38,219 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:38,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:38,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:38,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:38,377 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:38,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:19:40,437 INFO L85 PathProgramCache]: Analyzing trace with hash -2033539217, now seen corresponding path program 14 times [2024-05-06 04:19:40,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:40,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:40,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:40,670 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:40,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:40,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:40,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:40,837 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:40,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:40,932 INFO L85 PathProgramCache]: Analyzing trace with hash 635225891, now seen corresponding path program 160 times [2024-05-06 04:19:40,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:40,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:40,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:41,098 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:41,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:41,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:41,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:41,256 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:41,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:41,346 INFO L85 PathProgramCache]: Analyzing trace with hash -533729812, now seen corresponding path program 161 times [2024-05-06 04:19:41,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:41,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:41,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:41,574 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:41,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:41,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:41,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:41,757 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:41,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:42,111 INFO L85 PathProgramCache]: Analyzing trace with hash 1528641510, now seen corresponding path program 162 times [2024-05-06 04:19:42,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:42,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:42,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:42,290 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:42,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:42,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:42,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:42,472 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:42,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:42,583 INFO L85 PathProgramCache]: Analyzing trace with hash 143247303, now seen corresponding path program 163 times [2024-05-06 04:19:42,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:42,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:42,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:42,758 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:42,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:42,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:42,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:43,006 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:43,019 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:19:45,174 INFO L85 PathProgramCache]: Analyzing trace with hash 145699848, now seen corresponding path program 164 times [2024-05-06 04:19:45,174 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:45,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:45,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:45,332 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:45,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:45,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:45,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:45,485 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:45,504 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:45,591 INFO L85 PathProgramCache]: Analyzing trace with hash 143271423, now seen corresponding path program 165 times [2024-05-06 04:19:45,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:45,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:45,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:45,742 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:45,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:45,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:45,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:45,981 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:45,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:48,041 INFO L85 PathProgramCache]: Analyzing trace with hash 1528668330, now seen corresponding path program 166 times [2024-05-06 04:19:48,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:48,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:48,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:48,197 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:48,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:48,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:48,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:48,350 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:48,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:19:50,409 INFO L85 PathProgramCache]: Analyzing trace with hash -1462744383, now seen corresponding path program 15 times [2024-05-06 04:19:50,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:50,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:50,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:50,567 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:50,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:50,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:50,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:50,812 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:50,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:52,901 INFO L85 PathProgramCache]: Analyzing trace with hash 1792920846, now seen corresponding path program 167 times [2024-05-06 04:19:52,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:52,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:52,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:53,063 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:53,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:53,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:53,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:53,223 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:53,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:53,333 INFO L85 PathProgramCache]: Analyzing trace with hash -254027903, now seen corresponding path program 168 times [2024-05-06 04:19:53,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:53,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:53,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:53,497 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:53,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:53,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:53,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:53,753 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:53,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:19:54,026 INFO L85 PathProgramCache]: Analyzing trace with hash 715070320, now seen corresponding path program 169 times [2024-05-06 04:19:54,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:54,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:54,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:54,193 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:54,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:54,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:54,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:54,350 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:54,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:19:56,406 INFO L85 PathProgramCache]: Analyzing trace with hash -1735254955, now seen corresponding path program 16 times [2024-05-06 04:19:56,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:56,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:56,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:56,570 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:56,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:56,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:56,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:56,789 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:56,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:56,877 INFO L85 PathProgramCache]: Analyzing trace with hash -254061443, now seen corresponding path program 170 times [2024-05-06 04:19:56,878 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:56,878 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:56,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:57,042 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:57,043 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:57,043 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:57,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:57,198 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:57,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:57,920 INFO L85 PathProgramCache]: Analyzing trace with hash 1792888146, now seen corresponding path program 171 times [2024-05-06 04:19:57,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:57,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:57,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:58,078 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:58,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:58,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:58,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:58,396 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:19:58,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:58,754 INFO L85 PathProgramCache]: Analyzing trace with hash 810667456, now seen corresponding path program 172 times [2024-05-06 04:19:58,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:58,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:58,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:58,928 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:58,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:58,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:58,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:59,115 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:59,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:19:59,282 INFO L85 PathProgramCache]: Analyzing trace with hash -639111891, now seen corresponding path program 173 times [2024-05-06 04:19:59,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:59,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:59,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:59,540 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:59,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:59,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:59,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:59,844 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:19:59,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:20:00,195 INFO L85 PathProgramCache]: Analyzing trace with hash 1662368610, now seen corresponding path program 174 times [2024-05-06 04:20:00,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:00,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:00,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:00,369 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:00,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:00,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:00,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:00,545 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:00,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:00,644 INFO L85 PathProgramCache]: Analyzing trace with hash -639087771, now seen corresponding path program 175 times [2024-05-06 04:20:00,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:00,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:00,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:00,902 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:00,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:00,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:00,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:01,057 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:01,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:01,164 INFO L85 PathProgramCache]: Analyzing trace with hash 810694276, now seen corresponding path program 176 times [2024-05-06 04:20:01,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:01,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:01,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:01,326 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:01,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:01,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:01,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:01,522 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:01,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:20:01,612 INFO L85 PathProgramCache]: Analyzing trace with hash -1439609561, now seen corresponding path program 17 times [2024-05-06 04:20:01,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:01,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:01,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:01,822 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:01,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:01,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:01,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:01,983 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:02,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:02,097 INFO L85 PathProgramCache]: Analyzing trace with hash -1331803479, now seen corresponding path program 177 times [2024-05-06 04:20:02,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:02,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:02,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:02,253 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:02,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:02,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:02,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:02,410 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:02,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:02,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1663765830, now seen corresponding path program 178 times [2024-05-06 04:20:02,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:02,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:02,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:02,704 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:02,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:02,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:02,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:02,862 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:02,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:20:05,639 INFO L85 PathProgramCache]: Analyzing trace with hash 37133899, now seen corresponding path program 179 times [2024-05-06 04:20:05,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:05,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:05,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:05,797 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:05,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:05,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:05,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:06,043 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:06,063 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:20:08,114 INFO L85 PathProgramCache]: Analyzing trace with hash 1494036144, now seen corresponding path program 18 times [2024-05-06 04:20:08,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:08,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:08,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:08,283 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:08,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:08,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:08,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:08,452 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:08,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:08,541 INFO L85 PathProgramCache]: Analyzing trace with hash 1663732290, now seen corresponding path program 180 times [2024-05-06 04:20:08,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:08,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:08,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:08,804 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:08,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:08,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:08,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:08,966 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:08,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:09,050 INFO L85 PathProgramCache]: Analyzing trace with hash -1331836179, now seen corresponding path program 181 times [2024-05-06 04:20:09,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:09,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:09,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:09,211 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:09,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:09,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:09,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:09,372 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:09,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:09,448 INFO L85 PathProgramCache]: Analyzing trace with hash -101743163, now seen corresponding path program 182 times [2024-05-06 04:20:09,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:09,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:09,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:09,651 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:09,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:09,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:09,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:09,803 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:09,821 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:09,892 INFO L85 PathProgramCache]: Analyzing trace with hash 1140929992, now seen corresponding path program 183 times [2024-05-06 04:20:09,893 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:09,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:09,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:10,044 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:10,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:10,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:10,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:10,272 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:10,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:20:12,466 INFO L85 PathProgramCache]: Analyzing trace with hash 1009092135, now seen corresponding path program 184 times [2024-05-06 04:20:12,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:12,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:12,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:12,624 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:12,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:12,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:12,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:12,778 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:12,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:14,870 INFO L85 PathProgramCache]: Analyzing trace with hash 1140954112, now seen corresponding path program 185 times [2024-05-06 04:20:14,870 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:14,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:14,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:15,074 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:15,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:15,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:15,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:15,232 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:15,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:15,323 INFO L85 PathProgramCache]: Analyzing trace with hash -101716343, now seen corresponding path program 186 times [2024-05-06 04:20:15,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:15,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:15,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:15,473 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:15,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:15,474 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:15,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:15,623 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:15,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:20:17,679 INFO L85 PathProgramCache]: Analyzing trace with hash 1592709186, now seen corresponding path program 19 times [2024-05-06 04:20:17,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:17,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:17,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:17,905 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:17,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:17,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:17,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:18,088 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:18,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:18,241 INFO L85 PathProgramCache]: Analyzing trace with hash 1879347055, now seen corresponding path program 187 times [2024-05-06 04:20:18,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:18,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:18,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:18,431 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:18,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:18,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:18,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:18,681 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:18,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:18,764 INFO L85 PathProgramCache]: Analyzing trace with hash -1869782720, now seen corresponding path program 188 times [2024-05-06 04:20:18,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:18,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:18,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:18,956 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:18,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:18,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:18,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:19,139 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:19,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:20:21,332 INFO L85 PathProgramCache]: Analyzing trace with hash -2128688751, now seen corresponding path program 189 times [2024-05-06 04:20:21,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:21,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:21,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:21,542 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:21,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:21,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:21,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:21,705 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:21,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:20:23,780 INFO L85 PathProgramCache]: Analyzing trace with hash -169828106, now seen corresponding path program 20 times [2024-05-06 04:20:23,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:23,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:23,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:23,944 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:23,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:23,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:23,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:24,173 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:24,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:26,279 INFO L85 PathProgramCache]: Analyzing trace with hash -1869816260, now seen corresponding path program 190 times [2024-05-06 04:20:26,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:26,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:26,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:26,467 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:26,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:26,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:26,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:26,626 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:26,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:26,775 INFO L85 PathProgramCache]: Analyzing trace with hash 1879314355, now seen corresponding path program 191 times [2024-05-06 04:20:26,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:26,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:26,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:27,006 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:27,006 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:27,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:27,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:27,168 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:27,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:27,252 INFO L85 PathProgramCache]: Analyzing trace with hash -743331265, now seen corresponding path program 192 times [2024-05-06 04:20:27,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:27,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:27,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:27,408 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:27,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:27,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:27,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:27,622 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:27,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:27,715 INFO L85 PathProgramCache]: Analyzing trace with hash -1568431986, now seen corresponding path program 193 times [2024-05-06 04:20:27,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:27,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:27,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:27,865 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:27,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:27,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:27,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:28,017 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:28,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:20:28,265 INFO L85 PathProgramCache]: Analyzing trace with hash -1376750559, now seen corresponding path program 194 times [2024-05-06 04:20:28,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:28,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:28,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:28,416 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:28,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:28,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:28,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:28,571 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:28,590 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:28,682 INFO L85 PathProgramCache]: Analyzing trace with hash -1568407866, now seen corresponding path program 195 times [2024-05-06 04:20:28,682 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:28,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:28,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:28,894 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:28,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:28,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:28,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:29,096 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:29,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:29,183 INFO L85 PathProgramCache]: Analyzing trace with hash -743304445, now seen corresponding path program 196 times [2024-05-06 04:20:29,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:29,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:29,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:29,360 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:29,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:29,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:29,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:29,607 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:29,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:20:30,454 INFO L85 PathProgramCache]: Analyzing trace with hash -1928173560, now seen corresponding path program 21 times [2024-05-06 04:20:30,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:30,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:30,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:30,641 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:30,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:30,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:30,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:30,827 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:30,851 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:30,928 INFO L85 PathProgramCache]: Analyzing trace with hash 921509477, now seen corresponding path program 197 times [2024-05-06 04:20:30,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:30,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:30,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:31,163 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:31,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:31,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:31,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:31,349 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:31,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:31,448 INFO L85 PathProgramCache]: Analyzing trace with hash -1497976566, now seen corresponding path program 198 times [2024-05-06 04:20:31,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:31,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:31,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:31,607 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:31,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:31,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:31,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:31,818 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:31,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:20:33,167 INFO L85 PathProgramCache]: Analyzing trace with hash 807367431, now seen corresponding path program 199 times [2024-05-06 04:20:33,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:33,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:33,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:33,321 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:33,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:33,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:33,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:33,532 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:33,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:35,599 INFO L85 PathProgramCache]: Analyzing trace with hash -752018133, now seen corresponding path program 200 times [2024-05-06 04:20:35,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:35,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:35,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:35,760 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:35,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:35,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:35,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:35,922 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:35,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:36,172 INFO L85 PathProgramCache]: Analyzing trace with hash -1837724894, now seen corresponding path program 201 times [2024-05-06 04:20:36,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:36,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:36,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:36,392 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:36,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:36,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:36,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:36,585 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:36,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:20:36,671 INFO L85 PathProgramCache]: Analyzing trace with hash -1134896115, now seen corresponding path program 202 times [2024-05-06 04:20:36,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:36,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:36,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:36,905 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:36,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:36,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:36,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:37,097 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:37,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:37,267 INFO L85 PathProgramCache]: Analyzing trace with hash -1837715189, now seen corresponding path program 203 times [2024-05-06 04:20:37,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:37,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:37,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:37,516 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:37,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:37,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:37,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:37,703 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:37,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:38,256 INFO L85 PathProgramCache]: Analyzing trace with hash -752006193, now seen corresponding path program 204 times [2024-05-06 04:20:38,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:38,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:38,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:38,445 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:38,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:38,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:38,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:38,686 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:38,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:38,851 INFO L85 PathProgramCache]: Analyzing trace with hash 1823657793, now seen corresponding path program 205 times [2024-05-06 04:20:38,851 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:38,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:38,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:39,012 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:39,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:39,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:39,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:39,223 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:39,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:39,353 INFO L85 PathProgramCache]: Analyzing trace with hash 698817469, now seen corresponding path program 206 times [2024-05-06 04:20:39,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:39,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:39,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:39,511 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:39,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:39,512 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:39,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:39,718 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:39,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:20:39,801 INFO L85 PathProgramCache]: Analyzing trace with hash 188505795, now seen corresponding path program 207 times [2024-05-06 04:20:39,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:39,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:39,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:39,962 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:39,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:39,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:39,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:40,205 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:40,222 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:40,295 INFO L85 PathProgramCache]: Analyzing trace with hash 698798344, now seen corresponding path program 208 times [2024-05-06 04:20:40,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:40,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:40,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:40,504 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:40,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:40,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:40,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:40,661 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:40,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:41,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1823639973, now seen corresponding path program 209 times [2024-05-06 04:20:41,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:41,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:41,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:41,207 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:41,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:41,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:41,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:41,363 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:41,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:43,449 INFO L85 PathProgramCache]: Analyzing trace with hash -321623185, now seen corresponding path program 210 times [2024-05-06 04:20:43,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:43,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:43,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:43,614 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:43,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:43,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:43,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:43,850 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:43,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:43,985 INFO L85 PathProgramCache]: Analyzing trace with hash -1380383394, now seen corresponding path program 211 times [2024-05-06 04:20:43,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:43,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:44,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:44,179 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:44,179 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:44,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:44,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:44,374 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:44,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:20:44,457 INFO L85 PathProgramCache]: Analyzing trace with hash 157788497, now seen corresponding path program 212 times [2024-05-06 04:20:44,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:44,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:44,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:44,709 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:44,709 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:44,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:44,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:44,896 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:44,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:46,997 INFO L85 PathProgramCache]: Analyzing trace with hash -1380373689, now seen corresponding path program 213 times [2024-05-06 04:20:46,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:46,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:47,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:47,168 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:47,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:47,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:47,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:47,417 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:47,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:47,497 INFO L85 PathProgramCache]: Analyzing trace with hash -321611245, now seen corresponding path program 214 times [2024-05-06 04:20:47,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:47,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:47,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:47,665 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:47,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:47,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:47,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:47,832 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:47,852 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:47,972 INFO L85 PathProgramCache]: Analyzing trace with hash 186754173, now seen corresponding path program 215 times [2024-05-06 04:20:47,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:47,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:48,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:48,175 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:48,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:48,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:48,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:48,343 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:48,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:48,413 INFO L85 PathProgramCache]: Analyzing trace with hash 1494412801, now seen corresponding path program 216 times [2024-05-06 04:20:48,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:48,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:48,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:48,571 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:48,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:48,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:48,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:48,806 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:48,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:20:48,949 INFO L85 PathProgramCache]: Analyzing trace with hash -917842689, now seen corresponding path program 217 times [2024-05-06 04:20:48,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:48,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:49,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:49,269 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:49,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:49,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:49,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:49,514 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:49,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:49,594 INFO L85 PathProgramCache]: Analyzing trace with hash 1494393676, now seen corresponding path program 218 times [2024-05-06 04:20:49,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:49,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:49,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:49,780 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:49,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:49,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:49,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:50,037 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:50,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:50,130 INFO L85 PathProgramCache]: Analyzing trace with hash 186736353, now seen corresponding path program 219 times [2024-05-06 04:20:50,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:50,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:50,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:50,321 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:50,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:50,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:50,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:50,506 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:50,531 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:50,595 INFO L85 PathProgramCache]: Analyzing trace with hash -1152211348, now seen corresponding path program 220 times [2024-05-06 04:20:50,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:50,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:50,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:50,857 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:50,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:50,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:50,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:51,047 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:51,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:51,136 INFO L85 PathProgramCache]: Analyzing trace with hash -1358812671, now seen corresponding path program 221 times [2024-05-06 04:20:51,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:51,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:51,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:51,327 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:51,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:51,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:51,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:51,533 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:51,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:20:51,616 INFO L85 PathProgramCache]: Analyzing trace with hash 826480910, now seen corresponding path program 222 times [2024-05-06 04:20:51,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:51,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:51,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:51,855 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:51,855 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:51,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:51,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:52,022 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:52,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:52,123 INFO L85 PathProgramCache]: Analyzing trace with hash -1358802966, now seen corresponding path program 223 times [2024-05-06 04:20:52,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:52,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:52,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:52,289 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:52,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:52,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:52,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:52,552 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:52,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:52,637 INFO L85 PathProgramCache]: Analyzing trace with hash -1152199408, now seen corresponding path program 224 times [2024-05-06 04:20:52,637 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:52,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:52,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:52,842 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:52,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:52,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:52,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:53,005 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:53,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:53,105 INFO L85 PathProgramCache]: Analyzing trace with hash -1586583328, now seen corresponding path program 225 times [2024-05-06 04:20:53,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:53,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:53,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:53,270 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:53,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:53,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:53,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:53,495 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:53,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:53,573 INFO L85 PathProgramCache]: Analyzing trace with hash -1939442178, now seen corresponding path program 226 times [2024-05-06 04:20:53,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:53,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:53,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:53,733 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:53,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:53,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:53,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:53,893 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:53,906 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:20:53,985 INFO L85 PathProgramCache]: Analyzing trace with hash 6835362, now seen corresponding path program 227 times [2024-05-06 04:20:53,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:53,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:54,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:54,143 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:54,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:54,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:54,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:54,381 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:54,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:54,467 INFO L85 PathProgramCache]: Analyzing trace with hash -1939461303, now seen corresponding path program 228 times [2024-05-06 04:20:54,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:54,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:54,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:54,650 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:54,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:54,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:54,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:54,836 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:54,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:54,945 INFO L85 PathProgramCache]: Analyzing trace with hash -1586601148, now seen corresponding path program 229 times [2024-05-06 04:20:54,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:54,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:54,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:55,128 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:55,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:55,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:55,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:55,394 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:55,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:55,504 INFO L85 PathProgramCache]: Analyzing trace with hash -360908400, now seen corresponding path program 230 times [2024-05-06 04:20:55,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:55,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:55,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:55,690 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:55,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:55,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:55,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:55,876 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:55,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:55,967 INFO L85 PathProgramCache]: Analyzing trace with hash 1696742237, now seen corresponding path program 231 times [2024-05-06 04:20:55,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:55,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:56,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:56,169 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:56,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:56,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:56,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:56,450 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:56,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:20:56,546 INFO L85 PathProgramCache]: Analyzing trace with hash 1059402546, now seen corresponding path program 232 times [2024-05-06 04:20:56,546 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:56,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:56,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:56,784 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:56,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:56,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:56,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:56,974 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:56,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:57,090 INFO L85 PathProgramCache]: Analyzing trace with hash 1696751942, now seen corresponding path program 233 times [2024-05-06 04:20:57,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:57,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:57,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:57,271 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:57,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:57,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:57,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:57,437 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:57,458 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:57,533 INFO L85 PathProgramCache]: Analyzing trace with hash -360896460, now seen corresponding path program 234 times [2024-05-06 04:20:57,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:57,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:57,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:57,800 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:57,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:57,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:57,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:57,962 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:20:57,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:58,055 INFO L85 PathProgramCache]: Analyzing trace with hash -1286111940, now seen corresponding path program 235 times [2024-05-06 04:20:58,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:58,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:58,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:58,220 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:58,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:58,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:58,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:58,377 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:58,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:58,469 INFO L85 PathProgramCache]: Analyzing trace with hash -1214763742, now seen corresponding path program 236 times [2024-05-06 04:20:58,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:58,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:58,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:58,707 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:58,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:58,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:58,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:58,888 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:58,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:20:59,013 INFO L85 PathProgramCache]: Analyzing trace with hash 997030398, now seen corresponding path program 237 times [2024-05-06 04:20:59,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:59,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:59,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:59,176 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:59,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:59,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:59,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:59,333 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:59,353 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:20:59,468 INFO L85 PathProgramCache]: Analyzing trace with hash -1214782867, now seen corresponding path program 238 times [2024-05-06 04:20:59,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:59,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:59,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:59,627 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:59,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:59,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:59,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:59,863 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:59,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:00,533 INFO L85 PathProgramCache]: Analyzing trace with hash -1286129760, now seen corresponding path program 239 times [2024-05-06 04:21:00,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:00,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:00,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:00,689 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:00,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:00,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:00,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:00,845 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:00,867 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:01,069 INFO L85 PathProgramCache]: Analyzing trace with hash 1452544941, now seen corresponding path program 240 times [2024-05-06 04:21:01,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:01,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:01,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:01,231 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:01,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:01,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:01,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:01,487 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:01,508 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:01,598 INFO L85 PathProgramCache]: Analyzing trace with hash 2079220960, now seen corresponding path program 241 times [2024-05-06 04:21:01,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:01,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:01,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:01,839 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:01,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:01,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:01,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:02,044 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:02,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:21:02,130 INFO L85 PathProgramCache]: Analyzing trace with hash 31341071, now seen corresponding path program 242 times [2024-05-06 04:21:02,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:02,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:02,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:02,320 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:02,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:02,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:02,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:02,511 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:02,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:02,603 INFO L85 PathProgramCache]: Analyzing trace with hash 2079230665, now seen corresponding path program 243 times [2024-05-06 04:21:02,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:02,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:02,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:02,887 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:02,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:02,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:02,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:03,084 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:03,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:03,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1452556881, now seen corresponding path program 244 times [2024-05-06 04:21:03,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:03,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:03,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:03,411 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:03,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:03,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:03,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:03,606 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:21:03,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:03,708 INFO L85 PathProgramCache]: Analyzing trace with hash 1298013823, now seen corresponding path program 245 times [2024-05-06 04:21:03,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:03,709 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:03,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:03,911 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:03,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:03,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:03,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:04,103 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:04,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:04,203 INFO L85 PathProgramCache]: Analyzing trace with hash 1583723583, now seen corresponding path program 246 times [2024-05-06 04:21:04,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:04,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:04,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:04,472 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:04,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:04,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:04,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:04,631 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:04,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:21:04,730 INFO L85 PathProgramCache]: Analyzing trace with hash 1850791553, now seen corresponding path program 247 times [2024-05-06 04:21:04,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:04,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:04,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:04,890 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:04,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:04,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:04,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:05,049 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:05,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:05,130 INFO L85 PathProgramCache]: Analyzing trace with hash 1583704458, now seen corresponding path program 248 times [2024-05-06 04:21:05,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:05,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:05,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:05,290 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:05,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:05,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:05,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:05,551 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:05,571 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:05,687 INFO L85 PathProgramCache]: Analyzing trace with hash 1297996003, now seen corresponding path program 249 times [2024-05-06 04:21:05,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:05,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:05,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:05,847 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:05,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:05,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:05,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:06,008 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:06,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:08,101 INFO L85 PathProgramCache]: Analyzing trace with hash -705627649, now seen corresponding path program 250 times [2024-05-06 04:21:08,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:08,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:08,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:08,259 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:08,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:08,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:08,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:08,414 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:08,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:08,522 INFO L85 PathProgramCache]: Analyzing trace with hash -399619890, now seen corresponding path program 251 times [2024-05-06 04:21:08,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:08,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:08,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:08,833 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:08,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:08,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:08,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:09,035 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:09,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:09,137 INFO L85 PathProgramCache]: Analyzing trace with hash -1688349333, now seen corresponding path program 252 times [2024-05-06 04:21:09,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:09,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:09,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:09,299 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:09,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:09,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:09,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:09,457 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:09,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:09,544 INFO L85 PathProgramCache]: Analyzing trace with hash -799221055, now seen corresponding path program 253 times [2024-05-06 04:21:09,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:09,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:09,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:09,707 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:09,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:09,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:09,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:09,867 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:09,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:09,950 INFO L85 PathProgramCache]: Analyzing trace with hash 993951790, now seen corresponding path program 254 times [2024-05-06 04:21:09,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:09,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:09,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:10,235 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:10,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:10,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:10,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:10,423 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:10,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:10,524 INFO L85 PathProgramCache]: Analyzing trace with hash 993951790, now seen corresponding path program 255 times [2024-05-06 04:21:10,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:10,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:10,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:10,719 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:10,719 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:10,719 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:10,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:10,910 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:10,938 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:11,031 INFO L85 PathProgramCache]: Analyzing trace with hash 478618335, now seen corresponding path program 256 times [2024-05-06 04:21:11,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:11,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:11,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:11,227 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:11,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:11,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:11,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:11,419 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:11,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:11,488 INFO L85 PathProgramCache]: Analyzing trace with hash 1952267228, now seen corresponding path program 257 times [2024-05-06 04:21:11,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:11,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:11,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:11,792 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:11,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:11,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:11,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:11,992 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:12,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:14,075 INFO L85 PathProgramCache]: Analyzing trace with hash 390742658, now seen corresponding path program 258 times [2024-05-06 04:21:14,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:14,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:14,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:14,253 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:14,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:14,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:14,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:14,423 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:14,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:14,510 INFO L85 PathProgramCache]: Analyzing trace with hash 390742658, now seen corresponding path program 259 times [2024-05-06 04:21:14,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:14,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:14,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:14,679 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:14,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:14,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:14,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:14,853 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:14,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:14,928 INFO L85 PathProgramCache]: Analyzing trace with hash 1841562750, now seen corresponding path program 260 times [2024-05-06 04:21:14,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:14,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:15,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:15,201 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:15,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:15,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:15,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:15,372 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:15,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:15,451 INFO L85 PathProgramCache]: Analyzing trace with hash 1253871127, now seen corresponding path program 261 times [2024-05-06 04:21:15,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:15,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:15,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:15,621 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:15,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:15,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:15,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:15,792 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:15,809 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:15,876 INFO L85 PathProgramCache]: Analyzing trace with hash 215299999, now seen corresponding path program 262 times [2024-05-06 04:21:15,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:15,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:15,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:16,045 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:16,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:16,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:16,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:16,327 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:16,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:18,414 INFO L85 PathProgramCache]: Analyzing trace with hash -1915633896, now seen corresponding path program 263 times [2024-05-06 04:21:18,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:18,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:18,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:18,622 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:18,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:18,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:18,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:18,833 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:18,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:18,933 INFO L85 PathProgramCache]: Analyzing trace with hash 744892096, now seen corresponding path program 264 times [2024-05-06 04:21:18,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:18,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:18,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:19,202 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:19,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:19,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:19,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:19,384 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:19,405 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:20,488 INFO L85 PathProgramCache]: Analyzing trace with hash 1616819225, now seen corresponding path program 265 times [2024-05-06 04:21:20,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:20,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:20,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:20,763 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:20,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:20,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:20,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:21,121 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:21,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:21,235 INFO L85 PathProgramCache]: Analyzing trace with hash -1418210861, now seen corresponding path program 266 times [2024-05-06 04:21:21,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:21,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:21,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:21,409 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:21,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:21,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:21,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:21,583 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:21,602 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:21,661 INFO L85 PathProgramCache]: Analyzing trace with hash -1014863012, now seen corresponding path program 267 times [2024-05-06 04:21:21,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:21,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:21,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:21,838 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:21,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:21,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:21,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:22,014 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:22,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:22,349 INFO L85 PathProgramCache]: Analyzing trace with hash -1014863012, now seen corresponding path program 268 times [2024-05-06 04:21:22,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:22,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:22,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:22,621 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:22,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:22,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:22,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:22,794 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:22,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:22,887 INFO L85 PathProgramCache]: Analyzing trace with hash -325754261, now seen corresponding path program 269 times [2024-05-06 04:21:22,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:22,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:22,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:23,061 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:23,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:23,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:23,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:23,236 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:23,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:23,320 INFO L85 PathProgramCache]: Analyzing trace with hash -1508446744, now seen corresponding path program 270 times [2024-05-06 04:21:23,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:23,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:23,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:23,494 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:23,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:23,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:23,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:23,669 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:23,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:23,765 INFO L85 PathProgramCache]: Analyzing trace with hash 482791948, now seen corresponding path program 271 times [2024-05-06 04:21:23,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:23,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:23,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:24,062 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:24,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:24,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:24,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:24,269 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:24,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:24,564 INFO L85 PathProgramCache]: Analyzing trace with hash 2081649257, now seen corresponding path program 272 times [2024-05-06 04:21:24,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:24,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:24,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:24,774 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:24,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:24,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:24,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:24,988 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:25,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:25,108 INFO L85 PathProgramCache]: Analyzing trace with hash 106618285, now seen corresponding path program 273 times [2024-05-06 04:21:25,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:25,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:25,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:25,362 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:25,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:25,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:25,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:25,787 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:25,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:25,884 INFO L85 PathProgramCache]: Analyzing trace with hash -989799702, now seen corresponding path program 274 times [2024-05-06 04:21:25,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:25,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:25,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:26,110 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:26,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:26,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:26,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:26,322 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:21:26,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:26,420 INFO L85 PathProgramCache]: Analyzing trace with hash -619018944, now seen corresponding path program 275 times [2024-05-06 04:21:26,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:26,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:26,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:27,664 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:27,664 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:27,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:27,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:28,110 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:28,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:28,204 INFO L85 PathProgramCache]: Analyzing trace with hash -2009717331, now seen corresponding path program 276 times [2024-05-06 04:21:28,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:28,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:28,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:28,631 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:28,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:28,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:28,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:29,110 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:29,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:29,188 INFO L85 PathProgramCache]: Analyzing trace with hash -2009717331, now seen corresponding path program 277 times [2024-05-06 04:21:29,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:29,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:29,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:29,526 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:29,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:29,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:29,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:29,855 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:29,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:29,921 INFO L85 PathProgramCache]: Analyzing trace with hash 1396951708, now seen corresponding path program 278 times [2024-05-06 04:21:29,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:29,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:29,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:30,324 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:30,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:30,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:30,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:30,656 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:30,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:30,743 INFO L85 PathProgramCache]: Analyzing trace with hash 355830728, now seen corresponding path program 279 times [2024-05-06 04:21:30,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:30,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:30,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:31,076 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:31,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:31,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:31,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:31,517 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:31,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:33,612 INFO L85 PathProgramCache]: Analyzing trace with hash -1854148579, now seen corresponding path program 280 times [2024-05-06 04:21:33,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:33,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:33,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:34,017 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:34,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:34,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:34,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:34,524 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:34,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:36,609 INFO L85 PathProgramCache]: Analyzing trace with hash -1644030359, now seen corresponding path program 281 times [2024-05-06 04:21:36,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:36,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:36,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:36,943 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:36,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:36,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:36,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:37,276 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:37,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:37,350 INFO L85 PathProgramCache]: Analyzing trace with hash 574667166, now seen corresponding path program 282 times [2024-05-06 04:21:37,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:37,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:37,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:37,753 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:37,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:37,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:37,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:38,088 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:38,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:38,245 INFO L85 PathProgramCache]: Analyzing trace with hash 634813706, now seen corresponding path program 283 times [2024-05-06 04:21:38,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:38,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:38,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:38,582 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:38,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:38,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:38,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:39,025 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:39,042 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:39,156 INFO L85 PathProgramCache]: Analyzing trace with hash 1179721886, now seen corresponding path program 284 times [2024-05-06 04:21:39,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:39,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:39,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:39,583 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:39,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:39,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:39,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:40,101 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:40,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:40,225 INFO L85 PathProgramCache]: Analyzing trace with hash -2083326467, now seen corresponding path program 285 times [2024-05-06 04:21:40,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:40,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:40,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:40,927 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:40,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:40,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:40,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:41,373 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:41,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:41,561 INFO L85 PathProgramCache]: Analyzing trace with hash -158610303, now seen corresponding path program 286 times [2024-05-06 04:21:41,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:41,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:41,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:42,067 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:42,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:42,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:42,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:42,465 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:42,488 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:42,573 INFO L85 PathProgramCache]: Analyzing trace with hash -158610303, now seen corresponding path program 287 times [2024-05-06 04:21:42,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:42,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:42,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:43,017 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:43,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:43,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:43,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:43,401 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:43,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:43,500 INFO L85 PathProgramCache]: Analyzing trace with hash 1004435852, now seen corresponding path program 288 times [2024-05-06 04:21:43,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:43,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:43,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:43,947 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:43,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:43,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:43,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:44,312 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:44,334 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:44,386 INFO L85 PathProgramCache]: Analyzing trace with hash 1072741086, now seen corresponding path program 289 times [2024-05-06 04:21:44,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:44,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:44,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:44,930 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:44,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:44,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:44,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:45,324 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:45,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:45,439 INFO L85 PathProgramCache]: Analyzing trace with hash -1104763953, now seen corresponding path program 290 times [2024-05-06 04:21:45,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:45,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:45,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:45,831 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:45,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:45,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:45,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:46,388 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:46,441 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:46,534 INFO L85 PathProgramCache]: Analyzing trace with hash -1104763953, now seen corresponding path program 291 times [2024-05-06 04:21:46,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:46,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:46,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:47,067 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:47,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:47,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:47,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:47,610 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:47,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:47,712 INFO L85 PathProgramCache]: Analyzing trace with hash -294764083, now seen corresponding path program 292 times [2024-05-06 04:21:47,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:47,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:47,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:48,196 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:48,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:48,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:48,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:48,737 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:48,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:21:48,854 INFO L85 PathProgramCache]: Analyzing trace with hash -1513163506, now seen corresponding path program 22 times [2024-05-06 04:21:48,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:48,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:48,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:49,341 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:49,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:49,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:49,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:49,862 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:49,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:49,964 INFO L85 PathProgramCache]: Analyzing trace with hash 336572159, now seen corresponding path program 6 times [2024-05-06 04:21:49,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:49,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:50,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:50,387 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:50,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:50,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:50,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:50,887 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:50,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:52,975 INFO L85 PathProgramCache]: Analyzing trace with hash 2092090532, now seen corresponding path program 7 times [2024-05-06 04:21:52,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:52,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:53,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:54,195 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:54,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:54,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:54,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:54,709 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 1 proven. 15 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:54,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:54,789 INFO L85 PathProgramCache]: Analyzing trace with hash 144642645, now seen corresponding path program 8 times [2024-05-06 04:21:54,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:54,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:54,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:55,652 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:55,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:55,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:55,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:56,385 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:56,412 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:21:56,503 INFO L85 PathProgramCache]: Analyzing trace with hash 188955433, now seen corresponding path program 9 times [2024-05-06 04:21:56,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:56,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:56,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:57,229 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:57,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:57,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:57,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:57,877 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:57,889 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:21:57,963 INFO L85 PathProgramCache]: Analyzing trace with hash 1562651863, now seen corresponding path program 10 times [2024-05-06 04:21:57,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:57,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:58,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:58,320 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:21:58,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:58,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:58,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:58,584 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:21:58,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:00,657 INFO L85 PathProgramCache]: Analyzing trace with hash -158553800, now seen corresponding path program 2 times [2024-05-06 04:22:00,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:00,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:00,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:01,283 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:22:01,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:01,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:01,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:01,811 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 15 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:22:01,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-05-06 04:22:01,834 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 04:22:02,032 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable790,SelfDestructingSolverStorable670,SelfDestructingSolverStorable791,SelfDestructingSolverStorable550,SelfDestructingSolverStorable671,SelfDestructingSolverStorable792,SelfDestructingSolverStorable548,SelfDestructingSolverStorable669,SelfDestructingSolverStorable549,SelfDestructingSolverStorable544,SelfDestructingSolverStorable665,SelfDestructingSolverStorable786,SelfDestructingSolverStorable545,SelfDestructingSolverStorable666,SelfDestructingSolverStorable787,SelfDestructingSolverStorable546,SelfDestructingSolverStorable667,SelfDestructingSolverStorable788,SelfDestructingSolverStorable547,SelfDestructingSolverStorable668,SelfDestructingSolverStorable789,SelfDestructingSolverStorable540,SelfDestructingSolverStorable661,SelfDestructingSolverStorable782,SelfDestructingSolverStorable541,SelfDestructingSolverStorable662,SelfDestructingSolverStorable783,SelfDestructingSolverStorable542,SelfDestructingSolverStorable663,SelfDestructingSolverStorable784,SelfDestructingSolverStorable543,SelfDestructingSolverStorable664,SelfDestructingSolverStorable785,SelfDestructingSolverStorable780,SelfDestructingSolverStorable660,SelfDestructingSolverStorable781,SelfDestructingSolverStorable537,SelfDestructingSolverStorable658,SelfDestructingSolverStorable779,SelfDestructingSolverStorable538,SelfDestructingSolverStorable659,SelfDestructingSolverStorable539,SelfDestructingSolverStorable533,SelfDestructingSolverStorable654,SelfDestructingSolverStorable775,SelfDestructingSolverStorable896,SelfDestructingSolverStorable534,SelfDestructingSolverStorable655,SelfDestructingSolverStorable776,SelfDestructingSolverStorable897,SelfDestructingSolverStorable535,SelfDestructingSolverStorable656,SelfDestructingSolverStorable777,SelfDestructingSolverStorable898,SelfDestructingSolverStorable536,SelfDestructingSolverStorable657,SelfDestructingSolverStorable778,SelfDestructingSolverStorable899,SelfDestructingSolverStorable650,SelfDestructingSolverStorable771,SelfDestructingSolverStorable892,SelfDestructingSolverStorable530,SelfDestructingSolverStorable651,SelfDestructingSolverStorable772,SelfDestructingSolverStorable893,SelfDestructingSolverStorable531,SelfDestructingSolverStorable652,SelfDestructingSolverStorable773,SelfDestructingSolverStorable894,SelfDestructingSolverStorable532,SelfDestructingSolverStorable653,SelfDestructingSolverStorable774,SelfDestructingSolverStorable895,SelfDestructingSolverStorable690,SelfDestructingSolverStorable570,SelfDestructingSolverStorable691,SelfDestructingSolverStorable571,SelfDestructingSolverStorable692,SelfDestructingSolverStorable572,SelfDestructingSolverStorable693,SelfDestructingSolverStorable566,SelfDestructingSolverStorable687,SelfDestructingSolverStorable567,SelfDestructingSolverStorable688,SelfDestructingSolverStorable568,SelfDestructingSolverStorable689,SelfDestructingSolverStorable569,SelfDestructingSolverStorable562,SelfDestructingSolverStorable683,SelfDestructingSolverStorable563,SelfDestructingSolverStorable684,SelfDestructingSolverStorable564,SelfDestructingSolverStorable685,SelfDestructingSolverStorable565,SelfDestructingSolverStorable686,SelfDestructingSolverStorable680,SelfDestructingSolverStorable560,SelfDestructingSolverStorable681,SelfDestructingSolverStorable561,SelfDestructingSolverStorable682,SelfDestructingSolverStorable559,SelfDestructingSolverStorable555,SelfDestructingSolverStorable676,SelfDestructingSolverStorable797,SelfDestructingSolverStorable556,SelfDestructingSolverStorable677,SelfDestructingSolverStorable798,SelfDestructingSolverStorable557,SelfDestructingSolverStorable678,SelfDestructingSolverStorable799,SelfDestructingSolverStorable558,SelfDestructingSolverStorable679,SelfDestructingSolverStorable551,SelfDestructingSolverStorable672,SelfDestructingSolverStorable793,SelfDestructingSolverStorable552,SelfDestructingSolverStorable673,SelfDestructingSolverStorable794,SelfDestructingSolverStorable553,SelfDestructingSolverStorable674,SelfDestructingSolverStorable795,SelfDestructingSolverStorable554,SelfDestructingSolverStorable675,SelfDestructingSolverStorable796,SelfDestructingSolverStorable508,SelfDestructingSolverStorable629,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable625,SelfDestructingSolverStorable746,SelfDestructingSolverStorable867,SelfDestructingSolverStorable505,SelfDestructingSolverStorable626,SelfDestructingSolverStorable747,SelfDestructingSolverStorable868,SelfDestructingSolverStorable506,SelfDestructingSolverStorable627,SelfDestructingSolverStorable748,SelfDestructingSolverStorable869,SelfDestructingSolverStorable507,SelfDestructingSolverStorable628,SelfDestructingSolverStorable749,SelfDestructingSolverStorable500,SelfDestructingSolverStorable621,SelfDestructingSolverStorable742,SelfDestructingSolverStorable863,SelfDestructingSolverStorable501,SelfDestructingSolverStorable622,SelfDestructingSolverStorable743,SelfDestructingSolverStorable864,SelfDestructingSolverStorable502,SelfDestructingSolverStorable623,SelfDestructingSolverStorable744,SelfDestructingSolverStorable865,SelfDestructingSolverStorable503,SelfDestructingSolverStorable624,SelfDestructingSolverStorable745,SelfDestructingSolverStorable866,SelfDestructingSolverStorable860,SelfDestructingSolverStorable740,SelfDestructingSolverStorable861,SelfDestructingSolverStorable620,SelfDestructingSolverStorable741,SelfDestructingSolverStorable862,SelfDestructingSolverStorable618,SelfDestructingSolverStorable739,SelfDestructingSolverStorable619,SelfDestructingSolverStorable614,SelfDestructingSolverStorable735,SelfDestructingSolverStorable856,SelfDestructingSolverStorable615,SelfDestructingSolverStorable736,SelfDestructingSolverStorable857,SelfDestructingSolverStorable616,SelfDestructingSolverStorable737,SelfDestructingSolverStorable858,SelfDestructingSolverStorable617,SelfDestructingSolverStorable738,SelfDestructingSolverStorable859,SelfDestructingSolverStorable610,SelfDestructingSolverStorable731,SelfDestructingSolverStorable852,SelfDestructingSolverStorable611,SelfDestructingSolverStorable732,SelfDestructingSolverStorable853,SelfDestructingSolverStorable612,SelfDestructingSolverStorable733,SelfDestructingSolverStorable854,SelfDestructingSolverStorable613,SelfDestructingSolverStorable734,SelfDestructingSolverStorable855,SelfDestructingSolverStorable850,SelfDestructingSolverStorable730,SelfDestructingSolverStorable851,SelfDestructingSolverStorable890,SelfDestructingSolverStorable770,SelfDestructingSolverStorable891,SelfDestructingSolverStorable526,SelfDestructingSolverStorable647,SelfDestructingSolverStorable768,SelfDestructingSolverStorable889,SelfDestructingSolverStorable527,SelfDestructingSolverStorable648,SelfDestructingSolverStorable769,SelfDestructingSolverStorable528,SelfDestructingSolverStorable649,SelfDestructingSolverStorable529,SelfDestructingSolverStorable522,SelfDestructingSolverStorable643,SelfDestructingSolverStorable764,SelfDestructingSolverStorable885,SelfDestructingSolverStorable523,SelfDestructingSolverStorable644,SelfDestructingSolverStorable765,SelfDestructingSolverStorable886,SelfDestructingSolverStorable524,SelfDestructingSolverStorable645,SelfDestructingSolverStorable766,SelfDestructingSolverStorable887,SelfDestructingSolverStorable525,SelfDestructingSolverStorable646,SelfDestructingSolverStorable767,SelfDestructingSolverStorable888,SelfDestructingSolverStorable760,SelfDestructingSolverStorable881,SelfDestructingSolverStorable640,SelfDestructingSolverStorable761,SelfDestructingSolverStorable882,SelfDestructingSolverStorable520,SelfDestructingSolverStorable641,SelfDestructingSolverStorable762,SelfDestructingSolverStorable883,SelfDestructingSolverStorable521,SelfDestructingSolverStorable642,SelfDestructingSolverStorable763,SelfDestructingSolverStorable884,SelfDestructingSolverStorable880,SelfDestructingSolverStorable519,SelfDestructingSolverStorable515,SelfDestructingSolverStorable636,SelfDestructingSolverStorable757,SelfDestructingSolverStorable878,SelfDestructingSolverStorable516,SelfDestructingSolverStorable637,SelfDestructingSolverStorable758,SelfDestructingSolverStorable879,SelfDestructingSolverStorable517,SelfDestructingSolverStorable638,SelfDestructingSolverStorable759,SelfDestructingSolverStorable518,SelfDestructingSolverStorable639,SelfDestructingSolverStorable511,SelfDestructingSolverStorable632,SelfDestructingSolverStorable753,SelfDestructingSolverStorable874,SelfDestructingSolverStorable512,SelfDestructingSolverStorable633,SelfDestructingSolverStorable754,SelfDestructingSolverStorable875,SelfDestructingSolverStorable513,SelfDestructingSolverStorable634,SelfDestructingSolverStorable755,SelfDestructingSolverStorable876,SelfDestructingSolverStorable514,SelfDestructingSolverStorable635,SelfDestructingSolverStorable756,SelfDestructingSolverStorable877,SelfDestructingSolverStorable870,SelfDestructingSolverStorable750,SelfDestructingSolverStorable871,SelfDestructingSolverStorable630,SelfDestructingSolverStorable751,SelfDestructingSolverStorable872,SelfDestructingSolverStorable510,SelfDestructingSolverStorable631,SelfDestructingSolverStorable752,SelfDestructingSolverStorable873,SelfDestructingSolverStorable706,SelfDestructingSolverStorable827,SelfDestructingSolverStorable707,SelfDestructingSolverStorable828,SelfDestructingSolverStorable708,SelfDestructingSolverStorable829,SelfDestructingSolverStorable709,SelfDestructingSolverStorable702,SelfDestructingSolverStorable823,SelfDestructingSolverStorable703,SelfDestructingSolverStorable824,SelfDestructingSolverStorable704,SelfDestructingSolverStorable825,SelfDestructingSolverStorable705,SelfDestructingSolverStorable826,SelfDestructingSolverStorable820,SelfDestructingSolverStorable700,SelfDestructingSolverStorable821,SelfDestructingSolverStorable701,SelfDestructingSolverStorable822,SelfDestructingSolverStorable816,SelfDestructingSolverStorable817,SelfDestructingSolverStorable818,SelfDestructingSolverStorable819,SelfDestructingSolverStorable812,SelfDestructingSolverStorable813,SelfDestructingSolverStorable814,SelfDestructingSolverStorable815,SelfDestructingSolverStorable810,SelfDestructingSolverStorable811,SelfDestructingSolverStorable607,SelfDestructingSolverStorable728,SelfDestructingSolverStorable849,SelfDestructingSolverStorable608,SelfDestructingSolverStorable729,SelfDestructingSolverStorable609,SelfDestructingSolverStorable603,SelfDestructingSolverStorable724,SelfDestructingSolverStorable845,SelfDestructingSolverStorable604,SelfDestructingSolverStorable725,SelfDestructingSolverStorable846,SelfDestructingSolverStorable605,SelfDestructingSolverStorable726,SelfDestructingSolverStorable847,SelfDestructingSolverStorable606,SelfDestructingSolverStorable727,SelfDestructingSolverStorable848,SelfDestructingSolverStorable720,SelfDestructingSolverStorable841,SelfDestructingSolverStorable600,SelfDestructingSolverStorable721,SelfDestructingSolverStorable842,SelfDestructingSolverStorable601,SelfDestructingSolverStorable722,SelfDestructingSolverStorable843,SelfDestructingSolverStorable602,SelfDestructingSolverStorable723,SelfDestructingSolverStorable844,SelfDestructingSolverStorable840,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable717,SelfDestructingSolverStorable838,SelfDestructingSolverStorable718,SelfDestructingSolverStorable839,SelfDestructingSolverStorable719,SelfDestructingSolverStorable713,SelfDestructingSolverStorable834,SelfDestructingSolverStorable714,SelfDestructingSolverStorable835,SelfDestructingSolverStorable715,SelfDestructingSolverStorable836,SelfDestructingSolverStorable716,SelfDestructingSolverStorable837,SelfDestructingSolverStorable830,SelfDestructingSolverStorable710,SelfDestructingSolverStorable831,SelfDestructingSolverStorable711,SelfDestructingSolverStorable832,SelfDestructingSolverStorable712,SelfDestructingSolverStorable833,SelfDestructingSolverStorable908,SelfDestructingSolverStorable909,SelfDestructingSolverStorable904,SelfDestructingSolverStorable905,SelfDestructingSolverStorable906,SelfDestructingSolverStorable907,SelfDestructingSolverStorable900,SelfDestructingSolverStorable901,SelfDestructingSolverStorable902,SelfDestructingSolverStorable903,SelfDestructingSolverStorable809,SelfDestructingSolverStorable805,SelfDestructingSolverStorable806,SelfDestructingSolverStorable807,SelfDestructingSolverStorable808,SelfDestructingSolverStorable801,SelfDestructingSolverStorable802,SelfDestructingSolverStorable803,SelfDestructingSolverStorable804,SelfDestructingSolverStorable800,SelfDestructingSolverStorable915,SelfDestructingSolverStorable916,SelfDestructingSolverStorable917,SelfDestructingSolverStorable911,SelfDestructingSolverStorable912,SelfDestructingSolverStorable913,SelfDestructingSolverStorable914,SelfDestructingSolverStorable910,SelfDestructingSolverStorable496,SelfDestructingSolverStorable497,SelfDestructingSolverStorable498,SelfDestructingSolverStorable499,SelfDestructingSolverStorable470,SelfDestructingSolverStorable591,SelfDestructingSolverStorable471,SelfDestructingSolverStorable592,SelfDestructingSolverStorable472,SelfDestructingSolverStorable593,SelfDestructingSolverStorable473,SelfDestructingSolverStorable594,SelfDestructingSolverStorable590,SelfDestructingSolverStorable467,SelfDestructingSolverStorable588,SelfDestructingSolverStorable468,SelfDestructingSolverStorable589,SelfDestructingSolverStorable469,SelfDestructingSolverStorable463,SelfDestructingSolverStorable584,SelfDestructingSolverStorable464,SelfDestructingSolverStorable585,SelfDestructingSolverStorable465,SelfDestructingSolverStorable586,SelfDestructingSolverStorable466,SelfDestructingSolverStorable587,SelfDestructingSolverStorable580,SelfDestructingSolverStorable581,SelfDestructingSolverStorable582,SelfDestructingSolverStorable462,SelfDestructingSolverStorable583,SelfDestructingSolverStorable577,SelfDestructingSolverStorable698,SelfDestructingSolverStorable578,SelfDestructingSolverStorable699,SelfDestructingSolverStorable579,SelfDestructingSolverStorable573,SelfDestructingSolverStorable694,SelfDestructingSolverStorable574,SelfDestructingSolverStorable695,SelfDestructingSolverStorable575,SelfDestructingSolverStorable696,SelfDestructingSolverStorable576,SelfDestructingSolverStorable697,SelfDestructingSolverStorable492,SelfDestructingSolverStorable493,SelfDestructingSolverStorable494,SelfDestructingSolverStorable495,SelfDestructingSolverStorable490,SelfDestructingSolverStorable491,SelfDestructingSolverStorable489,SelfDestructingSolverStorable485,SelfDestructingSolverStorable486,SelfDestructingSolverStorable487,SelfDestructingSolverStorable488,SelfDestructingSolverStorable481,SelfDestructingSolverStorable482,SelfDestructingSolverStorable483,SelfDestructingSolverStorable484,SelfDestructingSolverStorable480,SelfDestructingSolverStorable478,SelfDestructingSolverStorable599,SelfDestructingSolverStorable479,SelfDestructingSolverStorable474,SelfDestructingSolverStorable595,SelfDestructingSolverStorable475,SelfDestructingSolverStorable596,SelfDestructingSolverStorable476,SelfDestructingSolverStorable597,SelfDestructingSolverStorable477,SelfDestructingSolverStorable598 [2024-05-06 04:22:02,032 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 1 more)] === [2024-05-06 04:22:02,032 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:22:02,033 INFO L85 PathProgramCache]: Analyzing trace with hash -1964987494, now seen corresponding path program 2 times [2024-05-06 04:22:02,033 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:22:02,033 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373615668] [2024-05-06 04:22:02,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:02,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:02,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:03,422 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 174 proven. 220 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:22:03,423 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:22:03,423 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373615668] [2024-05-06 04:22:03,423 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373615668] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:22:03,423 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [54501887] [2024-05-06 04:22:03,423 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 04:22:03,423 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:22:03,423 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:22:03,436 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:22:03,439 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 04:22:05,315 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-05-06 04:22:05,316 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 04:22:05,319 INFO L262 TraceCheckSpWp]: Trace formula consists of 826 conjuncts, 14 conjunts are in the unsatisfiable core [2024-05-06 04:22:05,323 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:22:05,895 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 129 proven. 19 refuted. 0 times theorem prover too weak. 274 trivial. 0 not checked. [2024-05-06 04:22:05,895 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 04:22:06,528 INFO L134 CoverageAnalysis]: Checked inductivity of 422 backedges. 139 proven. 9 refuted. 0 times theorem prover too weak. 274 trivial. 0 not checked. [2024-05-06 04:22:06,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [54501887] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 04:22:06,529 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 04:22:06,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 15, 15] total 63 [2024-05-06 04:22:06,529 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1257304223] [2024-05-06 04:22:06,529 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 04:22:06,531 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2024-05-06 04:22:06,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:22:06,532 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2024-05-06 04:22:06,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=316, Invalid=3590, Unknown=0, NotChecked=0, Total=3906 [2024-05-06 04:22:06,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:22:06,533 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:22:06,533 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 63 states have (on average 8.777777777777779) internal successors, (553), 63 states have internal predecessors, (553), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:22:06,533 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 14 states. [2024-05-06 04:22:06,533 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:22:07,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:07,833 INFO L85 PathProgramCache]: Analyzing trace with hash 1215537109, now seen corresponding path program 5 times [2024-05-06 04:22:07,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:07,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:07,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:08,707 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:08,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:08,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:08,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:08,922 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:08,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:09,073 INFO L85 PathProgramCache]: Analyzing trace with hash 1967623721, now seen corresponding path program 21 times [2024-05-06 04:22:09,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:09,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:09,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:09,130 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:09,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:09,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:09,274 INFO L85 PathProgramCache]: Analyzing trace with hash 866793926, now seen corresponding path program 22 times [2024-05-06 04:22:09,274 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:09,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:09,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:09,322 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:09,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:09,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:22:09,684 INFO L85 PathProgramCache]: Analyzing trace with hash 1100808651, now seen corresponding path program 23 times [2024-05-06 04:22:09,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:09,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:09,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:09,733 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:09,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:09,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:09,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1669705168, now seen corresponding path program 6 times [2024-05-06 04:22:09,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:09,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:09,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:09,934 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:09,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:10,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:10,092 INFO L85 PathProgramCache]: Analyzing trace with hash 866774801, now seen corresponding path program 24 times [2024-05-06 04:22:10,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:10,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:10,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:10,142 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:10,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:10,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:10,556 INFO L85 PathProgramCache]: Analyzing trace with hash 1967605901, now seen corresponding path program 25 times [2024-05-06 04:22:10,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:10,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:10,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:10,605 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:10,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:10,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:10,798 INFO L85 PathProgramCache]: Analyzing trace with hash 134032229, now seen corresponding path program 26 times [2024-05-06 04:22:10,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:10,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:10,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:10,846 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:10,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:10,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:10,998 INFO L85 PathProgramCache]: Analyzing trace with hash -139967463, now seen corresponding path program 27 times [2024-05-06 04:22:10,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:10,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:11,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:11,045 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:11,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:11,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:22:11,286 INFO L85 PathProgramCache]: Analyzing trace with hash -44023321, now seen corresponding path program 28 times [2024-05-06 04:22:11,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:11,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:11,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:11,333 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:11,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:11,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:11,493 INFO L85 PathProgramCache]: Analyzing trace with hash -139957758, now seen corresponding path program 29 times [2024-05-06 04:22:11,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:11,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:11,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:11,539 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:11,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:11,608 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:11,689 INFO L85 PathProgramCache]: Analyzing trace with hash 134044169, now seen corresponding path program 30 times [2024-05-06 04:22:11,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:11,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:11,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:11,734 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:11,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:11,814 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:11,883 INFO L85 PathProgramCache]: Analyzing trace with hash -955319729, now seen corresponding path program 5 times [2024-05-06 04:22:11,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:11,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:11,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:12,064 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:12,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:12,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:12,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:12,353 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:12,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:12,445 INFO L85 PathProgramCache]: Analyzing trace with hash 488728099, now seen corresponding path program 21 times [2024-05-06 04:22:12,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:12,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:12,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:12,492 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:12,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:12,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:12,634 INFO L85 PathProgramCache]: Analyzing trace with hash -2029297396, now seen corresponding path program 22 times [2024-05-06 04:22:12,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:12,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:12,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:12,681 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:12,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:12,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:22:13,801 INFO L85 PathProgramCache]: Analyzing trace with hash 1516290885, now seen corresponding path program 23 times [2024-05-06 04:22:13,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:13,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:13,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:13,851 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:13,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:13,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:15,954 INFO L85 PathProgramCache]: Analyzing trace with hash 454405290, now seen corresponding path program 6 times [2024-05-06 04:22:15,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:15,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:16,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:16,001 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:16,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:16,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:18,128 INFO L85 PathProgramCache]: Analyzing trace with hash -2029316521, now seen corresponding path program 24 times [2024-05-06 04:22:18,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:18,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:18,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:18,176 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:18,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:18,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:18,328 INFO L85 PathProgramCache]: Analyzing trace with hash 488710279, now seen corresponding path program 25 times [2024-05-06 04:22:18,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:18,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:18,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:18,390 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:18,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:18,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:18,539 INFO L85 PathProgramCache]: Analyzing trace with hash 1388548651, now seen corresponding path program 26 times [2024-05-06 04:22:18,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:18,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:18,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:18,583 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:18,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:18,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:18,714 INFO L85 PathProgramCache]: Analyzing trace with hash 95335955, now seen corresponding path program 27 times [2024-05-06 04:22:18,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:18,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:18,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:18,757 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:18,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:18,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:22:19,022 INFO L85 PathProgramCache]: Analyzing trace with hash -1339551955, now seen corresponding path program 28 times [2024-05-06 04:22:19,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:19,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:19,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:19,067 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:19,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:19,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:19,223 INFO L85 PathProgramCache]: Analyzing trace with hash 95345660, now seen corresponding path program 29 times [2024-05-06 04:22:19,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:19,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:19,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:19,267 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:19,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:19,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:19,412 INFO L85 PathProgramCache]: Analyzing trace with hash 1388560591, now seen corresponding path program 30 times [2024-05-06 04:22:19,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:19,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:19,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:19,460 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:19,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:19,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:19,596 INFO L85 PathProgramCache]: Analyzing trace with hash 2014476630, now seen corresponding path program 5 times [2024-05-06 04:22:19,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:19,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:19,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:19,788 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:19,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:19,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:19,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:19,964 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:19,991 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:22,049 INFO L85 PathProgramCache]: Analyzing trace with hash 563260778, now seen corresponding path program 21 times [2024-05-06 04:22:22,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:22,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:22,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:22,096 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:22,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:22,161 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:24,210 INFO L85 PathProgramCache]: Analyzing trace with hash 281215653, now seen corresponding path program 22 times [2024-05-06 04:22:24,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:24,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:24,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:24,255 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:24,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:24,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:22:26,487 INFO L85 PathProgramCache]: Analyzing trace with hash 127751372, now seen corresponding path program 23 times [2024-05-06 04:22:26,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:26,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:26,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:26,535 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:26,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:26,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:26,660 INFO L85 PathProgramCache]: Analyzing trace with hash -870765647, now seen corresponding path program 6 times [2024-05-06 04:22:26,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:26,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:26,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:26,865 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:26,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:26,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:27,109 INFO L85 PathProgramCache]: Analyzing trace with hash 281196528, now seen corresponding path program 24 times [2024-05-06 04:22:27,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:27,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:27,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:27,157 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:27,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:27,226 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:27,307 INFO L85 PathProgramCache]: Analyzing trace with hash 563242958, now seen corresponding path program 25 times [2024-05-06 04:22:27,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:27,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:27,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:27,352 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:27,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:27,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:29,490 INFO L85 PathProgramCache]: Analyzing trace with hash -372068604, now seen corresponding path program 26 times [2024-05-06 04:22:29,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:29,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:29,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:29,534 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:29,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:29,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:29,724 INFO L85 PathProgramCache]: Analyzing trace with hash 1350775898, now seen corresponding path program 27 times [2024-05-06 04:22:29,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:29,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:29,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:29,769 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:29,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:29,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:22:30,147 INFO L85 PathProgramCache]: Analyzing trace with hash -1075619386, now seen corresponding path program 28 times [2024-05-06 04:22:30,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:30,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:30,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:30,191 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:30,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:30,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:30,367 INFO L85 PathProgramCache]: Analyzing trace with hash 1350785603, now seen corresponding path program 29 times [2024-05-06 04:22:30,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:30,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:30,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:30,410 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:30,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:30,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:30,550 INFO L85 PathProgramCache]: Analyzing trace with hash -372056664, now seen corresponding path program 30 times [2024-05-06 04:22:30,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:30,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:30,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:30,593 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:30,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:30,659 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:32,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1409322544, now seen corresponding path program 5 times [2024-05-06 04:22:32,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:32,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:32,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:32,882 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:32,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:32,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:32,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:33,058 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:33,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:35,149 INFO L85 PathProgramCache]: Analyzing trace with hash 1380640708, now seen corresponding path program 21 times [2024-05-06 04:22:35,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:35,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:35,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:35,195 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:35,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:35,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:35,337 INFO L85 PathProgramCache]: Analyzing trace with hash -149810293, now seen corresponding path program 22 times [2024-05-06 04:22:35,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:35,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:35,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:35,384 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:35,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:35,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:22:35,664 INFO L85 PathProgramCache]: Analyzing trace with hash -349151066, now seen corresponding path program 23 times [2024-05-06 04:22:35,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:35,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:35,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:35,712 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:35,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:35,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:35,961 INFO L85 PathProgramCache]: Analyzing trace with hash -1475919733, now seen corresponding path program 6 times [2024-05-06 04:22:35,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:35,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:36,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:36,011 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:36,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:36,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:36,165 INFO L85 PathProgramCache]: Analyzing trace with hash -149829418, now seen corresponding path program 24 times [2024-05-06 04:22:36,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:36,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:36,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:36,433 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:36,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:36,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:38,562 INFO L85 PathProgramCache]: Analyzing trace with hash 1380622888, now seen corresponding path program 25 times [2024-05-06 04:22:38,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:38,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:38,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:38,608 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:38,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:38,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:40,738 INFO L85 PathProgramCache]: Analyzing trace with hash -428832918, now seen corresponding path program 26 times [2024-05-06 04:22:40,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:40,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:40,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:40,783 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:40,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:40,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:41,049 INFO L85 PathProgramCache]: Analyzing trace with hash -408917836, now seen corresponding path program 27 times [2024-05-06 04:22:41,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:41,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:41,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:41,095 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:41,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:41,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:22:42,770 INFO L85 PathProgramCache]: Analyzing trace with hash 208449708, now seen corresponding path program 28 times [2024-05-06 04:22:42,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:42,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:42,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:42,814 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:42,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:42,880 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:42,951 INFO L85 PathProgramCache]: Analyzing trace with hash -408908131, now seen corresponding path program 29 times [2024-05-06 04:22:42,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:42,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:42,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:42,999 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:43,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:43,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:43,136 INFO L85 PathProgramCache]: Analyzing trace with hash -428820978, now seen corresponding path program 30 times [2024-05-06 04:22:43,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:43,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:43,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:43,187 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:43,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:43,253 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:45,292 INFO L85 PathProgramCache]: Analyzing trace with hash -280983849, now seen corresponding path program 5 times [2024-05-06 04:22:45,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:45,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:45,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:45,471 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:45,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:45,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:45,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:45,830 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:45,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:45,922 INFO L85 PathProgramCache]: Analyzing trace with hash 559415467, now seen corresponding path program 21 times [2024-05-06 04:22:45,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:45,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:45,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:45,966 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:45,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:46,030 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:46,100 INFO L85 PathProgramCache]: Analyzing trace with hash 162011012, now seen corresponding path program 22 times [2024-05-06 04:22:46,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:46,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:46,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:46,145 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:46,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:46,213 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:22:46,890 INFO L85 PathProgramCache]: Analyzing trace with hash 727374797, now seen corresponding path program 23 times [2024-05-06 04:22:46,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:46,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:46,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:46,941 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:46,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:47,010 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:49,053 INFO L85 PathProgramCache]: Analyzing trace with hash 1128741170, now seen corresponding path program 6 times [2024-05-06 04:22:49,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:49,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:49,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,101 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:49,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:49,248 INFO L85 PathProgramCache]: Analyzing trace with hash 161991887, now seen corresponding path program 24 times [2024-05-06 04:22:49,248 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:49,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:49,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,291 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:49,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:49,429 INFO L85 PathProgramCache]: Analyzing trace with hash 559397647, now seen corresponding path program 25 times [2024-05-06 04:22:49,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:49,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:49,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,474 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:49,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:49,644 INFO L85 PathProgramCache]: Analyzing trace with hash 539197091, now seen corresponding path program 26 times [2024-05-06 04:22:49,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:49,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:49,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,687 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:49,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,748 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:49,821 INFO L85 PathProgramCache]: Analyzing trace with hash -464758629, now seen corresponding path program 27 times [2024-05-06 04:22:49,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:49,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:49,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,865 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:49,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:49,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:22:50,218 INFO L85 PathProgramCache]: Analyzing trace with hash -1522614875, now seen corresponding path program 28 times [2024-05-06 04:22:50,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:50,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:50,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:50,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:50,388 INFO L85 PathProgramCache]: Analyzing trace with hash -464748924, now seen corresponding path program 29 times [2024-05-06 04:22:50,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:50,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:50,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,429 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:50,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:50,556 INFO L85 PathProgramCache]: Analyzing trace with hash 539209031, now seen corresponding path program 30 times [2024-05-06 04:22:50,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:50,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:50,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,599 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:50,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:50,711 INFO L85 PathProgramCache]: Analyzing trace with hash -1064080751, now seen corresponding path program 13 times [2024-05-06 04:22:50,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:50,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:50,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,755 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:50,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,815 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:50,952 INFO L85 PathProgramCache]: Analyzing trace with hash 1373235806, now seen corresponding path program 14 times [2024-05-06 04:22:50,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:50,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:50,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:50,995 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:51,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:51,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:22:51,438 INFO L85 PathProgramCache]: Analyzing trace with hash -379362253, now seen corresponding path program 15 times [2024-05-06 04:22:51,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:51,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:51,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:51,484 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:51,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:51,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:51,626 INFO L85 PathProgramCache]: Analyzing trace with hash 1565460708, now seen corresponding path program 16 times [2024-05-06 04:22:51,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:51,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:51,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:51,670 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:51,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:51,732 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:51,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1284642426, now seen corresponding path program 17 times [2024-05-06 04:22:51,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:51,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:51,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:51,844 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:22:51,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:22:51,903 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:22:51,984 INFO L85 PathProgramCache]: Analyzing trace with hash 1169210278, now seen corresponding path program 18 times [2024-05-06 04:22:51,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:51,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:52,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:52,063 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 99 trivial. 0 not checked. [2024-05-06 04:22:52,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:52,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:52,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:52,145 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 97 trivial. 0 not checked. [2024-05-06 04:22:52,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:52,386 INFO L85 PathProgramCache]: Analyzing trace with hash -1530473488, now seen corresponding path program 293 times [2024-05-06 04:22:52,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:52,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:52,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:52,992 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:52,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:52,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:53,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:53,201 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:53,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:53,280 INFO L85 PathProgramCache]: Analyzing trace with hash -200037153, now seen corresponding path program 294 times [2024-05-06 04:22:53,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:53,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:53,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:53,490 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:53,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:53,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:53,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:53,700 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:53,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:22:54,012 INFO L85 PathProgramCache]: Analyzing trace with hash -1906183726, now seen corresponding path program 295 times [2024-05-06 04:22:54,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:54,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:54,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:54,364 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:54,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:54,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:54,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:54,575 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:54,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:22:56,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1055682487, now seen corresponding path program 23 times [2024-05-06 04:22:56,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:56,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:56,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:57,096 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:57,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:57,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:57,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:57,316 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:22:57,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:57,670 INFO L85 PathProgramCache]: Analyzing trace with hash -200070693, now seen corresponding path program 296 times [2024-05-06 04:22:57,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:57,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:57,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:57,882 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:57,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:57,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:57,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:58,095 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:58,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:58,635 INFO L85 PathProgramCache]: Analyzing trace with hash -1530506188, now seen corresponding path program 297 times [2024-05-06 04:22:58,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:58,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:58,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:58,843 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:58,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:58,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:58,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:59,128 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:59,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:59,307 INFO L85 PathProgramCache]: Analyzing trace with hash 1941250206, now seen corresponding path program 298 times [2024-05-06 04:22:59,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:59,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:59,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:59,514 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:59,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:59,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:59,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:59,721 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:59,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:22:59,792 INFO L85 PathProgramCache]: Analyzing trace with hash 49214991, now seen corresponding path program 299 times [2024-05-06 04:22:59,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:59,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:59,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:00,001 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:00,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:00,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:00,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:00,209 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:00,223 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:23:02,387 INFO L85 PathProgramCache]: Analyzing trace with hash 1525665472, now seen corresponding path program 300 times [2024-05-06 04:23:02,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:02,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:02,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:02,596 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:02,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:02,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:02,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:02,806 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:02,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:03,350 INFO L85 PathProgramCache]: Analyzing trace with hash 49239111, now seen corresponding path program 301 times [2024-05-06 04:23:03,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:03,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:03,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:03,558 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:03,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:03,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:03,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:03,860 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:03,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:03,943 INFO L85 PathProgramCache]: Analyzing trace with hash 1941277026, now seen corresponding path program 302 times [2024-05-06 04:23:03,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:03,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:03,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:04,149 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:04,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:04,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:04,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:04,358 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:04,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:23:06,418 INFO L85 PathProgramCache]: Analyzing trace with hash 1961170185, now seen corresponding path program 24 times [2024-05-06 04:23:06,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:06,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:06,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:06,597 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:06,597 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:06,597 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:06,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:06,776 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:06,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:08,859 INFO L85 PathProgramCache]: Analyzing trace with hash -996991995, now seen corresponding path program 303 times [2024-05-06 04:23:08,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:08,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:08,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:09,066 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:09,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:09,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:09,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:09,273 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:09,290 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:11,341 INFO L85 PathProgramCache]: Analyzing trace with hash -841980054, now seen corresponding path program 304 times [2024-05-06 04:23:11,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:11,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:11,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:11,671 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:11,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:11,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:11,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:11,878 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:11,893 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:23:14,524 INFO L85 PathProgramCache]: Analyzing trace with hash -331577177, now seen corresponding path program 305 times [2024-05-06 04:23:14,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:14,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:14,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:14,734 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:14,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:14,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:14,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:14,944 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:14,962 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:23:17,004 INFO L85 PathProgramCache]: Analyzing trace with hash -560304372, now seen corresponding path program 25 times [2024-05-06 04:23:17,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:17,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:17,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:17,221 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:17,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:17,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:17,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:17,439 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:17,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:19,518 INFO L85 PathProgramCache]: Analyzing trace with hash -842013594, now seen corresponding path program 306 times [2024-05-06 04:23:19,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:19,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:19,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:19,730 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:19,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:19,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:19,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:20,096 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:20,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:20,323 INFO L85 PathProgramCache]: Analyzing trace with hash -997024695, now seen corresponding path program 307 times [2024-05-06 04:23:20,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:20,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:20,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:20,531 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:20,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:20,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:20,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:20,741 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:20,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:20,831 INFO L85 PathProgramCache]: Analyzing trace with hash -1057719063, now seen corresponding path program 308 times [2024-05-06 04:23:20,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:20,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:20,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:21,039 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:21,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:21,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:21,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:21,254 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:21,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:21,352 INFO L85 PathProgramCache]: Analyzing trace with hash 1570448164, now seen corresponding path program 309 times [2024-05-06 04:23:21,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:21,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:21,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:21,564 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:21,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:21,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:21,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:21,772 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:21,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:23:22,208 INFO L85 PathProgramCache]: Analyzing trace with hash 1439253579, now seen corresponding path program 310 times [2024-05-06 04:23:22,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:22,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:22,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:22,558 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:22,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:22,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:22,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:22,767 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:22,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:22,856 INFO L85 PathProgramCache]: Analyzing trace with hash 1570472284, now seen corresponding path program 311 times [2024-05-06 04:23:22,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:22,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:22,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:23,060 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:23,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:23,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:23,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:23,263 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:23,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:23,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1057692243, now seen corresponding path program 312 times [2024-05-06 04:23:23,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:23,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:23,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:24,157 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:24,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:24,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:24,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:24,363 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:24,381 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:23:24,435 INFO L85 PathProgramCache]: Analyzing trace with hash 349876126, now seen corresponding path program 26 times [2024-05-06 04:23:24,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:24,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:24,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:24,613 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:24,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:24,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:24,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:24,928 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:24,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:25,011 INFO L85 PathProgramCache]: Analyzing trace with hash 946691857, now seen corresponding path program 313 times [2024-05-06 04:23:25,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:25,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:25,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:25,222 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:25,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:25,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:25,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:25,431 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:25,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:25,509 INFO L85 PathProgramCache]: Analyzing trace with hash -717322786, now seen corresponding path program 314 times [2024-05-06 04:23:25,509 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:25,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:25,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:25,721 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:25,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:25,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:25,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:25,931 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:25,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:23:28,076 INFO L85 PathProgramCache]: Analyzing trace with hash -762169165, now seen corresponding path program 315 times [2024-05-06 04:23:28,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:28,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:28,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:28,291 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:28,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:28,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:28,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:28,504 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:28,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:23:30,565 INFO L85 PathProgramCache]: Analyzing trace with hash 806120728, now seen corresponding path program 27 times [2024-05-06 04:23:30,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:30,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:30,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:30,891 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:30,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:30,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:30,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:31,110 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:31,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:31,854 INFO L85 PathProgramCache]: Analyzing trace with hash -717356326, now seen corresponding path program 316 times [2024-05-06 04:23:31,854 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:31,854 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:31,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:32,066 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:32,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:32,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:32,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:32,276 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:32,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:32,366 INFO L85 PathProgramCache]: Analyzing trace with hash 946659157, now seen corresponding path program 317 times [2024-05-06 04:23:32,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:32,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:32,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:32,586 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:32,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:32,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:32,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:32,803 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:32,827 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:32,884 INFO L85 PathProgramCache]: Analyzing trace with hash -104047523, now seen corresponding path program 318 times [2024-05-06 04:23:32,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:32,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:32,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:33,211 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:33,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:33,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:33,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:33,420 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:33,438 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:35,489 INFO L85 PathProgramCache]: Analyzing trace with hash 1069494832, now seen corresponding path program 319 times [2024-05-06 04:23:35,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:35,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:35,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:35,697 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:35,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:35,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:35,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:35,904 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:35,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:23:36,107 INFO L85 PathProgramCache]: Analyzing trace with hash -1205397825, now seen corresponding path program 320 times [2024-05-06 04:23:36,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:36,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:36,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:36,320 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:36,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:36,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:36,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:36,529 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:36,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:36,605 INFO L85 PathProgramCache]: Analyzing trace with hash 1069518952, now seen corresponding path program 321 times [2024-05-06 04:23:36,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:36,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:36,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:36,821 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:36,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:36,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:37,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:37,182 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:37,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:37,277 INFO L85 PathProgramCache]: Analyzing trace with hash -104020703, now seen corresponding path program 322 times [2024-05-06 04:23:37,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:37,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:37,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:37,488 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:37,488 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:37,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:37,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:37,703 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:37,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:23:39,761 INFO L85 PathProgramCache]: Analyzing trace with hash 419977386, now seen corresponding path program 28 times [2024-05-06 04:23:39,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:39,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:39,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:39,942 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:39,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:39,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:39,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:40,124 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:40,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:42,193 INFO L85 PathProgramCache]: Analyzing trace with hash 1134750790, now seen corresponding path program 323 times [2024-05-06 04:23:42,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:42,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:42,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:42,406 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:42,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:42,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:42,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:42,748 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:42,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:42,841 INFO L85 PathProgramCache]: Analyzing trace with hash 817536841, now seen corresponding path program 324 times [2024-05-06 04:23:42,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:42,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:42,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:43,053 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:43,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:43,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:43,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:43,267 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:43,282 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:23:43,489 INFO L85 PathProgramCache]: Analyzing trace with hash -426160984, now seen corresponding path program 325 times [2024-05-06 04:23:43,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:43,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:43,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:43,703 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:43,704 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:43,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:43,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:43,916 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:43,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:23:43,995 INFO L85 PathProgramCache]: Analyzing trace with hash 1853110669, now seen corresponding path program 29 times [2024-05-06 04:23:43,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:43,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:44,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:44,216 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:44,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:44,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:44,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:44,565 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:44,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:44,638 INFO L85 PathProgramCache]: Analyzing trace with hash 817503301, now seen corresponding path program 326 times [2024-05-06 04:23:44,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:44,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:44,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:44,849 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:44,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:44,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:44,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:45,060 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:45,078 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:45,496 INFO L85 PathProgramCache]: Analyzing trace with hash 1134718090, now seen corresponding path program 327 times [2024-05-06 04:23:45,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:45,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:45,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:45,708 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:45,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:45,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:45,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:45,918 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:45,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:46,009 INFO L85 PathProgramCache]: Analyzing trace with hash 1808412552, now seen corresponding path program 328 times [2024-05-06 04:23:46,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:46,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:46,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:46,215 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:46,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:46,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:46,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:46,542 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:46,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:48,609 INFO L85 PathProgramCache]: Analyzing trace with hash 226215013, now seen corresponding path program 329 times [2024-05-06 04:23:48,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:48,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:48,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:48,813 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:48,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:48,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:48,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:49,144 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:49,161 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:23:49,440 INFO L85 PathProgramCache]: Analyzing trace with hash -1577268438, now seen corresponding path program 330 times [2024-05-06 04:23:49,440 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:49,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:49,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:49,766 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:49,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:49,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:49,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:50,007 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:50,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:50,091 INFO L85 PathProgramCache]: Analyzing trace with hash 226239133, now seen corresponding path program 331 times [2024-05-06 04:23:50,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:50,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:50,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:50,338 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:50,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:50,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:50,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:50,585 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:50,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:50,685 INFO L85 PathProgramCache]: Analyzing trace with hash 1808439372, now seen corresponding path program 332 times [2024-05-06 04:23:50,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:50,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:50,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:51,000 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:51,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:51,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:51,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:51,244 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:51,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:23:53,296 INFO L85 PathProgramCache]: Analyzing trace with hash -1256798113, now seen corresponding path program 30 times [2024-05-06 04:23:53,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:53,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:53,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:53,562 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:53,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:53,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:53,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:53,742 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:23:53,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:53,822 INFO L85 PathProgramCache]: Analyzing trace with hash -2058959310, now seen corresponding path program 333 times [2024-05-06 04:23:53,822 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:53,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:53,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:54,035 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:54,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:54,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:54,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:54,248 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:54,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:54,355 INFO L85 PathProgramCache]: Analyzing trace with hash 596771549, now seen corresponding path program 334 times [2024-05-06 04:23:54,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:54,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:54,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:54,566 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:54,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:54,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:54,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:54,781 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:54,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:23:55,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1320049556, now seen corresponding path program 335 times [2024-05-06 04:23:55,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:55,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:55,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:55,351 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:55,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:55,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:55,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:55,602 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:55,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:23:57,673 INFO L85 PathProgramCache]: Analyzing trace with hash 1781417593, now seen corresponding path program 31 times [2024-05-06 04:23:57,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:57,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:57,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:57,977 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:57,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:57,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:58,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:58,212 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:58,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:23:58,312 INFO L85 PathProgramCache]: Analyzing trace with hash 596738009, now seen corresponding path program 336 times [2024-05-06 04:23:58,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:58,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:58,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:58,535 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:58,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:58,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:58,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:58,759 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:23:58,781 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:00,864 INFO L85 PathProgramCache]: Analyzing trace with hash -2058992010, now seen corresponding path program 337 times [2024-05-06 04:24:00,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:00,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:00,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:01,076 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:01,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:01,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:01,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:01,359 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:01,421 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:03,489 INFO L85 PathProgramCache]: Analyzing trace with hash -2067186660, now seen corresponding path program 338 times [2024-05-06 04:24:03,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:03,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:03,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:03,696 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:03,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:03,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:03,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:03,903 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:03,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:03,980 INFO L85 PathProgramCache]: Analyzing trace with hash 341723729, now seen corresponding path program 339 times [2024-05-06 04:24:03,980 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:03,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:04,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:04,190 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:04,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:04,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:04,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:04,398 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:04,413 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:24:04,869 INFO L85 PathProgramCache]: Analyzing trace with hash 2003501758, now seen corresponding path program 340 times [2024-05-06 04:24:04,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:04,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:04,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:05,081 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:05,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:05,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:05,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:05,358 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:05,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:05,441 INFO L85 PathProgramCache]: Analyzing trace with hash 341747849, now seen corresponding path program 341 times [2024-05-06 04:24:05,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:05,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:05,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:05,652 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:05,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:05,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:05,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:05,860 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:05,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:05,960 INFO L85 PathProgramCache]: Analyzing trace with hash -2067159840, now seen corresponding path program 342 times [2024-05-06 04:24:05,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:05,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:06,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:06,169 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:06,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:06,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:06,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:06,381 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:06,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:24:06,458 INFO L85 PathProgramCache]: Analyzing trace with hash -634619829, now seen corresponding path program 32 times [2024-05-06 04:24:06,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:06,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:06,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:06,706 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:06,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:06,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:06,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:06,886 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 2 proven. 24 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:06,907 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:06,958 INFO L85 PathProgramCache]: Analyzing trace with hash -1733679422, now seen corresponding path program 343 times [2024-05-06 04:24:06,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:06,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:07,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:07,009 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:24:07,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:07,079 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:07,146 INFO L85 PathProgramCache]: Analyzing trace with hash 2090513485, now seen corresponding path program 344 times [2024-05-06 04:24:07,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:07,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:07,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:07,198 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:24:07,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:07,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:24:07,507 INFO L85 PathProgramCache]: Analyzing trace with hash 381409316, now seen corresponding path program 345 times [2024-05-06 04:24:07,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:07,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:07,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:07,560 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:24:07,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:07,634 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:07,705 INFO L85 PathProgramCache]: Analyzing trace with hash -1381811384, now seen corresponding path program 346 times [2024-05-06 04:24:07,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:07,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:07,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:08,101 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:08,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:08,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:08,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:08,326 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:08,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:08,399 INFO L85 PathProgramCache]: Analyzing trace with hash 113520805, now seen corresponding path program 347 times [2024-05-06 04:24:08,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:08,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:08,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:08,743 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:08,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:08,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:08,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:08,971 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:08,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:24:09,058 INFO L85 PathProgramCache]: Analyzing trace with hash -775821590, now seen corresponding path program 348 times [2024-05-06 04:24:09,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:09,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:09,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:09,620 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 99 trivial. 0 not checked. [2024-05-06 04:24:09,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:09,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:09,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:09,838 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 99 trivial. 0 not checked. [2024-05-06 04:24:09,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:09,955 INFO L85 PathProgramCache]: Analyzing trace with hash 113530510, now seen corresponding path program 349 times [2024-05-06 04:24:09,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:09,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:10,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:10,224 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:10,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:10,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:10,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:10,684 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:10,724 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:10,800 INFO L85 PathProgramCache]: Analyzing trace with hash -1381799444, now seen corresponding path program 350 times [2024-05-06 04:24:10,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:10,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:10,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:11,033 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:11,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:11,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:11,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:11,258 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:11,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:11,464 INFO L85 PathProgramCache]: Analyzing trace with hash 346418308, now seen corresponding path program 351 times [2024-05-06 04:24:11,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:11,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:11,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:11,959 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:11,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:11,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:12,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:12,198 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:12,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:12,391 INFO L85 PathProgramCache]: Analyzing trace with hash -2145933606, now seen corresponding path program 352 times [2024-05-06 04:24:12,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:12,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:12,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:12,633 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:12,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:12,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:12,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:12,868 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:24:12,882 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:24:12,953 INFO L85 PathProgramCache]: Analyzing trace with hash -2099431610, now seen corresponding path program 353 times [2024-05-06 04:24:12,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:12,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:12,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:13,147 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 99 trivial. 0 not checked. [2024-05-06 04:24:13,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:13,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:13,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:13,279 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 99 trivial. 0 not checked. [2024-05-06 04:24:13,280 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-06 04:24:13,283 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=504, Invalid=15498, Unknown=0, NotChecked=0, Total=16002 [2024-05-06 04:24:13,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:24:15,458 INFO L85 PathProgramCache]: Analyzing trace with hash 2042985164, now seen corresponding path program 33 times [2024-05-06 04:24:15,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:15,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:15,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:15,715 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 7 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:15,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:15,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:15,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:16,097 INFO L134 CoverageAnalysis]: Checked inductivity of 135 backedges. 7 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:16,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:16,228 INFO L85 PathProgramCache]: Analyzing trace with hash 1417532768, now seen corresponding path program 354 times [2024-05-06 04:24:16,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:16,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:16,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:16,453 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:16,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:16,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:16,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:16,684 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:16,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:16,808 INFO L85 PathProgramCache]: Analyzing trace with hash 993843567, now seen corresponding path program 355 times [2024-05-06 04:24:16,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:16,808 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:16,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:17,044 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:17,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:17,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:17,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:17,379 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:17,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:24:17,731 INFO L85 PathProgramCache]: Analyzing trace with hash 744380226, now seen corresponding path program 356 times [2024-05-06 04:24:17,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:17,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:17,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:17,953 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:17,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:17,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:18,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:18,179 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:18,197 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:24:20,243 INFO L85 PathProgramCache]: Analyzing trace with hash -842257113, now seen corresponding path program 34 times [2024-05-06 04:24:20,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:20,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:20,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:20,481 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:20,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:20,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:20,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:20,837 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:20,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:20,935 INFO L85 PathProgramCache]: Analyzing trace with hash 993824442, now seen corresponding path program 357 times [2024-05-06 04:24:20,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:20,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:20,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:21,168 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:21,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:21,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:21,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:21,396 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:21,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:21,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1417514948, now seen corresponding path program 358 times [2024-05-06 04:24:21,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:21,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:21,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:21,792 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:21,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:21,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:21,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:22,126 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 22 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:22,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:24,219 INFO L85 PathProgramCache]: Analyzing trace with hash 1994037838, now seen corresponding path program 359 times [2024-05-06 04:24:24,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:24,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:24,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:24,462 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:24,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:24,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:24,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:24,699 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:24,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:24,767 INFO L85 PathProgramCache]: Analyzing trace with hash 1685631568, now seen corresponding path program 360 times [2024-05-06 04:24:24,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:24,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:24,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:25,000 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:25,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:25,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:25,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:25,344 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:25,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:24:28,009 INFO L85 PathProgramCache]: Analyzing trace with hash 714971792, now seen corresponding path program 361 times [2024-05-06 04:24:28,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:28,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:28,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:28,264 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:28,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:28,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:28,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:28,517 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:28,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:28,618 INFO L85 PathProgramCache]: Analyzing trace with hash 1685641273, now seen corresponding path program 362 times [2024-05-06 04:24:28,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:28,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:28,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:28,860 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:28,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:28,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:28,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:29,175 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:29,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:29,273 INFO L85 PathProgramCache]: Analyzing trace with hash 1994049778, now seen corresponding path program 363 times [2024-05-06 04:24:29,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:29,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:29,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:29,515 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:29,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:29,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:29,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:29,759 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 54 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:29,781 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:24:29,862 INFO L85 PathProgramCache]: Analyzing trace with hash 310080825, now seen corresponding path program 35 times [2024-05-06 04:24:29,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:29,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:29,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:30,197 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 7 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:30,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:30,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:30,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:30,453 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 7 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:30,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:30,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1484987763, now seen corresponding path program 364 times [2024-05-06 04:24:30,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:30,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:30,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:30,756 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:30,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:30,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:30,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:30,976 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:30,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:33,057 INFO L85 PathProgramCache]: Analyzing trace with hash 1210020322, now seen corresponding path program 365 times [2024-05-06 04:24:33,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:33,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:33,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:33,370 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:33,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:33,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:33,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:33,605 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:33,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:24:33,798 INFO L85 PathProgramCache]: Analyzing trace with hash -1144074961, now seen corresponding path program 366 times [2024-05-06 04:24:33,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:33,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:33,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:34,034 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:34,034 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:34,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:34,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:34,268 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:34,364 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:24:34,425 INFO L85 PathProgramCache]: Analyzing trace with hash 1719805844, now seen corresponding path program 36 times [2024-05-06 04:24:34,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:34,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:34,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:34,659 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:34,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:34,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:34,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:34,901 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:34,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:35,047 INFO L85 PathProgramCache]: Analyzing trace with hash 1210001197, now seen corresponding path program 367 times [2024-05-06 04:24:35,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:35,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:35,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:35,280 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:35,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:35,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:35,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:35,604 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:35,624 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:35,725 INFO L85 PathProgramCache]: Analyzing trace with hash -1485005583, now seen corresponding path program 368 times [2024-05-06 04:24:35,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:35,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:35,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:35,964 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:35,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:35,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:36,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:36,195 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 21 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:36,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:37,001 INFO L85 PathProgramCache]: Analyzing trace with hash -629631359, now seen corresponding path program 369 times [2024-05-06 04:24:37,001 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:37,001 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:37,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:37,246 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:37,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:37,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:37,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:37,580 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:37,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:39,667 INFO L85 PathProgramCache]: Analyzing trace with hash 1956265085, now seen corresponding path program 370 times [2024-05-06 04:24:39,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:39,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:39,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:39,906 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:39,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:39,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:39,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:40,148 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:40,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:24:42,395 INFO L85 PathProgramCache]: Analyzing trace with hash 514676227, now seen corresponding path program 371 times [2024-05-06 04:24:42,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:42,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:42,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:42,715 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:42,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:42,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:42,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:42,958 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:42,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:43,053 INFO L85 PathProgramCache]: Analyzing trace with hash 1956274790, now seen corresponding path program 372 times [2024-05-06 04:24:43,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:43,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:43,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:43,296 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:43,296 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:43,296 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:43,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:43,620 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:43,639 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:43,708 INFO L85 PathProgramCache]: Analyzing trace with hash -629619419, now seen corresponding path program 373 times [2024-05-06 04:24:43,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:43,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:43,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:43,951 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:43,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:43,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:43,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:44,191 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 6 proven. 53 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:44,219 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:24:44,287 INFO L85 PathProgramCache]: Analyzing trace with hash 107416045, now seen corresponding path program 37 times [2024-05-06 04:24:44,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:44,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:44,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:44,628 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 7 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:44,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:44,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:44,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:44,885 INFO L134 CoverageAnalysis]: Checked inductivity of 133 backedges. 7 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:44,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:46,955 INFO L85 PathProgramCache]: Analyzing trace with hash -209452479, now seen corresponding path program 374 times [2024-05-06 04:24:46,955 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:46,955 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:47,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:47,186 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:47,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:47,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:47,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:47,505 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:47,524 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:47,600 INFO L85 PathProgramCache]: Analyzing trace with hash 2096908462, now seen corresponding path program 375 times [2024-05-06 04:24:47,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:47,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:47,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:47,830 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:47,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:47,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:47,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:48,058 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:48,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:24:48,532 INFO L85 PathProgramCache]: Analyzing trace with hash 579653603, now seen corresponding path program 376 times [2024-05-06 04:24:48,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:48,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:48,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:48,838 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:48,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:48,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:48,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:49,070 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:49,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:24:51,131 INFO L85 PathProgramCache]: Analyzing trace with hash 1517141064, now seen corresponding path program 38 times [2024-05-06 04:24:51,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:51,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:51,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:51,371 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:51,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:51,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:51,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:51,701 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:51,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:53,783 INFO L85 PathProgramCache]: Analyzing trace with hash 2096889337, now seen corresponding path program 377 times [2024-05-06 04:24:53,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:53,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:53,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:54,012 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:54,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:54,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:54,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:54,240 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:54,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:54,721 INFO L85 PathProgramCache]: Analyzing trace with hash -209470299, now seen corresponding path program 378 times [2024-05-06 04:24:54,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:54,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:54,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:55,017 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:55,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:55,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:55,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:55,242 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 20 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:24:55,266 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:57,316 INFO L85 PathProgramCache]: Analyzing trace with hash -1545520051, now seen corresponding path program 379 times [2024-05-06 04:24:57,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:57,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:57,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:57,557 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:57,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:57,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:57,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:57,879 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:57,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:24:57,985 INFO L85 PathProgramCache]: Analyzing trace with hash -666480591, now seen corresponding path program 380 times [2024-05-06 04:24:57,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:57,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:58,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:58,223 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:58,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:58,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:58,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:58,462 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:24:58,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:24:59,767 INFO L85 PathProgramCache]: Analyzing trace with hash 813938895, now seen corresponding path program 381 times [2024-05-06 04:24:59,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:59,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:59,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:00,080 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:00,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:00,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:00,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:00,321 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:00,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:00,404 INFO L85 PathProgramCache]: Analyzing trace with hash -666470886, now seen corresponding path program 382 times [2024-05-06 04:25:00,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:00,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:00,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:00,720 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:00,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:00,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:00,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:00,970 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:00,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:02,867 INFO L85 PathProgramCache]: Analyzing trace with hash -1545508111, now seen corresponding path program 383 times [2024-05-06 04:25:02,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:02,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:02,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:03,120 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:03,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:03,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:03,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:03,499 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 6 proven. 52 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:03,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:25:03,585 INFO L85 PathProgramCache]: Analyzing trace with hash -1569906822, now seen corresponding path program 39 times [2024-05-06 04:25:03,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:03,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:03,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:03,840 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 7 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:03,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:03,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:03,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:04,167 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 7 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:04,207 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:04,266 INFO L85 PathProgramCache]: Analyzing trace with hash 92480142, now seen corresponding path program 384 times [2024-05-06 04:25:04,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:04,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:04,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:04,489 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:04,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:04,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:04,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:04,719 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:04,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:04,794 INFO L85 PathProgramCache]: Analyzing trace with hash -1428082175, now seen corresponding path program 385 times [2024-05-06 04:25:04,794 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:04,794 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:04,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:05,088 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:05,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:05,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:05,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:05,313 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:05,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:25:05,951 INFO L85 PathProgramCache]: Analyzing trace with hash -1320873744, now seen corresponding path program 386 times [2024-05-06 04:25:05,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:05,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:06,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:06,242 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:06,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:06,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:06,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:06,474 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:06,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:25:06,565 INFO L85 PathProgramCache]: Analyzing trace with hash -160181803, now seen corresponding path program 40 times [2024-05-06 04:25:06,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:06,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:06,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:06,801 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:06,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:06,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:06,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:07,107 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:07,126 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:07,198 INFO L85 PathProgramCache]: Analyzing trace with hash -1428101300, now seen corresponding path program 387 times [2024-05-06 04:25:07,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:07,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:07,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:07,435 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:07,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:07,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:07,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:07,745 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:07,765 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:07,842 INFO L85 PathProgramCache]: Analyzing trace with hash 92462322, now seen corresponding path program 388 times [2024-05-06 04:25:07,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:07,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:07,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:08,070 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:08,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:08,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:08,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:08,369 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 19 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:08,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:09,138 INFO L85 PathProgramCache]: Analyzing trace with hash -1020845728, now seen corresponding path program 389 times [2024-05-06 04:25:09,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:09,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:09,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:09,382 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:09,382 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:09,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:09,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:09,695 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:09,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:11,783 INFO L85 PathProgramCache]: Analyzing trace with hash -1581445762, now seen corresponding path program 390 times [2024-05-06 04:25:11,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:11,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:11,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:12,026 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:12,026 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:12,026 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:12,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:12,328 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:12,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:25:12,555 INFO L85 PathProgramCache]: Analyzing trace with hash -1780177630, now seen corresponding path program 391 times [2024-05-06 04:25:12,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:12,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:12,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:12,795 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:12,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:12,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:12,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:13,095 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:13,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:13,204 INFO L85 PathProgramCache]: Analyzing trace with hash -1581436057, now seen corresponding path program 392 times [2024-05-06 04:25:13,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:13,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:13,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:13,439 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:13,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:13,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:13,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:13,751 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:13,770 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:15,835 INFO L85 PathProgramCache]: Analyzing trace with hash -1020833788, now seen corresponding path program 393 times [2024-05-06 04:25:15,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:15,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:15,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:16,075 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:16,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:16,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:16,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:16,373 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:16,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:18,458 INFO L85 PathProgramCache]: Analyzing trace with hash 2141713358, now seen corresponding path program 394 times [2024-05-06 04:25:18,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:18,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:18,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:18,677 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 5 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:18,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:18,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:18,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:18,949 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 5 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:18,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:19,031 INFO L85 PathProgramCache]: Analyzing trace with hash 1968605377, now seen corresponding path program 395 times [2024-05-06 04:25:19,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:19,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:19,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:19,247 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 5 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:19,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:19,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:19,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:19,520 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 5 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:19,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:19,669 INFO L85 PathProgramCache]: Analyzing trace with hash -2089350692, now seen corresponding path program 396 times [2024-05-06 04:25:19,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:19,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:19,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:19,901 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:19,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:19,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:19,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:20,193 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:20,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:22,265 INFO L85 PathProgramCache]: Analyzing trace with hash 2074504256, now seen corresponding path program 397 times [2024-05-06 04:25:22,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:22,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:22,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:22,506 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:22,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:22,507 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:22,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:22,804 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:22,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:22,884 INFO L85 PathProgramCache]: Analyzing trace with hash -114876770, now seen corresponding path program 398 times [2024-05-06 04:25:22,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:22,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:22,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:23,163 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:23,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:23,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:23,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:23,400 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:23,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:25:23,729 INFO L85 PathProgramCache]: Analyzing trace with hash 733788162, now seen corresponding path program 399 times [2024-05-06 04:25:23,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:23,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:23,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:24,014 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:24,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:24,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:24,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:24,257 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:24,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:24,369 INFO L85 PathProgramCache]: Analyzing trace with hash 1179539183, now seen corresponding path program 400 times [2024-05-06 04:25:24,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:24,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:24,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:24,641 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:24,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:24,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:24,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:24,914 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:24,933 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:25:24,991 INFO L85 PathProgramCache]: Analyzing trace with hash -1935193954, now seen corresponding path program 41 times [2024-05-06 04:25:24,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:24,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:25,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:25,245 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 7 proven. 50 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:25,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:25,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:25,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:25,556 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 7 proven. 50 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:25,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:25,665 INFO L85 PathProgramCache]: Analyzing trace with hash -1419486542, now seen corresponding path program 401 times [2024-05-06 04:25:25,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:25,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:25,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:25,951 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:25,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:25,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:26,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:26,185 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:26,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:28,257 INFO L85 PathProgramCache]: Analyzing trace with hash -1054409123, now seen corresponding path program 402 times [2024-05-06 04:25:28,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:28,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:28,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:28,524 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:28,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:28,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:28,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:28,796 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:28,811 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:25:30,997 INFO L85 PathProgramCache]: Analyzing trace with hash 1673056276, now seen corresponding path program 403 times [2024-05-06 04:25:30,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:30,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:31,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:31,218 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:31,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:31,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:31,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:31,495 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:31,513 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:25:31,571 INFO L85 PathProgramCache]: Analyzing trace with hash -525468935, now seen corresponding path program 42 times [2024-05-06 04:25:31,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:31,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:31,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:31,842 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:31,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:31,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:31,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:32,117 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:32,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:32,211 INFO L85 PathProgramCache]: Analyzing trace with hash -1054428248, now seen corresponding path program 404 times [2024-05-06 04:25:32,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:32,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:32,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:32,437 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:32,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:32,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:32,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:32,710 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:32,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:32,798 INFO L85 PathProgramCache]: Analyzing trace with hash -1419504362, now seen corresponding path program 405 times [2024-05-06 04:25:32,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:32,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:32,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:33,053 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:33,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:33,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:33,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:33,313 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 18 proven. 36 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:33,331 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:25:33,498 INFO L85 PathProgramCache]: Analyzing trace with hash 897225264, now seen corresponding path program 406 times [2024-05-06 04:25:33,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:33,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:33,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:33,711 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 5 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:33,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:33,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:33,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:33,957 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 5 proven. 51 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:33,976 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:36,025 INFO L85 PathProgramCache]: Analyzing trace with hash -674982841, now seen corresponding path program 407 times [2024-05-06 04:25:36,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:36,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:36,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:36,316 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 6 proven. 50 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:36,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:36,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:36,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:36,613 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 6 proven. 50 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:36,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:36,693 INFO L85 PathProgramCache]: Analyzing trace with hash 550369143, now seen corresponding path program 408 times [2024-05-06 04:25:36,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:36,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:36,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:36,973 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 6 proven. 50 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:36,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:36,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:37,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:37,258 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 6 proven. 50 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-05-06 04:25:37,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:25:37,335 INFO L85 PathProgramCache]: Analyzing trace with hash -118425015, now seen corresponding path program 409 times [2024-05-06 04:25:37,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:37,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:37,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:37,600 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 14 proven. 16 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2024-05-06 04:25:37,601 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:37,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:37,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:37,783 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 14 proven. 16 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2024-05-06 04:25:37,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:39,853 INFO L85 PathProgramCache]: Analyzing trace with hash 1970149779, now seen corresponding path program 410 times [2024-05-06 04:25:39,853 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:39,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:39,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:40,132 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:40,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:40,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:40,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:40,414 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:40,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:40,518 INFO L85 PathProgramCache]: Analyzing trace with hash 945101724, now seen corresponding path program 411 times [2024-05-06 04:25:40,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:40,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:40,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:40,797 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:40,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:40,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:40,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:41,080 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:41,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:25:43,472 INFO L85 PathProgramCache]: Analyzing trace with hash -766616907, now seen corresponding path program 412 times [2024-05-06 04:25:43,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:43,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:43,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:43,754 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:43,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:43,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:43,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:44,025 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:44,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:25:46,083 INFO L85 PathProgramCache]: Analyzing trace with hash -1179935718, now seen corresponding path program 43 times [2024-05-06 04:25:46,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:46,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:46,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:46,353 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:46,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:46,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:46,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:46,644 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:46,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:46,736 INFO L85 PathProgramCache]: Analyzing trace with hash 945068184, now seen corresponding path program 413 times [2024-05-06 04:25:46,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:46,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:46,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:46,991 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:46,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:46,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:47,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:47,257 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:47,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:47,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1970117079, now seen corresponding path program 414 times [2024-05-06 04:25:47,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:47,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:47,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:47,620 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:47,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:47,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:47,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:47,885 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:47,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:47,975 INFO L85 PathProgramCache]: Analyzing trace with hash -871274597, now seen corresponding path program 415 times [2024-05-06 04:25:47,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:47,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:48,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:48,224 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:48,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:48,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:48,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:48,501 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:48,519 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:50,580 INFO L85 PathProgramCache]: Analyzing trace with hash -1239707982, now seen corresponding path program 416 times [2024-05-06 04:25:50,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:50,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:50,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:50,835 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:50,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:50,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:50,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:51,096 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:51,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 972 treesize of output 924 [2024-05-06 04:25:51,313 INFO L85 PathProgramCache]: Analyzing trace with hash 223758973, now seen corresponding path program 417 times [2024-05-06 04:25:51,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:51,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:51,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:51,561 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:51,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:51,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:51,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:51,840 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:51,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:53,921 INFO L85 PathProgramCache]: Analyzing trace with hash -1239683862, now seen corresponding path program 418 times [2024-05-06 04:25:53,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:53,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:53,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:54,176 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:54,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:54,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:54,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:54,444 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:54,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:56,513 INFO L85 PathProgramCache]: Analyzing trace with hash -871247777, now seen corresponding path program 419 times [2024-05-06 04:25:56,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:56,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:56,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:56,764 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:56,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:56,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:56,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:57,023 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:57,041 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:25:57,097 INFO L85 PathProgramCache]: Analyzing trace with hash 419341356, now seen corresponding path program 44 times [2024-05-06 04:25:57,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:57,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:57,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:57,374 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:57,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:57,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:57,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:57,678 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:25:57,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:57,777 INFO L85 PathProgramCache]: Analyzing trace with hash 1055593986, now seen corresponding path program 420 times [2024-05-06 04:25:57,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:57,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:57,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:58,087 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:58,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:58,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:58,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:58,401 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:58,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:25:58,510 INFO L85 PathProgramCache]: Analyzing trace with hash -1636324083, now seen corresponding path program 421 times [2024-05-06 04:25:58,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:58,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:58,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:58,827 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:58,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:58,828 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:58,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:59,120 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:59,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:25:59,316 INFO L85 PathProgramCache]: Analyzing trace with hash 813561700, now seen corresponding path program 422 times [2024-05-06 04:25:59,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:59,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:59,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:59,692 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:25:59,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:59,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:59,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:00,075 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:00,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:26:00,167 INFO L85 PathProgramCache]: Analyzing trace with hash 753052233, now seen corresponding path program 45 times [2024-05-06 04:26:00,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:00,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:00,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:00,463 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:00,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:00,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:00,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:00,833 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:00,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:01,172 INFO L85 PathProgramCache]: Analyzing trace with hash -1636357623, now seen corresponding path program 423 times [2024-05-06 04:26:01,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:01,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:01,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:01,512 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:01,512 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:01,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:01,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:01,791 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:01,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:02,021 INFO L85 PathProgramCache]: Analyzing trace with hash 1055561286, now seen corresponding path program 424 times [2024-05-06 04:26:02,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:02,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:02,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:02,396 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:02,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:02,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:02,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:02,727 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:02,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:02,898 INFO L85 PathProgramCache]: Analyzing trace with hash 514122316, now seen corresponding path program 425 times [2024-05-06 04:26:02,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:02,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:02,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:03,221 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:03,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:03,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:03,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:03,537 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:03,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:05,628 INFO L85 PathProgramCache]: Analyzing trace with hash -1242076639, now seen corresponding path program 426 times [2024-05-06 04:26:05,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:05,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:05,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:05,858 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:05,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:05,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:05,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:06,098 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:06,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1930 treesize of output 1834 [2024-05-06 04:26:06,341 INFO L85 PathProgramCache]: Analyzing trace with hash 150330606, now seen corresponding path program 427 times [2024-05-06 04:26:06,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:06,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:06,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:06,583 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:06,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:06,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:06,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:06,825 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:06,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:06,914 INFO L85 PathProgramCache]: Analyzing trace with hash -1242052519, now seen corresponding path program 428 times [2024-05-06 04:26:06,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:06,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:06,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:07,155 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:07,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:07,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:07,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:07,481 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:07,502 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:07,570 INFO L85 PathProgramCache]: Analyzing trace with hash 514149136, now seen corresponding path program 429 times [2024-05-06 04:26:07,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:07,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:07,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:07,809 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:07,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:07,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:07,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:08,044 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:08,062 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:26:10,104 INFO L85 PathProgramCache]: Analyzing trace with hash -946786277, now seen corresponding path program 46 times [2024-05-06 04:26:10,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:10,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:10,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:10,334 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:10,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:10,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:10,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:10,668 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:10,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:10,765 INFO L85 PathProgramCache]: Analyzing trace with hash 1012904308, now seen corresponding path program 430 times [2024-05-06 04:26:10,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:10,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:10,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:11,005 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:11,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:11,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:11,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:11,243 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:11,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:11,357 INFO L85 PathProgramCache]: Analyzing trace with hash 1335263195, now seen corresponding path program 431 times [2024-05-06 04:26:11,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:11,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:11,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:11,591 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:11,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:11,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:11,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:11,986 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:12,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:26:12,242 INFO L85 PathProgramCache]: Analyzing trace with hash -1556513194, now seen corresponding path program 432 times [2024-05-06 04:26:12,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:12,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:12,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:12,497 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:12,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:12,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:12,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:12,737 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:12,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:26:12,810 INFO L85 PathProgramCache]: Analyzing trace with hash 1818318395, now seen corresponding path program 47 times [2024-05-06 04:26:12,810 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:12,810 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:12,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:13,055 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:13,055 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:13,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:13,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:13,408 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:13,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:13,505 INFO L85 PathProgramCache]: Analyzing trace with hash 1335229655, now seen corresponding path program 433 times [2024-05-06 04:26:13,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:13,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:13,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:13,749 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:13,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:13,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:13,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:13,993 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:14,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:16,082 INFO L85 PathProgramCache]: Analyzing trace with hash 1012871608, now seen corresponding path program 434 times [2024-05-06 04:26:16,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:16,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:16,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:16,324 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:16,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:16,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:16,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:16,699 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:16,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:16,783 INFO L85 PathProgramCache]: Analyzing trace with hash 362299034, now seen corresponding path program 435 times [2024-05-06 04:26:16,784 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:16,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:16,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:17,020 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:17,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:17,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:17,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:17,257 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:17,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:17,417 INFO L85 PathProgramCache]: Analyzing trace with hash -1653631085, now seen corresponding path program 436 times [2024-05-06 04:26:17,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:17,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:17,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:17,655 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:17,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:17,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:17,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:18,015 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:18,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:26:20,194 INFO L85 PathProgramCache]: Analyzing trace with hash 277044668, now seen corresponding path program 437 times [2024-05-06 04:26:20,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:20,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:20,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:20,430 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:20,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:20,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:20,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:20,666 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:20,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:20,752 INFO L85 PathProgramCache]: Analyzing trace with hash -1653606965, now seen corresponding path program 438 times [2024-05-06 04:26:20,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:20,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:20,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:20,987 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:20,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:20,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:21,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:21,225 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:21,244 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:21,316 INFO L85 PathProgramCache]: Analyzing trace with hash 362325854, now seen corresponding path program 439 times [2024-05-06 04:26:21,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:21,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:21,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:21,663 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:21,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:21,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:21,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:21,898 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:21,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:26:21,980 INFO L85 PathProgramCache]: Analyzing trace with hash -1284418419, now seen corresponding path program 48 times [2024-05-06 04:26:21,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:21,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:22,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:22,221 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:22,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:22,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:22,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:22,461 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:22,486 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:22,563 INFO L85 PathProgramCache]: Analyzing trace with hash 582697347, now seen corresponding path program 440 times [2024-05-06 04:26:22,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:22,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:22,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:22,916 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:22,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:22,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:22,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:23,169 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:23,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:23,263 INFO L85 PathProgramCache]: Analyzing trace with hash 883749292, now seen corresponding path program 441 times [2024-05-06 04:26:23,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:23,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:23,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:23,513 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:23,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:23,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:23,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:23,760 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:23,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 473 treesize of output 449 [2024-05-06 04:26:24,067 INFO L85 PathProgramCache]: Analyzing trace with hash 1626424997, now seen corresponding path program 442 times [2024-05-06 04:26:24,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:24,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:24,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:24,410 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:24,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:24,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:24,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:24,657 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:24,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:26:24,797 INFO L85 PathProgramCache]: Analyzing trace with hash 1193025546, now seen corresponding path program 49 times [2024-05-06 04:26:24,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:24,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:24,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:25,051 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:25,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:25,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:25,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:25,310 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:25,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:25,541 INFO L85 PathProgramCache]: Analyzing trace with hash 883715752, now seen corresponding path program 443 times [2024-05-06 04:26:25,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:25,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:25,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:25,899 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:25,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:25,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:25,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:26,153 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:26,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:26,287 INFO L85 PathProgramCache]: Analyzing trace with hash 582664647, now seen corresponding path program 444 times [2024-05-06 04:26:26,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:26,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:26,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:26,535 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:26,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:26,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:26,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:26,773 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:26,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:28,846 INFO L85 PathProgramCache]: Analyzing trace with hash -670395989, now seen corresponding path program 445 times [2024-05-06 04:26:28,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:28,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:28,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:29,191 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:29,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:29,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:29,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:29,424 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:29,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:29,500 INFO L85 PathProgramCache]: Analyzing trace with hash 692561570, now seen corresponding path program 446 times [2024-05-06 04:26:29,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:29,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:29,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:29,734 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:29,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:29,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:29,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:29,968 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:29,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:26:30,459 INFO L85 PathProgramCache]: Analyzing trace with hash -5427059, now seen corresponding path program 447 times [2024-05-06 04:26:30,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:30,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:30,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:30,811 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:30,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:30,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:30,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:31,053 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:31,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:31,304 INFO L85 PathProgramCache]: Analyzing trace with hash 692585690, now seen corresponding path program 448 times [2024-05-06 04:26:31,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:31,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:31,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:31,543 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:31,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:31,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:31,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:31,785 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:31,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:31,882 INFO L85 PathProgramCache]: Analyzing trace with hash -670369169, now seen corresponding path program 449 times [2024-05-06 04:26:31,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:31,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:31,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:32,216 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:32,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:32,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:32,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:32,451 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:32,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:26:34,510 INFO L85 PathProgramCache]: Analyzing trace with hash 1736262684, now seen corresponding path program 50 times [2024-05-06 04:26:34,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:34,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:34,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:34,741 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:34,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:34,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:34,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:34,974 INFO L134 CoverageAnalysis]: Checked inductivity of 130 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-05-06 04:26:34,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:35,063 INFO L85 PathProgramCache]: Analyzing trace with hash 694179157, now seen corresponding path program 450 times [2024-05-06 04:26:35,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:35,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:35,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:35,404 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:35,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:35,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:35,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:35,642 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:35,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2024-05-06 04:26:35,723 INFO L85 PathProgramCache]: Analyzing trace with hash 44718106, now seen corresponding path program 451 times [2024-05-06 04:26:35,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:35,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:35,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:35,961 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:35,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:35,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:36,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:36,196 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:36,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 952 treesize of output 904 [2024-05-06 04:26:38,369 INFO L85 PathProgramCache]: Analyzing trace with hash 1386262007, now seen corresponding path program 452 times [2024-05-06 04:26:38,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:38,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:38,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:38,715 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:38,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:38,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:38,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:38,955 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 8 proven. 46 refuted. 0 times theorem prover too weak. 77 trivial. 0 not checked. [2024-05-06 04:26:38,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 29 [2024-05-06 04:26:41,025 INFO L85 PathProgramCache]: Analyzing trace with hash 1205935196, now seen corresponding path program 51 times [2024-05-06 04:26:41,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:41,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:41,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat Received shutdown request... [2024-05-06 04:26:41,197 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:26:41,202 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:26:41,202 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:26:41,212 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-06 04:26:41,403 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1340,SelfDestructingSolverStorable1109,SelfDestructingSolverStorable1108,SelfDestructingSolverStorable1229,SelfDestructingSolverStorable1107,SelfDestructingSolverStorable1228,SelfDestructingSolverStorable1349,SelfDestructingSolverStorable1106,SelfDestructingSolverStorable1227,SelfDestructingSolverStorable1348,SelfDestructingSolverStorable1105,SelfDestructingSolverStorable1226,SelfDestructingSolverStorable1347,SelfDestructingSolverStorable1104,SelfDestructingSolverStorable1225,SelfDestructingSolverStorable1346,SelfDestructingSolverStorable1103,SelfDestructingSolverStorable1224,SelfDestructingSolverStorable1345,SelfDestructingSolverStorable1102,SelfDestructingSolverStorable1223,SelfDestructingSolverStorable1344,SelfDestructingSolverStorable1101,SelfDestructingSolverStorable1222,SelfDestructingSolverStorable1343,SelfDestructingSolverStorable1100,SelfDestructingSolverStorable1221,SelfDestructingSolverStorable1342,SelfDestructingSolverStorable1220,SelfDestructingSolverStorable1341,SelfDestructingSolverStorable1230,SelfDestructingSolverStorable1351,SelfDestructingSolverStorable1350,SelfDestructingSolverStorable1119,SelfDestructingSolverStorable1118,SelfDestructingSolverStorable1239,SelfDestructingSolverStorable1117,SelfDestructingSolverStorable1238,SelfDestructingSolverStorable1359,SelfDestructingSolverStorable1116,SelfDestructingSolverStorable1237,SelfDestructingSolverStorable1358,SelfDestructingSolverStorable1115,SelfDestructingSolverStorable1236,SelfDestructingSolverStorable1357,SelfDestructingSolverStorable1114,SelfDestructingSolverStorable1235,SelfDestructingSolverStorable1356,SelfDestructingSolverStorable1113,SelfDestructingSolverStorable1234,SelfDestructingSolverStorable1355,SelfDestructingSolverStorable1112,SelfDestructingSolverStorable1233,SelfDestructingSolverStorable1354,SelfDestructingSolverStorable1111,SelfDestructingSolverStorable1232,SelfDestructingSolverStorable1353,SelfDestructingSolverStorable1110,SelfDestructingSolverStorable1231,SelfDestructingSolverStorable1352,SelfDestructingSolverStorable1209,SelfDestructingSolverStorable1208,SelfDestructingSolverStorable1329,SelfDestructingSolverStorable1207,SelfDestructingSolverStorable1328,SelfDestructingSolverStorable1206,SelfDestructingSolverStorable1327,SelfDestructingSolverStorable1205,SelfDestructingSolverStorable1326,SelfDestructingSolverStorable1204,SelfDestructingSolverStorable1325,SelfDestructingSolverStorable1203,SelfDestructingSolverStorable1324,SelfDestructingSolverStorable1202,SelfDestructingSolverStorable1323,SelfDestructingSolverStorable1201,SelfDestructingSolverStorable1322,SelfDestructingSolverStorable1200,SelfDestructingSolverStorable1321,SelfDestructingSolverStorable1320,SelfDestructingSolverStorable1219,SelfDestructingSolverStorable1218,SelfDestructingSolverStorable1339,SelfDestructingSolverStorable1217,SelfDestructingSolverStorable1338,SelfDestructingSolverStorable1216,SelfDestructingSolverStorable1337,SelfDestructingSolverStorable1215,SelfDestructingSolverStorable1336,SelfDestructingSolverStorable1214,SelfDestructingSolverStorable1335,SelfDestructingSolverStorable1213,SelfDestructingSolverStorable1334,SelfDestructingSolverStorable1212,SelfDestructingSolverStorable1333,SelfDestructingSolverStorable1211,SelfDestructingSolverStorable1332,SelfDestructingSolverStorable1210,SelfDestructingSolverStorable1331,SelfDestructingSolverStorable1330,SelfDestructingSolverStorable990,SelfDestructingSolverStorable1309,SelfDestructingSolverStorable988,SelfDestructingSolverStorable1308,SelfDestructingSolverStorable989,SelfDestructingSolverStorable1307,SelfDestructingSolverStorable1306,SelfDestructingSolverStorable1305,SelfDestructingSolverStorable984,SelfDestructingSolverStorable1304,SelfDestructingSolverStorable985,SelfDestructingSolverStorable1303,SelfDestructingSolverStorable986,SelfDestructingSolverStorable1302,SelfDestructingSolverStorable987,SelfDestructingSolverStorable1301,SelfDestructingSolverStorable980,SelfDestructingSolverStorable1300,SelfDestructingSolverStorable981,SelfDestructingSolverStorable982,SelfDestructingSolverStorable983,SelfDestructingSolverStorable977,SelfDestructingSolverStorable1319,SelfDestructingSolverStorable978,SelfDestructingSolverStorable1318,SelfDestructingSolverStorable979,SelfDestructingSolverStorable1317,SelfDestructingSolverStorable1316,SelfDestructingSolverStorable973,SelfDestructingSolverStorable1315,SelfDestructingSolverStorable974,SelfDestructingSolverStorable1314,SelfDestructingSolverStorable975,SelfDestructingSolverStorable1313,SelfDestructingSolverStorable976,SelfDestructingSolverStorable1312,SelfDestructingSolverStorable1311,SelfDestructingSolverStorable970,SelfDestructingSolverStorable1310,SelfDestructingSolverStorable971,SelfDestructingSolverStorable972,SelfDestructingSolverStorable999,SelfDestructingSolverStorable995,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable996,SelfDestructingSolverStorable997,SelfDestructingSolverStorable998,SelfDestructingSolverStorable991,SelfDestructingSolverStorable992,SelfDestructingSolverStorable993,SelfDestructingSolverStorable994,SelfDestructingSolverStorable948,SelfDestructingSolverStorable949,SelfDestructingSolverStorable944,SelfDestructingSolverStorable945,SelfDestructingSolverStorable946,SelfDestructingSolverStorable947,SelfDestructingSolverStorable940,SelfDestructingSolverStorable941,SelfDestructingSolverStorable942,SelfDestructingSolverStorable943,SelfDestructingSolverStorable937,SelfDestructingSolverStorable938,SelfDestructingSolverStorable939,SelfDestructingSolverStorable933,SelfDestructingSolverStorable934,SelfDestructingSolverStorable935,SelfDestructingSolverStorable936,SelfDestructingSolverStorable930,SelfDestructingSolverStorable931,SelfDestructingSolverStorable932,SelfDestructingSolverStorable966,SelfDestructingSolverStorable967,SelfDestructingSolverStorable968,SelfDestructingSolverStorable969,SelfDestructingSolverStorable962,SelfDestructingSolverStorable963,SelfDestructingSolverStorable964,SelfDestructingSolverStorable965,SelfDestructingSolverStorable960,SelfDestructingSolverStorable961,SelfDestructingSolverStorable959,SelfDestructingSolverStorable955,SelfDestructingSolverStorable956,SelfDestructingSolverStorable957,SelfDestructingSolverStorable958,SelfDestructingSolverStorable951,SelfDestructingSolverStorable952,SelfDestructingSolverStorable953,SelfDestructingSolverStorable954,SelfDestructingSolverStorable950,SelfDestructingSolverStorable926,SelfDestructingSolverStorable927,SelfDestructingSolverStorable928,SelfDestructingSolverStorable929,SelfDestructingSolverStorable922,SelfDestructingSolverStorable923,SelfDestructingSolverStorable924,SelfDestructingSolverStorable925,SelfDestructingSolverStorable920,SelfDestructingSolverStorable921,SelfDestructingSolverStorable919,SelfDestructingSolverStorable918,SelfDestructingSolverStorable1087,SelfDestructingSolverStorable1086,SelfDestructingSolverStorable1085,SelfDestructingSolverStorable1084,SelfDestructingSolverStorable1083,SelfDestructingSolverStorable1082,SelfDestructingSolverStorable1081,SelfDestructingSolverStorable1080,SelfDestructingSolverStorable1089,SelfDestructingSolverStorable1088,SelfDestructingSolverStorable1098,SelfDestructingSolverStorable1097,SelfDestructingSolverStorable1096,SelfDestructingSolverStorable1095,SelfDestructingSolverStorable1094,SelfDestructingSolverStorable1093,SelfDestructingSolverStorable1092,SelfDestructingSolverStorable1091,SelfDestructingSolverStorable1090,SelfDestructingSolverStorable1099,SelfDestructingSolverStorable1065,SelfDestructingSolverStorable1186,SelfDestructingSolverStorable1064,SelfDestructingSolverStorable1185,SelfDestructingSolverStorable1063,SelfDestructingSolverStorable1184,SelfDestructingSolverStorable1062,SelfDestructingSolverStorable1183,SelfDestructingSolverStorable1061,SelfDestructingSolverStorable1182,SelfDestructingSolverStorable1060,SelfDestructingSolverStorable1181,SelfDestructingSolverStorable1180,SelfDestructingSolverStorable1069,SelfDestructingSolverStorable1068,SelfDestructingSolverStorable1189,SelfDestructingSolverStorable1067,SelfDestructingSolverStorable1188,SelfDestructingSolverStorable1066,SelfDestructingSolverStorable1187,SelfDestructingSolverStorable1076,SelfDestructingSolverStorable1197,SelfDestructingSolverStorable1075,SelfDestructingSolverStorable1196,SelfDestructingSolverStorable1074,SelfDestructingSolverStorable1195,SelfDestructingSolverStorable1073,SelfDestructingSolverStorable1194,SelfDestructingSolverStorable1072,SelfDestructingSolverStorable1193,SelfDestructingSolverStorable1071,SelfDestructingSolverStorable1192,SelfDestructingSolverStorable1070,SelfDestructingSolverStorable1191,SelfDestructingSolverStorable1190,SelfDestructingSolverStorable1079,SelfDestructingSolverStorable1078,SelfDestructingSolverStorable1199,SelfDestructingSolverStorable1077,SelfDestructingSolverStorable1198,SelfDestructingSolverStorable1043,SelfDestructingSolverStorable1164,SelfDestructingSolverStorable1285,SelfDestructingSolverStorable1042,SelfDestructingSolverStorable1163,SelfDestructingSolverStorable1284,SelfDestructingSolverStorable1041,SelfDestructingSolverStorable1162,SelfDestructingSolverStorable1283,SelfDestructingSolverStorable1040,SelfDestructingSolverStorable1161,SelfDestructingSolverStorable1282,SelfDestructingSolverStorable1160,SelfDestructingSolverStorable1281,SelfDestructingSolverStorable1280,SelfDestructingSolverStorable1049,SelfDestructingSolverStorable1048,SelfDestructingSolverStorable1169,SelfDestructingSolverStorable1047,SelfDestructingSolverStorable1168,SelfDestructingSolverStorable1289,SelfDestructingSolverStorable1046,SelfDestructingSolverStorable1167,SelfDestructingSolverStorable1288,SelfDestructingSolverStorable1045,SelfDestructingSolverStorable1166,SelfDestructingSolverStorable1287,SelfDestructingSolverStorable1044,SelfDestructingSolverStorable1165,SelfDestructingSolverStorable1286,SelfDestructingSolverStorable1054,SelfDestructingSolverStorable1175,SelfDestructingSolverStorable1296,SelfDestructingSolverStorable1053,SelfDestructingSolverStorable1174,SelfDestructingSolverStorable1295,SelfDestructingSolverStorable1052,SelfDestructingSolverStorable1173,SelfDestructingSolverStorable1294,SelfDestructingSolverStorable1051,SelfDestructingSolverStorable1172,SelfDestructingSolverStorable1293,SelfDestructingSolverStorable1050,SelfDestructingSolverStorable1171,SelfDestructingSolverStorable1292,SelfDestructingSolverStorable1170,SelfDestructingSolverStorable1291,SelfDestructingSolverStorable1290,SelfDestructingSolverStorable1059,SelfDestructingSolverStorable1058,SelfDestructingSolverStorable1179,SelfDestructingSolverStorable1057,SelfDestructingSolverStorable1178,SelfDestructingSolverStorable1299,SelfDestructingSolverStorable1056,SelfDestructingSolverStorable1177,SelfDestructingSolverStorable1298,SelfDestructingSolverStorable1055,SelfDestructingSolverStorable1176,SelfDestructingSolverStorable1297,SelfDestructingSolverStorable1021,SelfDestructingSolverStorable1142,SelfDestructingSolverStorable1263,SelfDestructingSolverStorable1020,SelfDestructingSolverStorable1141,SelfDestructingSolverStorable1262,SelfDestructingSolverStorable1140,SelfDestructingSolverStorable1261,SelfDestructingSolverStorable1260,SelfDestructingSolverStorable1029,SelfDestructingSolverStorable1028,SelfDestructingSolverStorable1149,SelfDestructingSolverStorable1027,SelfDestructingSolverStorable1148,SelfDestructingSolverStorable1269,SelfDestructingSolverStorable1026,SelfDestructingSolverStorable1147,SelfDestructingSolverStorable1268,SelfDestructingSolverStorable1025,SelfDestructingSolverStorable1146,SelfDestructingSolverStorable1267,SelfDestructingSolverStorable1024,SelfDestructingSolverStorable1145,SelfDestructingSolverStorable1266,SelfDestructingSolverStorable1023,SelfDestructingSolverStorable1144,SelfDestructingSolverStorable1265,SelfDestructingSolverStorable1022,SelfDestructingSolverStorable1143,SelfDestructingSolverStorable1264,SelfDestructingSolverStorable1032,SelfDestructingSolverStorable1153,SelfDestructingSolverStorable1274,SelfDestructingSolverStorable1031,SelfDestructingSolverStorable1152,SelfDestructingSolverStorable1273,SelfDestructingSolverStorable1030,SelfDestructingSolverStorable1151,SelfDestructingSolverStorable1272,SelfDestructingSolverStorable1150,SelfDestructingSolverStorable1271,SelfDestructingSolverStorable1270,SelfDestructingSolverStorable1039,SelfDestructingSolverStorable1038,SelfDestructingSolverStorable1159,SelfDestructingSolverStorable1037,SelfDestructingSolverStorable1158,SelfDestructingSolverStorable1279,SelfDestructingSolverStorable1036,SelfDestructingSolverStorable1157,SelfDestructingSolverStorable1278,SelfDestructingSolverStorable1035,SelfDestructingSolverStorable1156,SelfDestructingSolverStorable1277,SelfDestructingSolverStorable1034,SelfDestructingSolverStorable1155,SelfDestructingSolverStorable1276,SelfDestructingSolverStorable1033,SelfDestructingSolverStorable1154,SelfDestructingSolverStorable1275,SelfDestructingSolverStorable1120,SelfDestructingSolverStorable1241,SelfDestructingSolverStorable1362,SelfDestructingSolverStorable1240,SelfDestructingSolverStorable1361,SelfDestructingSolverStorable1360,SelfDestructingSolverStorable1009,SelfDestructingSolverStorable1008,SelfDestructingSolverStorable1129,SelfDestructingSolverStorable1007,SelfDestructingSolverStorable1128,SelfDestructingSolverStorable1249,SelfDestructingSolverStorable1006,SelfDestructingSolverStorable1127,SelfDestructingSolverStorable1248,SelfDestructingSolverStorable1005,SelfDestructingSolverStorable1126,SelfDestructingSolverStorable1247,SelfDestructingSolverStorable1004,SelfDestructingSolverStorable1125,SelfDestructingSolverStorable1246,SelfDestructingSolverStorable1003,SelfDestructingSolverStorable1124,SelfDestructingSolverStorable1245,SelfDestructingSolverStorable1002,SelfDestructingSolverStorable1123,SelfDestructingSolverStorable1244,SelfDestructingSolverStorable1001,SelfDestructingSolverStorable1122,SelfDestructingSolverStorable1243,SelfDestructingSolverStorable1364,SelfDestructingSolverStorable1000,SelfDestructingSolverStorable1121,SelfDestructingSolverStorable1242,SelfDestructingSolverStorable1363,SelfDestructingSolverStorable1010,SelfDestructingSolverStorable1131,SelfDestructingSolverStorable1252,SelfDestructingSolverStorable1130,SelfDestructingSolverStorable1251,SelfDestructingSolverStorable1250,SelfDestructingSolverStorable1019,SelfDestructingSolverStorable1018,SelfDestructingSolverStorable1139,SelfDestructingSolverStorable1017,SelfDestructingSolverStorable1138,SelfDestructingSolverStorable1259,SelfDestructingSolverStorable1016,SelfDestructingSolverStorable1137,SelfDestructingSolverStorable1258,SelfDestructingSolverStorable1015,SelfDestructingSolverStorable1136,SelfDestructingSolverStorable1257,SelfDestructingSolverStorable1014,SelfDestructingSolverStorable1135,SelfDestructingSolverStorable1256,SelfDestructingSolverStorable1013,SelfDestructingSolverStorable1134,SelfDestructingSolverStorable1255,SelfDestructingSolverStorable1012,SelfDestructingSolverStorable1133,SelfDestructingSolverStorable1254,SelfDestructingSolverStorable1011,SelfDestructingSolverStorable1132,SelfDestructingSolverStorable1253 [2024-05-06 04:26:41,403 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Termination requested (timeout or resource limit) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkResolutionNode(Interpolator.java:275) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator$ProofTreeWalker.walk(Interpolator.java:152) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:115) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:106) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.interpolate(Interpolator.java:260) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.getInterpolants(Interpolator.java:237) at de.uni_freiburg.informatik.ultimate.smtinterpol.smtlib2.SMTInterpol.getInterpolants(SMTInterpol.java:869) at de.uni_freiburg.informatik.ultimate.smtinterpol.smtlib2.SMTInterpol.getInterpolants(SMTInterpol.java:793) at de.uni_freiburg.informatik.ultimate.logic.NoopScript.getInterpolants(NoopScript.java:352) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.getInterpolants(WrapperScript.java:337) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.getInterpolants(WrapperScript.java:337) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.getInterpolants(ManagedScript.java:201) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.NestedInterpolantsBuilder.computeCraigInterpolants(NestedInterpolantsBuilder.java:283) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.NestedInterpolantsBuilder.(NestedInterpolantsBuilder.java:164) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolantsRecursive(InterpolatingTraceCheckCraig.java:327) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolants(InterpolatingTraceCheckCraig.java:229) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.singletracecheck.InterpolatingTraceCheckCraig.(InterpolatingTraceCheckCraig.java:97) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleCraigSleepSetPOR.construct(IpTcStrategyModuleCraigSleepSetPOR.java:104) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleCraigSleepSetPOR.construct(IpTcStrategyModuleCraigSleepSetPOR.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.getOrConstruct(IpTcStrategyModuleBase.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.IpTcStrategyModuleBase.isCorrect(IpTcStrategyModuleBase.java:57) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.PostConditionTraceChecker.checkTrace(PostConditionTraceChecker.java:109) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityChecker.checkConditionalCommutativity(ConditionalCommutativityChecker.java:161) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:189) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.ConditionalCommutativityCheckerVisitor.discoverState(ConditionalCommutativityCheckerVisitor.java:1) at de.uni_freiburg.informatik.ultimate.automata.partialorder.visitors.DeadEndOptimizingSearchVisitor.discoverState(DeadEndOptimizingSearchVisitor.java:73) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.visitState(DepthFirstTraversal.java:222) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:165) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.(DepthFirstTraversal.java:98) at de.uni_freiburg.informatik.ultimate.automata.partialorder.DepthFirstTraversal.traverse(DepthFirstTraversal.java:122) at de.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.PartialOrderReductionFacade.apply(PartialOrderReductionFacade.java:321) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.concurrency.PartialOrderCegarLoop.isAbstractionEmpty(PartialOrderCegarLoop.java:371) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:466) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:366) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:348) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:415) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2024-05-06 04:26:41,407 INFO L158 Benchmark]: Toolchain (without parser) took 711916.59ms. Allocated memory was 290.5MB in the beginning and 5.2GB in the end (delta: 4.9GB). Free memory was 220.7MB in the beginning and 1.0GB in the end (delta: -785.1MB). Peak memory consumption was 4.2GB. Max. memory is 8.0GB. [2024-05-06 04:26:41,407 INFO L158 Benchmark]: CDTParser took 0.61ms. Allocated memory is still 180.4MB. Free memory is still 111.8MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 04:26:41,407 INFO L158 Benchmark]: CACSL2BoogieTranslator took 218.04ms. Allocated memory is still 290.5MB. Free memory was 220.7MB in the beginning and 208.6MB in the end (delta: 12.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 04:26:41,408 INFO L158 Benchmark]: Boogie Procedure Inliner took 55.85ms. Allocated memory is still 290.5MB. Free memory was 208.6MB in the beginning and 206.5MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 04:26:41,408 INFO L158 Benchmark]: Boogie Preprocessor took 31.58ms. Allocated memory is still 290.5MB. Free memory was 206.5MB in the beginning and 204.4MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 04:26:41,408 INFO L158 Benchmark]: RCFGBuilder took 533.66ms. Allocated memory is still 290.5MB. Free memory was 204.4MB in the beginning and 179.8MB in the end (delta: 24.6MB). Peak memory consumption was 24.1MB. Max. memory is 8.0GB. [2024-05-06 04:26:41,408 INFO L158 Benchmark]: TraceAbstraction took 711069.40ms. Allocated memory was 290.5MB in the beginning and 5.2GB in the end (delta: 4.9GB). Free memory was 178.8MB in the beginning and 1.0GB in the end (delta: -827.0MB). Peak memory consumption was 4.1GB. Max. memory is 8.0GB. [2024-05-06 04:26:41,409 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.61ms. Allocated memory is still 180.4MB. Free memory is still 111.8MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 218.04ms. Allocated memory is still 290.5MB. Free memory was 220.7MB in the beginning and 208.6MB in the end (delta: 12.1MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 55.85ms. Allocated memory is still 290.5MB. Free memory was 208.6MB in the beginning and 206.5MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 31.58ms. Allocated memory is still 290.5MB. Free memory was 206.5MB in the beginning and 204.4MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 533.66ms. Allocated memory is still 290.5MB. Free memory was 204.4MB in the beginning and 179.8MB in the end (delta: 24.6MB). Peak memory consumption was 24.1MB. Max. memory is 8.0GB. * TraceAbstraction took 711069.40ms. Allocated memory was 290.5MB in the beginning and 5.2GB in the end (delta: 4.9GB). Free memory was 178.8MB in the beginning and 1.0GB in the end (delta: -827.0MB). Peak memory consumption was 4.1GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: Termination requested (timeout or resource limit) de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: Termination requested (timeout or resource limit): de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkResolutionNode(Interpolator.java:275) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown