/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-prod-cons3.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 04:19:49,090 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 04:19:49,154 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 04:19:49,158 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 04:19:49,158 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 04:19:49,181 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 04:19:49,181 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 04:19:49,181 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 04:19:49,182 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 04:19:49,185 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 04:19:49,185 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 04:19:49,185 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 04:19:49,186 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 04:19:49,187 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 04:19:49,187 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 04:19:49,187 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 04:19:49,187 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 04:19:49,187 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 04:19:49,188 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 04:19:49,188 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 04:19:49,188 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 04:19:49,188 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 04:19:49,188 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 04:19:49,188 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 04:19:49,189 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 04:19:49,189 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 04:19:49,189 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 04:19:49,189 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 04:19:49,189 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 04:19:49,189 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 04:19:49,190 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 04:19:49,190 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 04:19:49,190 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 04:19:49,191 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 04:19:49,191 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 04:19:49,191 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 04:19:49,191 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 04:19:49,191 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 04:19:49,191 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 04:19:49,191 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT [2024-05-06 04:19:49,384 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 04:19:49,400 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 04:19:49,403 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 04:19:49,405 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 04:19:49,405 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 04:19:49,406 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-prod-cons3.wvr.c [2024-05-06 04:19:50,476 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 04:19:50,661 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 04:19:50,661 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-prod-cons3.wvr.c [2024-05-06 04:19:50,669 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/4c56730f1/45403c23069b4961a7589a3aaeac000f/FLAG456b39ab0 [2024-05-06 04:19:50,682 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/4c56730f1/45403c23069b4961a7589a3aaeac000f [2024-05-06 04:19:50,684 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 04:19:50,686 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 04:19:50,690 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 04:19:50,690 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 04:19:50,693 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 04:19:50,694 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:50,694 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@fe1913e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50, skipping insertion in model container [2024-05-06 04:19:50,695 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:50,723 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 04:19:50,839 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-prod-cons3.wvr.c[4007,4020] [2024-05-06 04:19:50,845 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 04:19:50,851 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 04:19:50,879 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-prod-cons3.wvr.c[4007,4020] [2024-05-06 04:19:50,881 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 04:19:50,887 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 04:19:50,887 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 04:19:50,893 INFO L206 MainTranslator]: Completed translation [2024-05-06 04:19:50,893 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50 WrapperNode [2024-05-06 04:19:50,893 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 04:19:50,894 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 04:19:50,894 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 04:19:50,894 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 04:19:50,899 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:50,906 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:50,979 INFO L138 Inliner]: procedures = 26, calls = 73, calls flagged for inlining = 15, calls inlined = 17, statements flattened = 276 [2024-05-06 04:19:50,979 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 04:19:50,980 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 04:19:50,980 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 04:19:50,980 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 04:19:50,988 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:50,989 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:50,998 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:50,998 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:51,006 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:51,009 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:51,010 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:51,011 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:51,014 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 04:19:51,014 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 04:19:51,015 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 04:19:51,015 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 04:19:51,015 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (1/1) ... [2024-05-06 04:19:51,069 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 04:19:51,079 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:19:51,110 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 04:19:51,171 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 04:19:51,191 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 04:19:51,191 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 04:19:51,191 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 04:19:51,191 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 04:19:51,191 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 04:19:51,191 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 04:19:51,191 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 04:19:51,192 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 04:19:51,192 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 04:19:51,192 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 04:19:51,192 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 04:19:51,192 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 04:19:51,192 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 04:19:51,192 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 04:19:51,192 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 04:19:51,192 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 04:19:51,192 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 04:19:51,192 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 04:19:51,193 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 04:19:51,194 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 04:19:51,352 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 04:19:51,355 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 04:19:51,695 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 04:19:51,771 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 04:19:51,772 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2024-05-06 04:19:51,773 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:19:51 BoogieIcfgContainer [2024-05-06 04:19:51,773 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 04:19:51,775 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 04:19:51,775 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 04:19:51,779 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 04:19:51,779 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 04:19:50" (1/3) ... [2024-05-06 04:19:51,780 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@123b64af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:19:51, skipping insertion in model container [2024-05-06 04:19:51,780 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 04:19:50" (2/3) ... [2024-05-06 04:19:51,780 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@123b64af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 04:19:51, skipping insertion in model container [2024-05-06 04:19:51,780 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 04:19:51" (3/3) ... [2024-05-06 04:19:51,781 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-prod-cons3.wvr.c [2024-05-06 04:19:51,788 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 04:19:51,796 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 04:19:51,796 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 04:19:51,796 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 04:19:51,898 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2024-05-06 04:19:51,945 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 04:19:51,946 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 04:19:51,946 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:19:51,950 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 04:19:51,994 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 04:19:52,007 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 04:19:52,018 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:19:52,019 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 04:19:52,024 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@70188e1c, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=false, mConComCheckerCriterionLimit=1, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 04:19:52,025 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-06 04:19:52,370 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:19:54,518 INFO L85 PathProgramCache]: Analyzing trace with hash -803278003, now seen corresponding path program 1 times [2024-05-06 04:19:54,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:54,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:54,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:54,842 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:19:54,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:54,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:54,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:54,918 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:19:54,944 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 04:19:54,945 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 04:19:55,115 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:19:57,219 INFO L85 PathProgramCache]: Analyzing trace with hash 527615957, now seen corresponding path program 1 times [2024-05-06 04:19:57,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:57,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:57,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:57,503 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:19:57,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:57,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:57,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:57,670 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:19:57,671 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-06 04:19:57,671 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-05-06 04:19:57,740 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:19:57,742 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:19:57,742 INFO L85 PathProgramCache]: Analyzing trace with hash 2058032956, now seen corresponding path program 1 times [2024-05-06 04:19:57,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:19:57,745 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732497025] [2024-05-06 04:19:57,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:19:57,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:19:57,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:19:57,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 04:19:57,914 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:19:57,915 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732497025] [2024-05-06 04:19:57,915 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1732497025] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 04:19:57,915 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 04:19:57,915 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-05-06 04:19:57,916 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [808153090] [2024-05-06 04:19:57,917 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 04:19:57,921 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-05-06 04:19:57,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:19:57,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 04:19:57,924 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-05-06 04:19:57,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:19:57,926 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:19:57,927 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 44.5) internal successors, (178), 4 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:19:57,927 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:19:58,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:00,200 INFO L85 PathProgramCache]: Analyzing trace with hash 952830596, now seen corresponding path program 1 times [2024-05-06 04:20:00,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:00,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:00,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:00,308 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:20:00,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:00,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:00,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:00,462 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:20:00,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:00,488 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5 [2024-05-06 04:20:00,488 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:20:00,489 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:20:00,490 INFO L85 PathProgramCache]: Analyzing trace with hash -121506302, now seen corresponding path program 1 times [2024-05-06 04:20:00,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:20:00,490 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [849779559] [2024-05-06 04:20:00,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:00,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:00,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:00,628 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 04:20:00,629 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:20:00,629 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [849779559] [2024-05-06 04:20:00,629 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [849779559] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 04:20:00,629 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 04:20:00,629 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-06 04:20:00,629 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475977458] [2024-05-06 04:20:00,630 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 04:20:00,631 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-06 04:20:00,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:20:00,631 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 04:20:00,631 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-05-06 04:20:00,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:00,631 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:20:00,632 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 32.333333333333336) internal successors, (194), 6 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:20:00,632 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:00,632 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:00,821 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:02,936 INFO L85 PathProgramCache]: Analyzing trace with hash -1477847446, now seen corresponding path program 1 times [2024-05-06 04:20:02,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:02,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:02,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:03,065 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:20:03,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:03,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:03,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:03,194 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:20:03,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:03,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:03,202 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable9 [2024-05-06 04:20:03,205 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:20:03,205 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:20:03,205 INFO L85 PathProgramCache]: Analyzing trace with hash -17312664, now seen corresponding path program 1 times [2024-05-06 04:20:03,206 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:20:03,206 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [954455218] [2024-05-06 04:20:03,207 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:03,207 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:03,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:03,363 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:20:03,363 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:20:03,363 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [954455218] [2024-05-06 04:20:03,380 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [954455218] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 04:20:03,380 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-06 04:20:03,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-06 04:20:03,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [334205549] [2024-05-06 04:20:03,381 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 04:20:03,381 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-06 04:20:03,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:20:03,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-06 04:20:03,382 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-05-06 04:20:03,382 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:03,382 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:20:03,382 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 34.166666666666664) internal successors, (205), 6 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:20:03,382 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:03,382 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:03,382 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:03,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:05,662 INFO L85 PathProgramCache]: Analyzing trace with hash -1853997471, now seen corresponding path program 1 times [2024-05-06 04:20:05,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:05,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:05,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:05,756 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:20:05,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:05,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:05,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:05,844 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:20:05,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:05,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:05,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:05,851 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,SelfDestructingSolverStorable11,SelfDestructingSolverStorable12 [2024-05-06 04:20:05,851 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:20:05,851 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:20:05,851 INFO L85 PathProgramCache]: Analyzing trace with hash 675597471, now seen corresponding path program 1 times [2024-05-06 04:20:05,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:20:05,851 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780376598] [2024-05-06 04:20:05,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:05,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:05,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:06,078 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 04:20:06,079 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:20:06,079 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [780376598] [2024-05-06 04:20:06,080 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [780376598] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:20:06,080 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1263047676] [2024-05-06 04:20:06,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:06,080 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:20:06,080 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:20:06,202 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:20:06,217 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 04:20:06,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:06,357 INFO L262 TraceCheckSpWp]: Trace formula consists of 499 conjuncts, 4 conjunts are in the unsatisfiable core [2024-05-06 04:20:06,367 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:20:06,566 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 04:20:06,567 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 04:20:06,567 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1263047676] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 04:20:06,567 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 04:20:06,567 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [9] total 11 [2024-05-06 04:20:06,568 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1890447542] [2024-05-06 04:20:06,568 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 04:20:06,568 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-05-06 04:20:06,568 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:20:06,569 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 04:20:06,569 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2024-05-06 04:20:06,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:06,569 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:20:06,569 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 53.25) internal successors, (213), 4 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:20:06,570 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:06,570 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:06,570 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:06,570 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:06,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:06,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:06,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:06,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 04:20:06,664 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-05-06 04:20:06,844 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2024-05-06 04:20:06,844 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:20:06,845 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:20:06,845 INFO L85 PathProgramCache]: Analyzing trace with hash -1296456656, now seen corresponding path program 2 times [2024-05-06 04:20:06,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:20:06,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [158420921] [2024-05-06 04:20:06,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:06,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:06,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:07,211 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:20:07,211 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:20:07,213 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [158420921] [2024-05-06 04:20:07,213 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [158420921] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:20:07,213 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [437625731] [2024-05-06 04:20:07,213 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 04:20:07,213 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:20:07,213 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:20:07,242 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:20:07,267 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 04:20:07,370 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 04:20:07,370 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 04:20:07,372 INFO L262 TraceCheckSpWp]: Trace formula consists of 420 conjuncts, 11 conjunts are in the unsatisfiable core [2024-05-06 04:20:07,384 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:20:07,708 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:20:07,708 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 04:20:07,979 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:20:07,980 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [437625731] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 04:20:07,980 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 04:20:07,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 21 [2024-05-06 04:20:07,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789755545] [2024-05-06 04:20:07,980 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 04:20:07,981 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2024-05-06 04:20:07,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:20:07,982 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-05-06 04:20:07,982 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=354, Unknown=0, NotChecked=0, Total=420 [2024-05-06 04:20:07,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:07,983 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:20:07,983 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 20.761904761904763) internal successors, (436), 21 states have internal predecessors, (436), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:20:07,983 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:07,983 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:07,983 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:07,983 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 04:20:07,983 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:08,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:10,654 INFO L85 PathProgramCache]: Analyzing trace with hash 702908978, now seen corresponding path program 1 times [2024-05-06 04:20:10,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:10,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:10,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:10,776 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 20 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:20:10,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:10,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:10,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:10,906 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 20 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:20:11,158 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:13,303 INFO L85 PathProgramCache]: Analyzing trace with hash 1260825229, now seen corresponding path program 2 times [2024-05-06 04:20:13,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:13,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:13,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:13,408 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 20 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:20:13,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:13,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:13,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:13,525 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 20 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 04:20:13,640 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:15,775 INFO L85 PathProgramCache]: Analyzing trace with hash 1526966842, now seen corresponding path program 3 times [2024-05-06 04:20:15,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:15,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:15,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:15,918 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-05-06 04:20:15,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:15,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:15,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:16,033 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2024-05-06 04:20:16,034 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 04:20:16,034 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-05-06 04:20:16,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:18,599 INFO L85 PathProgramCache]: Analyzing trace with hash 628792678, now seen corresponding path program 4 times [2024-05-06 04:20:18,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:18,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:18,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:18,810 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:18,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:18,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:18,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:19,031 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:20:19,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:21,334 INFO L85 PathProgramCache]: Analyzing trace with hash -2099838015, now seen corresponding path program 5 times [2024-05-06 04:20:21,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:21,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:21,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:21,486 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:20:21,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:21,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:21,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:21,743 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:20:22,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:24,171 INFO L85 PathProgramCache]: Analyzing trace with hash 1041933249, now seen corresponding path program 6 times [2024-05-06 04:20:24,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:24,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:24,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:24,391 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 44 proven. 7 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:20:24,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:24,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:24,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:24,629 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 44 proven. 7 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:20:24,749 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:26,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1662314369, now seen corresponding path program 7 times [2024-05-06 04:20:26,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:26,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:26,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:27,132 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 44 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:20:27,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:27,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:27,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:27,311 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 44 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:20:27,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:29,574 INFO L85 PathProgramCache]: Analyzing trace with hash 105718219, now seen corresponding path program 8 times [2024-05-06 04:20:29,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:29,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:29,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:29,756 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 44 proven. 7 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:20:29,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:29,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:29,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:29,904 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 44 proven. 7 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:20:30,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:32,279 INFO L85 PathProgramCache]: Analyzing trace with hash -1930869822, now seen corresponding path program 9 times [2024-05-06 04:20:32,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:32,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:32,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:32,524 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 42 proven. 7 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:20:32,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:32,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:32,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:32,690 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 42 proven. 7 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:20:32,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:34,932 INFO L85 PathProgramCache]: Analyzing trace with hash -254154338, now seen corresponding path program 10 times [2024-05-06 04:20:34,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:34,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:34,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:35,184 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 42 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:20:35,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:35,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:35,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:35,340 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 42 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:20:35,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:36,078 INFO L85 PathProgramCache]: Analyzing trace with hash 973250316, now seen corresponding path program 11 times [2024-05-06 04:20:36,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:36,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:36,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:36,281 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 42 proven. 7 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:20:36,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:36,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:36,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:36,421 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 42 proven. 7 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:20:36,652 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:38,812 INFO L85 PathProgramCache]: Analyzing trace with hash 1665086244, now seen corresponding path program 12 times [2024-05-06 04:20:38,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:38,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:38,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:39,025 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 7 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:20:39,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:39,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:39,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:39,198 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 40 proven. 7 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:20:39,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:41,459 INFO L85 PathProgramCache]: Analyzing trace with hash 2128488572, now seen corresponding path program 13 times [2024-05-06 04:20:41,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:41,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:41,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:41,618 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 40 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:20:41,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:41,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:41,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:41,877 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 40 proven. 7 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:20:41,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:44,147 INFO L85 PathProgramCache]: Analyzing trace with hash 1693974766, now seen corresponding path program 14 times [2024-05-06 04:20:44,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:44,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:44,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:44,317 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 40 proven. 7 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:20:44,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:44,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:44,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:44,463 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 40 proven. 7 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:20:44,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:46,792 INFO L85 PathProgramCache]: Analyzing trace with hash 1524422215, now seen corresponding path program 1 times [2024-05-06 04:20:46,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:46,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:46,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:46,974 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 38 proven. 7 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:20:46,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:46,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:46,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:47,150 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 38 proven. 7 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2024-05-06 04:20:47,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:49,327 INFO L85 PathProgramCache]: Analyzing trace with hash -252552007, now seen corresponding path program 2 times [2024-05-06 04:20:49,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:49,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:49,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:49,558 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 38 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-06 04:20:49,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:49,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:49,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:49,727 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 38 proven. 7 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2024-05-06 04:20:49,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:49,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:49,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:49,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 04:20:49,791 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-06 04:20:49,799 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-05-06 04:20:49,992 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable32,SelfDestructingSolverStorable33,SelfDestructingSolverStorable34,SelfDestructingSolverStorable35,SelfDestructingSolverStorable14,SelfDestructingSolverStorable36,SelfDestructingSolverStorable15,SelfDestructingSolverStorable37,SelfDestructingSolverStorable16,SelfDestructingSolverStorable38,SelfDestructingSolverStorable17,SelfDestructingSolverStorable39,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable20,SelfDestructingSolverStorable42,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable43,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22,SelfDestructingSolverStorable44,SelfDestructingSolverStorable23,SelfDestructingSolverStorable45,SelfDestructingSolverStorable24,SelfDestructingSolverStorable46,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-05-06 04:20:49,993 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:20:49,993 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:20:49,993 INFO L85 PathProgramCache]: Analyzing trace with hash 1564638807, now seen corresponding path program 1 times [2024-05-06 04:20:49,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:20:49,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1811261930] [2024-05-06 04:20:49,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:49,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:50,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:50,222 INFO L134 CoverageAnalysis]: Checked inductivity of 340 backedges. 97 proven. 5 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2024-05-06 04:20:50,223 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:20:50,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1811261930] [2024-05-06 04:20:50,223 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1811261930] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:20:50,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [758066514] [2024-05-06 04:20:50,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:50,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:20:50,223 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:20:50,224 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:20:50,244 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-05-06 04:20:50,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:50,434 INFO L262 TraceCheckSpWp]: Trace formula consists of 689 conjuncts, 9 conjunts are in the unsatisfiable core [2024-05-06 04:20:50,447 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:20:50,659 INFO L134 CoverageAnalysis]: Checked inductivity of 340 backedges. 101 proven. 1 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2024-05-06 04:20:50,659 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 04:20:50,923 INFO L134 CoverageAnalysis]: Checked inductivity of 340 backedges. 97 proven. 5 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2024-05-06 04:20:50,923 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [758066514] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 04:20:50,923 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 04:20:50,923 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 19 [2024-05-06 04:20:50,924 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1477928982] [2024-05-06 04:20:50,924 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 04:20:50,924 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2024-05-06 04:20:50,924 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:20:50,925 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-05-06 04:20:50,925 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2024-05-06 04:20:50,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:50,925 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:20:50,925 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 15.842105263157896) internal successors, (301), 19 states have internal predecessors, (301), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:20:50,925 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:20:50,926 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:50,926 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:20:50,926 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 04:20:50,926 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-06 04:20:50,926 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:20:51,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:52,072 INFO L85 PathProgramCache]: Analyzing trace with hash -1389664704, now seen corresponding path program 15 times [2024-05-06 04:20:52,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:52,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:52,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:52,264 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:20:52,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:52,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:52,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:52,462 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:20:52,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:54,781 INFO L85 PathProgramCache]: Analyzing trace with hash -1058812005, now seen corresponding path program 16 times [2024-05-06 04:20:54,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:54,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:54,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:54,928 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:20:54,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:54,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:54,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:55,072 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:20:55,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:20:57,446 INFO L85 PathProgramCache]: Analyzing trace with hash 1841821979, now seen corresponding path program 17 times [2024-05-06 04:20:57,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:57,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:57,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:57,626 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:20:57,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:20:57,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:20:57,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:20:57,803 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:20:57,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:00,046 INFO L85 PathProgramCache]: Analyzing trace with hash 71247973, now seen corresponding path program 18 times [2024-05-06 04:21:00,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:00,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:00,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:00,271 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:00,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:00,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:00,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:00,450 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:00,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:02,684 INFO L85 PathProgramCache]: Analyzing trace with hash -1098219611, now seen corresponding path program 19 times [2024-05-06 04:21:02,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:02,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:02,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:02,908 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:02,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:02,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:02,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:03,081 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:03,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:05,397 INFO L85 PathProgramCache]: Analyzing trace with hash 2112805672, now seen corresponding path program 20 times [2024-05-06 04:21:05,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:05,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:05,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:05,568 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:05,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:05,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:05,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:05,772 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:05,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:07,993 INFO L85 PathProgramCache]: Analyzing trace with hash -59685640, now seen corresponding path program 21 times [2024-05-06 04:21:07,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:07,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:08,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:08,194 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:08,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:08,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:08,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:08,442 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:08,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:10,679 INFO L85 PathProgramCache]: Analyzing trace with hash -1005249038, now seen corresponding path program 22 times [2024-05-06 04:21:10,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:10,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:10,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:10,835 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:10,835 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:10,835 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:10,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:10,999 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:11,203 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:11,841 INFO L85 PathProgramCache]: Analyzing trace with hash -1391061250, now seen corresponding path program 23 times [2024-05-06 04:21:11,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:11,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:11,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:12,092 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:12,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:12,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:12,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:12,259 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:12,373 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:14,486 INFO L85 PathProgramCache]: Analyzing trace with hash 195099106, now seen corresponding path program 24 times [2024-05-06 04:21:14,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:14,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:14,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:14,672 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:14,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:14,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:14,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:14,884 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:14,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:17,120 INFO L85 PathProgramCache]: Analyzing trace with hash -725152440, now seen corresponding path program 25 times [2024-05-06 04:21:17,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:17,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:17,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:17,284 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:17,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:17,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:17,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:17,451 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:17,697 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:19,793 INFO L85 PathProgramCache]: Analyzing trace with hash -1630802271, now seen corresponding path program 3 times [2024-05-06 04:21:19,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:19,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:19,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:19,960 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:21:19,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:19,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:19,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:20,126 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:21:20,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:22,334 INFO L85 PathProgramCache]: Analyzing trace with hash 1850739103, now seen corresponding path program 4 times [2024-05-06 04:21:22,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:22,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:22,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:22,564 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:21:22,565 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:22,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:22,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:22,738 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:21:22,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:21:22,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:21:22,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:21:22,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-06 04:21:22,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-05-06 04:21:22,756 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 04:21:22,761 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-05-06 04:21:22,961 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable50,SelfDestructingSolverStorable72,SelfDestructingSolverStorable51,SelfDestructingSolverStorable73,SelfDestructingSolverStorable52,SelfDestructingSolverStorable53,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54,SelfDestructingSolverStorable55,SelfDestructingSolverStorable56,SelfDestructingSolverStorable57,SelfDestructingSolverStorable58,SelfDestructingSolverStorable59,SelfDestructingSolverStorable60,SelfDestructingSolverStorable61,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable65,SelfDestructingSolverStorable66,SelfDestructingSolverStorable67,SelfDestructingSolverStorable68,SelfDestructingSolverStorable47,SelfDestructingSolverStorable69,SelfDestructingSolverStorable48,SelfDestructingSolverStorable49 [2024-05-06 04:21:22,962 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-06 04:21:22,962 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 04:21:22,962 INFO L85 PathProgramCache]: Analyzing trace with hash 678262333, now seen corresponding path program 2 times [2024-05-06 04:21:22,962 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 04:21:22,962 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463138671] [2024-05-06 04:21:22,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:22,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:22,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:23,218 INFO L134 CoverageAnalysis]: Checked inductivity of 349 backedges. 148 proven. 52 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2024-05-06 04:21:23,218 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 04:21:23,219 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1463138671] [2024-05-06 04:21:23,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1463138671] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 04:21:23,219 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1293581185] [2024-05-06 04:21:23,219 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 04:21:23,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 04:21:23,219 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 04:21:23,220 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 04:21:23,222 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-05-06 04:21:23,428 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 04:21:23,428 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 04:21:23,430 INFO L262 TraceCheckSpWp]: Trace formula consists of 409 conjuncts, 18 conjunts are in the unsatisfiable core [2024-05-06 04:21:23,466 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 04:21:23,912 INFO L134 CoverageAnalysis]: Checked inductivity of 349 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 349 trivial. 0 not checked. [2024-05-06 04:21:23,912 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 04:21:23,912 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1293581185] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 04:21:23,912 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 04:21:23,912 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [12] total 21 [2024-05-06 04:21:23,912 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817281236] [2024-05-06 04:21:23,912 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 04:21:23,913 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2024-05-06 04:21:23,913 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 04:21:23,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-05-06 04:21:23,914 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=367, Unknown=0, NotChecked=0, Total=420 [2024-05-06 04:21:23,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:21:23,914 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 04:21:23,914 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 18.90909090909091) internal successors, (208), 11 states have internal predecessors, (208), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 04:21:23,914 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-05-06 04:21:23,914 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:21:23,914 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-06 04:21:23,914 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-06 04:21:23,914 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-05-06 04:21:23,914 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 04:21:23,914 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 04:21:24,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:26,653 INFO L85 PathProgramCache]: Analyzing trace with hash -1389664704, now seen corresponding path program 26 times [2024-05-06 04:21:26,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:26,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:26,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:26,796 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:21:26,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:26,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:26,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:26,928 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:21:27,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:29,239 INFO L85 PathProgramCache]: Analyzing trace with hash -1058812005, now seen corresponding path program 27 times [2024-05-06 04:21:29,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:29,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:29,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:29,380 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:29,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:29,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:29,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:29,517 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:21:29,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:31,848 INFO L85 PathProgramCache]: Analyzing trace with hash 1841821979, now seen corresponding path program 28 times [2024-05-06 04:21:31,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:31,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:31,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:32,035 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:32,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:32,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:32,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:32,201 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:32,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:34,439 INFO L85 PathProgramCache]: Analyzing trace with hash 71247973, now seen corresponding path program 29 times [2024-05-06 04:21:34,439 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:34,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:34,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:34,613 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:34,613 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:34,613 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:34,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:34,834 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:34,944 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:37,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1098219611, now seen corresponding path program 30 times [2024-05-06 04:21:37,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:37,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:37,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:37,224 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:37,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:37,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:37,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:37,382 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:37,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:39,715 INFO L85 PathProgramCache]: Analyzing trace with hash 2112805672, now seen corresponding path program 31 times [2024-05-06 04:21:39,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:39,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:39,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:39,914 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:39,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:39,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:39,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:40,123 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:40,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:42,309 INFO L85 PathProgramCache]: Analyzing trace with hash -59685640, now seen corresponding path program 32 times [2024-05-06 04:21:42,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:42,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:42,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:42,520 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:42,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:42,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:42,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:42,696 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:42,797 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:44,919 INFO L85 PathProgramCache]: Analyzing trace with hash -1005249038, now seen corresponding path program 33 times [2024-05-06 04:21:44,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:44,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:44,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:45,074 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:45,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:45,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:45,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:45,267 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:45,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:47,607 INFO L85 PathProgramCache]: Analyzing trace with hash -1391061250, now seen corresponding path program 34 times [2024-05-06 04:21:47,607 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:47,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:47,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:47,781 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:47,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:47,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:47,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:47,955 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:21:48,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:50,175 INFO L85 PathProgramCache]: Analyzing trace with hash 195099106, now seen corresponding path program 35 times [2024-05-06 04:21:50,176 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:50,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:50,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:50,419 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:50,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:50,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:50,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:50,599 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:21:50,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:52,781 INFO L85 PathProgramCache]: Analyzing trace with hash -725152440, now seen corresponding path program 36 times [2024-05-06 04:21:52,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:52,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:52,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:52,937 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:52,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:52,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:52,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:53,140 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:21:53,291 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:55,363 INFO L85 PathProgramCache]: Analyzing trace with hash -1630802271, now seen corresponding path program 5 times [2024-05-06 04:21:55,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:55,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:55,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:55,537 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:21:55,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:55,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:55,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:55,766 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:21:55,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:21:57,918 INFO L85 PathProgramCache]: Analyzing trace with hash 1850739103, now seen corresponding path program 6 times [2024-05-06 04:21:57,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:57,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:57,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:58,094 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:21:58,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:21:58,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:21:58,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:21:58,276 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:21:58,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:00,512 INFO L85 PathProgramCache]: Analyzing trace with hash 1194624171, now seen corresponding path program 7 times [2024-05-06 04:22:00,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:00,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:00,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:00,728 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:00,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:00,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:00,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:00,894 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:01,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:03,212 INFO L85 PathProgramCache]: Analyzing trace with hash -54654300, now seen corresponding path program 1 times [2024-05-06 04:22:03,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:03,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:03,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:03,378 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:03,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:03,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:03,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:03,589 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:03,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:03,756 INFO L85 PathProgramCache]: Analyzing trace with hash -2049326852, now seen corresponding path program 2 times [2024-05-06 04:22:03,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:03,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:03,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:03,932 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:03,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:03,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:03,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:04,165 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:04,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:06,364 INFO L85 PathProgramCache]: Analyzing trace with hash -1623836562, now seen corresponding path program 3 times [2024-05-06 04:22:06,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:06,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:06,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:06,519 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:06,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:06,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:06,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:06,675 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:06,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:08,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1145412278, now seen corresponding path program 1 times [2024-05-06 04:22:08,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:08,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:08,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:09,169 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:09,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:09,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:09,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:09,338 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:09,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:09,521 INFO L85 PathProgramCache]: Analyzing trace with hash 1123951914, now seen corresponding path program 2 times [2024-05-06 04:22:09,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:09,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:09,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:09,691 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:09,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:09,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:09,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:09,906 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:10,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:12,075 INFO L85 PathProgramCache]: Analyzing trace with hash -467839232, now seen corresponding path program 3 times [2024-05-06 04:22:12,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:12,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:12,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:12,230 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:12,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:12,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:12,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:12,456 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:12,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:14,739 INFO L85 PathProgramCache]: Analyzing trace with hash -1430053754, now seen corresponding path program 1 times [2024-05-06 04:22:14,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:14,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:14,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:14,912 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:14,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:14,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:14,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:15,085 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:15,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:17,258 INFO L85 PathProgramCache]: Analyzing trace with hash 1456319834, now seen corresponding path program 2 times [2024-05-06 04:22:17,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:17,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:17,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:17,472 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:17,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:17,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:17,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:17,660 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:17,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:17,843 INFO L85 PathProgramCache]: Analyzing trace with hash 1231805648, now seen corresponding path program 3 times [2024-05-06 04:22:17,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:17,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:17,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:17,996 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:17,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:17,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:18,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:18,189 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:18,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:20,446 INFO L85 PathProgramCache]: Analyzing trace with hash -1961686310, now seen corresponding path program 1 times [2024-05-06 04:22:20,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:20,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:20,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:20,612 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:20,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:20,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:20,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:20,837 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:20,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:21,012 INFO L85 PathProgramCache]: Analyzing trace with hash -828203642, now seen corresponding path program 2 times [2024-05-06 04:22:21,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:21,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:21,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:21,197 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:21,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:21,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:21,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:21,385 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:21,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:23,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1068637148, now seen corresponding path program 3 times [2024-05-06 04:22:23,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:23,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:23,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:23,769 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:23,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:23,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:23,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:23,934 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:24,123 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:24,201 INFO L85 PathProgramCache]: Analyzing trace with hash -1180168440, now seen corresponding path program 1 times [2024-05-06 04:22:24,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:24,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:24,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:24,366 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:24,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:24,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:24,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:24,571 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:24,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:26,730 INFO L85 PathProgramCache]: Analyzing trace with hash 1118072088, now seen corresponding path program 2 times [2024-05-06 04:22:26,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:26,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:26,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:26,925 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:26,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:26,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:26,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:27,142 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:27,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:29,313 INFO L85 PathProgramCache]: Analyzing trace with hash -1004295726, now seen corresponding path program 3 times [2024-05-06 04:22:29,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:29,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:29,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:29,466 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:29,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:29,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:29,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:29,618 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:29,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:31,925 INFO L85 PathProgramCache]: Analyzing trace with hash -1896619875, now seen corresponding path program 1 times [2024-05-06 04:22:31,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:31,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:31,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:32,138 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:32,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:32,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:32,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:32,298 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:32,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:34,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1439863587, now seen corresponding path program 2 times [2024-05-06 04:22:34,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:34,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:34,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:34,667 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:34,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:34,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:34,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:34,924 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:35,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:37,187 INFO L85 PathProgramCache]: Analyzing trace with hash -725122649, now seen corresponding path program 3 times [2024-05-06 04:22:37,187 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:37,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:37,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:37,348 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:37,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:37,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:37,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:37,529 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:37,761 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:39,843 INFO L85 PathProgramCache]: Analyzing trace with hash 1079385067, now seen corresponding path program 37 times [2024-05-06 04:22:39,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:39,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:39,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:40,051 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:40,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:40,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:40,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:40,212 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:22:40,308 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:42,408 INFO L85 PathProgramCache]: Analyzing trace with hash 1847799701, now seen corresponding path program 38 times [2024-05-06 04:22:42,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:42,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:42,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:42,593 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:42,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:42,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:42,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:42,808 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:22:42,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:45,035 INFO L85 PathProgramCache]: Analyzing trace with hash -854661515, now seen corresponding path program 39 times [2024-05-06 04:22:45,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:45,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:45,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:45,188 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:45,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:45,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:45,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:45,339 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:22:45,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:47,667 INFO L85 PathProgramCache]: Analyzing trace with hash -1812064849, now seen corresponding path program 40 times [2024-05-06 04:22:47,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:47,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:47,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:47,935 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-05-06 04:22:47,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:47,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:47,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:48,070 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-05-06 04:22:48,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:50,288 INFO L85 PathProgramCache]: Analyzing trace with hash -1582474286, now seen corresponding path program 41 times [2024-05-06 04:22:50,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:50,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:50,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:50,431 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:22:50,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:50,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:50,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:50,574 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:22:50,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:52,884 INFO L85 PathProgramCache]: Analyzing trace with hash -2064945821, now seen corresponding path program 42 times [2024-05-06 04:22:52,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:52,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:52,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:53,087 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:53,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:53,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:53,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:53,241 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:53,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:55,422 INFO L85 PathProgramCache]: Analyzing trace with hash 533193614, now seen corresponding path program 43 times [2024-05-06 04:22:55,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:55,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:55,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:55,563 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:55,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:55,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:55,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:55,703 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:22:55,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:22:57,927 INFO L85 PathProgramCache]: Analyzing trace with hash 364594542, now seen corresponding path program 44 times [2024-05-06 04:22:57,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:57,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:57,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:58,065 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:22:58,065 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:22:58,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:22:58,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:22:58,197 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:22:58,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:00,461 INFO L85 PathProgramCache]: Analyzing trace with hash 1302790471, now seen corresponding path program 45 times [2024-05-06 04:23:00,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:00,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:00,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:00,605 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:23:00,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:00,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:00,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:00,839 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:23:00,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:03,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1626273422, now seen corresponding path program 46 times [2024-05-06 04:23:03,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:03,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:03,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:03,210 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:23:03,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:03,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:03,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:03,349 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:23:03,444 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:05,549 INFO L85 PathProgramCache]: Analyzing trace with hash 565950577, now seen corresponding path program 47 times [2024-05-06 04:23:05,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:05,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:05,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:05,689 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-05-06 04:23:05,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:05,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:05,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:05,911 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-05-06 04:23:06,130 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:08,255 INFO L85 PathProgramCache]: Analyzing trace with hash 148032292, now seen corresponding path program 48 times [2024-05-06 04:23:08,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:08,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:08,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:08,399 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-05-06 04:23:08,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:08,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:08,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:08,543 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-05-06 04:23:08,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:10,768 INFO L85 PathProgramCache]: Analyzing trace with hash -306296369, now seen corresponding path program 49 times [2024-05-06 04:23:10,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:10,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:10,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:10,961 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-05-06 04:23:10,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:10,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:10,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:11,106 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-05-06 04:23:11,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:13,477 INFO L85 PathProgramCache]: Analyzing trace with hash 337187185, now seen corresponding path program 50 times [2024-05-06 04:23:13,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:13,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:13,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:13,621 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 17 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:23:13,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:13,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:13,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:13,843 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 17 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:23:13,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:16,075 INFO L85 PathProgramCache]: Analyzing trace with hash 1659667260, now seen corresponding path program 51 times [2024-05-06 04:23:16,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:16,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:16,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:16,194 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 15 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:23:16,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:16,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:16,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:16,316 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 15 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:23:16,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:18,642 INFO L85 PathProgramCache]: Analyzing trace with hash -1707395807, now seen corresponding path program 52 times [2024-05-06 04:23:18,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:18,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:18,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:18,775 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:23:18,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:18,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:18,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:18,987 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:23:19,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:21,262 INFO L85 PathProgramCache]: Analyzing trace with hash -193624513, now seen corresponding path program 53 times [2024-05-06 04:23:21,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:21,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:21,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:21,391 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:23:21,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:21,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:21,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:21,519 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:23:21,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:23,780 INFO L85 PathProgramCache]: Analyzing trace with hash 1933416832, now seen corresponding path program 54 times [2024-05-06 04:23:23,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:23,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:23,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:23,911 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 4 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:23:23,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:23,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:23,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:24,108 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 4 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:23:24,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:26,818 INFO L85 PathProgramCache]: Analyzing trace with hash 1444136194, now seen corresponding path program 55 times [2024-05-06 04:23:26,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:26,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:26,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:23:26,897 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:23:26,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:23:27,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:29,352 INFO L85 PathProgramCache]: Analyzing trace with hash 694222080, now seen corresponding path program 56 times [2024-05-06 04:23:29,352 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:29,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:29,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:29,791 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:23:29,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:29,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:29,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:30,046 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:23:30,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:32,338 INFO L85 PathProgramCache]: Analyzing trace with hash -818480763, now seen corresponding path program 57 times [2024-05-06 04:23:32,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:32,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:32,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:32,486 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 12 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:32,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:32,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:32,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:32,635 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 12 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:32,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:34,983 INFO L85 PathProgramCache]: Analyzing trace with hash 1359070712, now seen corresponding path program 58 times [2024-05-06 04:23:34,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:34,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:35,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:35,123 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 11 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:35,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:35,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:35,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:35,356 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 11 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:35,473 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:37,631 INFO L85 PathProgramCache]: Analyzing trace with hash -1757274328, now seen corresponding path program 59 times [2024-05-06 04:23:37,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:37,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:37,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:37,769 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:37,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:37,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:37,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:37,910 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:38,016 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:40,143 INFO L85 PathProgramCache]: Analyzing trace with hash -1621827189, now seen corresponding path program 8 times [2024-05-06 04:23:40,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:40,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:40,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:40,401 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:40,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:40,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:40,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:40,546 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:40,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:42,779 INFO L85 PathProgramCache]: Analyzing trace with hash 86230516, now seen corresponding path program 4 times [2024-05-06 04:23:42,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:42,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:42,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:42,916 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:42,916 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:42,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:42,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:43,056 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:43,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:45,292 INFO L85 PathProgramCache]: Analyzing trace with hash -551407520, now seen corresponding path program 4 times [2024-05-06 04:23:45,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:45,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:45,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:45,477 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:45,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:45,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:45,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:45,607 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:45,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:45,785 INFO L85 PathProgramCache]: Analyzing trace with hash 397854614, now seen corresponding path program 4 times [2024-05-06 04:23:45,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:45,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:45,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:45,915 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:45,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:45,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:45,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:46,044 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:46,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:48,208 INFO L85 PathProgramCache]: Analyzing trace with hash -818449980, now seen corresponding path program 4 times [2024-05-06 04:23:48,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:48,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:48,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:48,395 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:48,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:48,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:48,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:48,527 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:48,620 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:50,763 INFO L85 PathProgramCache]: Analyzing trace with hash 1359071704, now seen corresponding path program 4 times [2024-05-06 04:23:50,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:50,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:50,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:50,901 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:50,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:50,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:50,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:51,038 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:51,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:52,541 INFO L85 PathProgramCache]: Analyzing trace with hash -1757274297, now seen corresponding path program 4 times [2024-05-06 04:23:52,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:52,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:52,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:52,738 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:52,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:52,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:52,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:52,873 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:52,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:55,153 INFO L85 PathProgramCache]: Analyzing trace with hash 1744429051, now seen corresponding path program 60 times [2024-05-06 04:23:55,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:55,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:55,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:55,304 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:55,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:55,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:55,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:55,463 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:23:55,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:23:57,833 INFO L85 PathProgramCache]: Analyzing trace with hash 438036247, now seen corresponding path program 61 times [2024-05-06 04:23:57,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:57,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:57,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:57,962 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:23:57,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:23:57,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:23:57,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:23:58,095 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:23:58,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:00,406 INFO L85 PathProgramCache]: Analyzing trace with hash 568319521, now seen corresponding path program 62 times [2024-05-06 04:24:00,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:00,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:00,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:00,534 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:24:00,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:00,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:00,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:00,665 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:24:00,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:02,996 INFO L85 PathProgramCache]: Analyzing trace with hash 295427544, now seen corresponding path program 63 times [2024-05-06 04:24:02,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:02,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:03,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:03,136 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:24:03,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:03,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:03,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:03,267 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:24:03,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:05,548 INFO L85 PathProgramCache]: Analyzing trace with hash 286624579, now seen corresponding path program 64 times [2024-05-06 04:24:05,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:05,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:05,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:05,665 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:05,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:05,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:05,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:05,762 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:05,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:08,028 INFO L85 PathProgramCache]: Analyzing trace with hash -129301382, now seen corresponding path program 65 times [2024-05-06 04:24:08,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:08,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:08,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:08,189 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:08,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:08,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:08,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:08,286 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:08,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:10,527 INFO L85 PathProgramCache]: Analyzing trace with hash -696907674, now seen corresponding path program 66 times [2024-05-06 04:24:10,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:10,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:10,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:10,624 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:10,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:10,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:10,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:10,719 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:10,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:11,682 INFO L85 PathProgramCache]: Analyzing trace with hash -940022711, now seen corresponding path program 9 times [2024-05-06 04:24:11,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:11,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:11,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:11,781 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:11,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:11,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:11,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:12,006 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:12,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:14,205 INFO L85 PathProgramCache]: Analyzing trace with hash 1355150198, now seen corresponding path program 5 times [2024-05-06 04:24:14,206 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:14,206 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:14,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:14,305 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:14,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:14,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:14,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:14,407 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:14,532 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:16,665 INFO L85 PathProgramCache]: Analyzing trace with hash 597904030, now seen corresponding path program 5 times [2024-05-06 04:24:16,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:16,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:16,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:16,762 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:16,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:16,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:16,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:16,859 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:16,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:19,118 INFO L85 PathProgramCache]: Analyzing trace with hash 296381848, now seen corresponding path program 5 times [2024-05-06 04:24:19,118 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:19,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:19,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:19,240 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:19,241 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:19,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:19,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:19,339 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:19,447 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:21,579 INFO L85 PathProgramCache]: Analyzing trace with hash 286655362, now seen corresponding path program 5 times [2024-05-06 04:24:21,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:21,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:21,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:21,677 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:21,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:21,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:21,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:21,775 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:21,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:22,036 INFO L85 PathProgramCache]: Analyzing trace with hash -129300390, now seen corresponding path program 5 times [2024-05-06 04:24:22,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:22,036 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:22,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:22,139 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:22,139 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:22,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:22,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:22,320 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:22,405 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:24,524 INFO L85 PathProgramCache]: Analyzing trace with hash -696907643, now seen corresponding path program 5 times [2024-05-06 04:24:24,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:24,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:24,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:24,645 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:24,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:24,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:24,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:24,743 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:24,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:26,991 INFO L85 PathProgramCache]: Analyzing trace with hash -299575555, now seen corresponding path program 67 times [2024-05-06 04:24:26,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:26,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:27,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:27,086 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:27,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:27,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:27,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:27,180 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:24:27,400 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:29,567 INFO L85 PathProgramCache]: Analyzing trace with hash 600777327, now seen corresponding path program 68 times [2024-05-06 04:24:29,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:29,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:29,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:29,601 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:24:29,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:29,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:30,380 INFO L85 PathProgramCache]: Analyzing trace with hash 296478499, now seen corresponding path program 69 times [2024-05-06 04:24:30,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:30,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:30,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:30,409 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:24:30,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:30,580 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:32,740 INFO L85 PathProgramCache]: Analyzing trace with hash -544620624, now seen corresponding path program 70 times [2024-05-06 04:24:32,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:32,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:32,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:32,780 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:24:32,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:24:33,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:35,437 INFO L85 PathProgramCache]: Analyzing trace with hash -640110833, now seen corresponding path program 1 times [2024-05-06 04:24:35,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:35,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:35,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:35,626 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:24:35,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:35,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:35,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:35,756 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:24:35,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:38,090 INFO L85 PathProgramCache]: Analyzing trace with hash -787343126, now seen corresponding path program 2 times [2024-05-06 04:24:38,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:38,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:38,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:38,216 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:38,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:38,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:38,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:38,339 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:38,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:40,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1457958973, now seen corresponding path program 3 times [2024-05-06 04:24:40,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:40,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:40,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:40,838 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 10 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:40,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:40,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:40,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:40,980 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 10 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:41,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:43,294 INFO L85 PathProgramCache]: Analyzing trace with hash 948113833, now seen corresponding path program 4 times [2024-05-06 04:24:43,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:43,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:43,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:43,465 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 27 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:43,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:43,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:43,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:43,654 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 27 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:43,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:45,996 INFO L85 PathProgramCache]: Analyzing trace with hash -1493436140, now seen corresponding path program 5 times [2024-05-06 04:24:45,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:45,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:46,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:46,132 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 18 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:46,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:46,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:46,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:46,263 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 18 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:46,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:48,587 INFO L85 PathProgramCache]: Analyzing trace with hash 90372231, now seen corresponding path program 6 times [2024-05-06 04:24:48,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:48,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:48,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:48,735 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:48,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:48,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:48,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:48,969 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:49,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:51,236 INFO L85 PathProgramCache]: Analyzing trace with hash 557104913, now seen corresponding path program 7 times [2024-05-06 04:24:51,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:51,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:51,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:51,372 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 14 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:51,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:51,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:51,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:51,509 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 14 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:51,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:53,760 INFO L85 PathProgramCache]: Analyzing trace with hash -1866788018, now seen corresponding path program 1 times [2024-05-06 04:24:53,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:53,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:53,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:53,899 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:53,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:53,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:53,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:54,146 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:54,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:56,401 INFO L85 PathProgramCache]: Analyzing trace with hash -1030044021, now seen corresponding path program 1 times [2024-05-06 04:24:56,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:56,402 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:56,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:56,540 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:56,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:56,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:56,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:56,674 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:56,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:24:58,896 INFO L85 PathProgramCache]: Analyzing trace with hash 243873369, now seen corresponding path program 1 times [2024-05-06 04:24:58,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:58,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:58,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:59,078 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:59,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:24:59,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:24:59,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:24:59,211 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:24:59,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:01,483 INFO L85 PathProgramCache]: Analyzing trace with hash 977697257, now seen corresponding path program 1 times [2024-05-06 04:25:01,483 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:01,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:01,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:01,614 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:01,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:01,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:01,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:01,747 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:01,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:03,969 INFO L85 PathProgramCache]: Analyzing trace with hash -1492481867, now seen corresponding path program 1 times [2024-05-06 04:25:03,969 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:03,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:03,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:04,161 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:04,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:04,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:04,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:04,291 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:04,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:06,514 INFO L85 PathProgramCache]: Analyzing trace with hash 90402983, now seen corresponding path program 1 times [2024-05-06 04:25:06,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:06,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:06,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:06,648 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:06,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:06,649 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:06,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:06,784 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:06,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:09,113 INFO L85 PathProgramCache]: Analyzing trace with hash 557105874, now seen corresponding path program 1 times [2024-05-06 04:25:09,113 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:09,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:09,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:09,249 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:09,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:09,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:09,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:09,379 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:09,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:11,625 INFO L85 PathProgramCache]: Analyzing trace with hash 1680539556, now seen corresponding path program 8 times [2024-05-06 04:25:11,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:11,626 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:11,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:11,763 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:11,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:11,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:11,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:11,957 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:12,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:14,238 INFO L85 PathProgramCache]: Analyzing trace with hash 368611134, now seen corresponding path program 9 times [2024-05-06 04:25:14,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:14,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:14,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:14,366 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:14,367 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:14,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:14,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:14,495 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:14,593 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:16,758 INFO L85 PathProgramCache]: Analyzing trace with hash 1120269442, now seen corresponding path program 10 times [2024-05-06 04:25:16,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:16,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:16,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:16,883 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:16,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:16,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:16,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:17,119 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:25:17,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:19,458 INFO L85 PathProgramCache]: Analyzing trace with hash -1821763982, now seen corresponding path program 11 times [2024-05-06 04:25:19,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:19,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:19,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:19,596 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 7 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:25:19,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:19,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:19,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:19,724 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 7 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:25:19,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:22,061 INFO L85 PathProgramCache]: Analyzing trace with hash -1305692466, now seen corresponding path program 12 times [2024-05-06 04:25:22,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:22,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:22,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:22,233 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:25:22,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:22,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:22,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:22,474 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:25:22,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:24,805 INFO L85 PathProgramCache]: Analyzing trace with hash -1566139631, now seen corresponding path program 13 times [2024-05-06 04:25:24,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:24,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:24,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:24,929 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 5 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:25:24,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:24,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:24,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:25,078 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 5 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:25:25,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:26,427 INFO L85 PathProgramCache]: Analyzing trace with hash -1473131823, now seen corresponding path program 1 times [2024-05-06 04:25:26,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:26,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:26,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:25:26,468 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:25:26,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:25:26,627 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:28,798 INFO L85 PathProgramCache]: Analyzing trace with hash -1453158447, now seen corresponding path program 1 times [2024-05-06 04:25:28,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:28,798 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:28,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:28,933 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:25:28,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:28,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:28,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:29,020 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-05-06 04:25:29,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-06 04:25:29,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=1239, Unknown=0, NotChecked=0, Total=1332 [2024-05-06 04:25:29,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:31,571 INFO L85 PathProgramCache]: Analyzing trace with hash -1389664704, now seen corresponding path program 71 times [2024-05-06 04:25:31,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:31,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:31,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:31,717 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:25:31,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:31,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:31,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:31,846 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 9 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:25:31,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:34,116 INFO L85 PathProgramCache]: Analyzing trace with hash -1058812005, now seen corresponding path program 72 times [2024-05-06 04:25:34,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:34,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:34,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:34,252 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:25:34,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:34,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:34,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:34,477 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:25:34,686 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:36,799 INFO L85 PathProgramCache]: Analyzing trace with hash 1841821979, now seen corresponding path program 73 times [2024-05-06 04:25:36,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:36,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:36,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:36,963 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:25:36,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:36,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:36,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:37,144 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:25:37,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:39,366 INFO L85 PathProgramCache]: Analyzing trace with hash 71247973, now seen corresponding path program 74 times [2024-05-06 04:25:39,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:39,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:39,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:39,608 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:25:39,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:39,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:39,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:39,802 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:25:39,926 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:42,049 INFO L85 PathProgramCache]: Analyzing trace with hash -1098219611, now seen corresponding path program 75 times [2024-05-06 04:25:42,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:42,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:42,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:42,254 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:25:42,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:42,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:42,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:42,535 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 43 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:25:42,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:44,792 INFO L85 PathProgramCache]: Analyzing trace with hash 2112805672, now seen corresponding path program 76 times [2024-05-06 04:25:44,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:44,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:44,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:44,972 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:25:44,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:44,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:44,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:45,140 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:25:45,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:47,365 INFO L85 PathProgramCache]: Analyzing trace with hash -59685640, now seen corresponding path program 77 times [2024-05-06 04:25:47,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:47,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:47,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:47,585 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:25:47,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:47,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:47,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:47,754 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:25:47,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:48,404 INFO L85 PathProgramCache]: Analyzing trace with hash -1005249038, now seen corresponding path program 78 times [2024-05-06 04:25:48,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:48,405 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:48,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:48,556 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:25:48,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:48,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:48,576 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:48,754 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 41 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:25:48,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:49,787 INFO L85 PathProgramCache]: Analyzing trace with hash -1391061250, now seen corresponding path program 79 times [2024-05-06 04:25:49,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:49,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:49,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:49,948 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:25:49,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:49,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:49,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:50,111 INFO L134 CoverageAnalysis]: Checked inductivity of 89 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:25:50,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:52,310 INFO L85 PathProgramCache]: Analyzing trace with hash 195099106, now seen corresponding path program 80 times [2024-05-06 04:25:52,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:52,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:52,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:52,543 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:25:52,544 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:52,544 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:52,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:52,713 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:25:52,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:54,936 INFO L85 PathProgramCache]: Analyzing trace with hash -725152440, now seen corresponding path program 81 times [2024-05-06 04:25:54,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:54,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:54,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:55,092 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:25:55,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:55,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:55,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:55,343 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 39 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:25:55,494 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:57,574 INFO L85 PathProgramCache]: Analyzing trace with hash -1630802271, now seen corresponding path program 10 times [2024-05-06 04:25:57,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:57,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:57,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:57,739 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:25:57,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:57,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:57,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:57,907 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-05-06 04:25:57,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:25:58,833 INFO L85 PathProgramCache]: Analyzing trace with hash 1850739103, now seen corresponding path program 11 times [2024-05-06 04:25:58,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:58,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:58,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:59,128 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:25:59,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:25:59,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:25:59,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:25:59,317 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-05-06 04:25:59,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:01,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1194624171, now seen corresponding path program 12 times [2024-05-06 04:26:01,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:01,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:01,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:01,693 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:01,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:01,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:01,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:01,930 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:02,095 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:04,169 INFO L85 PathProgramCache]: Analyzing trace with hash -54654300, now seen corresponding path program 6 times [2024-05-06 04:26:04,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:04,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:04,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:04,462 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:04,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:04,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:04,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:04,726 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:04,808 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:06,892 INFO L85 PathProgramCache]: Analyzing trace with hash -2049326852, now seen corresponding path program 7 times [2024-05-06 04:26:06,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:06,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:06,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:07,188 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:07,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:07,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:07,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:07,370 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:07,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:09,573 INFO L85 PathProgramCache]: Analyzing trace with hash -1623836562, now seen corresponding path program 8 times [2024-05-06 04:26:09,573 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:09,573 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:09,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:09,790 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:09,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:09,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:09,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:09,946 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:10,100 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:12,198 INFO L85 PathProgramCache]: Analyzing trace with hash 1145412278, now seen corresponding path program 6 times [2024-05-06 04:26:12,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:12,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:12,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:12,399 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:12,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:12,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:12,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:12,613 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:12,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:12,781 INFO L85 PathProgramCache]: Analyzing trace with hash 1123951914, now seen corresponding path program 7 times [2024-05-06 04:26:12,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:12,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:12,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:12,972 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:12,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:12,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:12,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:13,167 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:13,268 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:15,350 INFO L85 PathProgramCache]: Analyzing trace with hash -467839232, now seen corresponding path program 8 times [2024-05-06 04:26:15,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:15,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:15,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:15,550 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:15,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:15,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:15,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:15,705 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:15,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:17,929 INFO L85 PathProgramCache]: Analyzing trace with hash -1430053754, now seen corresponding path program 6 times [2024-05-06 04:26:17,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:17,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:17,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:18,154 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:18,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:18,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:18,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:18,333 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:18,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:20,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1456319834, now seen corresponding path program 7 times [2024-05-06 04:26:20,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:20,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:20,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:20,711 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:20,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:20,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:20,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:20,934 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:21,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:23,130 INFO L85 PathProgramCache]: Analyzing trace with hash 1231805648, now seen corresponding path program 8 times [2024-05-06 04:26:23,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:23,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:23,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:23,285 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:23,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:23,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:23,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:23,463 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:23,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:24,209 INFO L85 PathProgramCache]: Analyzing trace with hash -1961686310, now seen corresponding path program 6 times [2024-05-06 04:26:24,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:24,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:24,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:24,454 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:24,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:24,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:24,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:24,621 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:24,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:26,866 INFO L85 PathProgramCache]: Analyzing trace with hash -828203642, now seen corresponding path program 7 times [2024-05-06 04:26:26,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:26,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:26,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:27,056 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:27,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:27,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:27,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:27,294 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:27,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:29,466 INFO L85 PathProgramCache]: Analyzing trace with hash -1068637148, now seen corresponding path program 8 times [2024-05-06 04:26:29,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:29,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:29,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:29,688 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:29,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:29,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:29,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:29,889 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:30,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:32,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1180168440, now seen corresponding path program 6 times [2024-05-06 04:26:32,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:32,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:32,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:32,327 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:32,327 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:32,327 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:32,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:32,528 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:32,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:33,521 INFO L85 PathProgramCache]: Analyzing trace with hash 1118072088, now seen corresponding path program 7 times [2024-05-06 04:26:33,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:33,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:33,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:33,736 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:33,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:33,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:33,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:33,909 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:34,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:36,104 INFO L85 PathProgramCache]: Analyzing trace with hash -1004295726, now seen corresponding path program 8 times [2024-05-06 04:26:36,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:36,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:36,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:36,262 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:36,262 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:36,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:36,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:36,485 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:36,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:38,823 INFO L85 PathProgramCache]: Analyzing trace with hash -1896619875, now seen corresponding path program 6 times [2024-05-06 04:26:38,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:38,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:38,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:38,988 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:38,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:38,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:39,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:39,225 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:39,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:41,464 INFO L85 PathProgramCache]: Analyzing trace with hash 1439863587, now seen corresponding path program 7 times [2024-05-06 04:26:41,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:41,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:41,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:41,647 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:41,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:41,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:41,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:41,823 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:41,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:42,112 INFO L85 PathProgramCache]: Analyzing trace with hash -725122649, now seen corresponding path program 8 times [2024-05-06 04:26:42,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:42,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:42,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:42,268 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:42,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:42,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:42,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:42,423 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:42,600 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:44,694 INFO L85 PathProgramCache]: Analyzing trace with hash 1079385067, now seen corresponding path program 82 times [2024-05-06 04:26:44,694 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:44,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:44,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:44,939 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:44,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:44,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:44,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:45,103 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2024-05-06 04:26:45,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:47,302 INFO L85 PathProgramCache]: Analyzing trace with hash 1847799701, now seen corresponding path program 83 times [2024-05-06 04:26:47,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:47,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:47,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:47,476 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:47,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:47,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:47,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:47,732 INFO L134 CoverageAnalysis]: Checked inductivity of 94 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2024-05-06 04:26:47,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:49,974 INFO L85 PathProgramCache]: Analyzing trace with hash -854661515, now seen corresponding path program 84 times [2024-05-06 04:26:49,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:49,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:49,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:50,133 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:50,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:50,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:50,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:50,326 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 37 proven. 19 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-05-06 04:26:50,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:50,667 INFO L85 PathProgramCache]: Analyzing trace with hash -1812064849, now seen corresponding path program 85 times [2024-05-06 04:26:50,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:50,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:50,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:50,805 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-05-06 04:26:50,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:50,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:50,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:50,944 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 80 trivial. 0 not checked. [2024-05-06 04:26:51,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:53,177 INFO L85 PathProgramCache]: Analyzing trace with hash -1582474286, now seen corresponding path program 86 times [2024-05-06 04:26:53,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:53,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:53,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:53,354 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:26:53,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:53,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:53,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:53,503 INFO L134 CoverageAnalysis]: Checked inductivity of 118 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:26:53,665 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:55,772 INFO L85 PathProgramCache]: Analyzing trace with hash -2064945821, now seen corresponding path program 87 times [2024-05-06 04:26:55,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:55,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:55,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:55,996 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:26:55,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:55,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:56,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:56,146 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:26:56,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:26:58,393 INFO L85 PathProgramCache]: Analyzing trace with hash 533193614, now seen corresponding path program 88 times [2024-05-06 04:26:58,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:58,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:58,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:58,540 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:26:58,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:26:58,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:26:58,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:26:58,740 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-05-06 04:26:58,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:01,003 INFO L85 PathProgramCache]: Analyzing trace with hash 364594542, now seen corresponding path program 89 times [2024-05-06 04:27:01,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:01,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:01,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:01,203 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:27:01,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:01,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:01,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:01,339 INFO L134 CoverageAnalysis]: Checked inductivity of 115 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:27:01,542 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:03,654 INFO L85 PathProgramCache]: Analyzing trace with hash 1302790471, now seen corresponding path program 90 times [2024-05-06 04:27:03,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:03,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:03,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:03,816 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:27:03,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:03,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:03,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:04,014 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:27:04,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:06,221 INFO L85 PathProgramCache]: Analyzing trace with hash -1626273422, now seen corresponding path program 91 times [2024-05-06 04:27:06,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:06,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:06,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:06,363 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:27:06,363 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:06,363 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:06,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:06,508 INFO L134 CoverageAnalysis]: Checked inductivity of 116 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-05-06 04:27:06,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:08,728 INFO L85 PathProgramCache]: Analyzing trace with hash 565950577, now seen corresponding path program 92 times [2024-05-06 04:27:08,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:08,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:08,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:08,910 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-05-06 04:27:08,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:08,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:08,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:09,047 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-05-06 04:27:09,230 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:11,366 INFO L85 PathProgramCache]: Analyzing trace with hash 148032292, now seen corresponding path program 93 times [2024-05-06 04:27:11,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:11,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:11,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:11,528 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-05-06 04:27:11,529 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:11,529 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:11,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:11,756 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-05-06 04:27:11,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:13,983 INFO L85 PathProgramCache]: Analyzing trace with hash -306296369, now seen corresponding path program 94 times [2024-05-06 04:27:13,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:13,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:14,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:14,129 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-05-06 04:27:14,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:14,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:14,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:14,272 INFO L134 CoverageAnalysis]: Checked inductivity of 113 backedges. 31 proven. 15 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-05-06 04:27:14,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:15,135 INFO L85 PathProgramCache]: Analyzing trace with hash 337187185, now seen corresponding path program 95 times [2024-05-06 04:27:15,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:15,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:15,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:15,335 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 17 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:27:15,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:15,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:15,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:15,484 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 17 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:27:15,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:17,715 INFO L85 PathProgramCache]: Analyzing trace with hash 1659667260, now seen corresponding path program 96 times [2024-05-06 04:27:17,716 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:17,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:17,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:17,842 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 15 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:27:17,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:17,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:17,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:17,968 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 15 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2024-05-06 04:27:18,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:20,273 INFO L85 PathProgramCache]: Analyzing trace with hash -1707395807, now seen corresponding path program 97 times [2024-05-06 04:27:20,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:20,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:20,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:20,461 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:27:20,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:20,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:20,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:20,600 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:27:20,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:22,848 INFO L85 PathProgramCache]: Analyzing trace with hash -193624513, now seen corresponding path program 98 times [2024-05-06 04:27:22,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:22,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:22,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:22,988 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:27:22,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:22,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:23,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:23,136 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:27:23,234 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:25,432 INFO L85 PathProgramCache]: Analyzing trace with hash 1933416832, now seen corresponding path program 99 times [2024-05-06 04:27:25,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:25,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:25,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:25,582 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 4 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:27:25,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:25,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:25,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:25,729 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 4 proven. 19 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-05-06 04:27:26,238 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:28,379 INFO L85 PathProgramCache]: Analyzing trace with hash 1444136194, now seen corresponding path program 100 times [2024-05-06 04:27:28,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:28,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:28,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:27:28,406 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:27:28,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:27:28,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:30,811 INFO L85 PathProgramCache]: Analyzing trace with hash 694222080, now seen corresponding path program 101 times [2024-05-06 04:27:30,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:30,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:30,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:30,950 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:27:30,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:30,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:30,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:31,093 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 5 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:27:31,190 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:33,344 INFO L85 PathProgramCache]: Analyzing trace with hash -818480763, now seen corresponding path program 102 times [2024-05-06 04:27:33,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:33,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:33,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:33,484 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 12 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:33,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:33,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:33,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:33,670 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 12 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:33,764 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:35,900 INFO L85 PathProgramCache]: Analyzing trace with hash 1359070712, now seen corresponding path program 103 times [2024-05-06 04:27:35,900 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:35,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:35,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:36,038 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 11 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:36,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:36,038 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:36,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:36,172 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 11 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:36,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:38,414 INFO L85 PathProgramCache]: Analyzing trace with hash -1757274328, now seen corresponding path program 104 times [2024-05-06 04:27:38,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:38,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:38,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:38,548 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:38,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:38,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:38,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:38,734 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 10 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:38,830 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:40,949 INFO L85 PathProgramCache]: Analyzing trace with hash -1621827189, now seen corresponding path program 13 times [2024-05-06 04:27:40,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:40,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:40,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:41,098 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:41,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:41,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:41,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:41,243 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:41,358 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:43,468 INFO L85 PathProgramCache]: Analyzing trace with hash 86230516, now seen corresponding path program 9 times [2024-05-06 04:27:43,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:43,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:43,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:43,608 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:43,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:43,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:43,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:43,812 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:43,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:46,032 INFO L85 PathProgramCache]: Analyzing trace with hash -551407520, now seen corresponding path program 9 times [2024-05-06 04:27:46,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:46,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:46,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:46,170 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:46,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:46,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:46,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:46,308 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:46,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:48,508 INFO L85 PathProgramCache]: Analyzing trace with hash 397854614, now seen corresponding path program 9 times [2024-05-06 04:27:48,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:48,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:48,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:48,690 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:48,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:48,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:48,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:48,824 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:48,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:51,019 INFO L85 PathProgramCache]: Analyzing trace with hash -818449980, now seen corresponding path program 9 times [2024-05-06 04:27:51,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:51,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:51,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:51,156 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:51,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:51,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:51,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:51,300 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:51,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:53,531 INFO L85 PathProgramCache]: Analyzing trace with hash 1359071704, now seen corresponding path program 9 times [2024-05-06 04:27:53,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:53,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:53,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:53,720 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:53,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:53,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:53,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:53,854 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:53,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:56,086 INFO L85 PathProgramCache]: Analyzing trace with hash -1757274297, now seen corresponding path program 9 times [2024-05-06 04:27:56,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:56,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:56,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:56,221 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:56,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:56,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:56,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:56,410 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:56,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:27:58,638 INFO L85 PathProgramCache]: Analyzing trace with hash 1744429051, now seen corresponding path program 105 times [2024-05-06 04:27:58,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:58,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:58,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:58,787 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:58,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:27:58,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:27:58,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:27:58,920 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 9 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:27:59,039 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:01,208 INFO L85 PathProgramCache]: Analyzing trace with hash 438036247, now seen corresponding path program 106 times [2024-05-06 04:28:01,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:01,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:01,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:01,340 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:28:01,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:01,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:01,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:01,523 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:28:01,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:03,800 INFO L85 PathProgramCache]: Analyzing trace with hash 568319521, now seen corresponding path program 107 times [2024-05-06 04:28:03,801 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:03,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:03,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:03,936 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:28:03,936 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:03,936 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:03,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:04,066 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:28:04,164 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:06,301 INFO L85 PathProgramCache]: Analyzing trace with hash 295427544, now seen corresponding path program 108 times [2024-05-06 04:28:06,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:06,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:06,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:06,476 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:28:06,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:06,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:06,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:06,608 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:28:06,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:07,442 INFO L85 PathProgramCache]: Analyzing trace with hash 286624579, now seen corresponding path program 109 times [2024-05-06 04:28:07,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:07,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:07,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:07,547 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:07,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:07,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:07,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:07,648 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:07,766 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:09,923 INFO L85 PathProgramCache]: Analyzing trace with hash -129301382, now seen corresponding path program 110 times [2024-05-06 04:28:09,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:09,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:09,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:10,070 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:10,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:10,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:10,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:10,170 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:10,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:12,464 INFO L85 PathProgramCache]: Analyzing trace with hash -696907674, now seen corresponding path program 111 times [2024-05-06 04:28:12,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:12,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:12,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:12,568 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:12,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:12,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:12,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:12,665 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:12,755 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:12,864 INFO L85 PathProgramCache]: Analyzing trace with hash -940022711, now seen corresponding path program 14 times [2024-05-06 04:28:12,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:12,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:12,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:12,964 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:12,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:12,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:13,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:13,160 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:13,266 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:15,420 INFO L85 PathProgramCache]: Analyzing trace with hash 1355150198, now seen corresponding path program 10 times [2024-05-06 04:28:15,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:15,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:15,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:15,521 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:15,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:15,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:15,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:15,624 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:15,710 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:17,813 INFO L85 PathProgramCache]: Analyzing trace with hash 597904030, now seen corresponding path program 10 times [2024-05-06 04:28:17,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:17,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:17,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:17,912 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:17,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:17,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:17,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:18,061 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:18,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:20,255 INFO L85 PathProgramCache]: Analyzing trace with hash 296381848, now seen corresponding path program 10 times [2024-05-06 04:28:20,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:20,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:20,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:20,356 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:20,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:20,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:20,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:20,454 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:20,543 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:22,640 INFO L85 PathProgramCache]: Analyzing trace with hash 286655362, now seen corresponding path program 10 times [2024-05-06 04:28:22,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:22,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:22,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:22,737 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:22,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:22,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:22,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:22,879 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:22,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:25,071 INFO L85 PathProgramCache]: Analyzing trace with hash -129300390, now seen corresponding path program 10 times [2024-05-06 04:28:25,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:25,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:25,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:25,169 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:25,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:25,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:25,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:25,267 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:25,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:27,524 INFO L85 PathProgramCache]: Analyzing trace with hash -696907643, now seen corresponding path program 10 times [2024-05-06 04:28:27,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:27,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:27,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:27,628 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:27,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:27,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:27,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:27,730 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:27,866 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:29,053 INFO L85 PathProgramCache]: Analyzing trace with hash -299575555, now seen corresponding path program 112 times [2024-05-06 04:28:29,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:29,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:29,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:29,151 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:29,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:29,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:29,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:29,249 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 04:28:29,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:30,022 INFO L85 PathProgramCache]: Analyzing trace with hash 600777327, now seen corresponding path program 113 times [2024-05-06 04:28:30,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:30,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:30,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:28:30,048 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:28:30,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:28:30,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:30,926 INFO L85 PathProgramCache]: Analyzing trace with hash 296478499, now seen corresponding path program 114 times [2024-05-06 04:28:30,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:30,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:30,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:28:30,952 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:28:30,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:28:31,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:33,303 INFO L85 PathProgramCache]: Analyzing trace with hash -544620624, now seen corresponding path program 115 times [2024-05-06 04:28:33,303 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:33,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:33,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:28:33,329 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:28:33,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:28:33,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:35,945 INFO L85 PathProgramCache]: Analyzing trace with hash -640110833, now seen corresponding path program 14 times [2024-05-06 04:28:35,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:35,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:35,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:36,075 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:28:36,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:36,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:36,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:36,317 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:28:36,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:38,596 INFO L85 PathProgramCache]: Analyzing trace with hash -787343126, now seen corresponding path program 15 times [2024-05-06 04:28:38,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:38,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:38,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:38,721 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:38,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:38,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:38,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:38,845 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:38,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:41,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1457958973, now seen corresponding path program 16 times [2024-05-06 04:28:41,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:41,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:41,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:41,320 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 10 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:41,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:41,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:41,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:41,452 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 10 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:41,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:43,733 INFO L85 PathProgramCache]: Analyzing trace with hash 948113833, now seen corresponding path program 17 times [2024-05-06 04:28:43,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:43,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:43,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:43,890 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 27 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:43,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:43,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:43,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:44,097 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 12 proven. 27 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:44,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:46,444 INFO L85 PathProgramCache]: Analyzing trace with hash -1493436140, now seen corresponding path program 18 times [2024-05-06 04:28:46,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:46,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:46,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:46,581 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 18 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:46,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:46,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:46,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:46,718 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 18 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:46,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:49,031 INFO L85 PathProgramCache]: Analyzing trace with hash 90372231, now seen corresponding path program 19 times [2024-05-06 04:28:49,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:49,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:49,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:49,277 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:49,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:49,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:49,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:49,418 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:49,523 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:51,675 INFO L85 PathProgramCache]: Analyzing trace with hash 557104913, now seen corresponding path program 20 times [2024-05-06 04:28:51,679 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:51,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:51,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:51,818 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 14 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:51,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:51,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:51,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:52,066 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 14 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:52,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:54,359 INFO L85 PathProgramCache]: Analyzing trace with hash -1866788018, now seen corresponding path program 2 times [2024-05-06 04:28:54,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:54,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:54,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:54,495 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:54,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:54,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:54,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:54,632 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:54,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:56,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1030044021, now seen corresponding path program 2 times [2024-05-06 04:28:56,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:56,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:56,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:57,036 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:57,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:57,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:57,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:57,179 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:57,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:28:59,456 INFO L85 PathProgramCache]: Analyzing trace with hash 243873369, now seen corresponding path program 2 times [2024-05-06 04:28:59,456 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:59,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:59,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:59,657 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:59,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:28:59,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:28:59,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:28:59,821 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:28:59,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:02,130 INFO L85 PathProgramCache]: Analyzing trace with hash 977697257, now seen corresponding path program 2 times [2024-05-06 04:29:02,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:02,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:02,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:02,266 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:02,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:02,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:02,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:02,472 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:02,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:04,734 INFO L85 PathProgramCache]: Analyzing trace with hash -1492481867, now seen corresponding path program 2 times [2024-05-06 04:29:04,734 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:04,734 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:04,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:04,871 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:04,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:04,872 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:04,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:05,006 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:05,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:07,264 INFO L85 PathProgramCache]: Analyzing trace with hash 90402983, now seen corresponding path program 2 times [2024-05-06 04:29:07,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:07,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:07,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:07,461 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:07,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:07,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:07,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:07,625 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:07,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:09,967 INFO L85 PathProgramCache]: Analyzing trace with hash 557105874, now seen corresponding path program 2 times [2024-05-06 04:29:09,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:09,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:09,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:10,103 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:10,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:10,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:10,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:10,291 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:10,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:12,594 INFO L85 PathProgramCache]: Analyzing trace with hash 1680539556, now seen corresponding path program 21 times [2024-05-06 04:29:12,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:12,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:12,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:12,728 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:12,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:12,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:12,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:12,861 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:12,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:15,197 INFO L85 PathProgramCache]: Analyzing trace with hash 368611134, now seen corresponding path program 22 times [2024-05-06 04:29:15,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:15,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:15,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:15,329 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:15,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:15,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:15,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:15,459 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:15,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:17,761 INFO L85 PathProgramCache]: Analyzing trace with hash 1120269442, now seen corresponding path program 23 times [2024-05-06 04:29:17,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:17,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:17,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:17,949 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:17,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:17,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:17,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:18,078 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 3 proven. 19 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 04:29:18,215 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:18,840 INFO L85 PathProgramCache]: Analyzing trace with hash -1821763982, now seen corresponding path program 24 times [2024-05-06 04:29:18,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:18,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:18,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:18,976 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 7 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:29:18,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:18,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:18,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:19,177 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 7 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:29:19,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:20,028 INFO L85 PathProgramCache]: Analyzing trace with hash -1305692466, now seen corresponding path program 25 times [2024-05-06 04:29:20,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:20,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:20,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:20,181 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:29:20,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:20,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:20,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:20,311 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:29:20,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:22,738 INFO L85 PathProgramCache]: Analyzing trace with hash -1566139631, now seen corresponding path program 26 times [2024-05-06 04:29:22,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:22,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:22,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:22,867 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 5 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:29:22,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:22,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:22,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:22,995 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 5 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:29:24,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:26,541 INFO L85 PathProgramCache]: Analyzing trace with hash 524258551, now seen corresponding path program 1 times [2024-05-06 04:29:26,541 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:26,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:26,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:26,761 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:29:26,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:26,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:26,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:26,916 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:29:27,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:29,243 INFO L85 PathProgramCache]: Analyzing trace with hash 713540306, now seen corresponding path program 2 times [2024-05-06 04:29:29,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:29,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:29,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:29,490 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:29:29,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:29,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:29,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:29,627 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:29:29,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:30,646 INFO L85 PathProgramCache]: Analyzing trace with hash -2059379054, now seen corresponding path program 3 times [2024-05-06 04:29:30,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:30,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:30,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:30,816 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:29:30,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:30,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:30,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:31,038 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:29:31,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:31,944 INFO L85 PathProgramCache]: Analyzing trace with hash 1535899854, now seen corresponding path program 4 times [2024-05-06 04:29:31,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:31,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:31,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:32,122 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:29:32,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:32,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:32,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:32,353 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:29:32,467 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:34,602 INFO L85 PathProgramCache]: Analyzing trace with hash 1856372188, now seen corresponding path program 5 times [2024-05-06 04:29:34,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:34,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:34,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:34,762 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:29:34,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:34,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:34,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:34,963 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:29:35,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:37,275 INFO L85 PathProgramCache]: Analyzing trace with hash 1571318481, now seen corresponding path program 6 times [2024-05-06 04:29:37,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:37,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:37,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:37,444 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:29:37,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:37,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:37,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:37,698 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:29:37,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:39,949 INFO L85 PathProgramCache]: Analyzing trace with hash 126108527, now seen corresponding path program 7 times [2024-05-06 04:29:39,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:39,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:39,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:40,129 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:29:40,129 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:40,129 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:40,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:40,340 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:29:40,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:42,501 INFO L85 PathProgramCache]: Analyzing trace with hash -771392293, now seen corresponding path program 8 times [2024-05-06 04:29:42,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:42,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:42,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:42,661 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:29:42,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:42,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:42,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:42,819 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:29:43,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:45,134 INFO L85 PathProgramCache]: Analyzing trace with hash -1685623243, now seen corresponding path program 9 times [2024-05-06 04:29:45,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:45,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:45,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:45,329 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:29:45,329 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:45,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:45,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:45,506 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:29:45,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:47,773 INFO L85 PathProgramCache]: Analyzing trace with hash 1032376459, now seen corresponding path program 10 times [2024-05-06 04:29:47,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:47,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:47,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:47,958 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:29:47,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:47,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:47,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:48,152 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:29:48,249 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:50,369 INFO L85 PathProgramCache]: Analyzing trace with hash 390769983, now seen corresponding path program 11 times [2024-05-06 04:29:50,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:50,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:50,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:50,527 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:29:50,528 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:50,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:50,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:50,734 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:29:50,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:52,983 INFO L85 PathProgramCache]: Analyzing trace with hash -2108201489, now seen corresponding path program 1 times [2024-05-06 04:29:52,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:52,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:53,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:53,183 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:29:53,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:53,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:53,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:53,358 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:29:53,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:55,563 INFO L85 PathProgramCache]: Analyzing trace with hash -384112111, now seen corresponding path program 2 times [2024-05-06 04:29:55,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:55,563 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:55,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:55,778 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-06 04:29:55,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:55,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:55,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:55,962 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-06 04:29:56,072 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:58,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1665129095, now seen corresponding path program 3 times [2024-05-06 04:29:58,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:58,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:58,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:58,354 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:29:58,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:58,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:58,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:58,526 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:29:58,758 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:29:59,639 INFO L85 PathProgramCache]: Analyzing trace with hash -1567920047, now seen corresponding path program 1 times [2024-05-06 04:29:59,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:59,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:59,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:29:59,843 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:29:59,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:29:59,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:29:59,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:00,020 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:30:00,122 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:02,217 INFO L85 PathProgramCache]: Analyzing trace with hash 636448239, now seen corresponding path program 2 times [2024-05-06 04:30:02,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:02,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:02,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:02,420 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:30:02,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:02,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:02,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:02,608 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:30:02,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:04,772 INFO L85 PathProgramCache]: Analyzing trace with hash 1885954651, now seen corresponding path program 3 times [2024-05-06 04:30:04,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:04,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:04,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:04,965 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:30:04,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:04,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:04,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:05,130 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:30:05,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:07,420 INFO L85 PathProgramCache]: Analyzing trace with hash -1721655631, now seen corresponding path program 1 times [2024-05-06 04:30:07,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:07,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:07,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:07,646 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:30:07,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:07,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:07,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:07,816 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:30:07,918 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:08,009 INFO L85 PathProgramCache]: Analyzing trace with hash 1303866255, now seen corresponding path program 2 times [2024-05-06 04:30:08,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:08,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:08,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:08,223 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:30:08,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:08,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:08,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:08,409 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:30:08,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:10,630 INFO L85 PathProgramCache]: Analyzing trace with hash -770438981, now seen corresponding path program 3 times [2024-05-06 04:30:10,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:10,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:10,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:10,790 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:30:10,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:10,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:10,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:10,949 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:30:11,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:13,318 INFO L85 PathProgramCache]: Analyzing trace with hash 2103785428, now seen corresponding path program 1 times [2024-05-06 04:30:13,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:13,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:13,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:13,496 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:30:13,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:13,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:13,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:13,770 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:30:13,883 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:14,556 INFO L85 PathProgramCache]: Analyzing trace with hash -2017826356, now seen corresponding path program 2 times [2024-05-06 04:30:14,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:14,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:14,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:14,737 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:30:14,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:14,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:14,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:14,948 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:30:15,066 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:17,179 INFO L85 PathProgramCache]: Analyzing trace with hash 390799774, now seen corresponding path program 3 times [2024-05-06 04:30:17,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:17,180 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:17,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:17,335 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:30:17,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:17,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:17,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:17,522 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:30:17,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:19,849 INFO L85 PathProgramCache]: Analyzing trace with hash 1901167060, now seen corresponding path program 12 times [2024-05-06 04:30:19,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:19,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:19,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:20,097 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:30:20,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:20,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:20,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:20,263 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:30:20,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:22,492 INFO L85 PathProgramCache]: Analyzing trace with hash 2013355980, now seen corresponding path program 13 times [2024-05-06 04:30:22,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:22,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:22,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:22,700 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:30:22,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:22,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:22,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:22,875 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:30:22,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:25,103 INFO L85 PathProgramCache]: Analyzing trace with hash -1372853346, now seen corresponding path program 14 times [2024-05-06 04:30:25,103 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:25,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:25,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:25,317 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:30:25,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:25,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:25,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:25,473 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:30:25,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:27,819 INFO L85 PathProgramCache]: Analyzing trace with hash -1359808154, now seen corresponding path program 15 times [2024-05-06 04:30:27,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:27,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:27,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:27,961 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2024-05-06 04:30:27,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:27,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:27,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:28,167 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 79 trivial. 0 not checked. [2024-05-06 04:30:28,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:30,377 INFO L85 PathProgramCache]: Analyzing trace with hash 2034345275, now seen corresponding path program 16 times [2024-05-06 04:30:30,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:30,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:30,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:30,515 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:30:30,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:30,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:30,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:30,705 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-05-06 04:30:30,924 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:33,071 INFO L85 PathProgramCache]: Analyzing trace with hash -2142407014, now seen corresponding path program 17 times [2024-05-06 04:30:33,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:33,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:33,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:33,283 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:30:33,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:33,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:33,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:33,441 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:30:33,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:35,683 INFO L85 PathProgramCache]: Analyzing trace with hash -1307238331, now seen corresponding path program 18 times [2024-05-06 04:30:35,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:35,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:35,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:35,861 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:30:35,861 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:35,861 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:35,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:36,016 INFO L134 CoverageAnalysis]: Checked inductivity of 112 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2024-05-06 04:30:36,104 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:38,212 INFO L85 PathProgramCache]: Analyzing trace with hash 758360805, now seen corresponding path program 19 times [2024-05-06 04:30:38,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:38,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:38,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:38,427 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:30:38,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:38,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:38,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:38,565 INFO L134 CoverageAnalysis]: Checked inductivity of 108 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-05-06 04:30:38,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:40,901 INFO L85 PathProgramCache]: Analyzing trace with hash -1747749584, now seen corresponding path program 20 times [2024-05-06 04:30:40,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:40,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:40,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:41,128 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:30:41,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:41,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:41,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:41,278 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:30:41,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:43,498 INFO L85 PathProgramCache]: Analyzing trace with hash -161621541, now seen corresponding path program 21 times [2024-05-06 04:30:43,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:43,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:43,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:43,666 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:30:43,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:43,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:43,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:43,865 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2024-05-06 04:30:43,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:44,979 INFO L85 PathProgramCache]: Analyzing trace with hash 24463386, now seen corresponding path program 22 times [2024-05-06 04:30:44,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:44,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:45,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:45,123 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-05-06 04:30:45,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:45,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:45,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:45,271 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-05-06 04:30:45,484 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:47,583 INFO L85 PathProgramCache]: Analyzing trace with hash 1019459099, now seen corresponding path program 23 times [2024-05-06 04:30:47,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:47,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:47,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:47,747 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-05-06 04:30:47,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:47,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:47,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:47,896 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-05-06 04:30:48,009 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:50,130 INFO L85 PathProgramCache]: Analyzing trace with hash -120502202, now seen corresponding path program 24 times [2024-05-06 04:30:50,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:50,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:50,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:50,314 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-05-06 04:30:50,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:50,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:50,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:50,457 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 28 proven. 12 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-05-06 04:30:50,746 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:52,864 INFO L85 PathProgramCache]: Analyzing trace with hash -1097930200, now seen corresponding path program 25 times [2024-05-06 04:30:52,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:52,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:52,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:53,053 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:30:53,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:53,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:53,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:53,201 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:30:53,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:55,447 INFO L85 PathProgramCache]: Analyzing trace with hash -1194776461, now seen corresponding path program 26 times [2024-05-06 04:30:55,447 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:55,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:55,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:55,574 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 19 proven. 12 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:30:55,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:55,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:55,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:55,744 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 19 proven. 12 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-05-06 04:30:55,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:56,783 INFO L85 PathProgramCache]: Analyzing trace with hash -398730358, now seen corresponding path program 27 times [2024-05-06 04:30:56,783 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:56,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:56,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:56,917 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:30:56,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:56,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:56,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:57,052 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 6 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:30:57,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:30:59,289 INFO L85 PathProgramCache]: Analyzing trace with hash 402779830, now seen corresponding path program 28 times [2024-05-06 04:30:59,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:59,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:59,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:59,460 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 5 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:30:59,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:30:59,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:30:59,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:30:59,594 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 5 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:30:59,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:01,890 INFO L85 PathProgramCache]: Analyzing trace with hash 1121371689, now seen corresponding path program 29 times [2024-05-06 04:31:01,890 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:01,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:01,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:02,062 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:31:02,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:02,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:02,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:02,195 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:31:02,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:04,908 INFO L85 PathProgramCache]: Analyzing trace with hash 461496505, now seen corresponding path program 30 times [2024-05-06 04:31:04,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:04,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:04,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:31:04,937 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:31:04,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:31:05,108 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:07,301 INFO L85 PathProgramCache]: Analyzing trace with hash -1885259543, now seen corresponding path program 31 times [2024-05-06 04:31:07,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:07,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:07,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:07,483 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:07,484 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:07,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:07,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:07,630 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 4 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:07,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:09,876 INFO L85 PathProgramCache]: Analyzing trace with hash 1379939708, now seen corresponding path program 32 times [2024-05-06 04:31:09,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:09,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:09,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:10,023 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 11 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:10,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:10,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:10,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:10,203 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 11 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:10,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:10,477 INFO L85 PathProgramCache]: Analyzing trace with hash 1014345505, now seen corresponding path program 33 times [2024-05-06 04:31:10,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:10,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:10,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:10,610 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 10 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:10,610 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:10,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:10,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:10,744 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 10 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:10,881 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:13,062 INFO L85 PathProgramCache]: Analyzing trace with hash 1418194143, now seen corresponding path program 34 times [2024-05-06 04:31:13,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:13,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:13,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:13,201 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:13,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:13,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:13,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:13,339 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 9 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:13,446 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:15,590 INFO L85 PathProgramCache]: Analyzing trace with hash -170587521, now seen corresponding path program 4 times [2024-05-06 04:31:15,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:15,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:15,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:15,763 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:15,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:15,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:15,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:15,897 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:15,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:18,131 INFO L85 PathProgramCache]: Analyzing trace with hash 1379970491, now seen corresponding path program 4 times [2024-05-06 04:31:18,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:18,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:18,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:18,267 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:18,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:18,267 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:18,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:18,501 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:18,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:20,739 INFO L85 PathProgramCache]: Analyzing trace with hash 1014346497, now seen corresponding path program 4 times [2024-05-06 04:31:20,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:20,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:20,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:20,877 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:20,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:20,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:20,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:21,012 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:21,109 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:23,253 INFO L85 PathProgramCache]: Analyzing trace with hash 1418194174, now seen corresponding path program 4 times [2024-05-06 04:31:23,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:23,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:23,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:23,449 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:23,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:23,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:23,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:23,590 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:23,688 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:25,817 INFO L85 PathProgramCache]: Analyzing trace with hash -92799132, now seen corresponding path program 35 times [2024-05-06 04:31:25,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:25,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:25,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:25,964 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:25,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:25,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:26,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:26,144 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 8 proven. 20 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 04:31:26,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:28,415 INFO L85 PathProgramCache]: Analyzing trace with hash -60814834, now seen corresponding path program 36 times [2024-05-06 04:31:28,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:28,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:28,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:28,555 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 3 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:28,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:28,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:28,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:28,803 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 3 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:28,920 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:29,518 INFO L85 PathProgramCache]: Analyzing trace with hash -140509110, now seen corresponding path program 37 times [2024-05-06 04:31:29,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:29,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:29,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:29,649 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 3 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:29,650 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:29,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:29,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:29,781 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 3 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:29,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:32,064 INFO L85 PathProgramCache]: Analyzing trace with hash -1112911217, now seen corresponding path program 38 times [2024-05-06 04:31:32,064 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:32,064 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:32,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:32,242 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 3 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:32,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:32,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:32,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:32,378 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 3 proven. 20 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:32,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:34,619 INFO L85 PathProgramCache]: Analyzing trace with hash -174447700, now seen corresponding path program 39 times [2024-05-06 04:31:34,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:34,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:34,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:34,721 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:34,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:34,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:34,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:34,862 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:34,957 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:37,106 INFO L85 PathProgramCache]: Analyzing trace with hash -1945289999, now seen corresponding path program 40 times [2024-05-06 04:31:37,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:37,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:37,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:37,211 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:37,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:37,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:37,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:37,315 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:37,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:39,569 INFO L85 PathProgramCache]: Analyzing trace with hash -1863866609, now seen corresponding path program 41 times [2024-05-06 04:31:39,570 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:39,570 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:39,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:39,711 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:39,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:39,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:39,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:39,815 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:39,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:40,606 INFO L85 PathProgramCache]: Analyzing trace with hash -1111956913, now seen corresponding path program 5 times [2024-05-06 04:31:40,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:40,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:40,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:40,711 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:40,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:40,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:40,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:40,817 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:40,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:43,084 INFO L85 PathProgramCache]: Analyzing trace with hash -174416917, now seen corresponding path program 5 times [2024-05-06 04:31:43,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:43,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:43,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:43,183 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:43,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:43,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:43,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:43,282 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:43,378 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:45,490 INFO L85 PathProgramCache]: Analyzing trace with hash -1945289007, now seen corresponding path program 5 times [2024-05-06 04:31:45,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:45,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:45,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:45,589 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:45,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:45,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:45,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:45,730 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:45,847 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:46,671 INFO L85 PathProgramCache]: Analyzing trace with hash -1863866578, now seen corresponding path program 5 times [2024-05-06 04:31:46,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:46,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:46,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:46,770 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:46,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:46,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:46,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:46,869 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:46,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:48,400 INFO L85 PathProgramCache]: Analyzing trace with hash -752861388, now seen corresponding path program 42 times [2024-05-06 04:31:48,401 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:48,401 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:48,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:48,538 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:48,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:48,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:48,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:48,637 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-05-06 04:31:48,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:50,920 INFO L85 PathProgramCache]: Analyzing trace with hash 14889944, now seen corresponding path program 43 times [2024-05-06 04:31:50,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:50,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:50,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:31:50,953 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:31:50,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:31:51,122 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:53,300 INFO L85 PathProgramCache]: Analyzing trace with hash 277578906, now seen corresponding path program 44 times [2024-05-06 04:31:53,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:53,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:53,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:31:53,390 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:31:53,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:31:53,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:55,717 INFO L85 PathProgramCache]: Analyzing trace with hash 840243033, now seen corresponding path program 45 times [2024-05-06 04:31:55,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:55,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:55,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:31:55,743 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 04:31:55,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 04:31:56,103 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:31:58,310 INFO L85 PathProgramCache]: Analyzing trace with hash -2048449594, now seen corresponding path program 1 times [2024-05-06 04:31:58,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:58,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:58,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:58,486 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:58,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:31:58,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:31:58,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:31:58,681 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 9 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:31:58,810 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:00,970 INFO L85 PathProgramCache]: Analyzing trace with hash 853105185, now seen corresponding path program 2 times [2024-05-06 04:32:00,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:00,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:00,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:01,137 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:01,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:01,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:01,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:01,266 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:01,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:03,487 INFO L85 PathProgramCache]: Analyzing trace with hash -1899795974, now seen corresponding path program 3 times [2024-05-06 04:32:03,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:03,488 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:03,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:03,624 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:03,624 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:03,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:03,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:03,797 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 10 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:03,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:06,067 INFO L85 PathProgramCache]: Analyzing trace with hash 56460626, now seen corresponding path program 4 times [2024-05-06 04:32:06,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:06,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:06,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:06,225 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 12 proven. 27 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:06,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:06,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:06,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:06,414 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 12 proven. 27 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:06,517 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:08,690 INFO L85 PathProgramCache]: Analyzing trace with hash 278916171, now seen corresponding path program 5 times [2024-05-06 04:32:08,691 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:08,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:08,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:08,836 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:08,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:08,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:08,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:09,011 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 18 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:09,114 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:09,812 INFO L85 PathProgramCache]: Analyzing trace with hash 2087207536, now seen corresponding path program 6 times [2024-05-06 04:32:09,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:09,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:09,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:09,957 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:09,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:09,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:09,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:10,131 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 16 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:10,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:12,380 INFO L85 PathProgramCache]: Analyzing trace with hash 1591350280, now seen corresponding path program 7 times [2024-05-06 04:32:12,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:12,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:12,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:12,533 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 14 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:12,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:12,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:12,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:12,707 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 14 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:12,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:14,930 INFO L85 PathProgramCache]: Analyzing trace with hash 86044050, now seen corresponding path program 1 times [2024-05-06 04:32:14,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:14,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:14,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:15,077 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:15,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:15,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:15,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:15,256 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:15,350 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:17,470 INFO L85 PathProgramCache]: Analyzing trace with hash 279870444, now seen corresponding path program 1 times [2024-05-06 04:32:17,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:17,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:17,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:17,614 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:17,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:17,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:17,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:17,795 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:17,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:20,003 INFO L85 PathProgramCache]: Analyzing trace with hash 2087238288, now seen corresponding path program 1 times [2024-05-06 04:32:20,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:20,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:20,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:20,147 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:20,147 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:20,147 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:20,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:20,316 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:20,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:22,584 INFO L85 PathProgramCache]: Analyzing trace with hash 1591351241, now seen corresponding path program 1 times [2024-05-06 04:32:22,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:22,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:22,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:22,720 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:22,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:22,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:22,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:22,888 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:22,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:25,156 INFO L85 PathProgramCache]: Analyzing trace with hash 882618317, now seen corresponding path program 8 times [2024-05-06 04:32:25,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:25,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:25,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:25,293 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:25,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:25,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:25,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:25,466 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 12 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:25,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:27,749 INFO L85 PathProgramCache]: Analyzing trace with hash -199831001, now seen corresponding path program 9 times [2024-05-06 04:32:27,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:27,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:27,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:27,879 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:27,879 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:27,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:27,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:28,038 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 5 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:28,141 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:30,303 INFO L85 PathProgramCache]: Analyzing trace with hash -976277383, now seen corresponding path program 10 times [2024-05-06 04:32:30,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:30,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:30,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:30,501 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:30,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:30,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:30,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:30,663 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 19 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:30,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:33,045 INFO L85 PathProgramCache]: Analyzing trace with hash 2012131035, now seen corresponding path program 11 times [2024-05-06 04:32:33,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:33,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:33,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:33,177 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:33,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:33,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:33,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:33,336 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 6 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:33,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:34,158 INFO L85 PathProgramCache]: Analyzing trace with hash 1173286213, now seen corresponding path program 12 times [2024-05-06 04:32:34,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:34,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:34,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:34,312 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:34,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:34,312 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:34,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:34,441 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:34,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:36,792 INFO L85 PathProgramCache]: Analyzing trace with hash 1561868730, now seen corresponding path program 13 times [2024-05-06 04:32:36,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:36,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:36,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:36,955 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:36,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:36,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:36,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:37,091 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 4 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 04:32:38,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:40,635 INFO L85 PathProgramCache]: Analyzing trace with hash 47623072, now seen corresponding path program 1 times [2024-05-06 04:32:40,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:40,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:40,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:40,772 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:32:40,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:40,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:40,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:40,949 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 9 proven. 18 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2024-05-06 04:32:41,102 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:43,198 INFO L85 PathProgramCache]: Analyzing trace with hash 447571195, now seen corresponding path program 2 times [2024-05-06 04:32:43,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:43,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:43,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:43,344 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:32:43,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:43,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:43,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:43,562 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 1 proven. 19 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-05-06 04:32:43,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:43,839 INFO L85 PathProgramCache]: Analyzing trace with hash -835438981, now seen corresponding path program 3 times [2024-05-06 04:32:43,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:43,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:43,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:44,052 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:32:44,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:44,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:44,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:44,238 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:32:44,323 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:46,432 INFO L85 PathProgramCache]: Analyzing trace with hash 2027026181, now seen corresponding path program 4 times [2024-05-06 04:32:46,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:46,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:46,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:46,657 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:32:46,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:46,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:46,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:46,873 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:32:46,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:49,104 INFO L85 PathProgramCache]: Analyzing trace with hash 1010955525, now seen corresponding path program 5 times [2024-05-06 04:32:49,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:49,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:49,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:49,263 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:32:49,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:49,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:49,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:49,456 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 40 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:32:49,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:51,790 INFO L85 PathProgramCache]: Analyzing trace with hash -1437240888, now seen corresponding path program 6 times [2024-05-06 04:32:51,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:51,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:51,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:51,990 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:32:51,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:51,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:52,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:52,159 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:32:52,285 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:54,414 INFO L85 PathProgramCache]: Analyzing trace with hash 419045976, now seen corresponding path program 7 times [2024-05-06 04:32:54,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:54,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:54,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:54,595 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:32:54,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:54,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:54,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:54,800 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:32:54,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:57,032 INFO L85 PathProgramCache]: Analyzing trace with hash -521569134, now seen corresponding path program 8 times [2024-05-06 04:32:57,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:57,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:57,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:57,220 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:32:57,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:57,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:57,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:32:57,380 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 38 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:32:57,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:32:59,829 INFO L85 PathProgramCache]: Analyzing trace with hash 1681009758, now seen corresponding path program 9 times [2024-05-06 04:32:59,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:32:59,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:32:59,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:00,006 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:33:00,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:00,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:00,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:00,233 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:33:00,338 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:02,448 INFO L85 PathProgramCache]: Analyzing trace with hash 903278722, now seen corresponding path program 10 times [2024-05-06 04:33:02,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:02,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:02,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:02,693 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:33:02,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:02,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:02,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:02,871 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:33:02,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:05,111 INFO L85 PathProgramCache]: Analyzing trace with hash 1922849448, now seen corresponding path program 11 times [2024-05-06 04:33:05,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:05,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:05,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:05,292 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:05,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:05,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:05,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:05,478 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:05,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:05,752 INFO L85 PathProgramCache]: Analyzing trace with hash 1474202406, now seen corresponding path program 1 times [2024-05-06 04:33:05,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:05,752 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:05,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:05,957 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:33:05,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:05,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:05,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:06,128 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-05-06 04:33:06,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:08,299 INFO L85 PathProgramCache]: Analyzing trace with hash 1955902138, now seen corresponding path program 2 times [2024-05-06 04:33:08,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:08,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:08,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:08,519 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-06 04:33:08,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:08,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:08,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:08,729 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2024-05-06 04:33:08,839 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:09,461 INFO L85 PathProgramCache]: Analyzing trace with hash -2103241872, now seen corresponding path program 3 times [2024-05-06 04:33:09,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:09,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:09,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:09,647 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:09,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:09,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:09,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:09,814 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:09,988 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:12,069 INFO L85 PathProgramCache]: Analyzing trace with hash -343979974, now seen corresponding path program 1 times [2024-05-06 04:33:12,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:12,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:12,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:12,238 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:33:12,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:12,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:12,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:12,432 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:33:12,520 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:14,611 INFO L85 PathProgramCache]: Analyzing trace with hash 1127574566, now seen corresponding path program 2 times [2024-05-06 04:33:14,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:14,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:14,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:14,812 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:33:14,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:14,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:14,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:15,007 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:33:15,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:17,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1040537988, now seen corresponding path program 3 times [2024-05-06 04:33:17,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:17,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:17,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:17,394 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:17,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:17,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:17,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:17,555 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:17,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:19,845 INFO L85 PathProgramCache]: Analyzing trace with hash -435247704, now seen corresponding path program 1 times [2024-05-06 04:33:19,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:19,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:19,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:20,034 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:33:20,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:20,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:20,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:20,256 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:33:20,356 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:22,452 INFO L85 PathProgramCache]: Analyzing trace with hash 1596803704, now seen corresponding path program 2 times [2024-05-06 04:33:22,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:22,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:22,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:22,683 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:33:22,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:22,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:22,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:22,892 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:33:22,981 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:25,069 INFO L85 PathProgramCache]: Analyzing trace with hash -520615822, now seen corresponding path program 3 times [2024-05-06 04:33:25,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:25,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:25,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:25,255 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:25,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:25,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:25,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:25,439 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:25,618 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:26,180 INFO L85 PathProgramCache]: Analyzing trace with hash 1175451133, now seen corresponding path program 1 times [2024-05-06 04:33:26,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:26,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:26,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:26,376 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:33:26,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:26,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:26,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:26,579 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-05-06 04:33:26,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:28,778 INFO L85 PathProgramCache]: Analyzing trace with hash -2146924093, now seen corresponding path program 2 times [2024-05-06 04:33:28,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:28,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:28,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:28,983 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:33:28,983 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:28,984 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:29,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:29,183 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 33 trivial. 0 not checked. [2024-05-06 04:33:29,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 [2024-05-06 04:33:31,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1922879239, now seen corresponding path program 3 times [2024-05-06 04:33:31,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:31,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:31,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:31,632 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:31,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 04:33:31,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 04:33:31,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 04:33:31,798 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 34 proven. 19 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-05-06 04:33:32,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 6 Received shutdown request... [2024-05-06 04:33:32,614 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:33:32,614 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:33:32,614 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2024-05-06 04:33:33,637 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-05-06 04:33:33,637 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2024-05-06 04:33:33,819 WARN L435 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forcibly destroying the process [2024-05-06 04:33:33,836 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 137 [2024-05-06 04:33:33,839 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable670,SelfDestructingSolverStorable550,SelfDestructingSolverStorable671,SelfDestructingSolverStorable306,SelfDestructingSolverStorable427,SelfDestructingSolverStorable548,SelfDestructingSolverStorable669,SelfDestructingSolverStorable307,SelfDestructingSolverStorable428,SelfDestructingSolverStorable549,SelfDestructingSolverStorable308,SelfDestructingSolverStorable429,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable423,SelfDestructingSolverStorable544,SelfDestructingSolverStorable665,SelfDestructingSolverStorable303,SelfDestructingSolverStorable424,SelfDestructingSolverStorable545,SelfDestructingSolverStorable666,SelfDestructingSolverStorable304,SelfDestructingSolverStorable425,SelfDestructingSolverStorable546,SelfDestructingSolverStorable667,SelfDestructingSolverStorable305,SelfDestructingSolverStorable426,SelfDestructingSolverStorable547,SelfDestructingSolverStorable668,SelfDestructingSolverStorable540,SelfDestructingSolverStorable661,SelfDestructingSolverStorable420,SelfDestructingSolverStorable541,SelfDestructingSolverStorable662,SelfDestructingSolverStorable300,SelfDestructingSolverStorable421,SelfDestructingSolverStorable542,SelfDestructingSolverStorable663,SelfDestructingSolverStorable301,SelfDestructingSolverStorable422,SelfDestructingSolverStorable543,SelfDestructingSolverStorable664,SelfDestructingSolverStorable660,SelfDestructingSolverStorable416,SelfDestructingSolverStorable537,SelfDestructingSolverStorable658,SelfDestructingSolverStorable417,SelfDestructingSolverStorable538,SelfDestructingSolverStorable659,SelfDestructingSolverStorable418,SelfDestructingSolverStorable539,SelfDestructingSolverStorable419,SelfDestructingSolverStorable412,SelfDestructingSolverStorable533,SelfDestructingSolverStorable654,SelfDestructingSolverStorable413,SelfDestructingSolverStorable534,SelfDestructingSolverStorable655,SelfDestructingSolverStorable414,SelfDestructingSolverStorable535,SelfDestructingSolverStorable656,SelfDestructingSolverStorable415,SelfDestructingSolverStorable536,SelfDestructingSolverStorable657,SelfDestructingSolverStorable650,SelfDestructingSolverStorable530,SelfDestructingSolverStorable651,SelfDestructingSolverStorable410,SelfDestructingSolverStorable531,SelfDestructingSolverStorable652,SelfDestructingSolverStorable411,SelfDestructingSolverStorable532,SelfDestructingSolverStorable653,SelfDestructingSolverStorable570,SelfDestructingSolverStorable450,SelfDestructingSolverStorable571,SelfDestructingSolverStorable330,SelfDestructingSolverStorable451,SelfDestructingSolverStorable572,SelfDestructingSolverStorable207,SelfDestructingSolverStorable328,SelfDestructingSolverStorable449,SelfDestructingSolverStorable208,SelfDestructingSolverStorable329,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable324,SelfDestructingSolverStorable445,SelfDestructingSolverStorable566,SelfDestructingSolverStorable204,SelfDestructingSolverStorable325,SelfDestructingSolverStorable446,SelfDestructingSolverStorable567,SelfDestructingSolverStorable205,SelfDestructingSolverStorable326,SelfDestructingSolverStorable447,SelfDestructingSolverStorable568,SelfDestructingSolverStorable206,SelfDestructingSolverStorable327,SelfDestructingSolverStorable448,SelfDestructingSolverStorable569,SelfDestructingSolverStorable320,SelfDestructingSolverStorable441,SelfDestructingSolverStorable562,SelfDestructingSolverStorable200,SelfDestructingSolverStorable321,SelfDestructingSolverStorable442,SelfDestructingSolverStorable563,SelfDestructingSolverStorable201,SelfDestructingSolverStorable322,SelfDestructingSolverStorable443,SelfDestructingSolverStorable564,SelfDestructingSolverStorable202,SelfDestructingSolverStorable323,SelfDestructingSolverStorable444,SelfDestructingSolverStorable565,SelfDestructingSolverStorable560,SelfDestructingSolverStorable440,SelfDestructingSolverStorable561,SelfDestructingSolverStorable317,SelfDestructingSolverStorable438,SelfDestructingSolverStorable559,SelfDestructingSolverStorable318,SelfDestructingSolverStorable439,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable434,SelfDestructingSolverStorable555,SelfDestructingSolverStorable314,SelfDestructingSolverStorable435,SelfDestructingSolverStorable556,SelfDestructingSolverStorable315,SelfDestructingSolverStorable436,SelfDestructingSolverStorable557,SelfDestructingSolverStorable316,SelfDestructingSolverStorable437,SelfDestructingSolverStorable558,SelfDestructingSolverStorable430,SelfDestructingSolverStorable551,SelfDestructingSolverStorable672,SelfDestructingSolverStorable310,SelfDestructingSolverStorable431,SelfDestructingSolverStorable552,SelfDestructingSolverStorable673,SelfDestructingSolverStorable311,SelfDestructingSolverStorable432,SelfDestructingSolverStorable553,SelfDestructingSolverStorable674,SelfDestructingSolverStorable312,SelfDestructingSolverStorable433,SelfDestructingSolverStorable554,SelfDestructingSolverStorable675,SelfDestructingSolverStorable508,SelfDestructingSolverStorable629,SelfDestructingSolverStorable509,SelfDestructingSolverStorable504,SelfDestructingSolverStorable625,SelfDestructingSolverStorable505,SelfDestructingSolverStorable626,SelfDestructingSolverStorable506,SelfDestructingSolverStorable627,SelfDestructingSolverStorable507,SelfDestructingSolverStorable628,SelfDestructingSolverStorable500,SelfDestructingSolverStorable621,SelfDestructingSolverStorable501,SelfDestructingSolverStorable622,SelfDestructingSolverStorable502,SelfDestructingSolverStorable623,SelfDestructingSolverStorable503,SelfDestructingSolverStorable624,SelfDestructingSolverStorable620,SelfDestructingSolverStorable618,SelfDestructingSolverStorable619,SelfDestructingSolverStorable614,SelfDestructingSolverStorable615,SelfDestructingSolverStorable616,SelfDestructingSolverStorable617,SelfDestructingSolverStorable610,SelfDestructingSolverStorable611,SelfDestructingSolverStorable612,SelfDestructingSolverStorable613,SelfDestructingSolverStorable409,SelfDestructingSolverStorable405,SelfDestructingSolverStorable526,SelfDestructingSolverStorable647,SelfDestructingSolverStorable406,SelfDestructingSolverStorable527,SelfDestructingSolverStorable648,SelfDestructingSolverStorable407,SelfDestructingSolverStorable528,SelfDestructingSolverStorable649,SelfDestructingSolverStorable408,SelfDestructingSolverStorable529,SelfDestructingSolverStorable401,SelfDestructingSolverStorable522,SelfDestructingSolverStorable643,SelfDestructingSolverStorable402,SelfDestructingSolverStorable523,SelfDestructingSolverStorable644,SelfDestructingSolverStorable403,SelfDestructingSolverStorable524,SelfDestructingSolverStorable645,SelfDestructingSolverStorable404,SelfDestructingSolverStorable525,SelfDestructingSolverStorable646,SelfDestructingSolverStorable640,SelfDestructingSolverStorable520,SelfDestructingSolverStorable641,SelfDestructingSolverStorable400,SelfDestructingSolverStorable521,SelfDestructingSolverStorable642,SelfDestructingSolverStorable519,SelfDestructingSolverStorable515,SelfDestructingSolverStorable636,SelfDestructingSolverStorable516,SelfDestructingSolverStorable637,SelfDestructingSolverStorable517,SelfDestructingSolverStorable638,SelfDestructingSolverStorable518,SelfDestructingSolverStorable639,SelfDestructingSolverStorable511,SelfDestructingSolverStorable632,SelfDestructingSolverStorable512,SelfDestructingSolverStorable633,SelfDestructingSolverStorable513,SelfDestructingSolverStorable634,SelfDestructingSolverStorable514,SelfDestructingSolverStorable635,SelfDestructingSolverStorable630,SelfDestructingSolverStorable510,SelfDestructingSolverStorable631,SelfDestructingSolverStorable607,SelfDestructingSolverStorable608,SelfDestructingSolverStorable609,SelfDestructingSolverStorable603,SelfDestructingSolverStorable604,SelfDestructingSolverStorable605,SelfDestructingSolverStorable606,SelfDestructingSolverStorable600,SelfDestructingSolverStorable601,SelfDestructingSolverStorable602,SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable98,SelfDestructingSolverStorable99,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable198,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable188,SelfDestructingSolverStorable189,SelfDestructingSolverStorable184,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable180,SelfDestructingSolverStorable181,SelfDestructingSolverStorable182,SelfDestructingSolverStorable183,SelfDestructingSolverStorable177,SelfDestructingSolverStorable298,SelfDestructingSolverStorable178,SelfDestructingSolverStorable299,SelfDestructingSolverStorable179,SelfDestructingSolverStorable199,SelfDestructingSolverStorable151,SelfDestructingSolverStorable272,SelfDestructingSolverStorable393,SelfDestructingSolverStorable152,SelfDestructingSolverStorable273,SelfDestructingSolverStorable394,SelfDestructingSolverStorable153,SelfDestructingSolverStorable274,SelfDestructingSolverStorable395,SelfDestructingSolverStorable154,SelfDestructingSolverStorable275,SelfDestructingSolverStorable396,SelfDestructingSolverStorable390,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable150,SelfDestructingSolverStorable271,SelfDestructingSolverStorable392,SelfDestructingSolverStorable148,SelfDestructingSolverStorable269,SelfDestructingSolverStorable149,SelfDestructingSolverStorable144,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable145,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable146,SelfDestructingSolverStorable267,SelfDestructingSolverStorable388,SelfDestructingSolverStorable147,SelfDestructingSolverStorable268,SelfDestructingSolverStorable389,SelfDestructingSolverStorable140,SelfDestructingSolverStorable261,SelfDestructingSolverStorable382,SelfDestructingSolverStorable141,SelfDestructingSolverStorable262,SelfDestructingSolverStorable383,SelfDestructingSolverStorable142,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable143,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable380,SelfDestructingSolverStorable260,SelfDestructingSolverStorable381,SelfDestructingSolverStorable137,SelfDestructingSolverStorable258,SelfDestructingSolverStorable379,SelfDestructingSolverStorable138,SelfDestructingSolverStorable259,SelfDestructingSolverStorable139,SelfDestructingSolverStorable133,SelfDestructingSolverStorable254,SelfDestructingSolverStorable375,SelfDestructingSolverStorable496,SelfDestructingSolverStorable134,SelfDestructingSolverStorable255,SelfDestructingSolverStorable376,SelfDestructingSolverStorable497,SelfDestructingSolverStorable135,SelfDestructingSolverStorable256,SelfDestructingSolverStorable377,SelfDestructingSolverStorable498,SelfDestructingSolverStorable136,SelfDestructingSolverStorable257,SelfDestructingSolverStorable378,SelfDestructingSolverStorable499,SelfDestructingSolverStorable173,SelfDestructingSolverStorable294,SelfDestructingSolverStorable174,SelfDestructingSolverStorable295,SelfDestructingSolverStorable175,SelfDestructingSolverStorable296,SelfDestructingSolverStorable176,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable170,SelfDestructingSolverStorable291,SelfDestructingSolverStorable171,SelfDestructingSolverStorable292,SelfDestructingSolverStorable172,SelfDestructingSolverStorable293,SelfDestructingSolverStorable166,SelfDestructingSolverStorable287,SelfDestructingSolverStorable167,SelfDestructingSolverStorable288,SelfDestructingSolverStorable168,SelfDestructingSolverStorable289,SelfDestructingSolverStorable169,SelfDestructingSolverStorable162,SelfDestructingSolverStorable283,SelfDestructingSolverStorable163,SelfDestructingSolverStorable284,SelfDestructingSolverStorable164,SelfDestructingSolverStorable285,SelfDestructingSolverStorable165,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable160,SelfDestructingSolverStorable281,SelfDestructingSolverStorable161,SelfDestructingSolverStorable282,SelfDestructingSolverStorable159,SelfDestructingSolverStorable155,SelfDestructingSolverStorable276,SelfDestructingSolverStorable397,SelfDestructingSolverStorable156,SelfDestructingSolverStorable277,SelfDestructingSolverStorable398,SelfDestructingSolverStorable157,SelfDestructingSolverStorable278,SelfDestructingSolverStorable399,SelfDestructingSolverStorable158,SelfDestructingSolverStorable279,SelfDestructingSolverStorable470,SelfDestructingSolverStorable591,SelfDestructingSolverStorable350,SelfDestructingSolverStorable471,SelfDestructingSolverStorable592,SelfDestructingSolverStorable230,SelfDestructingSolverStorable351,SelfDestructingSolverStorable472,SelfDestructingSolverStorable593,SelfDestructingSolverStorable110,SelfDestructingSolverStorable231,SelfDestructingSolverStorable352,SelfDestructingSolverStorable473,SelfDestructingSolverStorable594,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable590,SelfDestructingSolverStorable108,SelfDestructingSolverStorable229,SelfDestructingSolverStorable109,SelfDestructingSolverStorable76,SelfDestructingSolverStorable104,SelfDestructingSolverStorable225,SelfDestructingSolverStorable346,SelfDestructingSolverStorable467,SelfDestructingSolverStorable588,SelfDestructingSolverStorable77,SelfDestructingSolverStorable105,SelfDestructingSolverStorable226,SelfDestructingSolverStorable347,SelfDestructingSolverStorable468,SelfDestructingSolverStorable589,SelfDestructingSolverStorable78,SelfDestructingSolverStorable106,SelfDestructingSolverStorable227,SelfDestructingSolverStorable348,SelfDestructingSolverStorable469,SelfDestructingSolverStorable79,SelfDestructingSolverStorable107,SelfDestructingSolverStorable228,SelfDestructingSolverStorable349,SelfDestructingSolverStorable100,SelfDestructingSolverStorable221,SelfDestructingSolverStorable342,SelfDestructingSolverStorable463,SelfDestructingSolverStorable584,SelfDestructingSolverStorable101,SelfDestructingSolverStorable222,SelfDestructingSolverStorable343,SelfDestructingSolverStorable464,SelfDestructingSolverStorable585,SelfDestructingSolverStorable102,SelfDestructingSolverStorable223,SelfDestructingSolverStorable344,SelfDestructingSolverStorable465,SelfDestructingSolverStorable586,SelfDestructingSolverStorable103,SelfDestructingSolverStorable224,SelfDestructingSolverStorable345,SelfDestructingSolverStorable466,SelfDestructingSolverStorable587,SelfDestructingSolverStorable580,SelfDestructingSolverStorable80,SelfDestructingSolverStorable460,SelfDestructingSolverStorable581,SelfDestructingSolverStorable81,SelfDestructingSolverStorable340,SelfDestructingSolverStorable461,SelfDestructingSolverStorable582,SelfDestructingSolverStorable82,SelfDestructingSolverStorable220,SelfDestructingSolverStorable341,SelfDestructingSolverStorable462,SelfDestructingSolverStorable583,SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,SelfDestructingSolverStorable86,SelfDestructingSolverStorable218,SelfDestructingSolverStorable339,SelfDestructingSolverStorable219,SelfDestructingSolverStorable87,SelfDestructingSolverStorable214,SelfDestructingSolverStorable335,SelfDestructingSolverStorable456,SelfDestructingSolverStorable577,SelfDestructingSolverStorable88,SelfDestructingSolverStorable215,SelfDestructingSolverStorable336,SelfDestructingSolverStorable457,SelfDestructingSolverStorable578,SelfDestructingSolverStorable89,SelfDestructingSolverStorable216,SelfDestructingSolverStorable337,SelfDestructingSolverStorable458,SelfDestructingSolverStorable579,SelfDestructingSolverStorable217,SelfDestructingSolverStorable338,SelfDestructingSolverStorable459,SelfDestructingSolverStorable210,SelfDestructingSolverStorable331,SelfDestructingSolverStorable452,SelfDestructingSolverStorable573,SelfDestructingSolverStorable211,SelfDestructingSolverStorable332,SelfDestructingSolverStorable453,SelfDestructingSolverStorable574,SelfDestructingSolverStorable212,SelfDestructingSolverStorable333,SelfDestructingSolverStorable454,SelfDestructingSolverStorable575,SelfDestructingSolverStorable213,SelfDestructingSolverStorable334,SelfDestructingSolverStorable455,SelfDestructingSolverStorable576,SelfDestructingSolverStorable250,SelfDestructingSolverStorable371,SelfDestructingSolverStorable492,SelfDestructingSolverStorable130,SelfDestructingSolverStorable251,SelfDestructingSolverStorable372,SelfDestructingSolverStorable493,SelfDestructingSolverStorable131,SelfDestructingSolverStorable252,SelfDestructingSolverStorable373,SelfDestructingSolverStorable494,SelfDestructingSolverStorable132,SelfDestructingSolverStorable253,SelfDestructingSolverStorable374,SelfDestructingSolverStorable495,SelfDestructingSolverStorable490,SelfDestructingSolverStorable370,SelfDestructingSolverStorable491,SelfDestructingSolverStorable126,SelfDestructingSolverStorable247,SelfDestructingSolverStorable368,SelfDestructingSolverStorable489,SelfDestructingSolverStorable127,SelfDestructingSolverStorable248,SelfDestructingSolverStorable369,SelfDestructingSolverStorable128,SelfDestructingSolverStorable249,SelfDestructingSolverStorable129,SelfDestructingSolverStorable122,SelfDestructingSolverStorable243,SelfDestructingSolverStorable364,SelfDestructingSolverStorable485,SelfDestructingSolverStorable123,SelfDestructingSolverStorable244,SelfDestructingSolverStorable365,SelfDestructingSolverStorable486,SelfDestructingSolverStorable124,SelfDestructingSolverStorable245,SelfDestructingSolverStorable366,SelfDestructingSolverStorable487,SelfDestructingSolverStorable125,SelfDestructingSolverStorable246,SelfDestructingSolverStorable367,SelfDestructingSolverStorable488,SelfDestructingSolverStorable360,SelfDestructingSolverStorable481,SelfDestructingSolverStorable240,SelfDestructingSolverStorable361,SelfDestructingSolverStorable482,SelfDestructingSolverStorable120,SelfDestructingSolverStorable241,SelfDestructingSolverStorable362,SelfDestructingSolverStorable483,SelfDestructingSolverStorable121,SelfDestructingSolverStorable242,SelfDestructingSolverStorable363,SelfDestructingSolverStorable484,SelfDestructingSolverStorable480,SelfDestructingSolverStorable119,SelfDestructingSolverStorable115,SelfDestructingSolverStorable236,SelfDestructingSolverStorable357,SelfDestructingSolverStorable478,SelfDestructingSolverStorable599,SelfDestructingSolverStorable116,SelfDestructingSolverStorable237,SelfDestructingSolverStorable358,SelfDestructingSolverStorable479,SelfDestructingSolverStorable117,SelfDestructingSolverStorable238,SelfDestructingSolverStorable359,SelfDestructingSolverStorable118,SelfDestructingSolverStorable239,SelfDestructingSolverStorable111,SelfDestructingSolverStorable232,SelfDestructingSolverStorable353,SelfDestructingSolverStorable474,SelfDestructingSolverStorable595,SelfDestructingSolverStorable112,SelfDestructingSolverStorable233,SelfDestructingSolverStorable354,SelfDestructingSolverStorable475,SelfDestructingSolverStorable596,SelfDestructingSolverStorable113,SelfDestructingSolverStorable234,SelfDestructingSolverStorable355,SelfDestructingSolverStorable476,SelfDestructingSolverStorable597,SelfDestructingSolverStorable114,SelfDestructingSolverStorable235,SelfDestructingSolverStorable356,SelfDestructingSolverStorable477,SelfDestructingSolverStorable598 [2024-05-06 04:33:33,839 WARN L619 AbstractCegarLoop]: Verification canceled: while executing Executor. [2024-05-06 04:33:33,841 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (4 of 5 remaining) [2024-05-06 04:33:33,841 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-06 04:33:33,842 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-06 04:33:33,842 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-06 04:33:33,842 INFO L805 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-06 04:33:33,845 INFO L448 BasicCegarLoop]: Path program histogram: [115, 45, 26, 14, 13, 11, 10, 10, 10, 10, 10, 10, 5, 5, 5, 5, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-06 04:33:33,846 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: clock still running: ConditionalCommutativityCheckTime at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) at de.uni_freiburg.informatik.ultimate.util.statistics.StatisticsData.aggregateBenchmarkData(StatisticsData.java:60) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:418) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:302) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseConcurrentProgram(TraceAbstractionStarter.java:225) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:154) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) [2024-05-06 04:33:33,852 INFO L158 Benchmark]: Toolchain (without parser) took 823165.22ms. Allocated memory was 160.4MB in the beginning and 1.5GB in the end (delta: 1.4GB). Free memory was 91.5MB in the beginning and 323.5MB in the end (delta: -232.0MB). Peak memory consumption was 1.1GB. Max. memory is 8.0GB. [2024-05-06 04:33:33,853 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 160.4MB. Free memory is still 96.9MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-06 04:33:33,853 INFO L158 Benchmark]: CACSL2BoogieTranslator took 203.95ms. Allocated memory is still 160.4MB. Free memory was 91.2MB in the beginning and 78.5MB in the end (delta: 12.7MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2024-05-06 04:33:33,853 INFO L158 Benchmark]: Boogie Procedure Inliner took 84.98ms. Allocated memory was 160.4MB in the beginning and 275.8MB in the end (delta: 115.3MB). Free memory was 78.5MB in the beginning and 244.4MB in the end (delta: -165.9MB). Peak memory consumption was 8.0MB. Max. memory is 8.0GB. [2024-05-06 04:33:33,853 INFO L158 Benchmark]: Boogie Preprocessor took 34.39ms. Allocated memory is still 275.8MB. Free memory was 244.4MB in the beginning and 242.3MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-06 04:33:33,854 INFO L158 Benchmark]: RCFGBuilder took 758.73ms. Allocated memory is still 275.8MB. Free memory was 242.3MB in the beginning and 207.7MB in the end (delta: 34.6MB). Peak memory consumption was 34.6MB. Max. memory is 8.0GB. [2024-05-06 04:33:33,854 INFO L158 Benchmark]: TraceAbstraction took 822076.29ms. Allocated memory was 275.8MB in the beginning and 1.5GB in the end (delta: 1.3GB). Free memory was 206.7MB in the beginning and 323.5MB in the end (delta: -116.8MB). Peak memory consumption was 1.1GB. Max. memory is 8.0GB. [2024-05-06 04:33:33,855 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 160.4MB. Free memory is still 96.9MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 203.95ms. Allocated memory is still 160.4MB. Free memory was 91.2MB in the beginning and 78.5MB in the end (delta: 12.7MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 84.98ms. Allocated memory was 160.4MB in the beginning and 275.8MB in the end (delta: 115.3MB). Free memory was 78.5MB in the beginning and 244.4MB in the end (delta: -165.9MB). Peak memory consumption was 8.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 34.39ms. Allocated memory is still 275.8MB. Free memory was 244.4MB in the beginning and 242.3MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 758.73ms. Allocated memory is still 275.8MB. Free memory was 242.3MB in the beginning and 207.7MB in the end (delta: 34.6MB). Peak memory consumption was 34.6MB. Max. memory is 8.0GB. * TraceAbstraction took 822076.29ms. Allocated memory was 275.8MB in the beginning and 1.5GB in the end (delta: 1.3GB). Free memory was 206.7MB in the beginning and 323.5MB in the end (delta: -116.8MB). Peak memory consumption was 1.1GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 386021, independent: 368456, independent conditional: 366623, independent unconditional: 1833, dependent: 17565, dependent conditional: 17560, dependent unconditional: 5, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 369350, independent: 368456, independent conditional: 366623, independent unconditional: 1833, dependent: 894, dependent conditional: 889, dependent unconditional: 5, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 369350, independent: 368456, independent conditional: 366623, independent unconditional: 1833, dependent: 894, dependent conditional: 889, dependent unconditional: 5, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 369350, independent: 368456, independent conditional: 366623, independent unconditional: 1833, dependent: 894, dependent conditional: 889, dependent unconditional: 5, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 371722, independent: 368456, independent conditional: 171671, independent unconditional: 196785, dependent: 3266, dependent conditional: 2251, dependent unconditional: 1015, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 371722, independent: 368456, independent conditional: 63672, independent unconditional: 304784, dependent: 3266, dependent conditional: 784, dependent unconditional: 2482, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 371722, independent: 368456, independent conditional: 63672, independent unconditional: 304784, dependent: 3266, dependent conditional: 784, dependent unconditional: 2482, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1126, independent: 1120, independent conditional: 73, independent unconditional: 1047, dependent: 6, dependent conditional: 4, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1126, independent: 1116, independent conditional: 0, independent unconditional: 1116, dependent: 10, dependent conditional: 0, dependent unconditional: 10, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 10, independent: 4, independent conditional: 2, independent unconditional: 2, dependent: 6, dependent conditional: 4, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 10, independent: 4, independent conditional: 2, independent unconditional: 2, dependent: 6, dependent conditional: 4, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 78, independent: 18, independent conditional: 14, independent unconditional: 3, dependent: 60, dependent conditional: 10, dependent unconditional: 50, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 371722, independent: 367336, independent conditional: 63599, independent unconditional: 303737, dependent: 3260, dependent conditional: 780, dependent unconditional: 2480, unknown: 1126, unknown conditional: 77, unknown unconditional: 1049] , Statistics on independence cache: Total cache size (in pairs): 1126, Positive cache size: 1120, Positive conditional cache size: 73, Positive unconditional cache size: 1047, Negative cache size: 6, Negative conditional cache size: 4, Negative unconditional cache size: 2, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 109466, Maximal queried relation: 6, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 371722, independent: 368456, independent conditional: 171671, independent unconditional: 196785, dependent: 3266, dependent conditional: 2251, dependent unconditional: 1015, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 371722, independent: 368456, independent conditional: 63672, independent unconditional: 304784, dependent: 3266, dependent conditional: 784, dependent unconditional: 2482, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 371722, independent: 368456, independent conditional: 63672, independent unconditional: 304784, dependent: 3266, dependent conditional: 784, dependent unconditional: 2482, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1126, independent: 1120, independent conditional: 73, independent unconditional: 1047, dependent: 6, dependent conditional: 4, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1126, independent: 1116, independent conditional: 0, independent unconditional: 1116, dependent: 10, dependent conditional: 0, dependent unconditional: 10, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 10, independent: 4, independent conditional: 2, independent unconditional: 2, dependent: 6, dependent conditional: 4, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 10, independent: 4, independent conditional: 2, independent unconditional: 2, dependent: 6, dependent conditional: 4, dependent unconditional: 2, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 78, independent: 18, independent conditional: 14, independent unconditional: 3, dependent: 60, dependent conditional: 10, dependent unconditional: 50, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 371722, independent: 367336, independent conditional: 63599, independent unconditional: 303737, dependent: 3260, dependent conditional: 780, dependent unconditional: 2480, unknown: 1126, unknown conditional: 77, unknown unconditional: 1049] , Statistics on independence cache: Total cache size (in pairs): 1126, Positive cache size: 1120, Positive conditional cache size: 73, Positive unconditional cache size: 1047, Negative cache size: 6, Negative conditional cache size: 4, Negative unconditional cache size: 2, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 109466 ], Independence queries for same thread: 16671 - ExceptionOrErrorResult: AssertionError: clock still running: ConditionalCommutativityCheckTime de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: clock still running: ConditionalCommutativityCheckTime: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopStatisticsGenerator.getValue(CegarLoopStatisticsGenerator.java:172) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown