/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking RANDOM --traceabstraction.probability.for.random.criterion 20 --traceabstraction.seed.for.random.criterion 213 --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-07 10:21:52,449 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-07 10:21:52,536 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-07 10:21:52,542 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-07 10:21:52,543 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-07 10:21:52,566 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-07 10:21:52,566 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-07 10:21:52,567 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-07 10:21:52,567 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-07 10:21:52,570 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-07 10:21:52,570 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-07 10:21:52,570 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-07 10:21:52,571 INFO L153 SettingsManager]: * Use SBE=true [2024-05-07 10:21:52,572 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-07 10:21:52,572 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-07 10:21:52,573 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-07 10:21:52,573 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-07 10:21:52,573 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-07 10:21:52,573 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-07 10:21:52,573 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-07 10:21:52,573 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-07 10:21:52,574 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-07 10:21:52,574 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-07 10:21:52,574 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-07 10:21:52,574 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-07 10:21:52,574 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-07 10:21:52,574 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-07 10:21:52,574 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-07 10:21:52,574 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-07 10:21:52,575 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 10:21:52,576 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-07 10:21:52,576 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-07 10:21:52,576 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-07 10:21:52,576 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-07 10:21:52,576 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-07 10:21:52,576 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-07 10:21:52,576 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-07 10:21:52,576 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-07 10:21:52,576 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-07 10:21:52,577 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> RANDOM Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: probability for random criterion as percentage -> 20 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: seed for random criterion -> 213 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-07 10:21:52,795 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-07 10:21:52,829 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-07 10:21:52,831 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-07 10:21:52,832 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-07 10:21:52,833 INFO L274 PluginConnector]: CDTParser initialized [2024-05-07 10:21:52,833 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-07 10:21:53,885 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-07 10:21:54,044 INFO L384 CDTParser]: Found 1 translation units. [2024-05-07 10:21:54,044 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-07 10:21:54,051 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/f2fc5554c/805f87c773564e35a8948c5de0b540de/FLAG9fdde13f1 [2024-05-07 10:21:54,063 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/f2fc5554c/805f87c773564e35a8948c5de0b540de [2024-05-07 10:21:54,072 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-07 10:21:54,072 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-07 10:21:54,073 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-07 10:21:54,073 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-07 10:21:54,079 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-07 10:21:54,079 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,080 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8effb22 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54, skipping insertion in model container [2024-05-07 10:21:54,080 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,097 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-07 10:21:54,330 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-07 10:21:54,337 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 10:21:54,344 INFO L202 MainTranslator]: Completed pre-run [2024-05-07 10:21:54,366 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-07 10:21:54,370 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 10:21:54,375 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 10:21:54,375 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 10:21:54,380 INFO L206 MainTranslator]: Completed translation [2024-05-07 10:21:54,381 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54 WrapperNode [2024-05-07 10:21:54,381 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-07 10:21:54,382 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-07 10:21:54,382 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-07 10:21:54,382 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-07 10:21:54,387 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,392 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,430 INFO L138 Inliner]: procedures = 27, calls = 75, calls flagged for inlining = 9, calls inlined = 9, statements flattened = 178 [2024-05-07 10:21:54,430 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-07 10:21:54,430 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-07 10:21:54,431 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-07 10:21:54,431 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-07 10:21:54,440 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,441 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,454 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,454 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,460 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,463 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,465 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,466 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,478 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-07 10:21:54,485 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-07 10:21:54,485 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-07 10:21:54,485 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-07 10:21:54,486 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (1/1) ... [2024-05-07 10:21:54,490 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 10:21:54,505 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 10:21:54,516 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-07 10:21:54,518 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-07 10:21:54,559 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-07 10:21:54,559 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-07 10:21:54,559 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-07 10:21:54,559 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-07 10:21:54,559 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-07 10:21:54,559 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-07 10:21:54,559 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-07 10:21:54,559 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-07 10:21:54,559 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-07 10:21:54,560 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-07 10:21:54,560 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-07 10:21:54,560 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-07 10:21:54,560 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-07 10:21:54,560 INFO L130 BoogieDeclarations]: Found specification of procedure thread5 [2024-05-07 10:21:54,560 INFO L138 BoogieDeclarations]: Found implementation of procedure thread5 [2024-05-07 10:21:54,560 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-07 10:21:54,560 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-07 10:21:54,560 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-07 10:21:54,560 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-07 10:21:54,560 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-07 10:21:54,560 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-07 10:21:54,562 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-07 10:21:54,669 INFO L241 CfgBuilder]: Building ICFG [2024-05-07 10:21:54,672 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-07 10:21:54,995 INFO L282 CfgBuilder]: Performing block encoding [2024-05-07 10:21:55,066 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-07 10:21:55,066 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2024-05-07 10:21:55,067 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 10:21:55 BoogieIcfgContainer [2024-05-07 10:21:55,067 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-07 10:21:55,069 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-07 10:21:55,069 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-07 10:21:55,071 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-07 10:21:55,071 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.05 10:21:54" (1/3) ... [2024-05-07 10:21:55,072 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d1989a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 10:21:55, skipping insertion in model container [2024-05-07 10:21:55,072 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 10:21:54" (2/3) ... [2024-05-07 10:21:55,072 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d1989a3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 10:21:55, skipping insertion in model container [2024-05-07 10:21:55,072 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 10:21:55" (3/3) ... [2024-05-07 10:21:55,073 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-min-max-inc-dec.wvr.c [2024-05-07 10:21:55,080 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-07 10:21:55,088 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-07 10:21:55,088 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-07 10:21:55,088 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-07 10:21:55,153 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2024-05-07 10:21:55,197 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-07 10:21:55,198 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-07 10:21:55,198 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 10:21:55,200 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-07 10:21:55,210 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-07 10:21:55,236 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-07 10:21:55,244 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 10:21:55,246 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-07 10:21:55,252 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@46dd438f, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=RANDOM, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=20, mConComCheckerRandomSeed=213, mConComCheckerConditionCriterion=false [2024-05-07 10:21:55,252 INFO L358 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2024-05-07 10:21:55,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-07 10:21:55,737 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:21:55,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-07 10:21:55,770 INFO L85 PathProgramCache]: Analyzing trace with hash 285893693, now seen corresponding path program 1 times [2024-05-07 10:21:55,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:21:55,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:21:55,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:21:55,959 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-07 10:21:55,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:21:55,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:21:55,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:21:56,048 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-07 10:21:56,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-07 10:21:56,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-07 10:21:56,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-07 10:21:56,286 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:21:56,287 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-07 10:21:56,310 INFO L85 PathProgramCache]: Analyzing trace with hash 2002235462, now seen corresponding path program 1 times [2024-05-07 10:21:56,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:21:56,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:21:56,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:21:56,645 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:21:56,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:21:56,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:21:56,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:21:56,858 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:21:56,859 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-07 10:21:56,859 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-07 10:21:57,030 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:21:57,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:21:59,124 INFO L85 PathProgramCache]: Analyzing trace with hash -650050623, now seen corresponding path program 1 times [2024-05-07 10:21:59,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:21:59,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:21:59,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:21:59,351 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:21:59,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:21:59,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:21:59,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:21:59,604 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:21:59,715 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-07 10:21:59,722 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:21:59,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-07 10:21:59,750 INFO L85 PathProgramCache]: Analyzing trace with hash 379840377, now seen corresponding path program 1 times [2024-05-07 10:21:59,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:21:59,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:21:59,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:21:59,961 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:21:59,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:21:59,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:21:59,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:00,114 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:00,148 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:00,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:02,236 INFO L85 PathProgramCache]: Analyzing trace with hash -1109849604, now seen corresponding path program 2 times [2024-05-07 10:22:02,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:02,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:02,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:02,433 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:02,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:02,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:02,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:02,587 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:02,635 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:02,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:04,741 INFO L85 PathProgramCache]: Analyzing trace with hash 420989019, now seen corresponding path program 3 times [2024-05-07 10:22:04,742 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:04,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:04,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:04,905 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:04,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:04,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:04,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:05,092 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:05,125 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:05,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:07,205 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 4 times [2024-05-07 10:22:07,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:07,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:07,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:07,338 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:07,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:07,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:07,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:07,495 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:07,670 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-07 10:22:07,686 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:07,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-07 10:22:07,707 INFO L85 PathProgramCache]: Analyzing trace with hash -2126954911, now seen corresponding path program 1 times [2024-05-07 10:22:07,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:07,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:07,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:07,852 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:07,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:07,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:07,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:08,000 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:08,113 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-07 10:22:08,121 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:08,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-07 10:22:08,143 INFO L85 PathProgramCache]: Analyzing trace with hash -772248393, now seen corresponding path program 1 times [2024-05-07 10:22:08,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:08,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:08,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:08,275 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:08,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:08,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:08,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:08,485 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:08,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-07 10:22:08,648 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:08,648 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-07 10:22:08,665 INFO L85 PathProgramCache]: Analyzing trace with hash -909312713, now seen corresponding path program 1 times [2024-05-07 10:22:08,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:08,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:08,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:08,771 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:22:08,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:08,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:08,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:08,892 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:22:08,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:09,002 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:09,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:11,068 INFO L85 PathProgramCache]: Analyzing trace with hash -1998435377, now seen corresponding path program 2 times [2024-05-07 10:22:11,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:11,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:11,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:11,257 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:11,257 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:11,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:11,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:11,381 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:11,464 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 73 [2024-05-07 10:22:11,469 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:11,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 73 treesize of output 41 [2024-05-07 10:22:11,486 INFO L85 PathProgramCache]: Analyzing trace with hash -1930189280, now seen corresponding path program 3 times [2024-05-07 10:22:11,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:11,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:11,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:11,633 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:22:11,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:11,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:11,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:11,828 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:22:11,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-07 10:22:11,945 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:11,945 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-07 10:22:11,963 INFO L85 PathProgramCache]: Analyzing trace with hash 1366497760, now seen corresponding path program 4 times [2024-05-07 10:22:11,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:11,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:11,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:12,086 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:12,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:12,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:12,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:12,222 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:12,262 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:12,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:14,307 INFO L85 PathProgramCache]: Analyzing trace with hash 2048135304, now seen corresponding path program 1 times [2024-05-07 10:22:14,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:14,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:14,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:14,466 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:14,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:14,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:14,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:14,683 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:14,714 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:14,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:16,778 INFO L85 PathProgramCache]: Analyzing trace with hash 1693891199, now seen corresponding path program 2 times [2024-05-07 10:22:16,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:16,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:16,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:16,914 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:16,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:16,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:16,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:17,071 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:17,118 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:17,119 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:19,258 INFO L85 PathProgramCache]: Analyzing trace with hash -1780887674, now seen corresponding path program 1 times [2024-05-07 10:22:19,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:19,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:19,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:19,425 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:19,425 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:19,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:19,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:19,579 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:19,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:19,666 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:19,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:21,703 INFO L85 PathProgramCache]: Analyzing trace with hash 553937746, now seen corresponding path program 5 times [2024-05-07 10:22:21,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:21,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:21,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:21,826 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:21,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:21,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:21,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:21,941 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:21,985 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:21,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:24,061 INFO L85 PathProgramCache]: Analyzing trace with hash 1144543951, now seen corresponding path program 5 times [2024-05-07 10:22:24,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:24,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:24,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:24,253 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:22:24,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:24,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:24,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:24,358 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:22:24,427 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:24,427 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:26,499 INFO L85 PathProgramCache]: Analyzing trace with hash -867378392, now seen corresponding path program 1 times [2024-05-07 10:22:26,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:26,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:26,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:26,605 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:26,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:26,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:26,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:26,711 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:26,747 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:26,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:28,788 INFO L85 PathProgramCache]: Analyzing trace with hash -1023966416, now seen corresponding path program 2 times [2024-05-07 10:22:28,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:28,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:28,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:28,962 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:28,962 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:28,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:28,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:29,064 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:29,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-07 10:22:29,156 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:29,156 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-07 10:22:29,171 INFO L85 PathProgramCache]: Analyzing trace with hash 12512126, now seen corresponding path program 1 times [2024-05-07 10:22:29,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:29,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:29,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:29,269 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:29,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:29,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:29,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:29,361 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:29,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-07 10:22:29,456 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:29,456 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-07 10:22:29,472 INFO L85 PathProgramCache]: Analyzing trace with hash -1968185046, now seen corresponding path program 1 times [2024-05-07 10:22:29,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:29,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:29,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:29,578 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:29,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:29,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:29,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:29,731 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:29,940 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:29,945 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:29,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:30,016 INFO L85 PathProgramCache]: Analyzing trace with hash 1080130503, now seen corresponding path program 1 times [2024-05-07 10:22:30,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:30,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:30,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:30,126 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:30,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:30,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:30,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:30,232 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:30,304 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:30,309 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:30,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:32,342 INFO L85 PathProgramCache]: Analyzing trace with hash -2042412776, now seen corresponding path program 1 times [2024-05-07 10:22:32,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:32,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:32,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:32,525 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:32,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:32,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:32,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:32,630 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:32,661 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:32,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:34,716 INFO L85 PathProgramCache]: Analyzing trace with hash -439257014, now seen corresponding path program 1 times [2024-05-07 10:22:34,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:34,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:34,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:34,842 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:34,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:34,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:34,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:34,972 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:35,055 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:35,060 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:35,060 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:37,124 INFO L85 PathProgramCache]: Analyzing trace with hash 2037485482, now seen corresponding path program 1 times [2024-05-07 10:22:37,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:37,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:37,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:37,250 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:37,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:37,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:37,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:37,465 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:37,499 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:37,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:39,552 INFO L85 PathProgramCache]: Analyzing trace with hash -705234869, now seen corresponding path program 1 times [2024-05-07 10:22:39,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:39,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:39,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:39,701 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:39,701 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:39,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:39,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:39,823 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:39,900 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:39,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:22:41,981 INFO L85 PathProgramCache]: Analyzing trace with hash 1233864132, now seen corresponding path program 1 times [2024-05-07 10:22:41,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:41,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:41,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:42,082 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:42,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:42,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:42,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:42,180 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:42,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:42,423 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:42,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:42,557 INFO L85 PathProgramCache]: Analyzing trace with hash 1567673173, now seen corresponding path program 1 times [2024-05-07 10:22:42,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:42,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:42,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:42,641 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:22:42,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:42,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:42,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:42,724 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:22:42,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:42,799 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:42,799 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:44,823 INFO L85 PathProgramCache]: Analyzing trace with hash 2023418, now seen corresponding path program 2 times [2024-05-07 10:22:44,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:44,823 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:44,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:44,942 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:22:44,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:44,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:44,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:45,030 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:22:45,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:45,157 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:45,157 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:47,212 INFO L85 PathProgramCache]: Analyzing trace with hash -1266562707, now seen corresponding path program 1 times [2024-05-07 10:22:47,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:47,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:47,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:47,364 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:47,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:47,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:47,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:47,472 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:47,535 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:47,540 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:47,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:49,599 INFO L85 PathProgramCache]: Analyzing trace with hash 1725613700, now seen corresponding path program 2 times [2024-05-07 10:22:49,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:49,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:49,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:49,758 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:49,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:49,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:49,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:49,874 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:49,953 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-07 10:22:49,958 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:49,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-07 10:22:50,022 INFO L85 PathProgramCache]: Analyzing trace with hash 1067521783, now seen corresponding path program 1 times [2024-05-07 10:22:50,023 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:50,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:50,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:50,133 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:50,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:50,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:50,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:50,322 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:22:50,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-07 10:22:50,445 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:50,445 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-07 10:22:52,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1795969507, now seen corresponding path program 1 times [2024-05-07 10:22:52,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:52,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:52,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:52,617 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:52,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:52,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:52,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:52,722 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:52,829 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:22:52,834 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:52,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:22:52,863 INFO L85 PathProgramCache]: Analyzing trace with hash 1272248793, now seen corresponding path program 2 times [2024-05-07 10:22:52,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:52,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:52,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:52,960 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:52,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:52,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:52,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:53,057 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:53,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-07 10:22:53,137 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:53,138 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-07 10:22:55,186 INFO L85 PathProgramCache]: Analyzing trace with hash -650138170, now seen corresponding path program 3 times [2024-05-07 10:22:55,186 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:55,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:55,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:55,342 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:55,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:55,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:55,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:55,434 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:22:55,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-07 10:22:55,545 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:22:55,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-07 10:22:55,628 INFO L85 PathProgramCache]: Analyzing trace with hash -1186662221, now seen corresponding path program 4 times [2024-05-07 10:22:55,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:55,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:55,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:55,735 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:22:55,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:55,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:55,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:55,841 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:22:55,878 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:55,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:22:57,940 INFO L85 PathProgramCache]: Analyzing trace with hash -1948974476, now seen corresponding path program 1 times [2024-05-07 10:22:57,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:57,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:57,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:58,071 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:22:58,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:22:58,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:22:58,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:22:58,238 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:22:58,271 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:22:58,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:00,330 INFO L85 PathProgramCache]: Analyzing trace with hash 1764716819, now seen corresponding path program 1 times [2024-05-07 10:23:00,331 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:00,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:00,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:00,455 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:00,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:00,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:00,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:00,576 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:00,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:00,660 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:00,660 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:00,676 INFO L85 PathProgramCache]: Analyzing trace with hash -1669695034, now seen corresponding path program 1 times [2024-05-07 10:23:00,676 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:00,676 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:00,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:00,789 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:00,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:00,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:00,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:01,003 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:01,049 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:01,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:03,148 INFO L85 PathProgramCache]: Analyzing trace with hash 27003824, now seen corresponding path program 1 times [2024-05-07 10:23:03,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:03,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:03,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:03,323 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:03,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:03,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:03,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:03,466 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:03,551 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:03,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:05,632 INFO L85 PathProgramCache]: Analyzing trace with hash -1426313360, now seen corresponding path program 1 times [2024-05-07 10:23:05,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:05,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:05,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:05,747 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:05,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:05,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:05,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:05,879 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:05,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-07 10:23:05,979 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:05,980 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-07 10:23:06,032 INFO L85 PathProgramCache]: Analyzing trace with hash 44507385, now seen corresponding path program 1 times [2024-05-07 10:23:06,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:06,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:06,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:06,238 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:06,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:06,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:06,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:06,336 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:06,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-07 10:23:06,431 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:06,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-07 10:23:08,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1062993086, now seen corresponding path program 5 times [2024-05-07 10:23:08,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:08,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:08,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:08,824 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:08,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:08,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:08,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:08,924 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:08,992 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-07 10:23:08,997 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:08,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-07 10:23:09,057 INFO L85 PathProgramCache]: Analyzing trace with hash 2071519490, now seen corresponding path program 6 times [2024-05-07 10:23:09,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:09,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:09,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:09,165 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:09,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:09,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:09,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:09,319 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:09,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-07 10:23:09,415 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:09,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-07 10:23:09,721 INFO L85 PathProgramCache]: Analyzing trace with hash 430911193, now seen corresponding path program 7 times [2024-05-07 10:23:09,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:09,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:09,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:09,809 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:09,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:09,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:09,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:09,898 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:09,932 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:09,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:12,000 INFO L85 PathProgramCache]: Analyzing trace with hash -941905274, now seen corresponding path program 2 times [2024-05-07 10:23:12,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:12,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:12,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:12,102 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:12,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:12,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:12,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:12,199 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:12,271 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:12,276 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:12,276 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:12,340 INFO L85 PathProgramCache]: Analyzing trace with hash 16291591, now seen corresponding path program 8 times [2024-05-07 10:23:12,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:12,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:12,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:12,437 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:12,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:12,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:12,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:12,541 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:12,626 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:12,633 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:12,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:12,652 INFO L85 PathProgramCache]: Analyzing trace with hash 1058079106, now seen corresponding path program 9 times [2024-05-07 10:23:12,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:12,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:12,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:12,751 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:12,751 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:12,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:12,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:12,844 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:12,874 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:12,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:14,932 INFO L85 PathProgramCache]: Analyzing trace with hash 933420457, now seen corresponding path program 3 times [2024-05-07 10:23:14,932 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:14,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:14,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:15,030 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:15,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:15,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:15,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:15,183 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:15,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-07 10:23:15,284 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:15,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-07 10:23:17,316 INFO L85 PathProgramCache]: Analyzing trace with hash 2020888703, now seen corresponding path program 10 times [2024-05-07 10:23:17,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:17,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:17,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:17,434 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-07 10:23:17,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:17,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:17,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:17,545 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-07 10:23:17,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-07 10:23:17,650 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:17,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-07 10:23:19,680 INFO L85 PathProgramCache]: Analyzing trace with hash -1238779327, now seen corresponding path program 11 times [2024-05-07 10:23:19,681 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:19,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:19,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:19,792 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:19,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:19,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:19,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:19,902 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:20,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:20,033 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:20,034 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:20,051 INFO L85 PathProgramCache]: Analyzing trace with hash 513793030, now seen corresponding path program 1 times [2024-05-07 10:23:20,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:20,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:20,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:20,162 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:20,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:20,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:20,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:20,306 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:20,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:20,387 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:20,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:20,404 INFO L85 PathProgramCache]: Analyzing trace with hash 993080022, now seen corresponding path program 2 times [2024-05-07 10:23:20,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:20,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:20,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:20,502 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:20,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:20,502 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:20,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:20,600 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:20,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:20,682 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:20,682 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:20,698 INFO L85 PathProgramCache]: Analyzing trace with hash -1630533150, now seen corresponding path program 1 times [2024-05-07 10:23:20,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:20,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:20,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:20,851 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:20,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:20,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:20,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:20,948 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:20,979 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:20,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:23,040 INFO L85 PathProgramCache]: Analyzing trace with hash 247494632, now seen corresponding path program 2 times [2024-05-07 10:23:23,041 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:23,041 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:23,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:23,151 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:23,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:23,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:23,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:23,260 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:23,326 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:23,339 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:23,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:23,355 INFO L85 PathProgramCache]: Analyzing trace with hash 1471422808, now seen corresponding path program 1 times [2024-05-07 10:23:23,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:23,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:23,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:23,453 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:23,453 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:23,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:23,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:23,642 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:23,717 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:23,722 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:23,722 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:23,737 INFO L85 PathProgramCache]: Analyzing trace with hash -1914086322, now seen corresponding path program 2 times [2024-05-07 10:23:23,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:23,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:23,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:23,849 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:23,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:23,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:23,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:23,972 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:24,020 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:24,020 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:26,097 INFO L85 PathProgramCache]: Analyzing trace with hash -455340669, now seen corresponding path program 4 times [2024-05-07 10:23:26,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:26,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:26,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:26,215 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:26,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:26,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:26,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:26,440 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:26,481 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:26,482 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:28,538 INFO L85 PathProgramCache]: Analyzing trace with hash -229900614, now seen corresponding path program 5 times [2024-05-07 10:23:28,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:28,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:28,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:28,645 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:28,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:28,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:28,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:28,750 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:28,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-07 10:23:28,818 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:28,818 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-07 10:23:29,265 INFO L85 PathProgramCache]: Analyzing trace with hash 1463016152, now seen corresponding path program 6 times [2024-05-07 10:23:29,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:29,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:29,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:29,368 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:29,368 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:29,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:29,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:29,470 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:29,591 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-07 10:23:29,596 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:29,597 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-07 10:23:29,616 INFO L85 PathProgramCache]: Analyzing trace with hash -538449847, now seen corresponding path program 12 times [2024-05-07 10:23:29,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:29,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:29,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:29,746 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:29,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:29,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:29,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:29,829 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:29,927 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:29,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:31,982 INFO L85 PathProgramCache]: Analyzing trace with hash -1150352581, now seen corresponding path program 2 times [2024-05-07 10:23:31,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:31,983 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:32,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:32,097 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:32,098 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:32,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:32,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:32,219 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:32,259 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:32,260 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:34,312 INFO L85 PathProgramCache]: Analyzing trace with hash -2028672600, now seen corresponding path program 1 times [2024-05-07 10:23:34,312 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:34,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:34,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:34,513 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:34,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:34,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:34,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:34,623 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:34,666 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:34,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:36,728 INFO L85 PathProgramCache]: Analyzing trace with hash 2037452146, now seen corresponding path program 3 times [2024-05-07 10:23:36,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:36,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:36,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:36,833 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:36,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:36,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:36,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:36,939 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:37,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-07 10:23:37,057 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:37,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-07 10:23:37,122 INFO L85 PathProgramCache]: Analyzing trace with hash 474607001, now seen corresponding path program 13 times [2024-05-07 10:23:37,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:37,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:37,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:37,364 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:37,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:37,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:37,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:37,525 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:37,583 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-07 10:23:37,587 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:37,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-07 10:23:37,654 INFO L85 PathProgramCache]: Analyzing trace with hash 1995158398, now seen corresponding path program 14 times [2024-05-07 10:23:37,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:37,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:37,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:37,782 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:37,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:37,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:37,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:37,894 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:37,932 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-07 10:23:37,937 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:37,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-07 10:23:38,005 INFO L85 PathProgramCache]: Analyzing trace with hash -451169195, now seen corresponding path program 15 times [2024-05-07 10:23:38,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:38,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:38,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:38,127 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:38,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:38,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:38,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:38,424 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:38,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-07 10:23:38,544 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:38,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-07 10:23:38,628 INFO L85 PathProgramCache]: Analyzing trace with hash 776885679, now seen corresponding path program 1 times [2024-05-07 10:23:38,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:38,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:38,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:38,792 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:38,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:38,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:38,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:38,922 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:38,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-07 10:23:39,003 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:39,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-07 10:23:39,066 INFO L85 PathProgramCache]: Analyzing trace with hash -618656520, now seen corresponding path program 7 times [2024-05-07 10:23:39,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:39,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:39,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:39,195 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:39,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:39,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:39,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:39,331 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:39,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-07 10:23:39,387 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:39,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-07 10:23:39,455 INFO L85 PathProgramCache]: Analyzing trace with hash 2051035994, now seen corresponding path program 2 times [2024-05-07 10:23:39,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:39,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:39,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:39,630 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:39,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:39,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:39,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:39,742 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:39,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-07 10:23:39,782 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:39,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-07 10:23:39,841 INFO L85 PathProgramCache]: Analyzing trace with hash -266379139, now seen corresponding path program 3 times [2024-05-07 10:23:39,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:39,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:39,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:39,959 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:39,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:39,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:39,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:40,082 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:40,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-07 10:23:40,121 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:40,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-07 10:23:40,198 INFO L85 PathProgramCache]: Analyzing trace with hash -1668136124, now seen corresponding path program 1 times [2024-05-07 10:23:40,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:40,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:40,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:40,318 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:40,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:40,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:40,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:40,508 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:23:40,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-07 10:23:40,551 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:40,551 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-07 10:23:40,606 INFO L85 PathProgramCache]: Analyzing trace with hash 83975765, now seen corresponding path program 1 times [2024-05-07 10:23:40,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:40,607 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:40,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:40,715 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:40,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:40,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:40,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:40,823 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-07 10:23:40,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-07 10:23:40,901 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-07 10:23:40,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-07 10:23:40,995 INFO L85 PathProgramCache]: Analyzing trace with hash -1911485824, now seen corresponding path program 16 times [2024-05-07 10:23:40,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:40,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:41,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:41,114 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:41,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:41,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:41,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:41,220 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:41,831 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-05-07 10:23:41,833 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 10:23:41,833 INFO L85 PathProgramCache]: Analyzing trace with hash -159439195, now seen corresponding path program 1 times [2024-05-07 10:23:41,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 10:23:41,836 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [94307395] [2024-05-07 10:23:41,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:41,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:41,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:42,056 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 144 proven. 2 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-07 10:23:42,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 10:23:42,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [94307395] [2024-05-07 10:23:42,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [94307395] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-07 10:23:42,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [864403239] [2024-05-07 10:23:42,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:42,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-07 10:23:42,058 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 10:23:42,060 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-07 10:23:42,061 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-07 10:23:42,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:42,528 INFO L262 TraceCheckSpWp]: Trace formula consists of 673 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-07 10:23:42,541 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-07 10:23:42,772 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 145 proven. 1 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-07 10:23:42,772 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-07 10:23:42,992 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 145 proven. 1 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-07 10:23:42,992 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [864403239] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-07 10:23:42,992 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-07 10:23:42,993 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2024-05-07 10:23:42,994 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1969553373] [2024-05-07 10:23:42,994 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-07 10:23:42,999 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-07 10:23:42,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 10:23:43,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-07 10:23:43,003 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=434, Unknown=0, NotChecked=0, Total=552 [2024-05-07 10:23:43,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 10:23:43,004 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 10:23:43,004 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 13.083333333333334) internal successors, (314), 24 states have internal predecessors, (314), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 10:23:43,004 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 10:23:43,736 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:43,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:23:45,797 INFO L85 PathProgramCache]: Analyzing trace with hash 1058587371, now seen corresponding path program 2 times [2024-05-07 10:23:45,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:45,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:45,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:46,082 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:23:46,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:46,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:46,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:46,237 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-07 10:23:46,678 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:46,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:48,735 INFO L85 PathProgramCache]: Analyzing trace with hash -1570213396, now seen corresponding path program 3 times [2024-05-07 10:23:48,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:48,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:48,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:49,053 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:49,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:49,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:49,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:49,214 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:49,246 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:49,247 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:23:51,307 INFO L85 PathProgramCache]: Analyzing trace with hash 1658378688, now seen corresponding path program 4 times [2024-05-07 10:23:51,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:51,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:51,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:51,467 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:51,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:51,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:51,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:51,629 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:23:52,633 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-07 10:23:52,644 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-07 10:23:52,841 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable151,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable152,SelfDestructingSolverStorable153,SelfDestructingSolverStorable154,SelfDestructingSolverStorable150,SelfDestructingSolverStorable155,SelfDestructingSolverStorable156 [2024-05-07 10:23:52,841 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-05-07 10:23:52,842 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 10:23:52,842 INFO L85 PathProgramCache]: Analyzing trace with hash 1543240338, now seen corresponding path program 2 times [2024-05-07 10:23:52,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 10:23:52,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [76202703] [2024-05-07 10:23:52,843 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:52,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:52,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:53,153 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 237 proven. 15 refuted. 0 times theorem prover too weak. 451 trivial. 0 not checked. [2024-05-07 10:23:53,153 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 10:23:53,153 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [76202703] [2024-05-07 10:23:53,153 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [76202703] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-07 10:23:53,153 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [283224378] [2024-05-07 10:23:53,153 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-07 10:23:53,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-07 10:23:53,154 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 10:23:53,155 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-07 10:23:53,180 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-07 10:23:53,590 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-07 10:23:53,590 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-07 10:23:53,592 INFO L262 TraceCheckSpWp]: Trace formula consists of 359 conjuncts, 18 conjunts are in the unsatisfiable core [2024-05-07 10:23:53,598 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-07 10:23:53,889 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-07 10:23:53,891 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-07 10:23:53,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-07 10:23:54,212 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2024-05-07 10:23:54,212 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-07 10:23:54,212 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [283224378] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 10:23:54,212 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-07 10:23:54,212 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [15] total 28 [2024-05-07 10:23:54,212 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [99789827] [2024-05-07 10:23:54,213 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 10:23:54,213 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-07 10:23:54,213 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 10:23:54,214 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-07 10:23:54,214 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=690, Unknown=0, NotChecked=0, Total=756 [2024-05-07 10:23:54,214 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 10:23:54,214 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 10:23:54,214 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 11.0) internal successors, (165), 15 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 10:23:54,214 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-07 10:23:54,214 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 10:23:55,132 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:55,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:23:57,482 INFO L85 PathProgramCache]: Analyzing trace with hash -1627090736, now seen corresponding path program 1 times [2024-05-07 10:23:57,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:57,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:57,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:57,602 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:23:57,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:23:57,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:23:57,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:23:57,722 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:23:58,239 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:23:58,239 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:00,591 INFO L85 PathProgramCache]: Analyzing trace with hash -173228124, now seen corresponding path program 5 times [2024-05-07 10:24:00,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:00,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:00,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:00,741 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:24:00,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:00,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:00,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:00,891 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:24:01,143 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:01,143 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:03,492 INFO L85 PathProgramCache]: Analyzing trace with hash 1232618612, now seen corresponding path program 6 times [2024-05-07 10:24:03,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:03,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:03,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:03,723 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:24:03,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:03,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:03,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:03,862 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:24:04,000 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:04,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:06,276 INFO L85 PathProgramCache]: Analyzing trace with hash 212746363, now seen corresponding path program 7 times [2024-05-07 10:24:06,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:06,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:06,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:06,428 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:24:06,428 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:06,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:06,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:06,576 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:24:07,893 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:07,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:10,197 INFO L85 PathProgramCache]: Analyzing trace with hash -1219831469, now seen corresponding path program 1 times [2024-05-07 10:24:10,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:10,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:10,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:10,393 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-07 10:24:10,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:10,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:10,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:10,680 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-07 10:24:11,169 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:11,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:13,504 INFO L85 PathProgramCache]: Analyzing trace with hash -1633847795, now seen corresponding path program 1 times [2024-05-07 10:24:13,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:13,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:13,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:13,688 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-07 10:24:13,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:13,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:13,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:13,978 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-07 10:24:14,225 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:14,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:16,525 INFO L85 PathProgramCache]: Analyzing trace with hash 604227131, now seen corresponding path program 1 times [2024-05-07 10:24:16,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:16,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:16,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:16,703 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-07 10:24:16,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:16,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:16,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:16,879 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-07 10:24:16,982 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:16,982 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:19,299 INFO L85 PathProgramCache]: Analyzing trace with hash -1397257226, now seen corresponding path program 1 times [2024-05-07 10:24:19,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:19,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:19,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:19,629 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-07 10:24:19,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:19,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:19,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:19,808 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-07 10:24:20,065 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:20,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:22,414 INFO L85 PathProgramCache]: Analyzing trace with hash 265396491, now seen corresponding path program 8 times [2024-05-07 10:24:22,415 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:22,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:22,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:22,618 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:24:22,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:22,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:22,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:22,798 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:24:23,256 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:23,256 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:25,567 INFO L85 PathProgramCache]: Analyzing trace with hash 1356116916, now seen corresponding path program 1 times [2024-05-07 10:24:25,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:25,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:25,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:25,773 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:25,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:25,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:25,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:25,880 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:25,973 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:25,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:28,238 INFO L85 PathProgramCache]: Analyzing trace with hash 736669602, now seen corresponding path program 1 times [2024-05-07 10:24:28,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:28,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:28,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:28,361 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:28,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:28,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:28,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:28,515 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:28,622 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:28,622 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:30,902 INFO L85 PathProgramCache]: Analyzing trace with hash 1853284599, now seen corresponding path program 2 times [2024-05-07 10:24:30,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:30,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:30,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:31,194 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-07 10:24:31,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:31,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:31,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:31,303 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-07 10:24:31,396 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:31,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:33,674 INFO L85 PathProgramCache]: Analyzing trace with hash -141828693, now seen corresponding path program 1 times [2024-05-07 10:24:33,674 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:33,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:33,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:33,798 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:33,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:33,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:33,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:33,939 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:34,033 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:34,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:36,364 INFO L85 PathProgramCache]: Analyzing trace with hash 330180414, now seen corresponding path program 1 times [2024-05-07 10:24:36,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:36,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:36,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:36,477 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:36,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:36,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:36,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:36,587 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:36,687 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:36,687 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:38,990 INFO L85 PathProgramCache]: Analyzing trace with hash 1954667399, now seen corresponding path program 1 times [2024-05-07 10:24:38,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:38,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:39,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:39,219 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:39,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:39,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:39,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:39,371 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:39,502 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:39,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:41,896 INFO L85 PathProgramCache]: Analyzing trace with hash 117709681, now seen corresponding path program 1 times [2024-05-07 10:24:41,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:41,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:41,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:42,007 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:42,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:42,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:42,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:42,123 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:42,206 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:42,206 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:44,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1112175729, now seen corresponding path program 1 times [2024-05-07 10:24:44,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:44,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:44,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:44,657 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:44,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:44,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:44,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:44,779 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:44,905 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:44,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:47,333 INFO L85 PathProgramCache]: Analyzing trace with hash 1196050705, now seen corresponding path program 1 times [2024-05-07 10:24:47,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:47,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:47,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:48,006 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:48,007 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:48,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:48,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:48,200 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:48,315 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:48,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:24:50,670 INFO L85 PathProgramCache]: Analyzing trace with hash -141550809, now seen corresponding path program 2 times [2024-05-07 10:24:50,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:50,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:50,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:50,802 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:50,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:50,802 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:50,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:50,933 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 10:24:51,918 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:51,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:54,220 INFO L85 PathProgramCache]: Analyzing trace with hash -1413038219, now seen corresponding path program 1 times [2024-05-07 10:24:54,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:54,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:54,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:24:54,282 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 10:24:54,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:24:54,501 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:54,501 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:56,782 INFO L85 PathProgramCache]: Analyzing trace with hash 2018197509, now seen corresponding path program 1 times [2024-05-07 10:24:56,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:56,783 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:56,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:56,951 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:24:56,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:56,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:56,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:57,081 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:24:57,173 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:57,173 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:24:59,505 INFO L85 PathProgramCache]: Analyzing trace with hash 801496604, now seen corresponding path program 1 times [2024-05-07 10:24:59,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:59,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:59,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:59,631 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:24:59,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:24:59,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:24:59,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:24:59,752 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:24:59,833 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:24:59,833 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:25:02,160 INFO L85 PathProgramCache]: Analyzing trace with hash 1575282695, now seen corresponding path program 2 times [2024-05-07 10:25:02,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:02,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:02,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:02,283 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:02,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:02,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:02,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:02,542 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:02,656 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:02,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:25:04,991 INFO L85 PathProgramCache]: Analyzing trace with hash -2027394425, now seen corresponding path program 3 times [2024-05-07 10:25:04,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:04,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:05,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:05,108 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:05,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:05,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:05,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:05,223 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:05,296 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:05,296 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:25:07,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1677843363, now seen corresponding path program 1 times [2024-05-07 10:25:07,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:07,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:07,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:07,741 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:07,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:07,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:07,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:07,858 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:07,959 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:07,959 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:25:10,294 INFO L85 PathProgramCache]: Analyzing trace with hash 1578144615, now seen corresponding path program 2 times [2024-05-07 10:25:10,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:10,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:10,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:10,413 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:10,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:10,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:10,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:10,530 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:10,629 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:10,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:25:12,970 INFO L85 PathProgramCache]: Analyzing trace with hash 1042981801, now seen corresponding path program 3 times [2024-05-07 10:25:12,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:12,971 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:12,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:13,209 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:13,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:13,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:13,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:13,317 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:13,403 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:13,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:25:15,675 INFO L85 PathProgramCache]: Analyzing trace with hash -293500612, now seen corresponding path program 1 times [2024-05-07 10:25:15,675 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:15,675 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:15,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:15,846 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:15,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:15,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:15,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:15,973 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:16,044 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:16,044 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:25:18,293 INFO L85 PathProgramCache]: Analyzing trace with hash -2022593145, now seen corresponding path program 1 times [2024-05-07 10:25:18,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:18,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:18,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:18,417 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:18,417 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:18,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:18,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:18,549 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:25:30,489 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:30,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:25:32,731 INFO L85 PathProgramCache]: Analyzing trace with hash 16889722, now seen corresponding path program 1 times [2024-05-07 10:25:32,731 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:32,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:32,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:32,874 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:25:32,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:32,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:32,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:33,178 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-07 10:25:35,186 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:35,186 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:25:37,449 INFO L85 PathProgramCache]: Analyzing trace with hash -702328325, now seen corresponding path program 1 times [2024-05-07 10:25:37,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:37,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:37,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:37,766 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-07 10:25:37,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:37,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:37,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:37,983 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-05-07 10:25:38,289 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:38,289 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-07 10:25:40,577 INFO L85 PathProgramCache]: Analyzing trace with hash -1595248763, now seen corresponding path program 1 times [2024-05-07 10:25:40,577 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:40,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:40,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:40,789 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-07 10:25:40,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:40,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:40,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:41,163 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-07 10:25:42,529 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:25:42,530 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:25:44,906 INFO L85 PathProgramCache]: Analyzing trace with hash 973370723, now seen corresponding path program 1 times [2024-05-07 10:25:44,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:44,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:44,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:45,105 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:25:45,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:25:45,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:25:45,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:25:45,316 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:26:05,395 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:26:05,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-07 10:26:07,657 INFO L85 PathProgramCache]: Analyzing trace with hash -1126457266, now seen corresponding path program 1 times [2024-05-07 10:26:07,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:07,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:07,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:26:07,860 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:26:07,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:07,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:08,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:26:08,350 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-07 10:26:48,281 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:26:48,294 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:26:50,689 INFO L85 PathProgramCache]: Analyzing trace with hash -1310648091, now seen corresponding path program 1 times [2024-05-07 10:26:50,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:50,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:50,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:26:50,705 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 10:26:50,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:26:50,858 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:26:50,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1281 treesize of output 1053 [2024-05-07 10:26:53,963 INFO L85 PathProgramCache]: Analyzing trace with hash -237706060, now seen corresponding path program 1 times [2024-05-07 10:26:53,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:53,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:53,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:26:53,987 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 10:26:54,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:26:54,159 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:26:54,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 640 treesize of output 524 [2024-05-07 10:26:54,435 INFO L85 PathProgramCache]: Analyzing trace with hash -183177529, now seen corresponding path program 1 times [2024-05-07 10:26:54,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:54,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:54,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:26:54,573 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:26:54,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:54,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:54,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:26:54,696 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:26:54,815 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:26:54,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1327 treesize of output 1099 [2024-05-07 10:26:55,153 INFO L85 PathProgramCache]: Analyzing trace with hash 1526321210, now seen corresponding path program 2 times [2024-05-07 10:26:55,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:55,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:55,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:26:55,260 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:26:55,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:55,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:55,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:26:55,367 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:26:55,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:26:55,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:26:57,803 INFO L85 PathProgramCache]: Analyzing trace with hash 777164388, now seen corresponding path program 1 times [2024-05-07 10:26:57,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:57,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:57,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:26:58,079 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:26:58,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:26:58,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:26:58,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:26:58,191 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:26:58,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:26:58,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:00,696 INFO L85 PathProgramCache]: Analyzing trace with hash 47169630, now seen corresponding path program 2 times [2024-05-07 10:27:00,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:00,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:00,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:00,799 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:00,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:00,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:00,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:00,925 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:01,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:01,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:03,354 INFO L85 PathProgramCache]: Analyzing trace with hash -1914562085, now seen corresponding path program 1 times [2024-05-07 10:27:03,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:03,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:03,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:03,552 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:03,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:03,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:03,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:03,815 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:03,935 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:03,947 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:06,232 INFO L85 PathProgramCache]: Analyzing trace with hash -1938141079, now seen corresponding path program 3 times [2024-05-07 10:27:06,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:06,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:06,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:06,355 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:06,355 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:06,355 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:06,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:06,469 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:06,606 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:27:06,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1311 treesize of output 1083 [2024-05-07 10:27:08,925 INFO L85 PathProgramCache]: Analyzing trace with hash 1526473110, now seen corresponding path program 4 times [2024-05-07 10:27:08,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:08,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:08,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:09,027 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:09,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:09,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:09,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:09,129 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:09,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:09,293 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:11,732 INFO L85 PathProgramCache]: Analyzing trace with hash 902241237, now seen corresponding path program 1 times [2024-05-07 10:27:11,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:11,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:11,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:11,837 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:11,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:11,838 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:11,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:11,943 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:12,083 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:12,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:14,463 INFO L85 PathProgramCache]: Analyzing trace with hash 2083618071, now seen corresponding path program 2 times [2024-05-07 10:27:14,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:14,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:14,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:14,573 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:14,574 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:14,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:14,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:14,680 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:14,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:14,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:17,119 INFO L85 PathProgramCache]: Analyzing trace with hash 903195541, now seen corresponding path program 1 times [2024-05-07 10:27:17,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:17,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:17,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:17,398 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:17,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:17,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:17,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:17,510 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:17,621 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:17,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:19,951 INFO L85 PathProgramCache]: Analyzing trace with hash 2083619063, now seen corresponding path program 1 times [2024-05-07 10:27:19,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:19,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:19,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:20,062 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:20,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:20,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:20,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:20,177 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:20,283 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:27:20,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1327 treesize of output 1099 [2024-05-07 10:27:20,569 INFO L85 PathProgramCache]: Analyzing trace with hash -329130660, now seen corresponding path program 3 times [2024-05-07 10:27:20,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:20,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:20,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:20,678 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:20,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:20,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:20,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:20,792 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:20,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:21,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:23,505 INFO L85 PathProgramCache]: Analyzing trace with hash 1294315268, now seen corresponding path program 1 times [2024-05-07 10:27:23,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:23,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:23,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:23,619 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:23,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:23,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:23,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:23,727 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:23,857 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:23,869 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:26,192 INFO L85 PathProgramCache]: Analyzing trace with hash -235342592, now seen corresponding path program 2 times [2024-05-07 10:27:26,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:26,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:26,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:26,317 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:26,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:26,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:26,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:26,435 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:26,545 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:27:26,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2677 treesize of output 2225 [2024-05-07 10:27:26,902 INFO L85 PathProgramCache]: Analyzing trace with hash -1604712403, now seen corresponding path program 3 times [2024-05-07 10:27:26,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:26,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:26,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:27,003 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:27,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:27,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:27,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:27,217 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:27,332 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:27:27,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 676 treesize of output 560 [2024-05-07 10:27:27,733 INFO L85 PathProgramCache]: Analyzing trace with hash 89043158, now seen corresponding path program 4 times [2024-05-07 10:27:27,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:27,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:27,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:27,834 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:27,834 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:27,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:27,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:27,934 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:28,080 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:27:28,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1375 treesize of output 1147 [2024-05-07 10:27:30,480 INFO L85 PathProgramCache]: Analyzing trace with hash -1534268604, now seen corresponding path program 1 times [2024-05-07 10:27:30,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:30,480 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:30,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:30,594 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:30,594 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:30,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:30,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:30,709 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-07 10:27:30,845 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:30,859 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:33,242 INFO L85 PathProgramCache]: Analyzing trace with hash -466386886, now seen corresponding path program 2 times [2024-05-07 10:27:33,243 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:33,243 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:33,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:33,358 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:33,359 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:33,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:33,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:33,569 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:33,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:33,771 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:36,143 INFO L85 PathProgramCache]: Analyzing trace with hash -849152062, now seen corresponding path program 1 times [2024-05-07 10:27:36,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:36,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:36,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:36,370 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:36,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:36,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:36,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:36,487 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:36,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:36,679 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:38,991 INFO L85 PathProgramCache]: Analyzing trace with hash -543801614, now seen corresponding path program 1 times [2024-05-07 10:27:38,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:38,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:39,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:39,128 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:39,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:39,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:39,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:39,246 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:39,419 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:39,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:41,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1573120369, now seen corresponding path program 3 times [2024-05-07 10:27:41,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:41,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:41,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:41,987 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:41,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:41,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:42,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:42,221 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:42,381 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:27:42,382 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2677 treesize of output 2225 [2024-05-07 10:27:42,795 INFO L85 PathProgramCache]: Analyzing trace with hash -554675526, now seen corresponding path program 4 times [2024-05-07 10:27:42,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:42,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:42,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:43,084 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:43,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:43,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:43,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:43,193 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:43,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:43,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:45,873 INFO L85 PathProgramCache]: Analyzing trace with hash 802304436, now seen corresponding path program 1 times [2024-05-07 10:27:45,873 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:45,873 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:45,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:46,000 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:46,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:46,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:46,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:46,115 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:46,262 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:46,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:48,660 INFO L85 PathProgramCache]: Analyzing trace with hash -528308587, now seen corresponding path program 1 times [2024-05-07 10:27:48,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:48,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:48,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:48,785 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:48,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:48,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:48,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:48,931 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:49,074 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:27:49,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1311 treesize of output 1083 [2024-05-07 10:27:51,406 INFO L85 PathProgramCache]: Analyzing trace with hash -290963457, now seen corresponding path program 5 times [2024-05-07 10:27:51,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:51,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:51,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:51,519 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:51,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:51,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:51,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:51,638 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:51,746 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:27:51,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1375 treesize of output 1147 [2024-05-07 10:27:53,911 INFO L85 PathProgramCache]: Analyzing trace with hash -563575245, now seen corresponding path program 6 times [2024-05-07 10:27:53,911 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:53,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:53,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:54,036 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:54,036 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:54,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:54,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:54,162 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:54,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:54,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:56,775 INFO L85 PathProgramCache]: Analyzing trace with hash -1888075681, now seen corresponding path program 2 times [2024-05-07 10:27:56,775 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:56,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:56,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:56,889 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:56,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:56,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:56,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:57,003 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:57,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:27:57,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:27:59,591 INFO L85 PathProgramCache]: Analyzing trace with hash 235125080, now seen corresponding path program 7 times [2024-05-07 10:27:59,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:59,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:59,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:59,705 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:27:59,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:27:59,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:27:59,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:27:59,875 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:00,053 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-07 10:28:00,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-07 10:28:02,501 INFO L85 PathProgramCache]: Analyzing trace with hash -1677988587, now seen corresponding path program 1 times [2024-05-07 10:28:02,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:02,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:02,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:02,622 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:02,622 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:02,622 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:02,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:02,757 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:05,342 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:05,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1329 treesize of output 1101 [2024-05-07 10:28:07,785 INFO L85 PathProgramCache]: Analyzing trace with hash -1988362561, now seen corresponding path program 2 times [2024-05-07 10:28:07,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:07,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:07,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:28:07,807 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 10:28:07,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:28:07,992 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:07,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1377 treesize of output 1149 [2024-05-07 10:28:10,523 INFO L85 PathProgramCache]: Analyzing trace with hash 1269422278, now seen corresponding path program 3 times [2024-05-07 10:28:10,523 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:10,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:10,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:28:10,553 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 10:28:10,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 10:28:10,758 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:10,759 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 678 treesize of output 562 [2024-05-07 10:28:11,201 INFO L85 PathProgramCache]: Analyzing trace with hash -1559549537, now seen corresponding path program 1 times [2024-05-07 10:28:11,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:11,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:11,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:11,351 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:11,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:11,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:11,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:11,654 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:11,774 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:11,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1341 treesize of output 1113 [2024-05-07 10:28:12,221 INFO L85 PathProgramCache]: Analyzing trace with hash 1330219265, now seen corresponding path program 1 times [2024-05-07 10:28:12,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:12,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:12,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:12,464 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:12,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:12,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:12,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:12,607 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:12,736 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:12,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1313 treesize of output 1085 [2024-05-07 10:28:13,096 INFO L85 PathProgramCache]: Analyzing trace with hash 42910310, now seen corresponding path program 1 times [2024-05-07 10:28:13,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:13,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:13,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:13,279 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:13,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:13,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:13,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:13,408 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:13,546 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:13,546 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 658 treesize of output 542 [2024-05-07 10:28:15,915 INFO L85 PathProgramCache]: Analyzing trace with hash -237919551, now seen corresponding path program 1 times [2024-05-07 10:28:15,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:15,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:15,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:16,316 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:28:16,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:16,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:16,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:16,503 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-07 10:28:16,632 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:16,633 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2679 treesize of output 2227 [2024-05-07 10:28:17,703 INFO L85 PathProgramCache]: Analyzing trace with hash 1917907201, now seen corresponding path program 2 times [2024-05-07 10:28:17,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:17,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:17,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:17,859 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:17,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:17,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:17,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:18,054 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:18,171 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:18,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2679 treesize of output 2227 [2024-05-07 10:28:20,516 INFO L85 PathProgramCache]: Analyzing trace with hash 717078755, now seen corresponding path program 2 times [2024-05-07 10:28:20,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:20,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:20,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:20,663 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:20,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:20,664 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:20,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:20,813 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-07 10:28:20,945 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-07 10:28:20,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1313 treesize of output 1085 [2024-05-07 10:28:21,255 INFO L85 PathProgramCache]: Analyzing trace with hash -2047181985, now seen corresponding path program 3 times [2024-05-07 10:28:21,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:21,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:21,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:21,420 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-07 10:28:21,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 10:28:21,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 10:28:21,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 10:28:21,559 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.