/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking RANDOM --traceabstraction.probability.for.random.criterion 20 --traceabstraction.seed.for.random.criterion 213 --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-07 08:29:48,216 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-07 08:29:48,278 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-07 08:29:48,281 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-07 08:29:48,281 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-07 08:29:48,306 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-07 08:29:48,307 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-07 08:29:48,307 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-07 08:29:48,308 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-07 08:29:48,311 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-07 08:29:48,311 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-07 08:29:48,311 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-07 08:29:48,311 INFO L153 SettingsManager]: * Use SBE=true [2024-05-07 08:29:48,313 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-07 08:29:48,313 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-07 08:29:48,313 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-07 08:29:48,313 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-07 08:29:48,313 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-07 08:29:48,313 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-07 08:29:48,314 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-07 08:29:48,314 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-07 08:29:48,314 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-07 08:29:48,314 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-07 08:29:48,314 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-07 08:29:48,314 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-07 08:29:48,315 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-07 08:29:48,315 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-07 08:29:48,315 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-07 08:29:48,315 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-07 08:29:48,315 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 08:29:48,316 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-07 08:29:48,316 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-07 08:29:48,317 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-07 08:29:48,317 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-07 08:29:48,317 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-07 08:29:48,317 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-07 08:29:48,317 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-07 08:29:48,317 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-07 08:29:48,317 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-07 08:29:48,317 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> RANDOM Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: probability for random criterion as percentage -> 20 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: seed for random criterion -> 213 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-07 08:29:48,540 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-07 08:29:48,560 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-07 08:29:48,562 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-07 08:29:48,563 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-07 08:29:48,565 INFO L274 PluginConnector]: CDTParser initialized [2024-05-07 08:29:48,565 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i [2024-05-07 08:29:49,612 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-07 08:29:49,835 INFO L384 CDTParser]: Found 1 translation units. [2024-05-07 08:29:49,836 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i [2024-05-07 08:29:49,853 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/1d2c96521/57c9d13b15fd4ead92af50fb07cd73e6/FLAG56be211f9 [2024-05-07 08:29:49,868 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/1d2c96521/57c9d13b15fd4ead92af50fb07cd73e6 [2024-05-07 08:29:49,870 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-07 08:29:49,872 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-07 08:29:49,875 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-07 08:29:49,875 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-07 08:29:49,879 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-07 08:29:49,879 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 08:29:49" (1/1) ... [2024-05-07 08:29:49,880 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@383ec95d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:49, skipping insertion in model container [2024-05-07 08:29:49,880 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 08:29:49" (1/1) ... [2024-05-07 08:29:49,928 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-07 08:29:50,118 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i[994,1007] [2024-05-07 08:29:50,291 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 08:29:50,313 INFO L202 MainTranslator]: Completed pre-run [2024-05-07 08:29:50,322 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i[994,1007] [2024-05-07 08:29:50,355 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 08:29:50,377 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 08:29:50,377 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 08:29:50,382 INFO L206 MainTranslator]: Completed translation [2024-05-07 08:29:50,382 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50 WrapperNode [2024-05-07 08:29:50,382 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-07 08:29:50,383 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-07 08:29:50,383 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-07 08:29:50,383 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-07 08:29:50,388 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,407 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,429 INFO L138 Inliner]: procedures = 177, calls = 88, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 193 [2024-05-07 08:29:50,430 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-07 08:29:50,430 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-07 08:29:50,430 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-07 08:29:50,430 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-07 08:29:50,439 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,439 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,442 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,442 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,450 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,452 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,473 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,475 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,478 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-07 08:29:50,478 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-07 08:29:50,479 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-07 08:29:50,479 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-07 08:29:50,479 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (1/1) ... [2024-05-07 08:29:50,485 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 08:29:50,529 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 08:29:50,578 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-07 08:29:50,585 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-07 08:29:50,614 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-07 08:29:50,615 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-07 08:29:50,615 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-07 08:29:50,615 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-07 08:29:50,615 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-07 08:29:50,615 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-07 08:29:50,615 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2024-05-07 08:29:50,615 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2024-05-07 08:29:50,615 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2024-05-07 08:29:50,615 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2024-05-07 08:29:50,616 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2024-05-07 08:29:50,616 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2024-05-07 08:29:50,617 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2024-05-07 08:29:50,617 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2024-05-07 08:29:50,617 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-07 08:29:50,617 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-07 08:29:50,617 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-07 08:29:50,617 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-07 08:29:50,618 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-07 08:29:50,793 INFO L241 CfgBuilder]: Building ICFG [2024-05-07 08:29:50,796 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-07 08:29:51,221 INFO L282 CfgBuilder]: Performing block encoding [2024-05-07 08:29:51,432 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-07 08:29:51,432 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-07 08:29:51,433 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 08:29:51 BoogieIcfgContainer [2024-05-07 08:29:51,434 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-07 08:29:51,435 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-07 08:29:51,435 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-07 08:29:51,438 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-07 08:29:51,438 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.05 08:29:49" (1/3) ... [2024-05-07 08:29:51,438 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@62dae86e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 08:29:51, skipping insertion in model container [2024-05-07 08:29:51,438 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:29:50" (2/3) ... [2024-05-07 08:29:51,438 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@62dae86e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 08:29:51, skipping insertion in model container [2024-05-07 08:29:51,439 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 08:29:51" (3/3) ... [2024-05-07 08:29:51,439 INFO L112 eAbstractionObserver]: Analyzing ICFG safe019_power.opt.i [2024-05-07 08:29:51,446 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-07 08:29:51,453 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-07 08:29:51,453 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations. [2024-05-07 08:29:51,453 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-07 08:29:51,546 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-05-07 08:29:51,575 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-07 08:29:51,575 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-07 08:29:51,575 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 08:29:51,577 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-07 08:29:51,585 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-07 08:29:51,608 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-07 08:29:51,617 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:29:51,618 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-07 08:29:51,623 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@488024de, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=RANDOM, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=20, mConComCheckerRandomSeed=213, mConComCheckerConditionCriterion=false [2024-05-07 08:29:51,623 INFO L358 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2024-05-07 08:29:51,652 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting P1Err0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:29:51,653 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:29:51,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1022077230, now seen corresponding path program 1 times [2024-05-07 08:29:51,660 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:29:51,660 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [255832747] [2024-05-07 08:29:51,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:29:51,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:29:51,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:29:52,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:29:52,106 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:29:52,106 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [255832747] [2024-05-07 08:29:52,106 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [255832747] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:29:52,107 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:29:52,107 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-07 08:29:52,108 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [135965741] [2024-05-07 08:29:52,108 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:29:52,111 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-07 08:29:52,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:29:52,128 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-07 08:29:52,128 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-07 08:29:52,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:29:52,130 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:29:52,131 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 35.5) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:29:52,131 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:29:52,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:29:52,257 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-07 08:29:52,257 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:29:52,257 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:29:52,258 INFO L85 PathProgramCache]: Analyzing trace with hash -955608015, now seen corresponding path program 1 times [2024-05-07 08:29:52,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:29:52,258 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894486877] [2024-05-07 08:29:52,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:29:52,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:29:52,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:29:52,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:29:52,917 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:29:52,917 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1894486877] [2024-05-07 08:29:52,917 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1894486877] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:29:52,917 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:29:52,918 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-07 08:29:52,918 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121191359] [2024-05-07 08:29:52,918 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:29:52,919 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-07 08:29:52,920 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:29:52,921 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-07 08:29:52,921 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-05-07 08:29:52,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:29:52,922 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:29:52,922 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:29:52,922 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:29:52,922 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:29:53,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:29:53,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:29:53,194 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-05-07 08:29:53,195 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:29:53,195 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:29:53,196 INFO L85 PathProgramCache]: Analyzing trace with hash -1539437966, now seen corresponding path program 1 times [2024-05-07 08:29:53,196 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:29:53,196 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673720306] [2024-05-07 08:29:53,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:29:53,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:29:53,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:29:53,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:29:53,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:29:53,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673720306] [2024-05-07 08:29:53,677 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1673720306] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:29:53,677 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:29:53,677 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-05-07 08:29:53,677 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834055827] [2024-05-07 08:29:53,677 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:29:53,678 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-05-07 08:29:53,679 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:29:53,680 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-07 08:29:53,680 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-05-07 08:29:53,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:29:53,681 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:29:53,681 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 13.333333333333334) internal successors, (120), 9 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:29:53,681 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:29:53,681 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:29:53,681 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:29:53,958 INFO L85 PathProgramCache]: Analyzing trace with hash -374110589, now seen corresponding path program 1 times [2024-05-07 08:29:53,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:29:53,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:29:54,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:29:54,069 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:29:54,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:29:54,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:29:54,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:29:54,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-07 08:29:54,198 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,SelfDestructingSolverStorable2 [2024-05-07 08:29:54,199 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:29:54,199 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:29:54,199 INFO L85 PathProgramCache]: Analyzing trace with hash 77207855, now seen corresponding path program 1 times [2024-05-07 08:29:54,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:29:54,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162052838] [2024-05-07 08:29:54,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:29:54,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:29:54,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:29:58,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:29:58,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:29:58,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1162052838] [2024-05-07 08:29:58,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1162052838] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:29:58,309 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:29:58,309 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2024-05-07 08:29:58,309 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [278275833] [2024-05-07 08:29:58,309 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:29:58,310 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-07 08:29:58,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:29:58,310 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-07 08:29:58,311 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=461, Unknown=0, NotChecked=0, Total=552 [2024-05-07 08:29:58,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:29:58,311 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:29:58,311 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 5.125) internal successors, (123), 24 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:29:58,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:29:58,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:29:58,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-07 08:29:58,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:29:59,177 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:29:59,938 INFO L85 PathProgramCache]: Analyzing trace with hash -374110589, now seen corresponding path program 2 times [2024-05-07 08:29:59,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:29:59,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:29:59,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:29:59,989 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:00,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:00,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:30:01,307 INFO L85 PathProgramCache]: Analyzing trace with hash 1364894983, now seen corresponding path program 1 times [2024-05-07 08:30:01,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:30:01,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:30:01,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:01,358 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:01,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:24,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:30:25,003 INFO L85 PathProgramCache]: Analyzing trace with hash -317603313, now seen corresponding path program 1 times [2024-05-07 08:30:25,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:30:25,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:30:25,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:25,057 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:25,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:39,243 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:30:40,056 INFO L85 PathProgramCache]: Analyzing trace with hash -1496884493, now seen corresponding path program 1 times [2024-05-07 08:30:40,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:30:40,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:30:40,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:40,121 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:40,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:40,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:30:41,149 INFO L85 PathProgramCache]: Analyzing trace with hash 320229768, now seen corresponding path program 1 times [2024-05-07 08:30:41,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:30:41,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:30:41,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:41,172 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:41,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:45,599 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:30:46,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1699347750, now seen corresponding path program 1 times [2024-05-07 08:30:46,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:30:46,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:30:46,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:46,124 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:46,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:46,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:30:47,116 INFO L85 PathProgramCache]: Analyzing trace with hash -352628606, now seen corresponding path program 1 times [2024-05-07 08:30:47,116 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:30:47,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:30:47,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:47,163 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:47,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:47,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:30:48,038 INFO L85 PathProgramCache]: Analyzing trace with hash 1044141756, now seen corresponding path program 1 times [2024-05-07 08:30:48,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:30:48,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:30:48,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:48,065 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:48,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:52,646 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:30:53,215 INFO L85 PathProgramCache]: Analyzing trace with hash -190572980, now seen corresponding path program 1 times [2024-05-07 08:30:53,216 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:30:53,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:30:53,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:30:53,286 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:30:53,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:36,202 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:37,037 INFO L85 PathProgramCache]: Analyzing trace with hash 1190768273, now seen corresponding path program 1 times [2024-05-07 08:31:37,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:37,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:37,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:37,109 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:37,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:37,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:38,244 INFO L85 PathProgramCache]: Analyzing trace with hash -1240529564, now seen corresponding path program 1 times [2024-05-07 08:31:38,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:38,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:38,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:38,265 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:38,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:43,283 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:43,909 INFO L85 PathProgramCache]: Analyzing trace with hash 602037544, now seen corresponding path program 1 times [2024-05-07 08:31:43,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:43,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:43,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:43,972 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:43,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:44,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:45,143 INFO L85 PathProgramCache]: Analyzing trace with hash -978493813, now seen corresponding path program 1 times [2024-05-07 08:31:45,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:45,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:45,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:45,211 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:45,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:45,559 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:46,256 INFO L85 PathProgramCache]: Analyzing trace with hash 1282973804, now seen corresponding path program 1 times [2024-05-07 08:31:46,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:46,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:46,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:46,288 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:46,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:46,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:47,181 INFO L85 PathProgramCache]: Analyzing trace with hash -544528525, now seen corresponding path program 1 times [2024-05-07 08:31:47,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:47,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:47,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:47,220 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:47,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:47,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:48,153 INFO L85 PathProgramCache]: Analyzing trace with hash 299411276, now seen corresponding path program 1 times [2024-05-07 08:31:48,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:48,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:48,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:48,185 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:48,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:48,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:49,056 INFO L85 PathProgramCache]: Analyzing trace with hash 1090813171, now seen corresponding path program 1 times [2024-05-07 08:31:49,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:49,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:49,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:49,086 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:49,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:49,374 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:49,980 INFO L85 PathProgramCache]: Analyzing trace with hash 2124608102, now seen corresponding path program 1 times [2024-05-07 08:31:49,985 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:49,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:50,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:50,081 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:50,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:50,316 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:50,820 INFO L85 PathProgramCache]: Analyzing trace with hash 297182562, now seen corresponding path program 1 times [2024-05-07 08:31:50,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:50,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:50,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:50,840 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:50,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:51,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:51,745 INFO L85 PathProgramCache]: Analyzing trace with hash -934643852, now seen corresponding path program 1 times [2024-05-07 08:31:51,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:51,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:51,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:51,764 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:51,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:54,409 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:55,081 INFO L85 PathProgramCache]: Analyzing trace with hash 229017933, now seen corresponding path program 1 times [2024-05-07 08:31:55,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:55,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:55,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:55,103 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:55,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:55,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:31:55,963 INFO L85 PathProgramCache]: Analyzing trace with hash 229017933, now seen corresponding path program 2 times [2024-05-07 08:31:55,964 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:31:55,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:31:55,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:31:55,985 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:31:55,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:32:01,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 08:32:02,416 INFO L85 PathProgramCache]: Analyzing trace with hash 1668118587, now seen corresponding path program 1 times [2024-05-07 08:32:02,416 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:32:02,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:32:02,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:32:02,442 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:32:02,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:37:36,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:37:36,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:37:36,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-05-07 08:37:36,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-05-07 08:37:36,709 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,SelfDestructingSolverStorable4,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable10,SelfDestructingSolverStorable21,SelfDestructingSolverStorable11,SelfDestructingSolverStorable22,SelfDestructingSolverStorable12,SelfDestructingSolverStorable23,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable24,SelfDestructingSolverStorable14,SelfDestructingSolverStorable25,SelfDestructingSolverStorable15,SelfDestructingSolverStorable26,SelfDestructingSolverStorable16,SelfDestructingSolverStorable27,SelfDestructingSolverStorable17 [2024-05-07 08:37:36,709 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:37:36,710 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:37:36,710 INFO L85 PathProgramCache]: Analyzing trace with hash 1186190099, now seen corresponding path program 2 times [2024-05-07 08:37:36,710 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:37:36,710 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [608188100] [2024-05-07 08:37:36,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:37:36,710 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:37:36,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:37:36,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:37:36,951 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:37:36,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [608188100] [2024-05-07 08:37:36,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [608188100] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:37:36,952 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:37:36,952 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-07 08:37:36,952 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1589659234] [2024-05-07 08:37:36,952 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:37:36,952 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-07 08:37:36,952 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:37:36,953 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-07 08:37:36,954 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-05-07 08:37:36,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:37:36,955 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:37:36,956 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 17.571428571428573) internal successors, (123), 7 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:37:36,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:37:36,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:37:36,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 17 states. [2024-05-07 08:37:36,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2024-05-07 08:37:36,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:38:03,497 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 22 [2024-05-07 08:38:03,502 INFO L173 IndexEqualityManager]: detected equality via solver [2024-05-07 08:38:03,874 INFO L85 PathProgramCache]: Analyzing trace with hash -1004073242, now seen corresponding path program 1 times [2024-05-07 08:38:03,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:38:03,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:38:03,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:38:04,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:38:04,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:38:04,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:38:04,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:38:04,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:38:04,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-07 08:38:04,296 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=121, Unknown=0, NotChecked=0, Total=156 [2024-05-07 08:38:39,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1314 treesize of output 1218 [2024-05-07 08:38:40,736 INFO L85 PathProgramCache]: Analyzing trace with hash -64955514, now seen corresponding path program 1 times [2024-05-07 08:38:40,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:38:40,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:38:40,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:38:40,747 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:38:40,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:40:00,141 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:40:00,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:40:00,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:40:00,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:40:00,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:40:00,142 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable28 [2024-05-07 08:40:00,142 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:40:00,142 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:40:00,143 INFO L85 PathProgramCache]: Analyzing trace with hash 1794120427, now seen corresponding path program 3 times [2024-05-07 08:40:00,143 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:40:00,143 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82780639] [2024-05-07 08:40:00,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:40:00,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:40:00,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:40:03,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:40:03,364 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:40:03,364 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [82780639] [2024-05-07 08:40:03,364 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [82780639] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:40:03,364 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:40:03,364 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2024-05-07 08:40:03,365 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976422424] [2024-05-07 08:40:03,365 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:40:03,365 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-05-07 08:40:03,365 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:40:03,366 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-05-07 08:40:03,366 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=540, Unknown=0, NotChecked=0, Total=650 [2024-05-07 08:40:03,366 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:40:03,367 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:40:03,367 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 4.730769230769231) internal successors, (123), 26 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:40:03,367 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:40:03,367 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:40:03,367 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:40:03,367 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:40:03,367 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:40:03,368 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:40:10,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:40:10,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:40:10,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:40:10,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:40:10,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:40:10,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-07 08:40:10,630 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-05-07 08:40:10,630 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:40:10,631 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:40:10,631 INFO L85 PathProgramCache]: Analyzing trace with hash -682966993, now seen corresponding path program 4 times [2024-05-07 08:40:10,631 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:40:10,631 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542105193] [2024-05-07 08:40:10,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:40:10,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:40:10,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:40:14,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:40:14,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:40:14,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [542105193] [2024-05-07 08:40:14,175 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [542105193] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:40:14,175 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:40:14,175 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2024-05-07 08:40:14,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [896123300] [2024-05-07 08:40:14,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:40:14,175 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-07 08:40:14,175 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:40:14,176 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-07 08:40:14,176 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=458, Unknown=0, NotChecked=0, Total=552 [2024-05-07 08:40:14,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:40:14,176 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:40:14,176 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 5.125) internal successors, (123), 24 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:40:14,176 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:40:14,176 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:40:14,176 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:40:14,177 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:40:14,177 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:40:14,177 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-07 08:40:14,177 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:40:39,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:40:39,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:40:39,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:40:39,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:40:39,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:40:39,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:40:39,704 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:40:39,704 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-05-07 08:40:39,704 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:40:39,705 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:40:39,705 INFO L85 PathProgramCache]: Analyzing trace with hash 354087147, now seen corresponding path program 5 times [2024-05-07 08:40:39,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:40:39,705 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478400938] [2024-05-07 08:40:39,705 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:40:39,705 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:40:39,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:40:42,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:40:42,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:40:42,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478400938] [2024-05-07 08:40:42,309 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [478400938] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:40:42,309 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:40:42,310 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2024-05-07 08:40:42,310 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067796125] [2024-05-07 08:40:42,310 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:40:42,310 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-05-07 08:40:42,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:40:42,311 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-05-07 08:40:42,311 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=424, Unknown=0, NotChecked=0, Total=506 [2024-05-07 08:40:42,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:40:42,311 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:40:42,311 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 5.3478260869565215) internal successors, (123), 23 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:40:42,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:40:42,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:40:42,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:40:42,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:40:42,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:40:42,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:40:42,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:40:42,311 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:40:56,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:40:56,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:40:56,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:40:56,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:40:56,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:40:56,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:40:56,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:40:56,113 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-07 08:40:56,113 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-05-07 08:40:56,113 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:40:56,114 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:40:56,114 INFO L85 PathProgramCache]: Analyzing trace with hash -592602833, now seen corresponding path program 6 times [2024-05-07 08:40:56,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:40:56,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39741807] [2024-05-07 08:40:56,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:40:56,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:40:56,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:40:58,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:40:58,932 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:40:58,932 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [39741807] [2024-05-07 08:40:58,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [39741807] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:40:58,932 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:40:58,932 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [27] imperfect sequences [] total 27 [2024-05-07 08:40:58,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833230225] [2024-05-07 08:40:58,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:40:58,933 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2024-05-07 08:40:58,933 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:40:58,933 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2024-05-07 08:40:58,934 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=592, Unknown=0, NotChecked=0, Total=702 [2024-05-07 08:40:58,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:40:58,934 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:40:58,934 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 4.555555555555555) internal successors, (123), 27 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 20 states. [2024-05-07 08:40:58,934 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:41:29,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:41:29,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:41:29,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-07 08:41:30,264 INFO L85 PathProgramCache]: Analyzing trace with hash -655384153, now seen corresponding path program 1 times [2024-05-07 08:41:30,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:41:30,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:41:30,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:30,291 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:41:30,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:30,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 08:41:30,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 08:41:30,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 08:41:30,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2024-05-07 08:41:30,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:41:30,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:41:30,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-05-07 08:41:30,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-07 08:41:30,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-05-07 08:41:30,349 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,SelfDestructingSolverStorable36 [2024-05-07 08:41:30,349 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 08:41:30,349 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:41:30,349 INFO L85 PathProgramCache]: Analyzing trace with hash -1849458001, now seen corresponding path program 7 times [2024-05-07 08:41:30,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:41:30,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247414832] [2024-05-07 08:41:30,350 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:41:30,350 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:41:30,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:30,402 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:41:30,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:30,459 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-05-07 08:41:30,460 INFO L363 BasicCegarLoop]: Counterexample is feasible [2024-05-07 08:41:30,461 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (6 of 7 remaining) [2024-05-07 08:41:30,462 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P1Err0ASSERT_VIOLATIONERROR_FUNCTION (5 of 7 remaining) [2024-05-07 08:41:30,462 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (4 of 7 remaining) [2024-05-07 08:41:30,463 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 7 remaining) [2024-05-07 08:41:30,466 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 7 remaining) [2024-05-07 08:41:30,466 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 7 remaining) [2024-05-07 08:41:30,466 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 7 remaining) [2024-05-07 08:41:30,467 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-05-07 08:41:30,471 INFO L448 BasicCegarLoop]: Path program histogram: [7, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-07 08:41:30,476 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-07 08:41:30,476 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-07 08:41:30,596 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre36 could not be translated [2024-05-07 08:41:30,598 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre38 could not be translated [2024-05-07 08:41:30,599 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre40 could not be translated [2024-05-07 08:41:30,606 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre42 could not be translated [2024-05-07 08:41:30,637 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.05 08:41:30 BasicIcfg [2024-05-07 08:41:30,637 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-07 08:41:30,638 INFO L158 Benchmark]: Toolchain (without parser) took 700766.13ms. Allocated memory was 226.5MB in the beginning and 2.6GB in the end (delta: 2.4GB). Free memory was 156.8MB in the beginning and 2.0GB in the end (delta: -1.9GB). Peak memory consumption was 489.5MB. Max. memory is 8.0GB. [2024-05-07 08:41:30,638 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 226.5MB. Free memory is still 198.3MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-07 08:41:30,638 INFO L158 Benchmark]: CACSL2BoogieTranslator took 508.05ms. Allocated memory is still 226.5MB. Free memory was 156.5MB in the beginning and 130.1MB in the end (delta: 26.4MB). Peak memory consumption was 26.2MB. Max. memory is 8.0GB. [2024-05-07 08:41:30,638 INFO L158 Benchmark]: Boogie Procedure Inliner took 46.70ms. Allocated memory is still 226.5MB. Free memory was 130.1MB in the beginning and 127.4MB in the end (delta: 2.7MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-07 08:41:30,638 INFO L158 Benchmark]: Boogie Preprocessor took 47.69ms. Allocated memory is still 226.5MB. Free memory was 127.4MB in the beginning and 124.5MB in the end (delta: 2.9MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-07 08:41:30,638 INFO L158 Benchmark]: RCFGBuilder took 955.17ms. Allocated memory is still 226.5MB. Free memory was 124.5MB in the beginning and 99.9MB in the end (delta: 24.6MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. [2024-05-07 08:41:30,639 INFO L158 Benchmark]: TraceAbstraction took 699202.08ms. Allocated memory was 226.5MB in the beginning and 2.6GB in the end (delta: 2.4GB). Free memory was 98.3MB in the beginning and 2.0GB in the end (delta: -1.9GB). Peak memory consumption was 431.0MB. Max. memory is 8.0GB. [2024-05-07 08:41:30,639 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 226.5MB. Free memory is still 198.3MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 508.05ms. Allocated memory is still 226.5MB. Free memory was 156.5MB in the beginning and 130.1MB in the end (delta: 26.4MB). Peak memory consumption was 26.2MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 46.70ms. Allocated memory is still 226.5MB. Free memory was 130.1MB in the beginning and 127.4MB in the end (delta: 2.7MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 47.69ms. Allocated memory is still 226.5MB. Free memory was 127.4MB in the beginning and 124.5MB in the end (delta: 2.9MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * RCFGBuilder took 955.17ms. Allocated memory is still 226.5MB. Free memory was 124.5MB in the beginning and 99.9MB in the end (delta: 24.6MB). Peak memory consumption was 25.2MB. Max. memory is 8.0GB. * TraceAbstraction took 699202.08ms. Allocated memory was 226.5MB in the beginning and 2.6GB in the end (delta: 2.4GB). Free memory was 98.3MB in the beginning and 2.0GB in the end (delta: -1.9GB). Peak memory consumption was 431.0MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre36 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre38 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre40 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre42 could not be translated - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1913406, independent: 1873440, independent conditional: 1873323, independent unconditional: 117, dependent: 39966, dependent conditional: 39965, dependent unconditional: 1, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1912636, independent: 1873440, independent conditional: 1873323, independent unconditional: 117, dependent: 39196, dependent conditional: 39195, dependent unconditional: 1, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1912636, independent: 1873440, independent conditional: 1873323, independent unconditional: 117, dependent: 39196, dependent conditional: 39195, dependent unconditional: 1, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 1912636, independent: 1873440, independent conditional: 1873323, independent unconditional: 117, dependent: 39196, dependent conditional: 39195, dependent unconditional: 1, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 2096217, independent: 1873440, independent conditional: 916489, independent unconditional: 956951, dependent: 222777, dependent conditional: 183580, dependent unconditional: 39197, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 2096217, independent: 1873440, independent conditional: 552099, independent unconditional: 1321341, dependent: 222777, dependent conditional: 109392, dependent unconditional: 113385, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2096217, independent: 1873440, independent conditional: 552099, independent unconditional: 1321341, dependent: 222777, dependent conditional: 109392, dependent unconditional: 113385, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1562, independent: 1410, independent conditional: 436, independent unconditional: 974, dependent: 152, dependent conditional: 121, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1562, independent: 1329, independent conditional: 0, independent unconditional: 1329, dependent: 233, dependent conditional: 0, dependent unconditional: 233, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 233, independent: 81, independent conditional: 74, independent unconditional: 7, dependent: 152, dependent conditional: 121, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 233, independent: 81, independent conditional: 74, independent unconditional: 7, dependent: 152, dependent conditional: 121, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 2452, independent: 596, independent conditional: 592, independent unconditional: 4, dependent: 1856, dependent conditional: 1586, dependent unconditional: 270, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 2096217, independent: 1872030, independent conditional: 551663, independent unconditional: 1320367, dependent: 222625, dependent conditional: 109271, dependent unconditional: 113354, unknown: 1562, unknown conditional: 557, unknown unconditional: 1005] , Statistics on independence cache: Total cache size (in pairs): 1562, Positive cache size: 1410, Positive conditional cache size: 436, Positive unconditional cache size: 974, Negative cache size: 152, Negative conditional cache size: 121, Negative unconditional cache size: 31, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 438578, Maximal queried relation: 9, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 2096217, independent: 1873440, independent conditional: 916489, independent unconditional: 956951, dependent: 222777, dependent conditional: 183580, dependent unconditional: 39197, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 2096217, independent: 1873440, independent conditional: 552099, independent unconditional: 1321341, dependent: 222777, dependent conditional: 109392, dependent unconditional: 113385, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2096217, independent: 1873440, independent conditional: 552099, independent unconditional: 1321341, dependent: 222777, dependent conditional: 109392, dependent unconditional: 113385, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1562, independent: 1410, independent conditional: 436, independent unconditional: 974, dependent: 152, dependent conditional: 121, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1562, independent: 1329, independent conditional: 0, independent unconditional: 1329, dependent: 233, dependent conditional: 0, dependent unconditional: 233, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 233, independent: 81, independent conditional: 74, independent unconditional: 7, dependent: 152, dependent conditional: 121, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 233, independent: 81, independent conditional: 74, independent unconditional: 7, dependent: 152, dependent conditional: 121, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 2452, independent: 596, independent conditional: 592, independent unconditional: 4, dependent: 1856, dependent conditional: 1586, dependent unconditional: 270, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 2096217, independent: 1872030, independent conditional: 551663, independent unconditional: 1320367, dependent: 222625, dependent conditional: 109271, dependent unconditional: 113354, unknown: 1562, unknown conditional: 557, unknown unconditional: 1005] , Statistics on independence cache: Total cache size (in pairs): 1562, Positive cache size: 1410, Positive conditional cache size: 436, Positive unconditional cache size: 974, Negative cache size: 152, Negative conditional cache size: 121, Negative unconditional cache size: 31, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 438578 ], Independence queries for same thread: 770 - CounterExampleResult [Line: 19]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L711] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L713] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L715] 0 int __unbuffered_p0_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0] [L717] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0] [L718] 0 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX=0] [L719] 0 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX=0] [L720] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX=0] [L721] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX=0] [L722] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX=0] [L723] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX=0] [L724] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX=0] [L725] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX=0] [L726] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX=0] [L727] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX=0] [L728] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX=0] [L729] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX=0] [L730] 0 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX=0] [L731] 0 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX=0] [L732] 0 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX=0] [L733] 0 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX=0] [L734] 0 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX=0] [L735] 0 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0] [L736] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L737] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L739] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}] [L740] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x={3:0}] [L741] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x={3:0}] [L742] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x={3:0}] [L743] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x={3:0}] [L744] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x={3:0}] [L745] 0 _Bool x$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x={3:0}] [L746] 0 _Bool x$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x={3:0}] [L747] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x={3:0}] [L748] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x={3:0}] [L749] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x={3:0}] [L750] 0 _Bool x$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x={3:0}] [L751] 0 _Bool x$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x={3:0}] [L752] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x={3:0}] [L753] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x={3:0}] [L754] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x={3:0}] [L755] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x={3:0}] [L756] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x={3:0}] [L757] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}] [L759] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L760] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L761] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L762] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L882] 0 pthread_t t2229; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L883] FCALL, FORK 0 pthread_create(&t2229, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L884] 0 pthread_t t2230; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L885] FCALL, FORK 0 pthread_create(&t2230, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L794] 2 x$w_buff1 = x$w_buff0 [L795] 2 x$w_buff0 = 1 [L796] 2 x$w_buff1_used = x$w_buff0_used [L797] 2 x$w_buff0_used = (_Bool)1 [L798] CALL 2 __VERIFIER_assert(!(x$w_buff1_used && x$w_buff0_used)) [L19] COND FALSE 2 !(!expression) [L798] RET 2 __VERIFIER_assert(!(x$w_buff1_used && x$w_buff0_used)) [L799] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L800] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L801] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L802] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L803] 2 x$r_buff1_thd4 = x$r_buff0_thd4 [L804] 2 x$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L886] 0 pthread_t t2231; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L887] FCALL, FORK 0 pthread_create(&t2231, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L821] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L822] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L823] 3 x$flush_delayed = weak$$choice2 [L824] EXPR 3 \read(x) [L824] 3 x$mem_tmp = x [L825] 3 weak$$choice1 = __VERIFIER_nondet_bool() [L826] EXPR 3 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L826] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))) [L826] EXPR 3 x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)) [L826] EXPR 3 x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x) [L826] EXPR 3 weak$$choice0 ? x$w_buff0 : x [L826] EXPR 3 \read(x) [L826] EXPR 3 weak$$choice0 ? x$w_buff0 : x [L826] EXPR 3 x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x) [L826] EXPR 3 x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)) [L826] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))) [L826] EXPR 3 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L826] 3 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L827] 3 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)))) [L828] 3 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)))) [L829] 3 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L830] 3 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L831] 3 x$r_buff0_thd3 = weak$$choice2 ? x$r_buff0_thd3 : (!x$w_buff0_used ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L832] 3 x$r_buff1_thd3 = weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$r_buff1_thd3 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L833] 3 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L834] 3 __unbuffered_p2_EAX$read_delayed_var = &x [L835] EXPR 3 \read(x) [L835] 3 __unbuffered_p2_EAX = x [L836] EXPR 3 x$flush_delayed ? x$mem_tmp : x [L836] 3 x = x$flush_delayed ? x$mem_tmp : x [L837] 3 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L840] 3 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L843] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L843] EXPR 3 x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x [L843] EXPR 3 \read(x) [L843] EXPR 3 x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x [L843] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L843] 3 x = x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L844] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L845] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L846] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L847] 3 x$r_buff1_thd3 = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$r_buff1_thd3 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L850] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L852] 3 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L888] 0 pthread_t t2232; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L889] FCALL, FORK 0 pthread_create(&t2232, ((void *)0), P3, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L857] 4 y = 2 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L860] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L860] EXPR 4 x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x [L860] EXPR 4 \read(x) [L860] EXPR 4 x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x [L860] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L860] 4 x = x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L861] 4 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$w_buff0_used [L862] 4 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$w_buff1_used [L863] 4 x$r_buff0_thd4 = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$r_buff0_thd4 [L864] 4 x$r_buff1_thd4 = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$r_buff1_thd4 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L867] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L869] 4 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L766] 1 __unbuffered_p0_EAX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L769] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L770] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L771] 1 x$flush_delayed = weak$$choice2 [L772] EXPR 1 \read(x) [L772] 1 x$mem_tmp = x [L773] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L773] EXPR 1 \read(x) [L773] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L773] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L774] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L775] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L776] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L777] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L778] 1 x$r_buff0_thd1 = weak$$choice2 ? x$r_buff0_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff0_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1)) [L779] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L780] EXPR 1 \read(x) [L780] 1 __unbuffered_p0_EBX = x [L781] EXPR 1 x$flush_delayed ? x$mem_tmp : x [L781] EXPR 1 \read(x) [L781] EXPR 1 x$flush_delayed ? x$mem_tmp : x [L781] 1 x = x$flush_delayed ? x$mem_tmp : x [L782] 1 x$flush_delayed = (_Bool)0 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L807] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L807] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L808] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L809] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L810] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L811] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L814] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L816] 2 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L787] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L891] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L893] CALL 0 assume_abort_if_not(main$tmp_guard0) [L4] COND FALSE 0 !(!cond) VAL [\old(cond)=1, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L893] RET 0 assume_abort_if_not(main$tmp_guard0) [L895] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L895] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L895] EXPR 0 \read(x) [L895] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L895] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L895] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L896] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L897] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L898] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L899] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L902] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L903] EXPR 0 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L903] EXPR 0 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L903] EXPR 0 \read(*__unbuffered_p2_EAX$read_delayed_var) [L903] EXPR 0 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L903] EXPR 0 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L903] 0 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L904] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p0_EAX == 2 && __unbuffered_p0_EBX == 0 && __unbuffered_p2_EAX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice1=1, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L906] CALL 0 __VERIFIER_assert(main$tmp_guard1) [L19] COND TRUE 0 !expression VAL [\old(expression)=0, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=1, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L19] 0 reach_error() VAL [\old(expression)=0, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=1, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] - UnprovableResult [Line: 19]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 887]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 889]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 883]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 885]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 183 locations, 7 error locations. Started 1 CEGAR loops. OverallTime: 698.9s, OverallIterations: 10, TraceHistogramMax: 0, PathProgramHistogramMax: 7, EmptinessCheckTime: 680.5s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 162, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 17.3s InterpolantComputationTime, 1170 NumberOfCodeBlocks, 1170 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 1038 ConstructedInterpolants, 0 QuantifiedInterpolants, 16606 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 9 InterpolantComputations, 9 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 655.8s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 1, ConditionalCommutativityConditionCalculations: 154, ConditionalCommutativityTraceChecks: 27, ConditionalCommutativityImperfectProofs: 0 RESULT: Ultimate proved your program to be incorrect! [2024-05-07 08:41:30,691 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-07 08:41:30,970 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...