/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking RANDOM --traceabstraction.probability.for.random.criterion 20 --traceabstraction.seed.for.random.criterion 213 --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-wmm/thin002_power.oepc.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-07 08:38:32,831 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-07 08:38:32,894 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-07 08:38:32,898 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-07 08:38:32,898 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-07 08:38:32,921 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-07 08:38:32,922 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-07 08:38:32,922 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-07 08:38:32,922 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-07 08:38:32,925 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-07 08:38:32,926 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-07 08:38:32,926 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-07 08:38:32,926 INFO L153 SettingsManager]: * Use SBE=true [2024-05-07 08:38:32,927 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-07 08:38:32,927 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-07 08:38:32,928 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-07 08:38:32,928 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-07 08:38:32,928 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-07 08:38:32,928 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-07 08:38:32,928 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-07 08:38:32,928 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-07 08:38:32,929 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-07 08:38:32,929 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-07 08:38:32,948 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-07 08:38:32,948 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-07 08:38:32,948 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-07 08:38:32,948 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-07 08:38:32,948 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-07 08:38:32,949 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-07 08:38:32,949 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 08:38:32,950 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-07 08:38:32,950 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-07 08:38:32,950 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-07 08:38:32,950 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-07 08:38:32,950 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-07 08:38:32,950 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-07 08:38:32,950 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-07 08:38:32,950 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-07 08:38:32,951 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-07 08:38:32,951 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> RANDOM Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: probability for random criterion as percentage -> 20 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: seed for random criterion -> 213 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-07 08:38:33,155 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-07 08:38:33,179 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-07 08:38:33,181 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-07 08:38:33,182 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-07 08:38:33,182 INFO L274 PluginConnector]: CDTParser initialized [2024-05-07 08:38:33,183 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-wmm/thin002_power.oepc.i [2024-05-07 08:38:34,184 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-07 08:38:34,403 INFO L384 CDTParser]: Found 1 translation units. [2024-05-07 08:38:34,404 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/thin002_power.oepc.i [2024-05-07 08:38:34,420 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/309ff9be5/d483d1fdf8494cc391b256c38d7d96a4/FLAGffd458074 [2024-05-07 08:38:34,434 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/309ff9be5/d483d1fdf8494cc391b256c38d7d96a4 [2024-05-07 08:38:34,437 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-07 08:38:34,438 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-07 08:38:34,439 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-07 08:38:34,439 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-07 08:38:34,443 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-07 08:38:34,443 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,444 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@556001be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34, skipping insertion in model container [2024-05-07 08:38:34,444 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,490 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-07 08:38:34,678 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/thin002_power.oepc.i[995,1008] [2024-05-07 08:38:34,840 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 08:38:34,854 INFO L202 MainTranslator]: Completed pre-run [2024-05-07 08:38:34,864 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/thin002_power.oepc.i[995,1008] [2024-05-07 08:38:34,892 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 08:38:34,915 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 08:38:34,915 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 08:38:34,920 INFO L206 MainTranslator]: Completed translation [2024-05-07 08:38:34,920 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34 WrapperNode [2024-05-07 08:38:34,920 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-07 08:38:34,921 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-07 08:38:34,921 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-07 08:38:34,921 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-07 08:38:34,926 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,937 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,954 INFO L138 Inliner]: procedures = 177, calls = 82, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 154 [2024-05-07 08:38:34,954 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-07 08:38:34,954 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-07 08:38:34,955 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-07 08:38:34,955 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-07 08:38:34,963 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,963 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,967 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,967 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,989 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,991 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,993 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,994 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:34,996 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-07 08:38:34,997 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-07 08:38:34,997 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-07 08:38:34,997 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-07 08:38:34,998 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (1/1) ... [2024-05-07 08:38:35,021 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 08:38:35,033 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 08:38:35,044 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-07 08:38:35,056 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-07 08:38:35,081 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-07 08:38:35,081 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-07 08:38:35,081 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-07 08:38:35,082 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-07 08:38:35,082 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-07 08:38:35,082 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-07 08:38:35,082 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2024-05-07 08:38:35,082 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2024-05-07 08:38:35,082 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2024-05-07 08:38:35,082 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2024-05-07 08:38:35,083 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2024-05-07 08:38:35,084 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2024-05-07 08:38:35,084 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2024-05-07 08:38:35,084 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2024-05-07 08:38:35,084 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-07 08:38:35,084 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-07 08:38:35,084 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-07 08:38:35,084 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-07 08:38:35,085 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-07 08:38:35,225 INFO L241 CfgBuilder]: Building ICFG [2024-05-07 08:38:35,227 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-07 08:38:35,601 INFO L282 CfgBuilder]: Performing block encoding [2024-05-07 08:38:35,778 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-07 08:38:35,778 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-07 08:38:35,780 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 08:38:35 BoogieIcfgContainer [2024-05-07 08:38:35,780 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-07 08:38:35,781 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-07 08:38:35,781 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-07 08:38:35,784 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-07 08:38:35,784 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.05 08:38:34" (1/3) ... [2024-05-07 08:38:35,785 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d157a28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 08:38:35, skipping insertion in model container [2024-05-07 08:38:35,785 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 08:38:34" (2/3) ... [2024-05-07 08:38:35,785 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d157a28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 08:38:35, skipping insertion in model container [2024-05-07 08:38:35,785 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 08:38:35" (3/3) ... [2024-05-07 08:38:35,786 INFO L112 eAbstractionObserver]: Analyzing ICFG thin002_power.oepc.i [2024-05-07 08:38:35,792 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-07 08:38:35,799 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-07 08:38:35,799 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-07 08:38:35,799 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-07 08:38:35,852 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-05-07 08:38:35,883 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-07 08:38:35,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-07 08:38:35,883 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 08:38:35,885 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-07 08:38:35,900 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-07 08:38:35,915 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-07 08:38:35,924 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:38:35,925 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-07 08:38:35,930 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2792d066, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=RANDOM, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=20, mConComCheckerRandomSeed=213, mConComCheckerConditionCriterion=false [2024-05-07 08:38:35,930 INFO L358 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2024-05-07 08:38:35,993 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 08:38:35,995 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:38:35,995 INFO L85 PathProgramCache]: Analyzing trace with hash -467470751, now seen corresponding path program 1 times [2024-05-07 08:38:36,001 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:38:36,002 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995060305] [2024-05-07 08:38:36,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:38:36,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:38:36,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:38:36,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:38:36,331 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:38:36,331 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995060305] [2024-05-07 08:38:36,331 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1995060305] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:38:36,331 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:38:36,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-07 08:38:36,333 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125405451] [2024-05-07 08:38:36,333 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:38:36,338 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-05-07 08:38:36,338 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:38:36,358 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-07 08:38:36,359 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-05-07 08:38:36,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:38:36,361 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:38:36,362 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 62.0) internal successors, (124), 2 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:38:36,363 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:38:36,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:38:36,449 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-07 08:38:36,449 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 08:38:36,449 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:38:36,450 INFO L85 PathProgramCache]: Analyzing trace with hash 1002235710, now seen corresponding path program 1 times [2024-05-07 08:38:36,450 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:38:36,450 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315587332] [2024-05-07 08:38:36,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:38:36,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:38:36,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:38:36,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:38:36,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:38:36,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [315587332] [2024-05-07 08:38:36,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [315587332] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:38:36,973 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:38:36,973 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-07 08:38:36,974 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310954743] [2024-05-07 08:38:36,974 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:38:36,975 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-07 08:38:36,975 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:38:36,976 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-07 08:38:36,976 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-05-07 08:38:36,976 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:38:36,977 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:38:36,977 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 17.571428571428573) internal successors, (123), 7 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:38:36,977 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:38:36,977 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:38:37,538 INFO L85 PathProgramCache]: Analyzing trace with hash -1129686092, now seen corresponding path program 1 times [2024-05-07 08:38:37,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:38:37,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:38:37,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:38:37,594 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:38:37,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:38:46,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:38:46,519 INFO L85 PathProgramCache]: Analyzing trace with hash -424723567, now seen corresponding path program 1 times [2024-05-07 08:38:46,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:38:46,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:38:46,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:38:46,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:38:46,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:38:46,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:38:46,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:38:47,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:38:47,189 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-07 08:38:47,189 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2024-05-07 08:39:03,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:39:03,988 INFO L85 PathProgramCache]: Analyzing trace with hash 748459714, now seen corresponding path program 1 times [2024-05-07 08:39:03,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:39:03,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:39:04,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:39:04,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:39:04,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:39:04,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:39:04,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:39:04,451 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:39:04,451 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-07 08:39:04,452 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2024-05-07 08:39:04,660 INFO L85 PathProgramCache]: Analyzing trace with hash -1129686092, now seen corresponding path program 2 times [2024-05-07 08:39:04,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:39:04,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:39:04,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:39:04,703 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:39:04,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:39:04,913 INFO L85 PathProgramCache]: Analyzing trace with hash -1916961210, now seen corresponding path program 1 times [2024-05-07 08:39:04,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:39:04,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:39:04,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:39:05,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:39:05,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:39:05,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:39:05,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:39:05,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:39:05,087 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-07 08:39:05,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=217, Unknown=0, NotChecked=0, Total=272 [2024-05-07 08:39:21,931 INFO L85 PathProgramCache]: Analyzing trace with hash 558190313, now seen corresponding path program 1 times [2024-05-07 08:39:21,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:39:21,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:39:21,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:39:21,959 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:39:21,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:40:23,375 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:40:23,525 INFO L85 PathProgramCache]: Analyzing trace with hash -2013928929, now seen corresponding path program 1 times [2024-05-07 08:40:23,525 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:40:23,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:40:23,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:40:23,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:40:23,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:40:23,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:40:23,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:40:23,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:40:23,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-07 08:40:23,822 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2024-05-07 08:40:23,975 INFO L85 PathProgramCache]: Analyzing trace with hash -1129686092, now seen corresponding path program 3 times [2024-05-07 08:40:23,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:40:23,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:40:24,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:40:24,003 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:40:24,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:00,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:41:01,357 INFO L85 PathProgramCache]: Analyzing trace with hash 621133596, now seen corresponding path program 1 times [2024-05-07 08:41:01,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:41:01,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:41:01,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:41:01,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:41:01,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:41:01,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:41:01,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:41:01,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:41:01,666 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-07 08:41:01,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=438, Unknown=0, NotChecked=0, Total=506 [2024-05-07 08:41:42,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:41:44,831 INFO L85 PathProgramCache]: Analyzing trace with hash -503527332, now seen corresponding path program 1 times [2024-05-07 08:41:44,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:41:44,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:41:44,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:44,845 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:41:44,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:48,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:41:49,447 INFO L85 PathProgramCache]: Analyzing trace with hash -893149737, now seen corresponding path program 1 times [2024-05-07 08:41:49,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:41:49,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:41:49,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:49,459 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:41:49,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:53,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:41:54,204 INFO L85 PathProgramCache]: Analyzing trace with hash -1829926506, now seen corresponding path program 1 times [2024-05-07 08:41:54,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:41:54,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:41:54,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:41:54,215 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:41:54,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:29,452 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:42:30,711 INFO L85 PathProgramCache]: Analyzing trace with hash -1207796443, now seen corresponding path program 1 times [2024-05-07 08:42:30,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:42:30,711 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:42:30,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:30,725 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:42:30,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:34,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:42:38,304 INFO L85 PathProgramCache]: Analyzing trace with hash -2146505763, now seen corresponding path program 1 times [2024-05-07 08:42:38,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:42:38,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:42:38,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:38,318 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:42:38,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:42,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:42:42,630 INFO L85 PathProgramCache]: Analyzing trace with hash 549344669, now seen corresponding path program 1 times [2024-05-07 08:42:42,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:42:42,631 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:42:42,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:42,641 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:42:42,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:46,903 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:42:48,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1297677974, now seen corresponding path program 1 times [2024-05-07 08:42:48,158 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:42:48,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:42:48,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:48,169 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:42:48,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:51,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:42:53,233 INFO L85 PathProgramCache]: Analyzing trace with hash 1842975968, now seen corresponding path program 1 times [2024-05-07 08:42:53,234 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:42:53,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:42:53,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:53,290 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:42:53,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:56,803 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:42:58,002 INFO L85 PathProgramCache]: Analyzing trace with hash 1999113581, now seen corresponding path program 1 times [2024-05-07 08:42:58,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:42:58,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:42:58,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:42:58,021 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:42:58,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:02,032 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 08:43:03,314 INFO L85 PathProgramCache]: Analyzing trace with hash 521691998, now seen corresponding path program 1 times [2024-05-07 08:43:03,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:43:03,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:43:03,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:03,325 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:43:03,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:07,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:43:07,767 INFO L85 PathProgramCache]: Analyzing trace with hash -150652676, now seen corresponding path program 1 times [2024-05-07 08:43:07,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:43:07,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:43:07,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:07,776 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:43:07,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:11,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:43:12,199 INFO L85 PathProgramCache]: Analyzing trace with hash -372951546, now seen corresponding path program 1 times [2024-05-07 08:43:12,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:43:12,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:43:12,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:12,213 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:43:12,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:42,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:43:42,535 INFO L85 PathProgramCache]: Analyzing trace with hash -1960306895, now seen corresponding path program 1 times [2024-05-07 08:43:42,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:43:42,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:43:42,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:42,548 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:43:42,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:46,636 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:43:47,017 INFO L85 PathProgramCache]: Analyzing trace with hash 1231240497, now seen corresponding path program 1 times [2024-05-07 08:43:47,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:43:47,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:43:47,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:47,029 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:43:47,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:47,180 INFO L85 PathProgramCache]: Analyzing trace with hash 1061859504, now seen corresponding path program 1 times [2024-05-07 08:43:47,180 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:43:47,181 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:43:47,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:47,198 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:43:47,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:51,515 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:43:51,888 INFO L85 PathProgramCache]: Analyzing trace with hash -438292528, now seen corresponding path program 1 times [2024-05-07 08:43:51,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:43:51,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:43:51,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:43:51,897 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:43:51,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:05,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:44:06,063 INFO L85 PathProgramCache]: Analyzing trace with hash -1780307459, now seen corresponding path program 1 times [2024-05-07 08:44:06,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:44:06,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:44:06,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:06,078 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:44:06,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:25,188 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:44:25,571 INFO L85 PathProgramCache]: Analyzing trace with hash -401490327, now seen corresponding path program 1 times [2024-05-07 08:44:25,572 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:44:25,572 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:44:25,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:25,580 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:44:25,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:29,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:44:30,369 INFO L85 PathProgramCache]: Analyzing trace with hash 524225830, now seen corresponding path program 1 times [2024-05-07 08:44:30,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:44:30,369 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:44:30,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:30,379 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:44:30,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:34,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:44:35,290 INFO L85 PathProgramCache]: Analyzing trace with hash 1645414162, now seen corresponding path program 1 times [2024-05-07 08:44:35,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:44:35,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:44:35,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:35,298 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:44:35,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:37,495 INFO L85 PathProgramCache]: Analyzing trace with hash 1097689778, now seen corresponding path program 1 times [2024-05-07 08:44:37,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:44:37,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:44:37,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:37,513 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:44:37,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:44:37,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:44:37,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-07 08:44:37,689 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable4,SelfDestructingSolverStorable18,SelfDestructingSolverStorable3,SelfDestructingSolverStorable19,SelfDestructingSolverStorable2,SelfDestructingSolverStorable1,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable10,SelfDestructingSolverStorable32,SelfDestructingSolverStorable11,SelfDestructingSolverStorable33,SelfDestructingSolverStorable12,SelfDestructingSolverStorable34,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable35,SelfDestructingSolverStorable14,SelfDestructingSolverStorable36,SelfDestructingSolverStorable15,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17,SelfDestructingSolverStorable20,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable22,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-05-07 08:44:37,689 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 08:44:37,689 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:44:37,689 INFO L85 PathProgramCache]: Analyzing trace with hash 877773854, now seen corresponding path program 1 times [2024-05-07 08:44:37,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:44:37,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876704759] [2024-05-07 08:44:37,689 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:44:37,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:44:37,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:44:37,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:44:37,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:44:37,891 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876704759] [2024-05-07 08:44:37,891 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1876704759] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:44:37,891 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:44:37,891 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-07 08:44:37,891 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072751773] [2024-05-07 08:44:37,891 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:44:37,892 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-07 08:44:37,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:44:37,893 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-07 08:44:37,893 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-05-07 08:44:37,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:44:37,893 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:44:37,893 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 18.285714285714285) internal successors, (128), 7 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:44:37,893 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:44:37,893 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-07 08:44:37,893 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:45:36,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:45:36,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-07 08:45:36,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:45:36,982 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-05-07 08:45:36,982 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 08:45:36,982 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:45:36,982 INFO L85 PathProgramCache]: Analyzing trace with hash -1935576508, now seen corresponding path program 2 times [2024-05-07 08:45:36,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:45:36,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481422609] [2024-05-07 08:45:36,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:45:36,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:45:37,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 08:45:37,187 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 08:45:37,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 08:45:37,190 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481422609] [2024-05-07 08:45:37,190 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1481422609] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 08:45:37,190 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 08:45:37,190 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-05-07 08:45:37,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059476874] [2024-05-07 08:45:37,190 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 08:45:37,191 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-05-07 08:45:37,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 08:45:37,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-07 08:45:37,191 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-05-07 08:45:37,191 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:45:37,191 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 08:45:37,191 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 18.285714285714285) internal successors, (128), 7 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 08:45:37,191 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:45:37,192 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 10 states. [2024-05-07 08:45:37,192 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:45:37,192 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:45:42,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2024-05-07 08:45:42,910 INFO L85 PathProgramCache]: Analyzing trace with hash -1761589767, now seen corresponding path program 1 times [2024-05-07 08:45:42,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:45:42,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:45:42,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:45:42,918 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:45:42,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:45:51,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 08:45:51,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-05-07 08:45:51,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:45:51,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-05-07 08:45:51,357 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38,SelfDestructingSolverStorable39 [2024-05-07 08:45:51,357 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 2 more)] === [2024-05-07 08:45:51,358 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 08:45:51,358 INFO L85 PathProgramCache]: Analyzing trace with hash -322586646, now seen corresponding path program 3 times [2024-05-07 08:45:51,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 08:45:51,358 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853496313] [2024-05-07 08:45:51,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 08:45:51,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 08:45:51,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:45:51,404 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 08:45:51,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 08:45:51,434 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-05-07 08:45:51,435 INFO L363 BasicCegarLoop]: Counterexample is feasible [2024-05-07 08:45:51,436 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (4 of 5 remaining) [2024-05-07 08:45:51,437 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 5 remaining) [2024-05-07 08:45:51,437 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 5 remaining) [2024-05-07 08:45:51,437 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 5 remaining) [2024-05-07 08:45:51,438 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 5 remaining) [2024-05-07 08:45:51,438 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-05-07 08:45:51,441 INFO L448 BasicCegarLoop]: Path program histogram: [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-07 08:45:51,444 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-07 08:45:51,444 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-07 08:45:51,526 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre22 could not be translated [2024-05-07 08:45:51,528 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre24 could not be translated [2024-05-07 08:45:51,528 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre26 could not be translated [2024-05-07 08:45:51,529 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre28 could not be translated [2024-05-07 08:45:51,553 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.05 08:45:51 BasicIcfg [2024-05-07 08:45:51,553 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-07 08:45:51,553 INFO L158 Benchmark]: Toolchain (without parser) took 437115.44ms. Allocated memory was 305.1MB in the beginning and 2.4GB in the end (delta: 2.1GB). Free memory was 232.7MB in the beginning and 1.9GB in the end (delta: -1.6GB). Peak memory consumption was 479.9MB. Max. memory is 8.0GB. [2024-05-07 08:45:51,553 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 184.5MB. Free memory is still 147.4MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-07 08:45:51,553 INFO L158 Benchmark]: CACSL2BoogieTranslator took 481.92ms. Allocated memory is still 305.1MB. Free memory was 232.5MB in the beginning and 258.4MB in the end (delta: -25.9MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. [2024-05-07 08:45:51,554 INFO L158 Benchmark]: Boogie Procedure Inliner took 33.03ms. Allocated memory is still 305.1MB. Free memory was 257.9MB in the beginning and 255.7MB in the end (delta: 2.2MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2024-05-07 08:45:51,554 INFO L158 Benchmark]: Boogie Preprocessor took 41.94ms. Allocated memory is still 305.1MB. Free memory was 255.7MB in the beginning and 253.1MB in the end (delta: 2.6MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. [2024-05-07 08:45:51,554 INFO L158 Benchmark]: RCFGBuilder took 782.77ms. Allocated memory is still 305.1MB. Free memory was 253.1MB in the beginning and 256.1MB in the end (delta: -2.9MB). Peak memory consumption was 60.5MB. Max. memory is 8.0GB. [2024-05-07 08:45:51,554 INFO L158 Benchmark]: TraceAbstraction took 435771.78ms. Allocated memory was 305.1MB in the beginning and 2.4GB in the end (delta: 2.1GB). Free memory was 254.5MB in the beginning and 1.9GB in the end (delta: -1.6GB). Peak memory consumption was 500.5MB. Max. memory is 8.0GB. [2024-05-07 08:45:51,555 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 184.5MB. Free memory is still 147.4MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 481.92ms. Allocated memory is still 305.1MB. Free memory was 232.5MB in the beginning and 258.4MB in the end (delta: -25.9MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 33.03ms. Allocated memory is still 305.1MB. Free memory was 257.9MB in the beginning and 255.7MB in the end (delta: 2.2MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 41.94ms. Allocated memory is still 305.1MB. Free memory was 255.7MB in the beginning and 253.1MB in the end (delta: 2.6MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. * RCFGBuilder took 782.77ms. Allocated memory is still 305.1MB. Free memory was 253.1MB in the beginning and 256.1MB in the end (delta: -2.9MB). Peak memory consumption was 60.5MB. Max. memory is 8.0GB. * TraceAbstraction took 435771.78ms. Allocated memory was 305.1MB in the beginning and 2.4GB in the end (delta: 2.1GB). Free memory was 254.5MB in the beginning and 1.9GB in the end (delta: -1.6GB). Peak memory consumption was 500.5MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre22 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre24 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre26 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre28 could not be translated - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1793005, independent: 1772763, independent conditional: 1772560, independent unconditional: 203, dependent: 20242, dependent conditional: 20242, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1792293, independent: 1772763, independent conditional: 1772560, independent unconditional: 203, dependent: 19530, dependent conditional: 19530, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1792293, independent: 1772763, independent conditional: 1772560, independent unconditional: 203, dependent: 19530, dependent conditional: 19530, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 1792293, independent: 1772763, independent conditional: 1772560, independent unconditional: 203, dependent: 19530, dependent conditional: 19530, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1871019, independent: 1772763, independent conditional: 863201, independent unconditional: 909562, dependent: 98256, dependent conditional: 78731, dependent unconditional: 19525, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1871019, independent: 1772763, independent conditional: 392288, independent unconditional: 1380475, dependent: 98256, dependent conditional: 35306, dependent unconditional: 62950, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1871019, independent: 1772763, independent conditional: 392288, independent unconditional: 1380475, dependent: 98256, dependent conditional: 35306, dependent unconditional: 62950, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1707, independent: 1646, independent conditional: 304, independent unconditional: 1342, dependent: 61, dependent conditional: 38, dependent unconditional: 23, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1707, independent: 1603, independent conditional: 0, independent unconditional: 1603, dependent: 104, dependent conditional: 0, dependent unconditional: 104, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 104, independent: 43, independent conditional: 34, independent unconditional: 9, dependent: 61, dependent conditional: 38, dependent unconditional: 23, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 104, independent: 43, independent conditional: 34, independent unconditional: 9, dependent: 61, dependent conditional: 38, dependent unconditional: 23, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 838, independent: 111, independent conditional: 105, independent unconditional: 5, dependent: 728, dependent conditional: 530, dependent unconditional: 197, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1871019, independent: 1771117, independent conditional: 391984, independent unconditional: 1379133, dependent: 98195, dependent conditional: 35268, dependent unconditional: 62927, unknown: 1707, unknown conditional: 342, unknown unconditional: 1365] , Statistics on independence cache: Total cache size (in pairs): 1707, Positive cache size: 1646, Positive conditional cache size: 304, Positive unconditional cache size: 1342, Negative cache size: 61, Negative conditional cache size: 38, Negative unconditional cache size: 23, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 514338, Maximal queried relation: 8, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1871019, independent: 1772763, independent conditional: 863201, independent unconditional: 909562, dependent: 98256, dependent conditional: 78731, dependent unconditional: 19525, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1871019, independent: 1772763, independent conditional: 392288, independent unconditional: 1380475, dependent: 98256, dependent conditional: 35306, dependent unconditional: 62950, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1871019, independent: 1772763, independent conditional: 392288, independent unconditional: 1380475, dependent: 98256, dependent conditional: 35306, dependent unconditional: 62950, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1707, independent: 1646, independent conditional: 304, independent unconditional: 1342, dependent: 61, dependent conditional: 38, dependent unconditional: 23, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1707, independent: 1603, independent conditional: 0, independent unconditional: 1603, dependent: 104, dependent conditional: 0, dependent unconditional: 104, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 104, independent: 43, independent conditional: 34, independent unconditional: 9, dependent: 61, dependent conditional: 38, dependent unconditional: 23, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 104, independent: 43, independent conditional: 34, independent unconditional: 9, dependent: 61, dependent conditional: 38, dependent unconditional: 23, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 838, independent: 111, independent conditional: 105, independent unconditional: 5, dependent: 728, dependent conditional: 530, dependent unconditional: 197, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1871019, independent: 1771117, independent conditional: 391984, independent unconditional: 1379133, dependent: 98195, dependent conditional: 35268, dependent unconditional: 62927, unknown: 1707, unknown conditional: 342, unknown unconditional: 1365] , Statistics on independence cache: Total cache size (in pairs): 1707, Positive cache size: 1646, Positive conditional cache size: 304, Positive unconditional cache size: 1342, Negative cache size: 61, Negative conditional cache size: 38, Negative unconditional cache size: 23, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 514338 ], Independence queries for same thread: 712 - CounterExampleResult [Line: 19]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L711] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L713] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L714] 0 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX=0] [L715] 0 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX=0] [L716] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX=0] [L717] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX=0] [L718] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX=0] [L719] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX=0] [L720] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX=0] [L721] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX=0] [L722] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX=0] [L723] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX=0] [L724] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX=0] [L725] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX=0] [L726] 0 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX=0] [L727] 0 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX=0] [L728] 0 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX=0] [L729] 0 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX=0] [L730] 0 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX=0] [L731] 0 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0] [L733] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L735] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L737] 0 int __unbuffered_p3_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0] [L739] 0 int a = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a={3:0}] [L740] 0 _Bool a$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a={3:0}] [L741] 0 int a$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a={3:0}] [L742] 0 _Bool a$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a={3:0}] [L743] 0 _Bool a$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a={3:0}] [L744] 0 _Bool a$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a={3:0}] [L745] 0 _Bool a$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a={3:0}] [L746] 0 _Bool a$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a={3:0}] [L747] 0 _Bool a$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a={3:0}] [L748] 0 _Bool a$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a={3:0}] [L749] 0 _Bool a$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a={3:0}] [L750] 0 _Bool a$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a={3:0}] [L751] 0 _Bool a$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a={3:0}] [L752] 0 _Bool a$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a={3:0}] [L753] 0 int *a$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a={3:0}] [L754] 0 int a$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a={3:0}] [L755] 0 _Bool a$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a={3:0}] [L756] 0 int a$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a={3:0}] [L757] 0 _Bool a$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}] [L758] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0] [L759] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0, main$tmp_guard1=0] [L761] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L763] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L765] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z=0] [L766] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z=0] [L767] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z=0] [L768] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L861] 0 pthread_t t2705; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2705={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L862] FCALL, FORK 0 pthread_create(&t2705, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2705={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L863] 0 pthread_t t2706; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L864] FCALL, FORK 0 pthread_create(&t2706, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L865] 0 pthread_t t2707; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, t2707={9:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L866] FCALL, FORK 0 pthread_create(&t2707, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, t2707={9:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L867] 0 pthread_t t2708; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, t2707={9:0}, t2708={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L868] FCALL, FORK 0 pthread_create(&t2708, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, t2707={9:0}, t2708={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L772] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L773] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L774] 1 a$flush_delayed = weak$$choice2 [L775] EXPR 1 \read(a) [L775] 1 a$mem_tmp = a [L776] 1 weak$$choice1 = __VERIFIER_nondet_bool() [L777] EXPR 1 !a$w_buff0_used ? a : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (weak$$choice0 ? a : (weak$$choice1 ? a$w_buff0 : a$w_buff1)) : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (weak$$choice0 ? a$w_buff1 : a$w_buff0) : (weak$$choice0 ? a$w_buff0 : a)))) [L777] EXPR 1 \read(a) [L777] EXPR 1 !a$w_buff0_used ? a : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (weak$$choice0 ? a : (weak$$choice1 ? a$w_buff0 : a$w_buff1)) : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (weak$$choice0 ? a$w_buff1 : a$w_buff0) : (weak$$choice0 ? a$w_buff0 : a)))) [L777] 1 a = !a$w_buff0_used ? a : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (weak$$choice0 ? a : (weak$$choice1 ? a$w_buff0 : a$w_buff1)) : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (weak$$choice0 ? a$w_buff1 : a$w_buff0) : (weak$$choice0 ? a$w_buff0 : a)))) [L778] 1 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? a$w_buff0 : a$w_buff0)))) [L779] 1 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff1 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? a$w_buff1 : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? a$w_buff1 : a$w_buff1)))) [L780] 1 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? weak$$choice0 || !weak$$choice1 : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? weak$$choice0 : weak$$choice0)))) [L781] 1 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? weak$$choice0 : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) [L782] 1 a$r_buff0_thd1 = weak$$choice2 ? a$r_buff0_thd1 : (!a$w_buff0_used ? a$r_buff0_thd1 : (a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? a$r_buff0_thd1 : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) [L783] 1 a$r_buff1_thd1 = weak$$choice2 ? a$r_buff1_thd1 : (!a$w_buff0_used ? a$r_buff1_thd1 : (a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : (a$w_buff0_used && !a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (weak$$choice0 ? a$r_buff1_thd1 : (_Bool)0) : (a$w_buff0_used && a$r_buff1_thd1 && a$w_buff1_used && !a$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)))) [L784] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L785] 1 __unbuffered_p0_EAX$read_delayed_var = &a [L786] EXPR 1 \read(a) [L786] 1 __unbuffered_p0_EAX = a [L787] EXPR 1 a$flush_delayed ? a$mem_tmp : a [L787] 1 a = a$flush_delayed ? a$mem_tmp : a [L788] 1 a$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=0, y=0, z=0] [L791] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=0, z=0] [L803] 2 __unbuffered_p1_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=0, z=0] [L806] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=0] [L811] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=0] [L813] 2 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=0] [L818] 3 __unbuffered_p2_EAX = y VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=0] [L821] 3 z = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L826] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L828] 3 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L833] 4 __unbuffered_p3_EAX = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L836] 4 a = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L839] EXPR 4 a$w_buff0_used && a$r_buff0_thd4 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd4 ? a$w_buff1 : a) [L839] EXPR 4 a$w_buff1_used && a$r_buff1_thd4 ? a$w_buff1 : a [L839] EXPR 4 \read(a) [L839] EXPR 4 a$w_buff1_used && a$r_buff1_thd4 ? a$w_buff1 : a [L839] EXPR 4 a$w_buff0_used && a$r_buff0_thd4 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd4 ? a$w_buff1 : a) [L839] 4 a = a$w_buff0_used && a$r_buff0_thd4 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd4 ? a$w_buff1 : a) [L840] 4 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd4 ? (_Bool)0 : a$w_buff0_used [L841] 4 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd4 || a$w_buff1_used && a$r_buff1_thd4 ? (_Bool)0 : a$w_buff1_used [L842] 4 a$r_buff0_thd4 = a$w_buff0_used && a$r_buff0_thd4 ? (_Bool)0 : a$r_buff0_thd4 [L843] 4 a$r_buff1_thd4 = a$w_buff0_used && a$r_buff0_thd4 || a$w_buff1_used && a$r_buff1_thd4 ? (_Bool)0 : a$r_buff1_thd4 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L846] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L848] 4 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L796] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L870] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, t2707={9:0}, t2708={5:0}, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L872] CALL 0 assume_abort_if_not(main$tmp_guard0) [L4] COND FALSE 0 !(!cond) VAL [\old(cond)=1, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L872] RET 0 assume_abort_if_not(main$tmp_guard0) [L874] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L874] EXPR 0 a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a [L874] EXPR 0 \read(a) [L874] EXPR 0 a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a [L874] EXPR 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L874] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L875] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L876] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L877] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 [L878] 0 a$r_buff1_thd0 = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$r_buff1_thd0 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, t2707={9:0}, t2708={5:0}, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L881] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L882] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L882] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L882] EXPR 0 \read(*__unbuffered_p0_EAX$read_delayed_var) [L882] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L882] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L882] 0 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L883] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1 && __unbuffered_p3_EAX == 1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2705={7:0}, t2706={8:0}, t2707={9:0}, t2708={5:0}, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L885] CALL 0 __VERIFIER_assert(main$tmp_guard1) [L19] COND TRUE 0 !expression VAL [\old(expression)=0, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] [L19] 0 reach_error() VAL [\old(expression)=0, \result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={3:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, a={3:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z=1] - UnprovableResult [Line: 864]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 868]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 866]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 862]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 188 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 435.5s, OverallIterations: 5, TraceHistogramMax: 0, PathProgramHistogramMax: 3, EmptinessCheckTime: 434.1s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 26, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 631 NumberOfCodeBlocks, 631 NumberOfCodeBlocksAsserted, 5 NumberOfCheckSat, 499 ConstructedInterpolants, 0 QuantifiedInterpolants, 999 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 4 InterpolantComputations, 4 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 417.7s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 5, ConditionalCommutativityConditionCalculations: 121, ConditionalCommutativityTraceChecks: 31, ConditionalCommutativityImperfectProofs: 0 RESULT: Ultimate proved your program to be incorrect! [2024-05-07 08:45:51,572 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-07 08:45:51,830 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...