/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking RANDOM --traceabstraction.probability.for.random.criterion 20 --traceabstraction.seed.for.random.criterion 546 --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-07 17:08:07,981 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-07 17:08:08,027 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-07 17:08:08,031 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-07 17:08:08,031 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-07 17:08:08,046 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-07 17:08:08,046 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-07 17:08:08,046 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-07 17:08:08,047 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-07 17:08:08,047 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-07 17:08:08,047 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-07 17:08:08,048 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-07 17:08:08,048 INFO L153 SettingsManager]: * Use SBE=true [2024-05-07 17:08:08,048 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-07 17:08:08,048 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-07 17:08:08,049 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-07 17:08:08,049 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-07 17:08:08,049 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-07 17:08:08,049 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-07 17:08:08,050 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-07 17:08:08,050 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-07 17:08:08,058 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-07 17:08:08,059 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-07 17:08:08,059 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-07 17:08:08,059 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-07 17:08:08,059 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-07 17:08:08,060 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-07 17:08:08,060 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-07 17:08:08,060 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-07 17:08:08,060 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 17:08:08,060 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-07 17:08:08,061 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-07 17:08:08,061 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-07 17:08:08,061 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-07 17:08:08,061 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-07 17:08:08,061 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-07 17:08:08,062 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-07 17:08:08,062 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-07 17:08:08,062 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-07 17:08:08,062 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> RANDOM Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: probability for random criterion as percentage -> 20 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: seed for random criterion -> 546 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-07 17:08:08,257 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-07 17:08:08,288 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-07 17:08:08,291 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-07 17:08:08,292 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-07 17:08:08,293 INFO L274 PluginConnector]: CDTParser initialized [2024-05-07 17:08:08,294 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i [2024-05-07 17:08:09,341 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-07 17:08:09,601 INFO L384 CDTParser]: Found 1 translation units. [2024-05-07 17:08:09,601 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i [2024-05-07 17:08:09,623 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/0945bd8d0/aef71dd023824847a3f99f6f0d2fbb36/FLAG41a84788d [2024-05-07 17:08:09,638 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/0945bd8d0/aef71dd023824847a3f99f6f0d2fbb36 [2024-05-07 17:08:09,640 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-07 17:08:09,641 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-07 17:08:09,650 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-07 17:08:09,650 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-07 17:08:09,655 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-07 17:08:09,655 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 05:08:09" (1/1) ... [2024-05-07 17:08:09,658 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@51767930 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:09, skipping insertion in model container [2024-05-07 17:08:09,659 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 05:08:09" (1/1) ... [2024-05-07 17:08:09,698 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-07 17:08:09,834 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i[994,1007] [2024-05-07 17:08:10,045 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 17:08:10,057 INFO L202 MainTranslator]: Completed pre-run [2024-05-07 17:08:10,069 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe019_power.opt.i[994,1007] [2024-05-07 17:08:10,131 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 17:08:10,161 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 17:08:10,161 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 17:08:10,167 INFO L206 MainTranslator]: Completed translation [2024-05-07 17:08:10,167 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10 WrapperNode [2024-05-07 17:08:10,167 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-07 17:08:10,168 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-07 17:08:10,168 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-07 17:08:10,169 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-07 17:08:10,175 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,193 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,211 INFO L138 Inliner]: procedures = 177, calls = 88, calls flagged for inlining = 5, calls inlined = 5, statements flattened = 193 [2024-05-07 17:08:10,211 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-07 17:08:10,212 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-07 17:08:10,215 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-07 17:08:10,216 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-07 17:08:10,223 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,223 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,237 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,237 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,245 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,247 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,265 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,267 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,270 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-07 17:08:10,270 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-07 17:08:10,271 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-07 17:08:10,271 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-07 17:08:10,271 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (1/1) ... [2024-05-07 17:08:10,276 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 17:08:10,284 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 17:08:10,312 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-07 17:08:10,314 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-07 17:08:10,352 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-07 17:08:10,352 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-07 17:08:10,353 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-07 17:08:10,353 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-07 17:08:10,353 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-07 17:08:10,354 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-07 17:08:10,374 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2024-05-07 17:08:10,374 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2024-05-07 17:08:10,374 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2024-05-07 17:08:10,374 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2024-05-07 17:08:10,374 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2024-05-07 17:08:10,374 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2024-05-07 17:08:10,374 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2024-05-07 17:08:10,374 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2024-05-07 17:08:10,375 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-07 17:08:10,375 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-07 17:08:10,375 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-07 17:08:10,375 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-07 17:08:10,376 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-07 17:08:10,496 INFO L241 CfgBuilder]: Building ICFG [2024-05-07 17:08:10,497 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-07 17:08:10,828 INFO L282 CfgBuilder]: Performing block encoding [2024-05-07 17:08:11,049 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-07 17:08:11,049 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-07 17:08:11,050 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 05:08:11 BoogieIcfgContainer [2024-05-07 17:08:11,051 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-07 17:08:11,054 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-07 17:08:11,054 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-07 17:08:11,057 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-07 17:08:11,057 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.05 05:08:09" (1/3) ... [2024-05-07 17:08:11,058 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e4cec8c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 05:08:11, skipping insertion in model container [2024-05-07 17:08:11,058 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 05:08:10" (2/3) ... [2024-05-07 17:08:11,058 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@e4cec8c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 05:08:11, skipping insertion in model container [2024-05-07 17:08:11,059 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 05:08:11" (3/3) ... [2024-05-07 17:08:11,059 INFO L112 eAbstractionObserver]: Analyzing ICFG safe019_power.opt.i [2024-05-07 17:08:11,066 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-07 17:08:11,074 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-07 17:08:11,074 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations. [2024-05-07 17:08:11,074 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-07 17:08:11,141 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-05-07 17:08:11,181 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-07 17:08:11,182 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-07 17:08:11,182 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 17:08:11,198 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-07 17:08:11,204 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-07 17:08:11,241 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-07 17:08:11,252 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 17:08:11,253 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-07 17:08:11,260 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@755e0230, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=RANDOM, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=20, mConComCheckerRandomSeed=546, mConComCheckerConditionCriterion=false [2024-05-07 17:08:11,260 INFO L358 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2024-05-07 17:08:11,302 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting P1Err0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 17:08:11,305 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 17:08:11,305 INFO L85 PathProgramCache]: Analyzing trace with hash 1022077230, now seen corresponding path program 1 times [2024-05-07 17:08:11,312 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 17:08:11,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744779685] [2024-05-07 17:08:11,313 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:11,313 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:11,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 17:08:11,904 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 17:08:11,905 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 17:08:11,905 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744779685] [2024-05-07 17:08:11,906 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744779685] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 17:08:11,906 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 17:08:11,906 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-07 17:08:11,907 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1469363355] [2024-05-07 17:08:11,908 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 17:08:11,913 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-07 17:08:11,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 17:08:11,945 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-07 17:08:11,946 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-07 17:08:11,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:08:11,948 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 17:08:11,949 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 35.5) internal successors, (71), 3 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 17:08:11,949 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:08:12,055 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:08:12,055 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-07 17:08:12,056 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 17:08:12,056 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 17:08:12,056 INFO L85 PathProgramCache]: Analyzing trace with hash -955608015, now seen corresponding path program 1 times [2024-05-07 17:08:12,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 17:08:12,056 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184214241] [2024-05-07 17:08:12,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:12,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:12,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 17:08:12,638 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 17:08:12,638 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 17:08:12,639 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184214241] [2024-05-07 17:08:12,639 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [184214241] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 17:08:12,639 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 17:08:12,639 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-07 17:08:12,640 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82134081] [2024-05-07 17:08:12,640 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 17:08:12,641 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-07 17:08:12,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 17:08:12,643 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-07 17:08:12,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-05-07 17:08:12,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:08:12,644 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 17:08:12,644 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 19.666666666666668) internal successors, (118), 6 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 17:08:12,645 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:08:12,645 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:08:12,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:08:12,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:08:12,950 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-05-07 17:08:12,950 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 17:08:12,950 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 17:08:12,950 INFO L85 PathProgramCache]: Analyzing trace with hash -1539437966, now seen corresponding path program 1 times [2024-05-07 17:08:12,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 17:08:12,951 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [13807986] [2024-05-07 17:08:12,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:12,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:13,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 17:08:13,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 17:08:13,365 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 17:08:13,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [13807986] [2024-05-07 17:08:13,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [13807986] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 17:08:13,366 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 17:08:13,366 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-05-07 17:08:13,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [740891051] [2024-05-07 17:08:13,366 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 17:08:13,367 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-05-07 17:08:13,367 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 17:08:13,369 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-07 17:08:13,369 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-05-07 17:08:13,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:08:13,370 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 17:08:13,370 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 13.333333333333334) internal successors, (120), 9 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 17:08:13,370 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:08:13,370 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:08:13,370 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:08:13,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:08:13,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:08:13,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-07 17:08:13,534 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-05-07 17:08:13,534 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 17:08:13,535 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 17:08:13,535 INFO L85 PathProgramCache]: Analyzing trace with hash 77207855, now seen corresponding path program 1 times [2024-05-07 17:08:13,535 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 17:08:13,535 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722399836] [2024-05-07 17:08:13,535 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:13,535 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:13,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 17:08:16,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 17:08:16,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 17:08:16,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722399836] [2024-05-07 17:08:16,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1722399836] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 17:08:16,581 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 17:08:16,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2024-05-07 17:08:16,582 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1920046206] [2024-05-07 17:08:16,582 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 17:08:16,583 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-05-07 17:08:16,584 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 17:08:16,586 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-05-07 17:08:16,587 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=373, Unknown=0, NotChecked=0, Total=462 [2024-05-07 17:08:16,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:08:16,587 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 17:08:16,587 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 5.590909090909091) internal successors, (123), 22 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 17:08:16,588 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:08:16,588 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:08:16,588 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-07 17:08:16,592 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:08:31,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:08:32,330 INFO L85 PathProgramCache]: Analyzing trace with hash 959586104, now seen corresponding path program 1 times [2024-05-07 17:08:32,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:32,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:32,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:32,376 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:08:32,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:50,017 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:08:50,428 INFO L85 PathProgramCache]: Analyzing trace with hash 320229768, now seen corresponding path program 1 times [2024-05-07 17:08:50,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:50,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:50,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:50,464 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:08:50,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:50,645 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:08:51,004 INFO L85 PathProgramCache]: Analyzing trace with hash -944196515, now seen corresponding path program 1 times [2024-05-07 17:08:51,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:51,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:51,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:51,069 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:08:51,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:55,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:08:56,283 INFO L85 PathProgramCache]: Analyzing trace with hash -352628606, now seen corresponding path program 1 times [2024-05-07 17:08:56,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:56,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:56,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:56,314 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:08:56,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:56,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:08:56,975 INFO L85 PathProgramCache]: Analyzing trace with hash -1602172580, now seen corresponding path program 1 times [2024-05-07 17:08:56,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:08:56,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:08:57,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:08:57,008 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:08:57,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:07,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:09:07,791 INFO L85 PathProgramCache]: Analyzing trace with hash 1542907116, now seen corresponding path program 1 times [2024-05-07 17:09:07,791 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:09:07,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:09:07,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:07,848 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:09:07,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:08,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:09:08,429 INFO L85 PathProgramCache]: Analyzing trace with hash -190572980, now seen corresponding path program 1 times [2024-05-07 17:09:08,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:09:08,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:09:08,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:08,459 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:09:08,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:36,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:09:37,253 INFO L85 PathProgramCache]: Analyzing trace with hash 1190768273, now seen corresponding path program 1 times [2024-05-07 17:09:37,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:09:37,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:09:37,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:37,275 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:09:37,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:56,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:09:57,066 INFO L85 PathProgramCache]: Analyzing trace with hash 1483293215, now seen corresponding path program 1 times [2024-05-07 17:09:57,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:09:57,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:09:57,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:57,139 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:09:57,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:57,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:09:57,796 INFO L85 PathProgramCache]: Analyzing trace with hash 1959083243, now seen corresponding path program 1 times [2024-05-07 17:09:57,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:09:57,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:09:57,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:57,821 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:09:57,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:58,124 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:09:58,480 INFO L85 PathProgramCache]: Analyzing trace with hash -268537976, now seen corresponding path program 1 times [2024-05-07 17:09:58,480 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:09:58,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:09:58,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:58,513 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:09:58,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:58,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:09:59,159 INFO L85 PathProgramCache]: Analyzing trace with hash 1282973804, now seen corresponding path program 1 times [2024-05-07 17:09:59,159 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:09:59,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:09:59,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:59,207 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:09:59,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:59,377 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:09:59,638 INFO L85 PathProgramCache]: Analyzing trace with hash 694071756, now seen corresponding path program 1 times [2024-05-07 17:09:59,638 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:09:59,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:09:59,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:59,703 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:09:59,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:09:59,916 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:10:00,448 INFO L85 PathProgramCache]: Analyzing trace with hash 1917508082, now seen corresponding path program 1 times [2024-05-07 17:10:00,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:10:00,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:10:00,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:00,512 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:10:00,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:00,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:10:01,176 INFO L85 PathProgramCache]: Analyzing trace with hash -1739260192, now seen corresponding path program 1 times [2024-05-07 17:10:01,177 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:10:01,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:10:01,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:01,202 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:10:01,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:01,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:10:01,778 INFO L85 PathProgramCache]: Analyzing trace with hash -887389113, now seen corresponding path program 1 times [2024-05-07 17:10:01,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:10:01,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:10:01,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:01,804 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:10:01,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:06,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:10:07,334 INFO L85 PathProgramCache]: Analyzing trace with hash -683305680, now seen corresponding path program 1 times [2024-05-07 17:10:07,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:10:07,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:10:07,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:07,384 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:10:07,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:07,612 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:10:08,084 INFO L85 PathProgramCache]: Analyzing trace with hash -1684610078, now seen corresponding path program 1 times [2024-05-07 17:10:08,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:10:08,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:10:08,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:10:08,110 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:10:08,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:15:31,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:15:32,215 INFO L85 PathProgramCache]: Analyzing trace with hash 2107242078, now seen corresponding path program 1 times [2024-05-07 17:15:32,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:15:32,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:15:32,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:15:32,227 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:15:32,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:15:32,418 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:15:32,742 INFO L85 PathProgramCache]: Analyzing trace with hash -1178950447, now seen corresponding path program 1 times [2024-05-07 17:15:32,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:15:32,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:15:32,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:15:32,755 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:15:32,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:16:02,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:16:02,481 INFO L85 PathProgramCache]: Analyzing trace with hash 516493945, now seen corresponding path program 1 times [2024-05-07 17:16:02,482 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:16:02,482 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:16:02,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:16:02,516 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:16:02,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:16:03,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2024-05-07 17:16:03,486 INFO L85 PathProgramCache]: Analyzing trace with hash -1745893861, now seen corresponding path program 1 times [2024-05-07 17:16:03,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:16:03,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:16:03,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:16:03,581 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:16:03,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:18:25,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2024-05-07 17:18:28,251 INFO L85 PathProgramCache]: Analyzing trace with hash 1941220508, now seen corresponding path program 1 times [2024-05-07 17:18:28,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:18:28,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:18:28,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:18:28,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:18:28,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:18:28,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:18:28,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:18:28,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 17:18:28,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-07 17:18:28,360 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,SelfDestructingSolverStorable4,SelfDestructingSolverStorable18,SelfDestructingSolverStorable3,SelfDestructingSolverStorable19,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable10,SelfDestructingSolverStorable21,SelfDestructingSolverStorable11,SelfDestructingSolverStorable22,SelfDestructingSolverStorable12,SelfDestructingSolverStorable23,SelfDestructingSolverStorable9,SelfDestructingSolverStorable13,SelfDestructingSolverStorable24,SelfDestructingSolverStorable14,SelfDestructingSolverStorable25,SelfDestructingSolverStorable15,SelfDestructingSolverStorable26,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17 [2024-05-07 17:18:28,360 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 17:18:28,361 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 17:18:28,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1794120427, now seen corresponding path program 2 times [2024-05-07 17:18:28,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 17:18:28,361 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460945235] [2024-05-07 17:18:28,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:18:28,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:18:28,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 17:18:31,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 17:18:31,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 17:18:31,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [460945235] [2024-05-07 17:18:31,703 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [460945235] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 17:18:31,703 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 17:18:31,703 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2024-05-07 17:18:31,703 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1711127889] [2024-05-07 17:18:31,703 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 17:18:31,704 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-07 17:18:31,704 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 17:18:31,705 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-07 17:18:31,705 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=473, Unknown=0, NotChecked=0, Total=552 [2024-05-07 17:18:31,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:18:31,705 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 17:18:31,705 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 5.125) internal successors, (123), 24 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 17:18:31,705 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:18:31,705 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:18:31,705 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-07 17:18:31,705 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-07 17:18:31,705 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:18:39,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:18:39,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:18:39,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 17:18:39,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-07 17:18:39,463 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-07 17:18:39,463 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-05-07 17:18:39,463 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 17:18:39,464 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 17:18:39,464 INFO L85 PathProgramCache]: Analyzing trace with hash -552324305, now seen corresponding path program 3 times [2024-05-07 17:18:39,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 17:18:39,464 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1360139852] [2024-05-07 17:18:39,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:18:39,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:18:39,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 17:18:42,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 17:18:42,766 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 17:18:42,766 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1360139852] [2024-05-07 17:18:42,766 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1360139852] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 17:18:42,766 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 17:18:42,766 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [28] imperfect sequences [] total 28 [2024-05-07 17:18:42,766 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1664879638] [2024-05-07 17:18:42,766 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 17:18:42,767 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2024-05-07 17:18:42,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 17:18:42,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-05-07 17:18:42,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=647, Unknown=0, NotChecked=0, Total=756 [2024-05-07 17:18:42,767 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:18:42,767 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 17:18:42,768 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 4.392857142857143) internal successors, (123), 28 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 17:18:42,768 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:18:42,768 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:18:42,768 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-07 17:18:42,768 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 22 states. [2024-05-07 17:18:42,768 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 21 states. [2024-05-07 17:18:42,768 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 17:18:52,045 INFO L349 Elim1Store]: treesize reduction 7, result has 36.4 percent of original size [2024-05-07 17:18:52,045 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 684 treesize of output 636 [2024-05-07 17:18:52,615 INFO L85 PathProgramCache]: Analyzing trace with hash 795374734, now seen corresponding path program 1 times [2024-05-07 17:18:52,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:18:52,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:18:52,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 17:18:52,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 17:18:52,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:18:52,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:18:52,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 17:18:52,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 17:18:52,984 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-05-07 17:18:52,984 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2024-05-07 17:19:12,751 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 74 [2024-05-07 17:19:18,884 INFO L85 PathProgramCache]: Analyzing trace with hash -2099349788, now seen corresponding path program 1 times [2024-05-07 17:19:18,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:19:18,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:19:18,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:19:18,908 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:19:18,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:19:18,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 17:19:18,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-05-07 17:19:18,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 17:19:18,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-05-07 17:19:18,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2024-05-07 17:19:18,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-05-07 17:19:18,953 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable28 [2024-05-07 17:19:18,955 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 4 more)] === [2024-05-07 17:19:18,956 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 17:19:18,956 INFO L85 PathProgramCache]: Analyzing trace with hash -1849458001, now seen corresponding path program 4 times [2024-05-07 17:19:18,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 17:19:18,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [252193192] [2024-05-07 17:19:18,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 17:19:18,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 17:19:19,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:19:19,024 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 17:19:19,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 17:19:19,087 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-05-07 17:19:19,087 INFO L363 BasicCegarLoop]: Counterexample is feasible [2024-05-07 17:19:19,089 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (6 of 7 remaining) [2024-05-07 17:19:19,090 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P1Err0ASSERT_VIOLATIONERROR_FUNCTION (5 of 7 remaining) [2024-05-07 17:19:19,090 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (4 of 7 remaining) [2024-05-07 17:19:19,090 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 7 remaining) [2024-05-07 17:19:19,090 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 7 remaining) [2024-05-07 17:19:19,090 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (1 of 7 remaining) [2024-05-07 17:19:19,091 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 7 remaining) [2024-05-07 17:19:19,091 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-05-07 17:19:19,094 INFO L448 BasicCegarLoop]: Path program histogram: [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-07 17:19:19,098 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-07 17:19:19,098 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-07 17:19:19,228 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre36 could not be translated [2024-05-07 17:19:19,229 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre38 could not be translated [2024-05-07 17:19:19,230 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre40 could not be translated [2024-05-07 17:19:19,232 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre42 could not be translated [2024-05-07 17:19:19,252 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.05 05:19:19 BasicIcfg [2024-05-07 17:19:19,252 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-07 17:19:19,253 INFO L158 Benchmark]: Toolchain (without parser) took 669611.34ms. Allocated memory was 263.2MB in the beginning and 1.9GB in the end (delta: 1.7GB). Free memory was 193.8MB in the beginning and 1.2GB in the end (delta: -1.0GB). Peak memory consumption was 639.3MB. Max. memory is 8.0GB. [2024-05-07 17:19:19,253 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 173.0MB. Free memory was 141.5MB in the beginning and 141.5MB in the end (delta: 24.7kB). There was no memory consumed. Max. memory is 8.0GB. [2024-05-07 17:19:19,253 INFO L158 Benchmark]: CACSL2BoogieTranslator took 517.69ms. Allocated memory is still 263.2MB. Free memory was 193.8MB in the beginning and 167.0MB in the end (delta: 26.8MB). Peak memory consumption was 27.3MB. Max. memory is 8.0GB. [2024-05-07 17:19:19,253 INFO L158 Benchmark]: Boogie Procedure Inliner took 43.04ms. Allocated memory is still 263.2MB. Free memory was 167.0MB in the beginning and 164.4MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2024-05-07 17:19:19,253 INFO L158 Benchmark]: Boogie Preprocessor took 58.20ms. Allocated memory is still 263.2MB. Free memory was 164.4MB in the beginning and 161.8MB in the end (delta: 2.6MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-07 17:19:19,253 INFO L158 Benchmark]: RCFGBuilder took 780.18ms. Allocated memory is still 263.2MB. Free memory was 161.8MB in the beginning and 138.6MB in the end (delta: 23.1MB). Peak memory consumption was 23.6MB. Max. memory is 8.0GB. [2024-05-07 17:19:19,254 INFO L158 Benchmark]: TraceAbstraction took 668198.39ms. Allocated memory was 263.2MB in the beginning and 1.9GB in the end (delta: 1.7GB). Free memory was 137.6MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 582.1MB. Max. memory is 8.0GB. [2024-05-07 17:19:19,254 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 173.0MB. Free memory was 141.5MB in the beginning and 141.5MB in the end (delta: 24.7kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 517.69ms. Allocated memory is still 263.2MB. Free memory was 193.8MB in the beginning and 167.0MB in the end (delta: 26.8MB). Peak memory consumption was 27.3MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 43.04ms. Allocated memory is still 263.2MB. Free memory was 167.0MB in the beginning and 164.4MB in the end (delta: 2.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 58.20ms. Allocated memory is still 263.2MB. Free memory was 164.4MB in the beginning and 161.8MB in the end (delta: 2.6MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * RCFGBuilder took 780.18ms. Allocated memory is still 263.2MB. Free memory was 161.8MB in the beginning and 138.6MB in the end (delta: 23.1MB). Peak memory consumption was 23.6MB. Max. memory is 8.0GB. * TraceAbstraction took 668198.39ms. Allocated memory was 263.2MB in the beginning and 1.9GB in the end (delta: 1.7GB). Free memory was 137.6MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 582.1MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre36 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre38 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre40 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre42 could not be translated - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1039221, independent: 1012991, independent conditional: 1012874, independent unconditional: 117, dependent: 26230, dependent conditional: 26229, dependent unconditional: 1, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1038991, independent: 1012991, independent conditional: 1012874, independent unconditional: 117, dependent: 26000, dependent conditional: 25999, dependent unconditional: 1, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1038991, independent: 1012991, independent conditional: 1012874, independent unconditional: 117, dependent: 26000, dependent conditional: 25999, dependent unconditional: 1, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 1038991, independent: 1012991, independent conditional: 1012874, independent unconditional: 117, dependent: 26000, dependent conditional: 25999, dependent unconditional: 1, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1124345, independent: 1012991, independent conditional: 498462, independent unconditional: 514529, dependent: 111354, dependent conditional: 85353, dependent unconditional: 26001, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1124345, independent: 1012991, independent conditional: 314858, independent unconditional: 698133, dependent: 111354, dependent conditional: 51329, dependent unconditional: 60025, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1124345, independent: 1012991, independent conditional: 314858, independent unconditional: 698133, dependent: 111354, dependent conditional: 51329, dependent unconditional: 60025, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1505, independent: 1402, independent conditional: 424, independent unconditional: 978, dependent: 103, dependent conditional: 72, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1505, independent: 1327, independent conditional: 0, independent unconditional: 1327, dependent: 178, dependent conditional: 0, dependent unconditional: 178, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 178, independent: 75, independent conditional: 68, independent unconditional: 7, dependent: 103, dependent conditional: 72, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 178, independent: 75, independent conditional: 68, independent unconditional: 7, dependent: 103, dependent conditional: 72, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1915, independent: 491, independent conditional: 488, independent unconditional: 4, dependent: 1424, dependent conditional: 1144, dependent unconditional: 280, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1124345, independent: 1011589, independent conditional: 314434, independent unconditional: 697155, dependent: 111251, dependent conditional: 51257, dependent unconditional: 59994, unknown: 1505, unknown conditional: 496, unknown unconditional: 1009] , Statistics on independence cache: Total cache size (in pairs): 1505, Positive cache size: 1402, Positive conditional cache size: 424, Positive unconditional cache size: 978, Negative cache size: 103, Negative conditional cache size: 72, Negative unconditional cache size: 31, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 217628, Maximal queried relation: 6, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1124345, independent: 1012991, independent conditional: 498462, independent unconditional: 514529, dependent: 111354, dependent conditional: 85353, dependent unconditional: 26001, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1124345, independent: 1012991, independent conditional: 314858, independent unconditional: 698133, dependent: 111354, dependent conditional: 51329, dependent unconditional: 60025, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1124345, independent: 1012991, independent conditional: 314858, independent unconditional: 698133, dependent: 111354, dependent conditional: 51329, dependent unconditional: 60025, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1505, independent: 1402, independent conditional: 424, independent unconditional: 978, dependent: 103, dependent conditional: 72, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1505, independent: 1327, independent conditional: 0, independent unconditional: 1327, dependent: 178, dependent conditional: 0, dependent unconditional: 178, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 178, independent: 75, independent conditional: 68, independent unconditional: 7, dependent: 103, dependent conditional: 72, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 178, independent: 75, independent conditional: 68, independent unconditional: 7, dependent: 103, dependent conditional: 72, dependent unconditional: 31, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1915, independent: 491, independent conditional: 488, independent unconditional: 4, dependent: 1424, dependent conditional: 1144, dependent unconditional: 280, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1124345, independent: 1011589, independent conditional: 314434, independent unconditional: 697155, dependent: 111251, dependent conditional: 51257, dependent unconditional: 59994, unknown: 1505, unknown conditional: 496, unknown unconditional: 1009] , Statistics on independence cache: Total cache size (in pairs): 1505, Positive cache size: 1402, Positive conditional cache size: 424, Positive unconditional cache size: 978, Negative cache size: 103, Negative conditional cache size: 72, Negative unconditional cache size: 31, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 217628 ], Independence queries for same thread: 230 - CounterExampleResult [Line: 19]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L711] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L713] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L715] 0 int __unbuffered_p0_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0] [L717] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0] [L718] 0 _Bool __unbuffered_p2_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX=0] [L719] 0 int __unbuffered_p2_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX=0] [L720] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX=0] [L721] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX=0] [L722] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX=0] [L723] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX=0] [L724] 0 _Bool __unbuffered_p2_EAX$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX=0] [L725] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX=0] [L726] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX=0] [L727] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX=0] [L728] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX=0] [L729] 0 _Bool __unbuffered_p2_EAX$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX=0] [L730] 0 _Bool __unbuffered_p2_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX=0] [L731] 0 int *__unbuffered_p2_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX=0] [L732] 0 int __unbuffered_p2_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX=0] [L733] 0 _Bool __unbuffered_p2_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX=0] [L734] 0 int __unbuffered_p2_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX=0] [L735] 0 _Bool __unbuffered_p2_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0] [L736] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L737] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L739] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}] [L740] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x={3:0}] [L741] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x={3:0}] [L742] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x={3:0}] [L743] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x={3:0}] [L744] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x={3:0}] [L745] 0 _Bool x$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x={3:0}] [L746] 0 _Bool x$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x={3:0}] [L747] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x={3:0}] [L748] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x={3:0}] [L749] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x={3:0}] [L750] 0 _Bool x$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x={3:0}] [L751] 0 _Bool x$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x={3:0}] [L752] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x={3:0}] [L753] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x={3:0}] [L754] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x={3:0}] [L755] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x={3:0}] [L756] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x={3:0}] [L757] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}] [L759] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L760] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L761] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L762] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L882] 0 pthread_t t2229; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L883] FCALL, FORK 0 pthread_create(&t2229, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L884] 0 pthread_t t2230; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L885] FCALL, FORK 0 pthread_create(&t2230, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L794] 2 x$w_buff1 = x$w_buff0 [L795] 2 x$w_buff0 = 1 [L796] 2 x$w_buff1_used = x$w_buff0_used [L797] 2 x$w_buff0_used = (_Bool)1 [L798] CALL 2 __VERIFIER_assert(!(x$w_buff1_used && x$w_buff0_used)) [L19] COND FALSE 2 !(!expression) [L798] RET 2 __VERIFIER_assert(!(x$w_buff1_used && x$w_buff0_used)) [L799] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L800] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L801] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L802] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L803] 2 x$r_buff1_thd4 = x$r_buff0_thd4 [L804] 2 x$r_buff0_thd2 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L886] 0 pthread_t t2231; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L887] FCALL, FORK 0 pthread_create(&t2231, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=0, __unbuffered_p2_EAX$read_delayed_var={0:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L821] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L822] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L823] 3 x$flush_delayed = weak$$choice2 [L824] EXPR 3 \read(x) [L824] 3 x$mem_tmp = x [L825] 3 weak$$choice1 = __VERIFIER_nondet_bool() [L826] EXPR 3 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L826] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))) [L826] EXPR 3 x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)) [L826] EXPR 3 x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x) [L826] EXPR 3 weak$$choice0 ? x$w_buff0 : x [L826] EXPR 3 \read(x) [L826] EXPR 3 weak$$choice0 ? x$w_buff0 : x [L826] EXPR 3 x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x) [L826] EXPR 3 x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)) [L826] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))) [L826] EXPR 3 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L826] 3 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L827] 3 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff0 : x$w_buff0)))) [L828] 3 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$w_buff1 : x$w_buff1)))) [L829] 3 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 : weak$$choice0)))) [L830] 3 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L831] 3 x$r_buff0_thd3 = weak$$choice2 ? x$r_buff0_thd3 : (!x$w_buff0_used ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? x$r_buff0_thd3 : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L832] 3 x$r_buff1_thd3 = weak$$choice2 ? x$r_buff1_thd3 : (!x$w_buff0_used ? x$r_buff1_thd3 : (x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (weak$$choice0 ? x$r_buff1_thd3 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd3 && x$w_buff1_used && !x$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)))) [L833] 3 __unbuffered_p2_EAX$read_delayed = (_Bool)1 [L834] 3 __unbuffered_p2_EAX$read_delayed_var = &x [L835] EXPR 3 \read(x) [L835] 3 __unbuffered_p2_EAX = x [L836] EXPR 3 x$flush_delayed ? x$mem_tmp : x [L836] 3 x = x$flush_delayed ? x$mem_tmp : x [L837] 3 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=0] [L840] 3 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L843] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L843] EXPR 3 x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x [L843] EXPR 3 \read(x) [L843] EXPR 3 x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x [L843] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L843] 3 x = x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L844] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L845] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L846] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L847] 3 x$r_buff1_thd3 = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$r_buff1_thd3 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L850] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L852] 3 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L888] 0 pthread_t t2232; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L889] FCALL, FORK 0 pthread_create(&t2232, ((void *)0), P3, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=1] [L857] 4 y = 2 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L860] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L860] EXPR 4 x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x [L860] EXPR 4 \read(x) [L860] EXPR 4 x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x [L860] EXPR 4 x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L860] 4 x = x$w_buff0_used && x$r_buff0_thd4 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd4 ? x$w_buff1 : x) [L861] 4 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$w_buff0_used [L862] 4 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$w_buff1_used [L863] 4 x$r_buff0_thd4 = x$w_buff0_used && x$r_buff0_thd4 ? (_Bool)0 : x$r_buff0_thd4 [L864] 4 x$r_buff1_thd4 = x$w_buff0_used && x$r_buff0_thd4 || x$w_buff1_used && x$r_buff1_thd4 ? (_Bool)0 : x$r_buff1_thd4 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L867] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L869] 4 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L766] 1 __unbuffered_p0_EAX = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L769] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L770] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L771] 1 x$flush_delayed = weak$$choice2 [L772] EXPR 1 \read(x) [L772] 1 x$mem_tmp = x [L773] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L773] EXPR 1 \read(x) [L773] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L773] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L774] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L775] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L776] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L777] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L778] 1 x$r_buff0_thd1 = weak$$choice2 ? x$r_buff0_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff0_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1)) [L779] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L780] EXPR 1 \read(x) [L780] 1 __unbuffered_p0_EBX = x [L781] EXPR 1 x$flush_delayed ? x$mem_tmp : x [L781] EXPR 1 \read(x) [L781] EXPR 1 x$flush_delayed ? x$mem_tmp : x [L781] 1 x = x$flush_delayed ? x$mem_tmp : x [L782] 1 x$flush_delayed = (_Bool)0 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L807] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L807] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L808] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L809] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L810] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L811] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L814] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L816] 2 return 0; VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L787] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L891] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L893] CALL 0 assume_abort_if_not(main$tmp_guard0) [L4] COND FALSE 0 !(!cond) VAL [\old(cond)=1, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L893] RET 0 assume_abort_if_not(main$tmp_guard0) [L895] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L895] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L895] EXPR 0 \read(x) [L895] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L895] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L895] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L896] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L897] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L898] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L899] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice1=0, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L902] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L903] EXPR 0 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L903] EXPR 0 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L903] EXPR 0 \read(*__unbuffered_p2_EAX$read_delayed_var) [L903] EXPR 0 weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX [L903] EXPR 0 __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L903] 0 __unbuffered_p2_EAX = __unbuffered_p2_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p2_EAX$read_delayed_var : __unbuffered_p2_EAX) : __unbuffered_p2_EAX [L904] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p0_EAX == 2 && __unbuffered_p0_EBX == 0 && __unbuffered_p2_EAX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t2229={7:0}, t2230={8:0}, t2231={5:0}, t2232={6:0}, weak$$choice1=1, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L906] CALL 0 __VERIFIER_assert(main$tmp_guard1) [L19] COND TRUE 0 !expression VAL [\old(expression)=0, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=1, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] [L19] 0 reach_error() VAL [\old(expression)=0, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=2, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX$flush_delayed=0, __unbuffered_p2_EAX$mem_tmp=0, __unbuffered_p2_EAX$r_buff0_thd0=0, __unbuffered_p2_EAX$r_buff0_thd1=0, __unbuffered_p2_EAX$r_buff0_thd2=0, __unbuffered_p2_EAX$r_buff0_thd3=0, __unbuffered_p2_EAX$r_buff0_thd4=0, __unbuffered_p2_EAX$r_buff1_thd0=0, __unbuffered_p2_EAX$r_buff1_thd1=0, __unbuffered_p2_EAX$r_buff1_thd2=0, __unbuffered_p2_EAX$r_buff1_thd3=0, __unbuffered_p2_EAX$r_buff1_thd4=0, __unbuffered_p2_EAX$read_delayed=1, __unbuffered_p2_EAX$read_delayed_var={3:0}, __unbuffered_p2_EAX$w_buff0=0, __unbuffered_p2_EAX$w_buff0_used=0, __unbuffered_p2_EAX$w_buff1=0, __unbuffered_p2_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice1=1, weak$$choice2=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff0_thd4=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$r_buff1_thd4=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x={3:0}, y=2] - UnprovableResult [Line: 19]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 887]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 889]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 883]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 885]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 183 locations, 7 error locations. Started 1 CEGAR loops. OverallTime: 667.9s, OverallIterations: 7, TraceHistogramMax: 0, PathProgramHistogramMax: 4, EmptinessCheckTime: 656.3s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 94, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 10.7s InterpolantComputationTime, 801 NumberOfCodeBlocks, 801 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 672 ConstructedInterpolants, 0 QuantifiedInterpolants, 9217 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 643.2s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 1, ConditionalCommutativityConditionCalculations: 151, ConditionalCommutativityTraceChecks: 25, ConditionalCommutativityImperfectProofs: 0 RESULT: Ultimate proved your program to be incorrect! [2024-05-07 17:19:19,279 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2024-05-07 17:19:19,568 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...