/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking RANDOM --traceabstraction.probability.for.random.criterion 50 --traceabstraction.seed.for.random.criterion 213 --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/pthread-wmm/mix008_tso.oepc.i -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-07 12:06:46,528 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-07 12:06:46,593 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-07 12:06:46,596 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-07 12:06:46,596 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-07 12:06:46,619 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-07 12:06:46,620 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-07 12:06:46,620 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-07 12:06:46,621 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-07 12:06:46,624 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-07 12:06:46,624 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-07 12:06:46,624 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-07 12:06:46,624 INFO L153 SettingsManager]: * Use SBE=true [2024-05-07 12:06:46,626 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-07 12:06:46,626 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-07 12:06:46,626 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-07 12:06:46,626 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-07 12:06:46,626 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-07 12:06:46,627 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-07 12:06:46,627 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-07 12:06:46,627 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-07 12:06:46,627 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-07 12:06:46,627 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-07 12:06:46,628 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-07 12:06:46,628 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-07 12:06:46,628 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-07 12:06:46,629 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-07 12:06:46,629 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-07 12:06:46,629 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-07 12:06:46,629 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 12:06:46,630 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-07 12:06:46,630 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-07 12:06:46,630 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-07 12:06:46,638 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-07 12:06:46,640 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-07 12:06:46,640 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-07 12:06:46,640 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-07 12:06:46,640 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-07 12:06:46,640 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-07 12:06:46,640 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> RANDOM Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: probability for random criterion as percentage -> 50 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: seed for random criterion -> 213 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-07 12:06:46,863 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-07 12:06:46,886 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-07 12:06:46,888 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-07 12:06:46,889 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-07 12:06:46,889 INFO L274 PluginConnector]: CDTParser initialized [2024-05-07 12:06:46,890 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/pthread-wmm/mix008_tso.oepc.i [2024-05-07 12:06:48,032 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-07 12:06:48,259 INFO L384 CDTParser]: Found 1 translation units. [2024-05-07 12:06:48,260 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix008_tso.oepc.i [2024-05-07 12:06:48,272 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a64362c4d/17ab6553c35645cc8fc6713b0c3bae72/FLAG906a2c8f4 [2024-05-07 12:06:48,282 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a64362c4d/17ab6553c35645cc8fc6713b0c3bae72 [2024-05-07 12:06:48,284 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-07 12:06:48,285 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-07 12:06:48,286 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-07 12:06:48,286 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-07 12:06:48,289 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-07 12:06:48,290 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,290 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@511bcb96 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48, skipping insertion in model container [2024-05-07 12:06:48,290 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,331 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-07 12:06:48,442 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix008_tso.oepc.i[949,962] [2024-05-07 12:06:48,677 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 12:06:48,691 INFO L202 MainTranslator]: Completed pre-run [2024-05-07 12:06:48,700 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix008_tso.oepc.i[949,962] [2024-05-07 12:06:48,793 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-07 12:06:48,825 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 12:06:48,825 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-07 12:06:48,831 INFO L206 MainTranslator]: Completed translation [2024-05-07 12:06:48,831 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48 WrapperNode [2024-05-07 12:06:48,831 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-07 12:06:48,832 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-07 12:06:48,833 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-07 12:06:48,833 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-07 12:06:48,838 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,861 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,932 INFO L138 Inliner]: procedures = 177, calls = 72, calls flagged for inlining = 6, calls inlined = 6, statements flattened = 281 [2024-05-07 12:06:48,932 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-07 12:06:48,933 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-07 12:06:48,933 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-07 12:06:48,933 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-07 12:06:48,943 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,943 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,948 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,948 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,956 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,957 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,959 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,961 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,964 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-07 12:06:48,964 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-07 12:06:48,965 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-07 12:06:48,965 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-07 12:06:48,965 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (1/1) ... [2024-05-07 12:06:48,969 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-07 12:06:48,979 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 12:06:49,018 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-07 12:06:49,043 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-07 12:06:49,086 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-07 12:06:49,086 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-07 12:06:49,086 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-07 12:06:49,086 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-07 12:06:49,086 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-07 12:06:49,086 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2024-05-07 12:06:49,087 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2024-05-07 12:06:49,087 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2024-05-07 12:06:49,087 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2024-05-07 12:06:49,087 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2024-05-07 12:06:49,088 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2024-05-07 12:06:49,088 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2024-05-07 12:06:49,088 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2024-05-07 12:06:49,088 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-07 12:06:49,089 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-07 12:06:49,089 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-07 12:06:49,089 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-07 12:06:49,090 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-07 12:06:49,217 INFO L241 CfgBuilder]: Building ICFG [2024-05-07 12:06:49,220 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-07 12:06:49,614 INFO L282 CfgBuilder]: Performing block encoding [2024-05-07 12:06:49,764 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-07 12:06:49,765 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-05-07 12:06:49,766 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 12:06:49 BoogieIcfgContainer [2024-05-07 12:06:49,766 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-07 12:06:49,769 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-07 12:06:49,769 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-07 12:06:49,771 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-07 12:06:49,771 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.05 12:06:48" (1/3) ... [2024-05-07 12:06:49,772 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66eea3af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 12:06:49, skipping insertion in model container [2024-05-07 12:06:49,772 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.05 12:06:48" (2/3) ... [2024-05-07 12:06:49,772 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66eea3af and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.05 12:06:49, skipping insertion in model container [2024-05-07 12:06:49,773 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.05 12:06:49" (3/3) ... [2024-05-07 12:06:49,774 INFO L112 eAbstractionObserver]: Analyzing ICFG mix008_tso.oepc.i [2024-05-07 12:06:49,779 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-07 12:06:49,786 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-07 12:06:49,786 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 3 error locations. [2024-05-07 12:06:49,786 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-07 12:06:49,842 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2024-05-07 12:06:49,880 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-07 12:06:49,880 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-07 12:06:49,881 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-07 12:06:49,908 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-07 12:06:49,935 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-07 12:06:49,943 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-07 12:06:49,953 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 12:06:49,954 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-07 12:06:49,959 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2985bd67, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=RANDOM, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=50, mConComCheckerRandomSeed=213, mConComCheckerConditionCriterion=false [2024-05-07 12:06:49,959 INFO L358 AbstractCegarLoop]: Starting to check reachability of 9 error locations. [2024-05-07 12:06:49,994 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting P2Err0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-07 12:06:49,995 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 12:06:49,996 INFO L85 PathProgramCache]: Analyzing trace with hash 739901, now seen corresponding path program 1 times [2024-05-07 12:06:50,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 12:06:50,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343824132] [2024-05-07 12:06:50,003 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:50,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:50,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:06:50,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:06:50,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 12:06:50,888 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343824132] [2024-05-07 12:06:50,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1343824132] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 12:06:50,889 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 12:06:50,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-05-07 12:06:50,891 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186582015] [2024-05-07 12:06:50,891 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 12:06:50,895 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-05-07 12:06:50,895 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 12:06:50,914 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-05-07 12:06:50,915 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-05-07 12:06:50,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:06:50,917 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 12:06:50,918 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 21.25) internal successors, (85), 5 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 12:06:50,919 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:06:51,018 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:06:51,019 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-05-07 12:06:51,019 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting P3Err0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-07 12:06:51,020 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 12:06:51,020 INFO L85 PathProgramCache]: Analyzing trace with hash -91385828, now seen corresponding path program 1 times [2024-05-07 12:06:51,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 12:06:51,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629967155] [2024-05-07 12:06:51,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:51,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:51,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:06:51,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:06:51,557 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 12:06:51,557 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [629967155] [2024-05-07 12:06:51,557 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [629967155] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 12:06:51,557 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 12:06:51,557 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-05-07 12:06:51,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1108501286] [2024-05-07 12:06:51,558 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 12:06:51,559 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-05-07 12:06:51,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 12:06:51,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-05-07 12:06:51,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-07 12:06:51,561 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:06:51,561 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 12:06:51,562 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 50.0) internal successors, (100), 3 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 12:06:51,562 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:06:51,562 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:06:51,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:06:51,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:06:51,657 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-05-07 12:06:51,658 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-07 12:06:51,658 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 12:06:51,658 INFO L85 PathProgramCache]: Analyzing trace with hash 664337998, now seen corresponding path program 1 times [2024-05-07 12:06:51,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 12:06:51,659 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012625204] [2024-05-07 12:06:51,659 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:51,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:51,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:06:52,190 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:06:52,191 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 12:06:52,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1012625204] [2024-05-07 12:06:52,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1012625204] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 12:06:52,191 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 12:06:52,191 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-05-07 12:06:52,191 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [697834684] [2024-05-07 12:06:52,191 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 12:06:52,194 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-05-07 12:06:52,194 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 12:06:52,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-05-07 12:06:52,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-05-07 12:06:52,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:06:52,195 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 12:06:52,196 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 13.555555555555555) internal successors, (122), 9 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 12:06:52,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:06:52,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:06:52,196 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:06:52,539 INFO L85 PathProgramCache]: Analyzing trace with hash 1557651648, now seen corresponding path program 1 times [2024-05-07 12:06:52,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:52,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:52,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:52,611 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:52,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:52,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:06:52,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:06:52,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-07 12:06:52,747 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,SelfDestructingSolverStorable2 [2024-05-07 12:06:52,747 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-07 12:06:52,747 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 12:06:52,747 INFO L85 PathProgramCache]: Analyzing trace with hash -49272928, now seen corresponding path program 1 times [2024-05-07 12:06:52,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 12:06:52,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771322592] [2024-05-07 12:06:52,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:52,751 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:52,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:06:53,365 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:06:53,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 12:06:53,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [771322592] [2024-05-07 12:06:53,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [771322592] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 12:06:53,366 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 12:06:53,366 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-05-07 12:06:53,366 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1017486304] [2024-05-07 12:06:53,366 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 12:06:53,367 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-05-07 12:06:53,367 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 12:06:53,367 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-05-07 12:06:53,367 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-05-07 12:06:53,367 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:06:53,368 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 12:06:53,368 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 21.166666666666668) internal successors, (127), 6 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 12:06:53,368 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:06:53,368 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:06:53,368 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-07 12:06:53,368 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:06:53,588 INFO L85 PathProgramCache]: Analyzing trace with hash 1557651648, now seen corresponding path program 2 times [2024-05-07 12:06:53,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:53,589 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:53,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:53,658 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:53,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:54,088 INFO L85 PathProgramCache]: Analyzing trace with hash -604232859, now seen corresponding path program 1 times [2024-05-07 12:06:54,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:54,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:54,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:54,137 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:54,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:54,370 INFO L85 PathProgramCache]: Analyzing trace with hash 534698037, now seen corresponding path program 1 times [2024-05-07 12:06:54,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:54,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:54,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:54,412 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:54,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:54,512 INFO L85 PathProgramCache]: Analyzing trace with hash -1922414205, now seen corresponding path program 1 times [2024-05-07 12:06:54,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:54,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:54,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:54,558 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:54,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:54,934 INFO L85 PathProgramCache]: Analyzing trace with hash -1905303680, now seen corresponding path program 1 times [2024-05-07 12:06:54,934 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:54,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:54,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:54,988 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:55,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,165 INFO L85 PathProgramCache]: Analyzing trace with hash -1600926645, now seen corresponding path program 1 times [2024-05-07 12:06:55,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:55,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:55,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,227 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:55,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,390 INFO L85 PathProgramCache]: Analyzing trace with hash 4596364, now seen corresponding path program 1 times [2024-05-07 12:06:55,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:55,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:55,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,430 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:55,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,532 INFO L85 PathProgramCache]: Analyzing trace with hash 2118438238, now seen corresponding path program 1 times [2024-05-07 12:06:55,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:55,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:55,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,564 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:55,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,698 INFO L85 PathProgramCache]: Analyzing trace with hash -347305263, now seen corresponding path program 1 times [2024-05-07 12:06:55,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:55,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:55,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,743 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:55,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1651364695, now seen corresponding path program 1 times [2024-05-07 12:06:55,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:55,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:55,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,861 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:55,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:55,991 INFO L85 PathProgramCache]: Analyzing trace with hash 1910096245, now seen corresponding path program 1 times [2024-05-07 12:06:55,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:55,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:56,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:56,023 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:56,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:56,131 INFO L85 PathProgramCache]: Analyzing trace with hash -2016593853, now seen corresponding path program 1 times [2024-05-07 12:06:56,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:56,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:56,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:56,162 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:56,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:56,485 INFO L85 PathProgramCache]: Analyzing trace with hash 920846166, now seen corresponding path program 1 times [2024-05-07 12:06:56,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:06:56,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:06:56,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:06:56,512 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:06:56,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:07:03,969 INFO L85 PathProgramCache]: Analyzing trace with hash -1717042400, now seen corresponding path program 1 times [2024-05-07 12:07:03,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:07:03,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:07:03,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:07:04,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:07:04,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:07:04,412 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:07:04,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:07:04,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:07:04,743 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-05-07 12:07:04,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2024-05-07 12:07:23,905 INFO L85 PathProgramCache]: Analyzing trace with hash -1566645626, now seen corresponding path program 1 times [2024-05-07 12:07:23,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:07:23,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:07:23,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:07:23,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:07:23,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:07:23,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:07:24,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:07:24,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:07:24,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-07 12:07:24,075 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=249, Unknown=0, NotChecked=0, Total=306 [2024-05-07 12:07:53,419 INFO L85 PathProgramCache]: Analyzing trace with hash -1321373537, now seen corresponding path program 1 times [2024-05-07 12:07:53,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:07:53,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:07:53,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:07:53,434 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:07:53,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:05,991 INFO L85 PathProgramCache]: Analyzing trace with hash 1470370208, now seen corresponding path program 1 times [2024-05-07 12:08:05,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:08:05,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:08:06,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:06,018 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:08:06,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:18,054 INFO L85 PathProgramCache]: Analyzing trace with hash -569251887, now seen corresponding path program 1 times [2024-05-07 12:08:18,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:08:18,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:08:18,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:18,132 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:08:18,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:29,581 INFO L85 PathProgramCache]: Analyzing trace with hash 2059915286, now seen corresponding path program 1 times [2024-05-07 12:08:29,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:08:29,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:08:29,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:29,608 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:08:29,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:42,315 INFO L85 PathProgramCache]: Analyzing trace with hash 759219213, now seen corresponding path program 1 times [2024-05-07 12:08:42,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:08:42,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:08:42,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:42,339 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:08:42,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:53,791 INFO L85 PathProgramCache]: Analyzing trace with hash -709681439, now seen corresponding path program 1 times [2024-05-07 12:08:53,792 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:08:53,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:08:53,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:08:53,836 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:08:53,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:09:00,081 INFO L85 PathProgramCache]: Analyzing trace with hash -953917152, now seen corresponding path program 1 times [2024-05-07 12:09:00,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:09:00,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:09:00,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:09:00,100 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:09:00,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:09:10,685 INFO L85 PathProgramCache]: Analyzing trace with hash -1377054941, now seen corresponding path program 1 times [2024-05-07 12:09:10,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:09:10,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:09:10,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:09:10,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:09:10,833 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:09:10,834 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:09:10,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:09:10,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:09:10,928 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-05-07 12:09:10,929 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=437, Unknown=0, NotChecked=0, Total=506 [2024-05-07 12:09:31,972 INFO L85 PathProgramCache]: Analyzing trace with hash -469472700, now seen corresponding path program 1 times [2024-05-07 12:09:31,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:09:31,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:09:32,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:09:32,006 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:09:32,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:09:46,450 INFO L85 PathProgramCache]: Analyzing trace with hash -569251887, now seen corresponding path program 2 times [2024-05-07 12:09:46,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:09:46,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:09:46,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:09:46,477 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:09:46,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:09:56,907 INFO L85 PathProgramCache]: Analyzing trace with hash -576976531, now seen corresponding path program 1 times [2024-05-07 12:09:56,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:09:56,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:09:56,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:09:56,926 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:09:56,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:10:02,449 INFO L85 PathProgramCache]: Analyzing trace with hash -953917152, now seen corresponding path program 2 times [2024-05-07 12:10:02,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:10:02,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:10:02,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:10:02,464 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:10:02,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:11:02,089 INFO L85 PathProgramCache]: Analyzing trace with hash -1579126897, now seen corresponding path program 1 times [2024-05-07 12:11:02,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:11:02,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:11:02,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:11:02,107 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:11:02,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:11:14,345 INFO L85 PathProgramCache]: Analyzing trace with hash 1032959815, now seen corresponding path program 1 times [2024-05-07 12:11:14,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:11:14,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:11:14,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:11:14,367 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:11:14,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:11:20,320 INFO L85 PathProgramCache]: Analyzing trace with hash -507813487, now seen corresponding path program 1 times [2024-05-07 12:11:20,321 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:11:20,321 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:11:20,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:11:20,337 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:11:20,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:12:13,226 INFO L85 PathProgramCache]: Analyzing trace with hash 864809247, now seen corresponding path program 1 times [2024-05-07 12:12:13,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:12:13,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:12:13,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:12:13,238 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:12:13,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:12:46,463 INFO L85 PathProgramCache]: Analyzing trace with hash -247279153, now seen corresponding path program 1 times [2024-05-07 12:12:46,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:12:46,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:12:46,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:12:46,493 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:12:46,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:12:53,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1297488368, now seen corresponding path program 1 times [2024-05-07 12:12:53,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:12:53,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:12:53,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:12:53,073 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:12:53,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:14:04,038 INFO L85 PathProgramCache]: Analyzing trace with hash -659071903, now seen corresponding path program 1 times [2024-05-07 12:14:04,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:14:04,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:14:04,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:14:04,051 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:14:04,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:02,685 INFO L85 PathProgramCache]: Analyzing trace with hash 88042543, now seen corresponding path program 1 times [2024-05-07 12:15:02,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:02,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:02,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:02,694 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:02,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:15,387 INFO L85 PathProgramCache]: Analyzing trace with hash 110833939, now seen corresponding path program 1 times [2024-05-07 12:15:15,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:15,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:15,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:15,444 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:15,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:15,898 INFO L85 PathProgramCache]: Analyzing trace with hash -533998271, now seen corresponding path program 1 times [2024-05-07 12:15:15,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:15,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:15,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:15,923 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:15,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:21,900 INFO L85 PathProgramCache]: Analyzing trace with hash -1222924840, now seen corresponding path program 1 times [2024-05-07 12:15:21,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:21,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:21,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:21,920 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:21,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:24,785 INFO L85 PathProgramCache]: Analyzing trace with hash 240924234, now seen corresponding path program 1 times [2024-05-07 12:15:24,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:24,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:24,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:24,807 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:24,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:25,412 INFO L85 PathProgramCache]: Analyzing trace with hash -977177303, now seen corresponding path program 2 times [2024-05-07 12:15:25,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:25,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:25,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:25,436 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:25,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:26,061 INFO L85 PathProgramCache]: Analyzing trace with hash -866935237, now seen corresponding path program 2 times [2024-05-07 12:15:26,061 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:26,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:26,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:26,104 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:26,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:26,557 INFO L85 PathProgramCache]: Analyzing trace with hash 1771773768, now seen corresponding path program 2 times [2024-05-07 12:15:26,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:26,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:26,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:26,579 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:26,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:27,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1267174738, now seen corresponding path program 2 times [2024-05-07 12:15:27,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:27,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:27,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:27,034 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:27,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:33,222 INFO L85 PathProgramCache]: Analyzing trace with hash -852959665, now seen corresponding path program 1 times [2024-05-07 12:15:33,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:33,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:33,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:33,232 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:33,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:34,598 INFO L85 PathProgramCache]: Analyzing trace with hash -671945225, now seen corresponding path program 1 times [2024-05-07 12:15:34,598 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:34,598 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:34,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:34,611 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:34,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:36,175 INFO L85 PathProgramCache]: Analyzing trace with hash -1494247144, now seen corresponding path program 1 times [2024-05-07 12:15:36,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:36,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:36,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:36,189 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:36,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:43,376 INFO L85 PathProgramCache]: Analyzing trace with hash -204650924, now seen corresponding path program 1 times [2024-05-07 12:15:43,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:43,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:43,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:43,424 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:43,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:51,771 INFO L85 PathProgramCache]: Analyzing trace with hash -1453239143, now seen corresponding path program 1 times [2024-05-07 12:15:51,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:51,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:51,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:51,787 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:51,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:53,328 INFO L85 PathProgramCache]: Analyzing trace with hash -410797722, now seen corresponding path program 2 times [2024-05-07 12:15:53,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:53,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:53,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:53,354 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:53,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:55,026 INFO L85 PathProgramCache]: Analyzing trace with hash -1073807450, now seen corresponding path program 2 times [2024-05-07 12:15:55,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:55,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:55,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:55,041 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:55,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:56,691 INFO L85 PathProgramCache]: Analyzing trace with hash -920667016, now seen corresponding path program 1 times [2024-05-07 12:15:56,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:56,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:56,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:56,706 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:56,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:58,376 INFO L85 PathProgramCache]: Analyzing trace with hash 891470183, now seen corresponding path program 1 times [2024-05-07 12:15:58,377 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:58,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:58,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:58,391 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:58,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:59,869 INFO L85 PathProgramCache]: Analyzing trace with hash 2070061839, now seen corresponding path program 1 times [2024-05-07 12:15:59,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:15:59,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:15:59,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:15:59,882 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:15:59,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:16:00,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:16:00,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:16:00,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 12:16:00,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-07 12:16:00,123 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,SelfDestructingSolverStorable31,SelfDestructingSolverStorable4,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable32,SelfDestructingSolverStorable33,SelfDestructingSolverStorable34,SelfDestructingSolverStorable9,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36,SelfDestructingSolverStorable37,SelfDestructingSolverStorable38,SelfDestructingSolverStorable39,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable42,SelfDestructingSolverStorable43,SelfDestructingSolverStorable44,SelfDestructingSolverStorable45,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable48,SelfDestructingSolverStorable49,SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,SelfDestructingSolverStorable53,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable10,SelfDestructingSolverStorable54,SelfDestructingSolverStorable11,SelfDestructingSolverStorable55,SelfDestructingSolverStorable12,SelfDestructingSolverStorable56,SelfDestructingSolverStorable13,SelfDestructingSolverStorable57,SelfDestructingSolverStorable14,SelfDestructingSolverStorable58,SelfDestructingSolverStorable15,SelfDestructingSolverStorable59,SelfDestructingSolverStorable16,SelfDestructingSolverStorable17,SelfDestructingSolverStorable60,SelfDestructingSolverStorable20,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable22,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable26,SelfDestructingSolverStorable27,SelfDestructingSolverStorable28 [2024-05-07 12:16:00,123 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-07 12:16:00,124 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 12:16:00,124 INFO L85 PathProgramCache]: Analyzing trace with hash 1248354118, now seen corresponding path program 2 times [2024-05-07 12:16:00,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 12:16:00,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467671549] [2024-05-07 12:16:00,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:16:00,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:16:00,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:16:01,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:16:01,182 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 12:16:01,182 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467671549] [2024-05-07 12:16:01,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1467671549] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 12:16:01,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 12:16:01,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-05-07 12:16:01,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1906076247] [2024-05-07 12:16:01,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 12:16:01,183 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-05-07 12:16:01,183 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 12:16:01,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-05-07 12:16:01,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=100, Unknown=0, NotChecked=0, Total=132 [2024-05-07 12:16:01,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:16:01,183 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 12:16:01,184 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 10.583333333333334) internal successors, (127), 12 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 12:16:01,184 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:16:01,184 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:16:01,184 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-07 12:16:01,184 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-07 12:16:01,184 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:16:25,228 INFO L85 PathProgramCache]: Analyzing trace with hash -1321373537, now seen corresponding path program 2 times [2024-05-07 12:16:25,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:16:25,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:16:25,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:16:25,261 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:16:25,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:16:32,225 INFO L85 PathProgramCache]: Analyzing trace with hash -953917152, now seen corresponding path program 3 times [2024-05-07 12:16:32,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:16:32,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:16:32,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:16:32,236 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:16:32,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:16:52,702 INFO L85 PathProgramCache]: Analyzing trace with hash -377061810, now seen corresponding path program 1 times [2024-05-07 12:16:52,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:16:52,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:16:52,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:16:52,715 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:16:52,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:16:58,629 INFO L85 PathProgramCache]: Analyzing trace with hash -507813487, now seen corresponding path program 2 times [2024-05-07 12:16:58,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:16:58,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:16:58,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:16:58,639 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:16:58,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:17:05,003 INFO L85 PathProgramCache]: Analyzing trace with hash 864809247, now seen corresponding path program 2 times [2024-05-07 12:17:05,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:17:05,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:17:05,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:17:05,019 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:17:05,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:17:28,062 INFO L85 PathProgramCache]: Analyzing trace with hash -247279153, now seen corresponding path program 2 times [2024-05-07 12:17:28,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:17:28,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:17:28,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:17:28,104 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:17:28,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:17:48,887 INFO L85 PathProgramCache]: Analyzing trace with hash -659071903, now seen corresponding path program 2 times [2024-05-07 12:17:48,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:17:48,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:17:48,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:17:48,898 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:17:48,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:17:56,781 INFO L85 PathProgramCache]: Analyzing trace with hash 314373406, now seen corresponding path program 1 times [2024-05-07 12:17:56,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:17:56,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:17:56,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:17:56,802 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:17:56,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:18:22,394 INFO L85 PathProgramCache]: Analyzing trace with hash -1047163057, now seen corresponding path program 3 times [2024-05-07 12:18:22,394 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:18:22,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:18:22,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:18:22,407 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:18:22,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:18:22,982 INFO L85 PathProgramCache]: Analyzing trace with hash -1290442736, now seen corresponding path program 1 times [2024-05-07 12:18:22,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:18:22,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:18:23,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:18:23,013 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:18:23,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:18:24,789 INFO L85 PathProgramCache]: Analyzing trace with hash 1439550329, now seen corresponding path program 1 times [2024-05-07 12:18:24,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:18:24,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:18:24,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:18:24,807 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:18:24,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:18:27,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:18:27,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:18:27,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 12:18:27,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-07 12:18:27,392 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-07 12:18:27,392 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,SelfDestructingSolverStorable71,SelfDestructingSolverStorable61,SelfDestructingSolverStorable72,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable65,SelfDestructingSolverStorable66,SelfDestructingSolverStorable67,SelfDestructingSolverStorable68,SelfDestructingSolverStorable69 [2024-05-07 12:18:27,392 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-07 12:18:27,393 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 12:18:27,393 INFO L85 PathProgramCache]: Analyzing trace with hash 1890914186, now seen corresponding path program 3 times [2024-05-07 12:18:27,393 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 12:18:27,393 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772944597] [2024-05-07 12:18:27,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:18:27,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:18:27,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-07 12:18:28,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-07 12:18:28,520 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-07 12:18:28,520 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772944597] [2024-05-07 12:18:28,520 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [772944597] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-07 12:18:28,520 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-05-07 12:18:28,520 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2024-05-07 12:18:28,521 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1254425878] [2024-05-07 12:18:28,521 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-07 12:18:28,521 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-07 12:18:28,521 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-07 12:18:28,521 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-07 12:18:28,521 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2024-05-07 12:18:28,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:18:28,522 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-07 12:18:28,528 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 8.466666666666667) internal successors, (127), 15 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-07 12:18:28,529 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:18:28,529 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:18:28,529 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 19 states. [2024-05-07 12:18:28,529 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2024-05-07 12:18:28,529 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 16 states. [2024-05-07 12:18:28,529 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-07 12:18:54,111 INFO L85 PathProgramCache]: Analyzing trace with hash -377061810, now seen corresponding path program 2 times [2024-05-07 12:18:54,111 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:18:54,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:18:54,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:18:54,123 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:18:54,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:19:16,620 INFO L85 PathProgramCache]: Analyzing trace with hash -247279153, now seen corresponding path program 4 times [2024-05-07 12:19:16,620 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:19:16,620 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:19:16,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:19:16,632 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:19:16,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:19:24,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-05-07 12:19:24,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-05-07 12:19:24,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2024-05-07 12:19:24,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-05-07 12:19:24,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-05-07 12:19:24,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-07 12:19:24,476 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75 [2024-05-07 12:19:24,476 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (and 6 more)] === [2024-05-07 12:19:24,477 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-07 12:19:24,477 INFO L85 PathProgramCache]: Analyzing trace with hash 706010438, now seen corresponding path program 4 times [2024-05-07 12:19:24,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-07 12:19:24,477 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527004349] [2024-05-07 12:19:24,477 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-07 12:19:24,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-07 12:19:24,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:19:24,511 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-07 12:19:24,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-07 12:19:24,551 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-05-07 12:19:24,552 INFO L363 BasicCegarLoop]: Counterexample is feasible [2024-05-07 12:19:24,553 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (8 of 9 remaining) [2024-05-07 12:19:24,554 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P2Err0ASSERT_VIOLATIONERROR_FUNCTION (7 of 9 remaining) [2024-05-07 12:19:24,554 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P3Err0ASSERT_VIOLATIONERROR_FUNCTION (6 of 9 remaining) [2024-05-07 12:19:24,554 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (5 of 9 remaining) [2024-05-07 12:19:24,555 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (4 of 9 remaining) [2024-05-07 12:19:24,555 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (3 of 9 remaining) [2024-05-07 12:19:24,555 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr3INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (2 of 9 remaining) [2024-05-07 12:19:24,555 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P2Err0ASSERT_VIOLATIONERROR_FUNCTION (1 of 9 remaining) [2024-05-07 12:19:24,555 INFO L805 garLoopResultBuilder]: Registering result UNKNOWN for location P3Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 9 remaining) [2024-05-07 12:19:24,555 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76 [2024-05-07 12:19:24,559 INFO L448 BasicCegarLoop]: Path program histogram: [4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-05-07 12:19:24,563 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2024-05-07 12:19:24,563 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2024-05-07 12:19:24,668 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre9 could not be translated [2024-05-07 12:19:24,669 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre11 could not be translated [2024-05-07 12:19:24,670 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre13 could not be translated [2024-05-07 12:19:24,674 WARN L1576 BoogieBacktranslator]: Unfinished Backtranslation: IdentifierExpression #t~pre15 could not be translated [2024-05-07 12:19:24,709 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.05 12:19:24 BasicIcfg [2024-05-07 12:19:24,709 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-05-07 12:19:24,710 INFO L158 Benchmark]: Toolchain (without parser) took 756425.07ms. Allocated memory was 297.8MB in the beginning and 2.1GB in the end (delta: 1.8GB). Free memory was 225.3MB in the beginning and 1.6GB in the end (delta: -1.4GB). Peak memory consumption was 433.4MB. Max. memory is 8.0GB. [2024-05-07 12:19:24,710 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 297.8MB. Free memory is still 264.3MB. There was no memory consumed. Max. memory is 8.0GB. [2024-05-07 12:19:24,710 INFO L158 Benchmark]: CACSL2BoogieTranslator took 545.73ms. Allocated memory is still 297.8MB. Free memory was 225.1MB in the beginning and 196.2MB in the end (delta: 28.9MB). Peak memory consumption was 29.4MB. Max. memory is 8.0GB. [2024-05-07 12:19:24,710 INFO L158 Benchmark]: Boogie Procedure Inliner took 100.08ms. Allocated memory is still 297.8MB. Free memory was 196.2MB in the beginning and 263.3MB in the end (delta: -67.1MB). Peak memory consumption was 9.3MB. Max. memory is 8.0GB. [2024-05-07 12:19:24,710 INFO L158 Benchmark]: Boogie Preprocessor took 30.96ms. Allocated memory is still 297.8MB. Free memory was 263.3MB in the beginning and 260.1MB in the end (delta: 3.1MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2024-05-07 12:19:24,711 INFO L158 Benchmark]: RCFGBuilder took 802.10ms. Allocated memory is still 297.8MB. Free memory was 260.1MB in the beginning and 187.8MB in the end (delta: 72.4MB). Peak memory consumption was 72.4MB. Max. memory is 8.0GB. [2024-05-07 12:19:24,711 INFO L158 Benchmark]: TraceAbstraction took 754940.94ms. Allocated memory was 297.8MB in the beginning and 2.1GB in the end (delta: 1.8GB). Free memory was 186.7MB in the beginning and 1.6GB in the end (delta: -1.4GB). Peak memory consumption was 393.7MB. Max. memory is 8.0GB. [2024-05-07 12:19:24,712 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 297.8MB. Free memory is still 264.3MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 545.73ms. Allocated memory is still 297.8MB. Free memory was 225.1MB in the beginning and 196.2MB in the end (delta: 28.9MB). Peak memory consumption was 29.4MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 100.08ms. Allocated memory is still 297.8MB. Free memory was 196.2MB in the beginning and 263.3MB in the end (delta: -67.1MB). Peak memory consumption was 9.3MB. Max. memory is 8.0GB. * Boogie Preprocessor took 30.96ms. Allocated memory is still 297.8MB. Free memory was 263.3MB in the beginning and 260.1MB in the end (delta: 3.1MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * RCFGBuilder took 802.10ms. Allocated memory is still 297.8MB. Free memory was 260.1MB in the beginning and 187.8MB in the end (delta: 72.4MB). Peak memory consumption was 72.4MB. Max. memory is 8.0GB. * TraceAbstraction took 754940.94ms. Allocated memory was 297.8MB in the beginning and 2.1GB in the end (delta: 1.8GB). Free memory was 186.7MB in the beginning and 1.6GB in the end (delta: -1.4GB). Peak memory consumption was 393.7MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre9 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre11 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre13 could not be translated - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: IdentifierExpression #t~pre15 could not be translated - GenericResult: Unfinished Backtranslation The program execution was not completely translated back. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1371973, independent: 1359479, independent conditional: 1359435, independent unconditional: 44, dependent: 12494, dependent conditional: 12494, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1371304, independent: 1359479, independent conditional: 1359435, independent unconditional: 44, dependent: 11825, dependent conditional: 11825, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1371304, independent: 1359479, independent conditional: 1359435, independent unconditional: 44, dependent: 11825, dependent conditional: 11825, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 1371304, independent: 1359479, independent conditional: 1359435, independent unconditional: 44, dependent: 11825, dependent conditional: 11825, dependent unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1429335, independent: 1359479, independent conditional: 646701, independent unconditional: 712778, dependent: 69856, dependent conditional: 57872, dependent unconditional: 11984, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1429335, independent: 1359479, independent conditional: 367760, independent unconditional: 991719, dependent: 69856, dependent conditional: 15838, dependent unconditional: 54018, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1429335, independent: 1359479, independent conditional: 367760, independent unconditional: 991719, dependent: 69856, dependent conditional: 15838, dependent unconditional: 54018, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1900, independent: 1799, independent conditional: 428, independent unconditional: 1371, dependent: 101, dependent conditional: 72, dependent unconditional: 29, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1900, independent: 1741, independent conditional: 0, independent unconditional: 1741, dependent: 159, dependent conditional: 0, dependent unconditional: 159, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 159, independent: 58, independent conditional: 50, independent unconditional: 8, dependent: 101, dependent conditional: 72, dependent unconditional: 29, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 159, independent: 58, independent conditional: 50, independent unconditional: 8, dependent: 101, dependent conditional: 72, dependent unconditional: 29, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1013, independent: 201, independent conditional: 195, independent unconditional: 6, dependent: 812, dependent conditional: 621, dependent unconditional: 190, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1429335, independent: 1357680, independent conditional: 367332, independent unconditional: 990348, dependent: 69755, dependent conditional: 15766, dependent unconditional: 53989, unknown: 1900, unknown conditional: 500, unknown unconditional: 1400] , Statistics on independence cache: Total cache size (in pairs): 1900, Positive cache size: 1799, Positive conditional cache size: 428, Positive unconditional cache size: 1371, Negative cache size: 101, Negative conditional cache size: 72, Negative unconditional cache size: 29, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 320975, Maximal queried relation: 8, ConditionTransformingIndependenceRelation.Independence Queries: [ total: 1429335, independent: 1359479, independent conditional: 646701, independent unconditional: 712778, dependent: 69856, dependent conditional: 57872, dependent unconditional: 11984, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 1429335, independent: 1359479, independent conditional: 367760, independent unconditional: 991719, dependent: 69856, dependent conditional: 15838, dependent unconditional: 54018, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 1429335, independent: 1359479, independent conditional: 367760, independent unconditional: 991719, dependent: 69856, dependent conditional: 15838, dependent unconditional: 54018, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 1900, independent: 1799, independent conditional: 428, independent unconditional: 1371, dependent: 101, dependent conditional: 72, dependent unconditional: 29, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 1900, independent: 1741, independent conditional: 0, independent unconditional: 1741, dependent: 159, dependent conditional: 0, dependent unconditional: 159, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Independence Queries: [ total: 159, independent: 58, independent conditional: 50, independent unconditional: 8, dependent: 101, dependent conditional: 72, dependent unconditional: 29, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ProtectedIndependenceRelation.Statistics on underlying relation: SemanticIndependenceRelation.Independence Queries: [ total: 159, independent: 58, independent conditional: 50, independent unconditional: 8, dependent: 101, dependent conditional: 72, dependent unconditional: 29, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 1013, independent: 201, independent conditional: 195, independent unconditional: 6, dependent: 812, dependent conditional: 621, dependent unconditional: 190, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Protected Queries: 0 ], Cache Queries: [ total: 1429335, independent: 1357680, independent conditional: 367332, independent unconditional: 990348, dependent: 69755, dependent conditional: 15766, dependent unconditional: 53989, unknown: 1900, unknown conditional: 500, unknown unconditional: 1400] , Statistics on independence cache: Total cache size (in pairs): 1900, Positive cache size: 1799, Positive conditional cache size: 428, Positive unconditional cache size: 1371, Negative cache size: 101, Negative conditional cache size: 72, Negative unconditional cache size: 29, Unknown cache size: 0, Unknown conditional cache size: 0, Unknown unconditional cache size: 0, Eliminated conditions: 320975 ], Independence queries for same thread: 669 - CounterExampleResult [Line: 18]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L710] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L712] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0] [L714] 0 int __unbuffered_p2_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0] [L716] 0 int __unbuffered_p3_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0] [L718] 0 int __unbuffered_p3_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0] [L720] 0 int a = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0] [L721] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0] [L722] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0] [L724] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L726] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L727] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y=0] [L728] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y=0] [L729] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y=0] [L730] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y=0] [L731] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y=0] [L732] 0 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y=0] [L733] 0 _Bool y$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y=0] [L734] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y=0] [L735] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y=0] [L736] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y=0] [L737] 0 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y=0] [L738] 0 _Bool y$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y=0] [L739] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y=0] [L740] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y=0] [L741] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y=0] [L742] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y=0] [L743] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y=0] [L744] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0] [L746] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z=0] [L747] 0 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z=0] [L748] 0 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z=0] [L749] 0 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z=0] [L750] 0 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z=0] [L751] 0 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z=0] [L752] 0 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z=0] [L753] 0 _Bool z$r_buff0_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z=0] [L754] 0 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z=0] [L755] 0 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z=0] [L756] 0 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z=0] [L757] 0 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z=0] [L758] 0 _Bool z$r_buff1_thd4; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z=0] [L759] 0 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z=0] [L760] 0 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z=0] [L761] 0 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z=0] [L762] 0 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z=0] [L763] 0 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z=0] [L764] 0 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L765] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L766] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L923] 0 pthread_t t233; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, main$tmp_guard0=0, main$tmp_guard1=0, t233={5:0}, weak$$choice0=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L924] FCALL, FORK 0 pthread_create(&t233, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t233={5:0}, weak$$choice0=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L925] 0 pthread_t t234; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t233={5:0}, t234={6:0}, weak$$choice0=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L926] FCALL, FORK 0 pthread_create(&t234, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t233={5:0}, t234={6:0}, weak$$choice0=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L927] 0 pthread_t t235; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t233={5:0}, t234={6:0}, t235={7:0}, weak$$choice0=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L928] FCALL, FORK 0 pthread_create(&t235, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t233={5:0}, t234={6:0}, t235={7:0}, weak$$choice0=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L805] 3 y$w_buff1 = y$w_buff0 [L806] 3 y$w_buff0 = 2 [L807] 3 y$w_buff1_used = y$w_buff0_used [L808] 3 y$w_buff0_used = (_Bool)1 [L809] CALL 3 __VERIFIER_assert(!(y$w_buff1_used && y$w_buff0_used)) [L18] COND FALSE 3 !(!expression) [L809] RET 3 __VERIFIER_assert(!(y$w_buff1_used && y$w_buff0_used)) [L810] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L811] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L812] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L813] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L814] 3 y$r_buff1_thd4 = y$r_buff0_thd4 [L815] 3 y$r_buff0_thd3 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L818] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L819] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L820] 3 y$flush_delayed = weak$$choice2 [L821] 3 y$mem_tmp = y [L822] 3 y = !y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1) [L823] 3 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)) [L824] 3 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)) [L825] 3 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used)) [L826] 3 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L827] 3 y$r_buff0_thd3 = weak$$choice2 ? y$r_buff0_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff0_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3)) [L828] 3 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L829] 3 __unbuffered_p2_EAX = y [L830] 3 y = y$flush_delayed ? y$mem_tmp : y [L831] 3 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L834] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L835] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L836] 3 z$flush_delayed = weak$$choice2 [L837] 3 z$mem_tmp = z [L838] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L839] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L840] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L841] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L842] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L843] 3 z$r_buff0_thd3 = weak$$choice2 ? z$r_buff0_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff0_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3)) [L844] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L845] 3 __unbuffered_p2_EBX = z [L846] 3 z = z$flush_delayed ? z$mem_tmp : z [L847] 3 z$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L929] 0 pthread_t t236; VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t233={5:0}, t234={6:0}, t235={7:0}, t236={3:0}, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L930] FCALL, FORK 0 pthread_create(&t236, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, t233={5:0}, t234={6:0}, t235={7:0}, t236={3:0}, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=0] [L864] 4 z$w_buff1 = z$w_buff0 [L865] 4 z$w_buff0 = 1 [L866] 4 z$w_buff1_used = z$w_buff0_used [L867] 4 z$w_buff0_used = (_Bool)1 [L868] CALL 4 __VERIFIER_assert(!(z$w_buff1_used && z$w_buff0_used)) [L18] COND FALSE 4 !(!expression) [L868] RET 4 __VERIFIER_assert(!(z$w_buff1_used && z$w_buff0_used)) [L869] 4 z$r_buff1_thd0 = z$r_buff0_thd0 [L870] 4 z$r_buff1_thd1 = z$r_buff0_thd1 [L871] 4 z$r_buff1_thd2 = z$r_buff0_thd2 [L872] 4 z$r_buff1_thd3 = z$r_buff0_thd3 [L873] 4 z$r_buff1_thd4 = z$r_buff0_thd4 [L874] 4 z$r_buff0_thd4 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=0, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0, z=0] [L877] 4 weak$$choice0 = __VERIFIER_nondet_bool() [L878] 4 weak$$choice2 = __VERIFIER_nondet_bool() [L879] 4 z$flush_delayed = weak$$choice2 [L880] 4 z$mem_tmp = z [L881] 4 z = !z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff1) [L882] 4 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : z$w_buff0)) [L883] 4 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff1 : z$w_buff1)) [L884] 4 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used)) [L885] 4 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L886] 4 z$r_buff0_thd4 = weak$$choice2 ? z$r_buff0_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff0_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$r_buff0_thd4)) [L887] 4 z$r_buff1_thd4 = weak$$choice2 ? z$r_buff1_thd4 : (!z$w_buff0_used || !z$r_buff0_thd4 && !z$w_buff1_used || !z$r_buff0_thd4 && !z$r_buff1_thd4 ? z$r_buff1_thd4 : (z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : (_Bool)0)) [L888] 4 __unbuffered_p3_EAX = z [L889] 4 z = z$flush_delayed ? z$mem_tmp : z [L890] 4 z$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0, z=0] [L893] 4 __unbuffered_p3_EBX = a VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0, z=0] [L896] 4 y = y$w_buff0_used && y$r_buff0_thd4 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd4 ? y$w_buff1 : y) [L897] 4 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$w_buff0_used [L898] 4 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$w_buff1_used [L899] 4 y$r_buff0_thd4 = y$w_buff0_used && y$r_buff0_thd4 ? (_Bool)0 : y$r_buff0_thd4 [L900] 4 y$r_buff1_thd4 = y$w_buff0_used && y$r_buff0_thd4 || y$w_buff1_used && y$r_buff1_thd4 ? (_Bool)0 : y$r_buff1_thd4 [L901] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L902] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L903] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L904] 4 z$r_buff0_thd4 = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$r_buff0_thd4 [L905] 4 z$r_buff1_thd4 = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$r_buff1_thd4 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L908] 4 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L910] 4 return 0; VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L770] 1 a = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L773] 1 x = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L785] 2 x = 2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L788] 2 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L791] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L792] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L793] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L794] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L795] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L798] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L800] 2 return 0; VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, y=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L850] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L851] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L852] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L853] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L854] 3 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L857] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L859] 3 return 0; VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L778] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [\result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L932] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t233={5:0}, t234={6:0}, t235={7:0}, t236={3:0}, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L934] CALL 0 assume_abort_if_not(main$tmp_guard0) [L3] COND FALSE 0 !(!cond) VAL [\old(cond)=1, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, cond=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L934] RET 0 assume_abort_if_not(main$tmp_guard0) [L936] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L937] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L938] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L939] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L940] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L941] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L942] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L943] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L944] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L945] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [\result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t233={5:0}, t234={6:0}, t235={7:0}, t236={3:0}, weak$$choice2=1, x=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L948] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L949] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L950] 0 y$flush_delayed = weak$$choice2 [L951] 0 y$mem_tmp = y [L952] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L953] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L954] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L955] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L956] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L957] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L958] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L959] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2 && __unbuffered_p2_EBX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) [L960] 0 y = y$flush_delayed ? y$mem_tmp : y [L961] 0 y$flush_delayed = (_Bool)0 VAL [\result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, t233={5:0}, t234={6:0}, t235={7:0}, t236={3:0}, weak$$choice2=0, x=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L963] CALL 0 __VERIFIER_assert(main$tmp_guard1) [L18] COND TRUE 0 !expression VAL [\old(expression)=0, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice2=0, x=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] [L18] 0 reach_error() VAL [\old(expression)=0, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, expression=0, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice2=0, x=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff0_thd4=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$r_buff1_thd4=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z=1] - UnprovableResult [Line: 18]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 18]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 926]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 930]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 928]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - UnprovableResult [Line: 924]: Unable to prove that petrification did provide enough thread instances (tool internal message) Unable to prove that petrification did provide enough thread instances (tool internal message) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 9 procedures, 193 locations, 9 error locations. Started 1 CEGAR loops. OverallTime: 754.6s, OverallIterations: 7, TraceHistogramMax: 0, PathProgramHistogramMax: 4, EmptinessCheckTime: 749.7s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 61, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 3.9s InterpolantComputationTime, 815 NumberOfCodeBlocks, 815 NumberOfCodeBlocksAsserted, 7 NumberOfCheckSat, 682 ConstructedInterpolants, 0 QuantifiedInterpolants, 4148 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 6 InterpolantComputations, 6 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConditionalCommutativityCheckTime: 733.4s, ConditionalCommutativityIAIntegrations: 0, ConditionalCommutativityDFSRestarts: 3, ConditionalCommutativityConditionCalculations: 200, ConditionalCommutativityTraceChecks: 67, ConditionalCommutativityImperfectProofs: 0 RESULT: Ultimate proved your program to be incorrect! [2024-05-07 12:19:24,745 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2024-05-07 12:19:25,031 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...