/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking SLEEP_SET --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 10 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerCInline.xml -i ../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-17da818-m [2024-05-06 22:16:03,022 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-05-06 22:16:03,097 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-05-06 22:16:03,100 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-05-06 22:16:03,100 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-05-06 22:16:03,130 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-05-06 22:16:03,131 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-05-06 22:16:03,131 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-05-06 22:16:03,132 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-05-06 22:16:03,134 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-05-06 22:16:03,135 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-05-06 22:16:03,135 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-05-06 22:16:03,135 INFO L153 SettingsManager]: * Use SBE=true [2024-05-06 22:16:03,137 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-05-06 22:16:03,137 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-05-06 22:16:03,137 INFO L153 SettingsManager]: * sizeof long=4 [2024-05-06 22:16:03,137 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-05-06 22:16:03,137 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-05-06 22:16:03,137 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-05-06 22:16:03,138 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-05-06 22:16:03,138 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-05-06 22:16:03,138 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-05-06 22:16:03,138 INFO L153 SettingsManager]: * sizeof long double=12 [2024-05-06 22:16:03,138 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-05-06 22:16:03,139 INFO L153 SettingsManager]: * Use constant arrays=true [2024-05-06 22:16:03,139 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-05-06 22:16:03,139 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-05-06 22:16:03,139 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-05-06 22:16:03,139 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-05-06 22:16:03,139 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 22:16:03,141 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-05-06 22:16:03,141 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-05-06 22:16:03,141 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-05-06 22:16:03,141 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-05-06 22:16:03,141 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-05-06 22:16:03,141 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-05-06 22:16:03,141 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-05-06 22:16:03,141 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-05-06 22:16:03,142 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-05-06 22:16:03,142 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> SLEEP_SET Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 10 [2024-05-06 22:16:03,344 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-05-06 22:16:03,358 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-05-06 22:16:03,359 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-05-06 22:16:03,360 INFO L270 PluginConnector]: Initializing CDTParser... [2024-05-06 22:16:03,361 INFO L274 PluginConnector]: CDTParser initialized [2024-05-06 22:16:03,361 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-06 22:16:04,490 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-05-06 22:16:04,671 INFO L384 CDTParser]: Found 1 translation units. [2024-05-06 22:16:04,672 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c [2024-05-06 22:16:04,680 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a10ac6983/0558107a06c9494ab9b0b282b31caca6/FLAG11ec25333 [2024-05-06 22:16:04,694 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/a10ac6983/0558107a06c9494ab9b0b282b31caca6 [2024-05-06 22:16:04,697 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-05-06 22:16:04,698 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2024-05-06 22:16:04,700 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-05-06 22:16:04,700 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-05-06 22:16:04,704 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-05-06 22:16:04,704 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:04,705 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66d55d5a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04, skipping insertion in model container [2024-05-06 22:16:04,705 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:04,731 INFO L177 MainTranslator]: Built tables and reachable declarations [2024-05-06 22:16:04,905 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-06 22:16:04,917 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 22:16:04,925 INFO L202 MainTranslator]: Completed pre-run [2024-05-06 22:16:04,962 WARN L240 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/weaver/popl20-min-max-inc-dec.wvr.c[3271,3284] [2024-05-06 22:16:04,964 INFO L209 PostProcessor]: Analyzing one entry point: main [2024-05-06 22:16:04,969 WARN L675 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 22:16:04,969 WARN L675 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2024-05-06 22:16:04,977 INFO L206 MainTranslator]: Completed translation [2024-05-06 22:16:04,977 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04 WrapperNode [2024-05-06 22:16:04,977 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-05-06 22:16:04,979 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-05-06 22:16:04,979 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-05-06 22:16:04,979 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-05-06 22:16:04,984 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,000 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,029 INFO L138 Inliner]: procedures = 27, calls = 75, calls flagged for inlining = 9, calls inlined = 9, statements flattened = 178 [2024-05-06 22:16:05,030 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-05-06 22:16:05,030 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-05-06 22:16:05,031 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-05-06 22:16:05,031 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-05-06 22:16:05,038 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,038 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,048 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,049 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,054 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,058 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,060 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,061 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,062 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-05-06 22:16:05,063 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-05-06 22:16:05,063 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-05-06 22:16:05,063 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-05-06 22:16:05,064 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (1/1) ... [2024-05-06 22:16:05,068 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-05-06 22:16:05,079 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 22:16:05,105 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-05-06 22:16:05,122 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-05-06 22:16:05,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-05-06 22:16:05,153 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-05-06 22:16:05,153 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2024-05-06 22:16:05,153 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2024-05-06 22:16:05,153 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-05-06 22:16:05,153 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-05-06 22:16:05,154 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-05-06 22:16:05,154 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-05-06 22:16:05,154 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-05-06 22:16:05,154 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-05-06 22:16:05,154 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-05-06 22:16:05,154 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-05-06 22:16:05,154 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2024-05-06 22:16:05,154 INFO L130 BoogieDeclarations]: Found specification of procedure thread5 [2024-05-06 22:16:05,154 INFO L138 BoogieDeclarations]: Found implementation of procedure thread5 [2024-05-06 22:16:05,154 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2024-05-06 22:16:05,155 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2024-05-06 22:16:05,155 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-05-06 22:16:05,155 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-05-06 22:16:05,155 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-05-06 22:16:05,155 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-05-06 22:16:05,156 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-05-06 22:16:05,229 INFO L241 CfgBuilder]: Building ICFG [2024-05-06 22:16:05,231 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-05-06 22:16:05,537 INFO L282 CfgBuilder]: Performing block encoding [2024-05-06 22:16:05,627 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-05-06 22:16:05,627 INFO L309 CfgBuilder]: Removed 5 assume(true) statements. [2024-05-06 22:16:05,629 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 10:16:05 BoogieIcfgContainer [2024-05-06 22:16:05,629 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-05-06 22:16:05,631 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-05-06 22:16:05,631 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-05-06 22:16:05,634 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-05-06 22:16:05,634 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 06.05 10:16:04" (1/3) ... [2024-05-06 22:16:05,635 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2543f648 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 10:16:05, skipping insertion in model container [2024-05-06 22:16:05,635 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.05 10:16:04" (2/3) ... [2024-05-06 22:16:05,635 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2543f648 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 06.05 10:16:05, skipping insertion in model container [2024-05-06 22:16:05,635 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 06.05 10:16:05" (3/3) ... [2024-05-06 22:16:05,636 INFO L112 eAbstractionObserver]: Analyzing ICFG popl20-min-max-inc-dec.wvr.c [2024-05-06 22:16:05,643 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-05-06 22:16:05,650 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-05-06 22:16:05,651 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-05-06 22:16:05,651 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-05-06 22:16:05,720 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2024-05-06 22:16:05,760 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-05-06 22:16:05,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-05-06 22:16:05,761 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 22:16:05,763 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-05-06 22:16:05,785 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-05-06 22:16:05,791 INFO L188 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-05-06 22:16:05,800 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 22:16:05,801 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-05-06 22:16:05,807 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@4677371e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=SLEEP_SET, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=10, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-05-06 22:16:05,807 INFO L358 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2024-05-06 22:16:06,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 22:16:06,181 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:06,181 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 22:16:06,208 INFO L85 PathProgramCache]: Analyzing trace with hash 285893693, now seen corresponding path program 1 times [2024-05-06 22:16:06,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:06,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:06,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:06,467 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 22:16:06,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:06,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:06,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:06,536 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 22:16:06,553 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-05-06 22:16:06,554 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-05-06 22:16:06,727 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 22:16:06,735 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:06,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 22:16:06,757 INFO L85 PathProgramCache]: Analyzing trace with hash 37769194, now seen corresponding path program 1 times [2024-05-06 22:16:06,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:06,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:06,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:07,020 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:16:07,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:07,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:07,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:07,250 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:16:07,251 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-05-06 22:16:07,251 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-05-06 22:16:07,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 22:16:07,538 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:07,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 22:16:07,561 INFO L85 PathProgramCache]: Analyzing trace with hash 1283129111, now seen corresponding path program 1 times [2024-05-06 22:16:07,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:07,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:07,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:07,873 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:16:07,874 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:07,874 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:07,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:08,105 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:16:08,152 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:08,152 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:10,255 INFO L85 PathProgramCache]: Analyzing trace with hash -650050623, now seen corresponding path program 1 times [2024-05-06 22:16:10,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:10,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:10,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:10,436 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:16:10,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:10,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:10,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:10,645 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:16:10,732 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 22:16:10,738 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:10,738 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 22:16:10,755 INFO L85 PathProgramCache]: Analyzing trace with hash -1510575009, now seen corresponding path program 2 times [2024-05-06 22:16:10,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:10,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:10,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:10,918 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:10,918 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:10,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:10,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:11,053 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:11,088 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:11,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:13,164 INFO L85 PathProgramCache]: Analyzing trace with hash -2094717341, now seen corresponding path program 2 times [2024-05-06 22:16:13,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:13,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:13,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:13,339 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:13,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:13,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:13,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:13,509 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:13,557 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:13,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:15,644 INFO L85 PathProgramCache]: Analyzing trace with hash 843536889, now seen corresponding path program 1 times [2024-05-06 22:16:15,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:15,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:15,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:15,803 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:15,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:15,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:15,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:15,985 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:16,064 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 22:16:16,070 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:16,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 22:16:16,090 INFO L85 PathProgramCache]: Analyzing trace with hash 379840377, now seen corresponding path program 2 times [2024-05-06 22:16:16,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:16,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:16,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:16,267 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:16,267 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:16,268 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:16,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:16,406 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:16,436 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:16,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:18,513 INFO L85 PathProgramCache]: Analyzing trace with hash -1109849604, now seen corresponding path program 3 times [2024-05-06 22:16:18,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:18,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:18,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:18,686 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:18,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:18,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:18,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:18,838 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:18,869 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:18,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:20,934 INFO L85 PathProgramCache]: Analyzing trace with hash 771765853, now seen corresponding path program 4 times [2024-05-06 22:16:20,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:20,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:20,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:21,107 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:21,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:21,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:21,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:21,239 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:21,284 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:21,284 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:23,326 INFO L85 PathProgramCache]: Analyzing trace with hash 165758182, now seen corresponding path program 5 times [2024-05-06 22:16:23,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:23,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:23,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:23,470 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:23,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:23,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:23,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:23,651 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:23,684 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:23,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:25,753 INFO L85 PathProgramCache]: Analyzing trace with hash 420989019, now seen corresponding path program 6 times [2024-05-06 22:16:25,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:25,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:25,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:25,876 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:25,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:25,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:25,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:26,046 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:26,128 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 22:16:26,132 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:26,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 22:16:26,151 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 7 times [2024-05-06 22:16:26,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:26,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:26,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:26,266 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:26,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:26,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:26,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:26,374 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:26,404 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:26,404 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:28,458 INFO L85 PathProgramCache]: Analyzing trace with hash -464365891, now seen corresponding path program 8 times [2024-05-06 22:16:28,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:28,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:28,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:28,595 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:28,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:28,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:28,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:28,702 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:28,733 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:28,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:30,807 INFO L85 PathProgramCache]: Analyzing trace with hash 857953915, now seen corresponding path program 1 times [2024-05-06 22:16:30,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:30,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:30,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:30,913 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:30,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:30,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:30,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:31,049 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:31,079 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:31,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:33,161 INFO L85 PathProgramCache]: Analyzing trace with hash 858959909, now seen corresponding path program 1 times [2024-05-06 22:16:33,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:33,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:33,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:33,272 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:33,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:33,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:33,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:33,418 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:33,450 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:33,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:35,516 INFO L85 PathProgramCache]: Analyzing trace with hash -665028291, now seen corresponding path program 1 times [2024-05-06 22:16:35,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:35,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:35,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:35,651 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:35,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:35,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:35,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:35,769 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:35,800 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:16:35,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:16:37,875 INFO L85 PathProgramCache]: Analyzing trace with hash 1086926119, now seen corresponding path program 1 times [2024-05-06 22:16:37,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:37,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:37,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:38,049 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:38,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:38,049 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:38,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:38,171 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:38,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 88 [2024-05-06 22:16:38,277 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:38,278 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 55 [2024-05-06 22:16:38,293 INFO L85 PathProgramCache]: Analyzing trace with hash 57592259, now seen corresponding path program 1 times [2024-05-06 22:16:38,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:38,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:38,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:38,395 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:38,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:38,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:38,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:38,545 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:38,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 22:16:38,623 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:38,623 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 22:16:38,639 INFO L85 PathProgramCache]: Analyzing trace with hash 400666163, now seen corresponding path program 2 times [2024-05-06 22:16:38,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:38,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:38,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:38,751 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:38,752 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:38,753 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:38,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:38,854 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:38,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 22:16:38,935 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:38,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 22:16:38,951 INFO L85 PathProgramCache]: Analyzing trace with hash -1886042796, now seen corresponding path program 1 times [2024-05-06 22:16:38,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:38,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:38,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:39,093 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:39,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:39,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:39,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:39,199 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:39,272 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2024-05-06 22:16:39,277 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:39,277 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 24 [2024-05-06 22:16:39,293 INFO L85 PathProgramCache]: Analyzing trace with hash -1511097342, now seen corresponding path program 2 times [2024-05-06 22:16:39,293 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:39,293 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:39,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:39,392 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:39,393 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:39,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:39,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:39,491 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:39,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:39,728 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:39,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:41,795 INFO L85 PathProgramCache]: Analyzing trace with hash -1182200329, now seen corresponding path program 1 times [2024-05-06 22:16:41,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:41,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:41,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:41,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:41,884 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:41,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:41,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:41,971 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:42,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:42,071 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:42,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:44,280 INFO L85 PathProgramCache]: Analyzing trace with hash 503740205, now seen corresponding path program 2 times [2024-05-06 22:16:44,280 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:44,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:44,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:44,443 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:16:44,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:44,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:44,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:44,566 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:16:44,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:44,661 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:44,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:46,721 INFO L85 PathProgramCache]: Analyzing trace with hash -1066082532, now seen corresponding path program 3 times [2024-05-06 22:16:46,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:46,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:46,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:46,818 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:46,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:46,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:46,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:46,915 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:46,994 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:46,999 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:46,999 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:50,106 INFO L85 PathProgramCache]: Analyzing trace with hash -720350508, now seen corresponding path program 4 times [2024-05-06 22:16:50,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:50,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:50,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:50,259 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:16:50,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:50,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:50,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:50,349 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:16:50,428 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:50,433 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:50,433 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:52,478 INFO L85 PathProgramCache]: Analyzing trace with hash -247720171, now seen corresponding path program 5 times [2024-05-06 22:16:52,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:52,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:52,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:52,611 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:52,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:52,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:52,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:52,722 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:52,793 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:52,798 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:52,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:54,856 INFO L85 PathProgramCache]: Analyzing trace with hash -1998435377, now seen corresponding path program 6 times [2024-05-06 22:16:54,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:54,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:54,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:55,018 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:16:55,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:55,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:55,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:55,121 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:16:55,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:55,237 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:55,237 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:55,343 INFO L85 PathProgramCache]: Analyzing trace with hash 1082862906, now seen corresponding path program 7 times [2024-05-06 22:16:55,343 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:55,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:55,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:55,446 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:55,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:55,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:55,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:55,534 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:55,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:55,614 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:55,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:55,692 INFO L85 PathProgramCache]: Analyzing trace with hash 1876077550, now seen corresponding path program 8 times [2024-05-06 22:16:55,692 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:55,692 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:55,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:55,840 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:55,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:55,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:55,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:55,928 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-05-06 22:16:56,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:56,006 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:56,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:59,334 INFO L85 PathProgramCache]: Analyzing trace with hash 1912757035, now seen corresponding path program 9 times [2024-05-06 22:16:59,335 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:59,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:59,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:59,441 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:16:59,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:59,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:59,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:59,543 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:16:59,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 64 [2024-05-06 22:16:59,662 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:16:59,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 64 treesize of output 38 [2024-05-06 22:16:59,830 INFO L85 PathProgramCache]: Analyzing trace with hash 321175218, now seen corresponding path program 10 times [2024-05-06 22:16:59,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:59,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:59,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:16:59,965 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:16:59,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:16:59,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:16:59,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:00,087 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:00,126 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:00,127 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:17:02,189 INFO L85 PathProgramCache]: Analyzing trace with hash 1693891199, now seen corresponding path program 3 times [2024-05-06 22:17:02,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:02,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:02,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:02,360 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:02,360 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:02,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:02,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:02,490 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:02,628 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:02,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:17:04,687 INFO L85 PathProgramCache]: Analyzing trace with hash 2141365718, now seen corresponding path program 1 times [2024-05-06 22:17:04,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:04,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:04,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:04,787 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:04,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:04,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:04,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:04,903 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:04,941 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:04,941 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:17:07,004 INFO L85 PathProgramCache]: Analyzing trace with hash 1850830520, now seen corresponding path program 2 times [2024-05-06 22:17:07,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:07,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:07,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:07,101 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:07,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:07,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:07,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:07,194 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:07,492 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:07,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:17:09,548 INFO L85 PathProgramCache]: Analyzing trace with hash -439257014, now seen corresponding path program 3 times [2024-05-06 22:17:09,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:09,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:09,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:09,667 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:09,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:09,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:09,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:09,791 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:09,874 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:09,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:17:11,932 INFO L85 PathProgramCache]: Analyzing trace with hash -1137976413, now seen corresponding path program 1 times [2024-05-06 22:17:11,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:11,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:11,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:12,027 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:12,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:12,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:12,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:12,196 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:12,241 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:12,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:17:14,307 INFO L85 PathProgramCache]: Analyzing trace with hash 731910341, now seen corresponding path program 2 times [2024-05-06 22:17:14,307 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:14,307 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:14,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:14,398 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:14,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:14,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:14,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:14,487 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:14,705 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:14,706 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:17:16,770 INFO L85 PathProgramCache]: Analyzing trace with hash -2114697379, now seen corresponding path program 3 times [2024-05-06 22:17:16,770 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:16,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:16,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:16,929 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:16,929 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:16,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:16,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:17,038 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:17,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:17,154 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:17,155 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:17,182 INFO L85 PathProgramCache]: Analyzing trace with hash 1388270714, now seen corresponding path program 1 times [2024-05-06 22:17:17,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:17,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:17,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:17,255 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 22:17:17,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:17,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:17,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:17,328 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 22:17:17,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 22:17:17,403 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:17,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 22:17:19,438 INFO L85 PathProgramCache]: Analyzing trace with hash -719499116, now seen corresponding path program 2 times [2024-05-06 22:17:19,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:19,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:19,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:19,536 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 22:17:19,536 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:19,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:19,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:19,607 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 22:17:19,747 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:19,753 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:19,753 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:19,770 INFO L85 PathProgramCache]: Analyzing trace with hash 1855618507, now seen corresponding path program 1 times [2024-05-06 22:17:19,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:19,771 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:19,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:19,867 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:19,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:19,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:19,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:19,959 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:20,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 22:17:20,030 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:20,031 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 22:17:22,119 INFO L85 PathProgramCache]: Analyzing trace with hash 1795969507, now seen corresponding path program 2 times [2024-05-06 22:17:22,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:22,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:22,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:22,225 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:22,226 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:22,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:22,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:22,320 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:22,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:22,394 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:22,394 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:22,411 INFO L85 PathProgramCache]: Analyzing trace with hash 1038577006, now seen corresponding path program 3 times [2024-05-06 22:17:22,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:22,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:22,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:22,556 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:22,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:22,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:22,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:22,657 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:22,689 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:22,689 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:17:24,744 INFO L85 PathProgramCache]: Analyzing trace with hash -705447342, now seen corresponding path program 1 times [2024-05-06 22:17:24,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:24,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:24,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:24,876 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:24,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:24,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:24,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:24,977 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:25,054 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:25,059 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:25,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:25,076 INFO L85 PathProgramCache]: Analyzing trace with hash 1676773051, now seen corresponding path program 4 times [2024-05-06 22:17:25,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:25,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:25,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:25,212 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:25,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:25,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:25,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:25,306 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:25,340 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:25,341 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:17:27,396 INFO L85 PathProgramCache]: Analyzing trace with hash 1955705872, now seen corresponding path program 2 times [2024-05-06 22:17:27,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:27,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:27,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:27,493 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:27,493 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:27,493 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:27,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:27,588 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:27,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:27,668 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:27,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:27,684 INFO L85 PathProgramCache]: Analyzing trace with hash -1275710403, now seen corresponding path program 5 times [2024-05-06 22:17:27,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:27,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:27,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:27,785 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:27,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:27,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:27,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:27,992 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:28,022 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:28,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:17:30,089 INFO L85 PathProgramCache]: Analyzing trace with hash -642807199, now seen corresponding path program 3 times [2024-05-06 22:17:30,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:30,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:30,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:30,190 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:30,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:30,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:30,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:30,290 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:30,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:30,368 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:30,368 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:30,385 INFO L85 PathProgramCache]: Analyzing trace with hash 155679372, now seen corresponding path program 6 times [2024-05-06 22:17:30,385 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:30,385 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:30,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:30,478 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:30,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:30,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:30,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:30,644 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:30,684 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:30,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:17:32,760 INFO L85 PathProgramCache]: Analyzing trace with hash -358581537, now seen corresponding path program 4 times [2024-05-06 22:17:32,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:32,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:32,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:32,858 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:32,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:32,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:32,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:32,951 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:33,051 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:33,068 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:33,069 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:33,084 INFO L85 PathProgramCache]: Analyzing trace with hash 1013267728, now seen corresponding path program 7 times [2024-05-06 22:17:33,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:33,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:33,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:33,211 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:33,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:33,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:33,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:33,359 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:33,389 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:33,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:17:35,450 INFO L85 PathProgramCache]: Analyzing trace with hash -1049368716, now seen corresponding path program 5 times [2024-05-06 22:17:35,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:35,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:35,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:35,559 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:35,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:35,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:35,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:35,701 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:35,784 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:35,790 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:35,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:35,808 INFO L85 PathProgramCache]: Analyzing trace with hash 1272248793, now seen corresponding path program 8 times [2024-05-06 22:17:35,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:35,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:35,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:35,903 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:35,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:35,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:35,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:35,996 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:36,026 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:36,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:17:38,096 INFO L85 PathProgramCache]: Analyzing trace with hash 1930396594, now seen corresponding path program 6 times [2024-05-06 22:17:38,096 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:38,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:38,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:38,264 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:38,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:38,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:38,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:38,356 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:38,424 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:38,429 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:38,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:38,445 INFO L85 PathProgramCache]: Analyzing trace with hash -159519550, now seen corresponding path program 9 times [2024-05-06 22:17:38,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:38,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:38,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:38,533 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:38,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:38,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:38,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:38,622 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:38,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 22:17:38,698 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:38,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 22:17:40,763 INFO L85 PathProgramCache]: Analyzing trace with hash -650138170, now seen corresponding path program 10 times [2024-05-06 22:17:40,763 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:40,763 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:40,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:40,911 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:40,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:40,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:40,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:41,011 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:41,086 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 22:17:41,091 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:41,092 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 22:17:43,137 INFO L85 PathProgramCache]: Analyzing trace with hash -524575962, now seen corresponding path program 11 times [2024-05-06 22:17:43,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:43,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:43,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:43,231 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:43,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:43,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:43,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:43,326 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:17:43,397 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 22:17:43,403 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:43,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 22:17:45,465 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953171, now seen corresponding path program 12 times [2024-05-06 22:17:45,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:45,466 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:45,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:45,644 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:45,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:45,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:45,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:45,772 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:45,843 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 51 [2024-05-06 22:17:45,848 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:45,848 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 46 treesize of output 26 [2024-05-06 22:17:45,866 INFO L85 PathProgramCache]: Analyzing trace with hash -1406953171, now seen corresponding path program 13 times [2024-05-06 22:17:45,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:45,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:45,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:45,966 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:45,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:45,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:45,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:46,061 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:17:46,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 60 [2024-05-06 22:17:46,134 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:46,134 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 55 treesize of output 29 [2024-05-06 22:17:48,216 INFO L85 PathProgramCache]: Analyzing trace with hash -2032111807, now seen corresponding path program 14 times [2024-05-06 22:17:48,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:48,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:48,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:48,322 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:17:48,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:48,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:48,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:48,469 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:17:48,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 66 [2024-05-06 22:17:48,544 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:48,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 40 [2024-05-06 22:17:50,567 INFO L85 PathProgramCache]: Analyzing trace with hash 46290037, now seen corresponding path program 15 times [2024-05-06 22:17:50,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:50,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:50,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:50,671 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:17:50,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:50,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:50,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:50,773 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:17:50,844 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 22:17:50,849 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:50,850 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 22:17:52,876 INFO L85 PathProgramCache]: Analyzing trace with hash 1103443637, now seen corresponding path program 16 times [2024-05-06 22:17:52,876 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:52,876 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:52,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:52,984 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:17:52,984 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:52,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:53,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:53,097 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:17:53,170 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 22:17:53,175 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:53,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 22:17:55,227 INFO L85 PathProgramCache]: Analyzing trace with hash 1815327873, now seen corresponding path program 17 times [2024-05-06 22:17:55,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:55,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:55,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:55,395 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:17:55,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:55,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:55,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:55,497 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:17:55,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 75 [2024-05-06 22:17:55,573 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:17:55,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 75 treesize of output 43 [2024-05-06 22:17:57,777 INFO L85 PathProgramCache]: Analyzing trace with hash -1746189313, now seen corresponding path program 18 times [2024-05-06 22:17:57,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:57,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:57,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:57,887 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:17:57,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:17:57,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:17:57,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:17:58,007 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:17:58,071 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:17:58,071 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:00,174 INFO L85 PathProgramCache]: Analyzing trace with hash -1948974476, now seen corresponding path program 1 times [2024-05-06 22:18:00,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:00,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:00,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:00,400 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:00,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:00,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:00,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:00,520 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:00,554 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:00,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:02,627 INFO L85 PathProgramCache]: Analyzing trace with hash 1530558073, now seen corresponding path program 1 times [2024-05-06 22:18:02,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:02,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:02,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:02,764 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:02,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:02,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:02,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:02,882 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:02,912 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:02,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:04,956 INFO L85 PathProgramCache]: Analyzing trace with hash 1764716819, now seen corresponding path program 2 times [2024-05-06 22:18:04,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:04,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:04,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:05,077 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:05,078 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:05,078 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:05,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:05,259 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:05,303 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:05,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:07,386 INFO L85 PathProgramCache]: Analyzing trace with hash -737780046, now seen corresponding path program 2 times [2024-05-06 22:18:07,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:07,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:07,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:07,505 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:07,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:07,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:07,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:07,620 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:07,654 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:07,654 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:09,716 INFO L85 PathProgramCache]: Analyzing trace with hash 1069889706, now seen corresponding path program 1 times [2024-05-06 22:18:09,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:09,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:09,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:09,828 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:09,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:09,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:09,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:09,994 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:10,028 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:10,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:13,270 INFO L85 PathProgramCache]: Analyzing trace with hash -752566168, now seen corresponding path program 2 times [2024-05-06 22:18:13,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:13,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:13,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:13,383 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:13,383 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:13,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:13,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:13,499 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:13,569 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:13,569 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:15,642 INFO L85 PathProgramCache]: Analyzing trace with hash 1413205694, now seen corresponding path program 3 times [2024-05-06 22:18:15,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:15,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:15,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:15,756 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:15,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:15,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:15,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:15,931 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:16,075 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:16,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:18,151 INFO L85 PathProgramCache]: Analyzing trace with hash -1678939921, now seen corresponding path program 4 times [2024-05-06 22:18:18,151 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:18,151 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:18,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:18,276 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:18,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:18,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:18,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:18,400 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:18,433 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:18,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:20,509 INFO L85 PathProgramCache]: Analyzing trace with hash 1216367837, now seen corresponding path program 5 times [2024-05-06 22:18:20,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:20,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:20,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:20,629 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:20,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:20,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:20,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:20,825 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:20,904 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:20,904 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:22,979 INFO L85 PathProgramCache]: Analyzing trace with hash 19726088, now seen corresponding path program 6 times [2024-05-06 22:18:22,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:22,979 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:22,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:23,091 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:23,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:23,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:23,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:23,205 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:23,351 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:23,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:25,424 INFO L85 PathProgramCache]: Analyzing trace with hash -1150352581, now seen corresponding path program 7 times [2024-05-06 22:18:25,424 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:25,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:25,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:25,635 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:25,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:25,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:25,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:25,756 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:25,785 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:25,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:27,871 INFO L85 PathProgramCache]: Analyzing trace with hash 790786833, now seen corresponding path program 8 times [2024-05-06 22:18:27,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:27,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:27,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:27,991 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:27,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:27,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:28,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:28,109 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:28,193 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:28,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:30,265 INFO L85 PathProgramCache]: Analyzing trace with hash 2037093948, now seen corresponding path program 9 times [2024-05-06 22:18:30,269 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:30,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:30,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:30,476 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:30,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:30,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:30,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:30,587 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:30,666 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 22:18:30,672 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:30,672 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 22:18:30,739 INFO L85 PathProgramCache]: Analyzing trace with hash -1088879983, now seen corresponding path program 19 times [2024-05-06 22:18:30,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:30,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:30,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:30,895 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:30,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:30,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:30,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:31,033 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:31,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 22:18:31,076 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:31,076 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 22:18:31,142 INFO L85 PathProgramCache]: Analyzing trace with hash 474607001, now seen corresponding path program 20 times [2024-05-06 22:18:31,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:31,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:31,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:31,275 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:31,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:31,276 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:31,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:31,457 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:31,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 22:18:31,504 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:31,505 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 22:18:31,570 INFO L85 PathProgramCache]: Analyzing trace with hash -1887594509, now seen corresponding path program 21 times [2024-05-06 22:18:31,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:31,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:31,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:31,696 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:31,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:31,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:31,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:31,817 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:31,855 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 22:18:31,861 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:31,861 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 22:18:31,937 INFO L85 PathProgramCache]: Analyzing trace with hash -639133439, now seen corresponding path program 22 times [2024-05-06 22:18:31,937 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:31,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:31,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:32,046 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:32,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:32,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:32,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:32,154 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:32,196 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 22:18:32,204 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:32,205 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 22:18:32,277 INFO L85 PathProgramCache]: Analyzing trace with hash -594777205, now seen corresponding path program 23 times [2024-05-06 22:18:32,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:32,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:32,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:32,432 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:32,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:32,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:32,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:32,539 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:32,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 22:18:32,582 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:32,582 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 22:18:32,651 INFO L85 PathProgramCache]: Analyzing trace with hash -1082374629, now seen corresponding path program 24 times [2024-05-06 22:18:32,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:32,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:32,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:32,767 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:32,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:32,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:32,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:32,883 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:32,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 22:18:32,928 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:32,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 22:18:32,993 INFO L85 PathProgramCache]: Analyzing trace with hash -495815119, now seen corresponding path program 25 times [2024-05-06 22:18:32,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:32,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:33,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:33,192 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:33,192 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:33,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:33,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:33,301 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:33,342 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 22:18:33,348 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:33,349 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 22:18:33,414 INFO L85 PathProgramCache]: Analyzing trace with hash 1322419288, now seen corresponding path program 26 times [2024-05-06 22:18:33,414 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:33,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:33,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:33,515 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:33,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:33,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:33,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:33,621 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:33,657 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2024-05-06 22:18:33,662 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:33,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 29 [2024-05-06 22:18:33,727 INFO L85 PathProgramCache]: Analyzing trace with hash 1995158398, now seen corresponding path program 27 times [2024-05-06 22:18:33,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:33,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:33,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:33,838 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:33,839 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:33,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:33,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:34,022 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-05-06 22:18:34,062 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 47 [2024-05-06 22:18:34,067 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-05-06 22:18:34,067 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 32 [2024-05-06 22:18:34,143 INFO L85 PathProgramCache]: Analyzing trace with hash -871976910, now seen corresponding path program 28 times [2024-05-06 22:18:34,143 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:34,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:34,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:34,298 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:34,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:34,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:34,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:34,426 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:35,098 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:35,098 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:18:37,172 INFO L85 PathProgramCache]: Analyzing trace with hash -113581501, now seen corresponding path program 1 times [2024-05-06 22:18:37,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:37,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:37,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:37,328 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 22:18:37,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:37,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:37,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:37,482 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 4 proven. 4 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-05-06 22:18:37,491 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-05-06 22:18:37,493 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 22:18:37,493 INFO L85 PathProgramCache]: Analyzing trace with hash -159439195, now seen corresponding path program 1 times [2024-05-06 22:18:37,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 22:18:37,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174579883] [2024-05-06 22:18:37,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:37,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:37,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:37,708 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 144 proven. 2 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 22:18:37,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 22:18:37,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [174579883] [2024-05-06 22:18:37,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [174579883] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 22:18:37,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1701429002] [2024-05-06 22:18:37,710 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:37,710 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 22:18:37,710 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 22:18:37,749 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 22:18:37,750 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-05-06 22:18:38,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:38,254 INFO L262 TraceCheckSpWp]: Trace formula consists of 673 conjuncts, 10 conjunts are in the unsatisfiable core [2024-05-06 22:18:38,263 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 22:18:38,602 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 145 proven. 1 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 22:18:38,602 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-05-06 22:18:38,828 INFO L134 CoverageAnalysis]: Checked inductivity of 694 backedges. 145 proven. 1 refuted. 0 times theorem prover too weak. 548 trivial. 0 not checked. [2024-05-06 22:18:38,828 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1701429002] provided 0 perfect and 2 imperfect interpolant sequences [2024-05-06 22:18:38,828 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-05-06 22:18:38,828 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2024-05-06 22:18:38,830 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [784546086] [2024-05-06 22:18:38,830 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-05-06 22:18:38,833 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2024-05-06 22:18:38,833 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 22:18:38,835 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-05-06 22:18:38,836 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=434, Unknown=0, NotChecked=0, Total=552 [2024-05-06 22:18:38,836 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 22:18:38,836 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 22:18:38,837 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 13.083333333333334) internal successors, (314), 24 states have internal predecessors, (314), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 22:18:38,837 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 22:18:39,834 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:39,834 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:41,908 INFO L85 PathProgramCache]: Analyzing trace with hash -1570213396, now seen corresponding path program 10 times [2024-05-06 22:18:41,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:41,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:41,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:42,325 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:42,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:42,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:42,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:42,498 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-05-06 22:18:43,477 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-05-06 22:18:43,491 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-05-06 22:18:43,684 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable180,SelfDestructingSolverStorable178,SelfDestructingSolverStorable179 [2024-05-06 22:18:43,685 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-05-06 22:18:43,685 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-05-06 22:18:43,685 INFO L85 PathProgramCache]: Analyzing trace with hash 1543240338, now seen corresponding path program 2 times [2024-05-06 22:18:43,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-05-06 22:18:43,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2105679072] [2024-05-06 22:18:43,685 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:43,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:43,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:43,968 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 237 proven. 15 refuted. 0 times theorem prover too weak. 451 trivial. 0 not checked. [2024-05-06 22:18:43,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-05-06 22:18:43,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2105679072] [2024-05-06 22:18:43,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2105679072] provided 0 perfect and 1 imperfect interpolant sequences [2024-05-06 22:18:43,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [847361936] [2024-05-06 22:18:43,969 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-05-06 22:18:43,969 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-05-06 22:18:43,969 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-05-06 22:18:43,970 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-05-06 22:18:43,972 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-05-06 22:18:44,429 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-05-06 22:18:44,430 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-05-06 22:18:44,432 INFO L262 TraceCheckSpWp]: Trace formula consists of 359 conjuncts, 18 conjunts are in the unsatisfiable core [2024-05-06 22:18:44,451 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-05-06 22:18:44,693 INFO L190 IndexEqualityManager]: detected not equals via solver [2024-05-06 22:18:44,695 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2024-05-06 22:18:44,721 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-05-06 22:18:45,022 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 703 trivial. 0 not checked. [2024-05-06 22:18:45,022 INFO L323 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-05-06 22:18:45,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [847361936] provided 1 perfect and 0 imperfect interpolant sequences [2024-05-06 22:18:45,022 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-05-06 22:18:45,023 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [15] total 28 [2024-05-06 22:18:45,023 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725623424] [2024-05-06 22:18:45,023 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-05-06 22:18:45,023 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-05-06 22:18:45,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-05-06 22:18:45,024 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-05-06 22:18:45,024 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=690, Unknown=0, NotChecked=0, Total=756 [2024-05-06 22:18:45,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-05-06 22:18:45,024 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-05-06 22:18:45,025 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 11.0) internal successors, (165), 15 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-05-06 22:18:45,025 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 13 states. [2024-05-06 22:18:45,025 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-05-06 22:18:48,265 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:48,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:50,661 INFO L85 PathProgramCache]: Analyzing trace with hash 903248153, now seen corresponding path program 1 times [2024-05-06 22:18:50,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:50,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:50,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:50,945 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 22:18:50,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:50,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:50,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:51,149 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 22:18:51,228 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:51,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:53,538 INFO L85 PathProgramCache]: Analyzing trace with hash 633257579, now seen corresponding path program 2 times [2024-05-06 22:18:53,538 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:53,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:53,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:53,776 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:18:53,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:53,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:53,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:53,962 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:18:54,086 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:54,087 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:56,508 INFO L85 PathProgramCache]: Analyzing trace with hash 734550161, now seen corresponding path program 3 times [2024-05-06 22:18:56,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:56,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:56,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:56,690 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:18:56,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:56,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:56,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:56,867 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:18:57,272 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:18:57,273 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:18:59,547 INFO L85 PathProgramCache]: Analyzing trace with hash 891979789, now seen corresponding path program 4 times [2024-05-06 22:18:59,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:59,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:59,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:18:59,941 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:18:59,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:18:59,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:18:59,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:00,167 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:19:00,561 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:00,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:02,891 INFO L85 PathProgramCache]: Analyzing trace with hash 1956876707, now seen corresponding path program 1 times [2024-05-06 22:19:02,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:02,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:02,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:19:02,921 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 22:19:02,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:19:03,104 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:03,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:05,422 INFO L85 PathProgramCache]: Analyzing trace with hash 1043258244, now seen corresponding path program 1 times [2024-05-06 22:19:05,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:05,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:05,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:19:05,477 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 22:19:05,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:19:05,615 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:05,615 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:08,092 INFO L85 PathProgramCache]: Analyzing trace with hash 1356116916, now seen corresponding path program 1 times [2024-05-06 22:19:08,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:08,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:08,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:08,400 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:08,400 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:08,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:08,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:08,523 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:08,629 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:08,629 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:10,996 INFO L85 PathProgramCache]: Analyzing trace with hash -730101856, now seen corresponding path program 1 times [2024-05-06 22:19:10,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:10,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:11,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:11,121 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:11,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:11,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:11,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:11,242 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:11,361 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:11,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:13,688 INFO L85 PathProgramCache]: Analyzing trace with hash 1361921632, now seen corresponding path program 1 times [2024-05-06 22:19:13,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:13,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:13,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:13,820 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:13,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:13,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:13,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:13,943 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:14,035 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:14,035 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:16,444 INFO L85 PathProgramCache]: Analyzing trace with hash 736669602, now seen corresponding path program 1 times [2024-05-06 22:19:16,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:16,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:16,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:16,593 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:16,593 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:16,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:16,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:16,710 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:16,803 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:16,804 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:19,137 INFO L85 PathProgramCache]: Analyzing trace with hash -1084615134, now seen corresponding path program 1 times [2024-05-06 22:19:19,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:19,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:19,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:19,256 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:19,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:19,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:19,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:19,380 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:19,477 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:19,477 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:21,777 INFO L85 PathProgramCache]: Analyzing trace with hash -589176923, now seen corresponding path program 2 times [2024-05-06 22:19:21,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:21,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:21,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:21,904 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:21,905 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:21,905 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:21,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:22,033 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:22,158 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:22,159 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:24,643 INFO L85 PathProgramCache]: Analyzing trace with hash 1853284599, now seen corresponding path program 3 times [2024-05-06 22:19:24,643 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:24,643 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:24,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:24,888 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 22:19:24,889 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:24,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:24,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:24,999 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-05-06 22:19:25,096 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:25,096 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 36 [2024-05-06 22:19:27,389 INFO L85 PathProgramCache]: Analyzing trace with hash 820544578, now seen corresponding path program 4 times [2024-05-06 22:19:27,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:27,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:27,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:27,977 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:27,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:27,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:27,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:28,163 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-05-06 22:19:29,036 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:29,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:31,376 INFO L85 PathProgramCache]: Analyzing trace with hash 592470916, now seen corresponding path program 1 times [2024-05-06 22:19:31,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:31,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:31,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:19:31,406 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 22:19:31,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:19:31,575 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:31,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:33,901 INFO L85 PathProgramCache]: Analyzing trace with hash 2018197509, now seen corresponding path program 1 times [2024-05-06 22:19:33,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:33,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:33,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:34,017 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:34,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:34,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:34,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:34,132 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:34,229 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:34,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:36,531 INFO L85 PathProgramCache]: Analyzing trace with hash 1439105274, now seen corresponding path program 1 times [2024-05-06 22:19:36,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:36,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:36,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:36,828 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:36,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:36,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:36,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:36,951 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:37,027 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:37,028 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:39,308 INFO L85 PathProgramCache]: Analyzing trace with hash -923408591, now seen corresponding path program 1 times [2024-05-06 22:19:39,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:39,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:39,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:39,430 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:39,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:39,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:39,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:39,551 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:39,650 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:39,650 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:41,944 INFO L85 PathProgramCache]: Analyzing trace with hash 801496604, now seen corresponding path program 1 times [2024-05-06 22:19:41,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:41,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:41,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:42,068 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:42,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:42,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:42,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:42,190 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:42,288 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:42,288 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:44,585 INFO L85 PathProgramCache]: Analyzing trace with hash -1359618605, now seen corresponding path program 1 times [2024-05-06 22:19:44,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:44,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:44,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:44,814 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:44,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:44,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:44,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:44,966 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:45,052 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:45,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:47,385 INFO L85 PathProgramCache]: Analyzing trace with hash 1618709311, now seen corresponding path program 2 times [2024-05-06 22:19:47,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:47,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:47,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:47,505 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:47,505 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:47,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:47,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:47,620 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:47,699 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:47,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:49,953 INFO L85 PathProgramCache]: Analyzing trace with hash 1589123781, now seen corresponding path program 3 times [2024-05-06 22:19:49,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:49,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:49,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:50,070 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:50,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:50,070 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:50,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:50,181 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:50,254 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:50,255 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:52,514 INFO L85 PathProgramCache]: Analyzing trace with hash 1575282695, now seen corresponding path program 4 times [2024-05-06 22:19:52,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:52,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:52,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:52,630 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:52,630 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:52,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:52,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:52,850 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:52,942 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:19:52,942 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:19:55,265 INFO L85 PathProgramCache]: Analyzing trace with hash -2027394425, now seen corresponding path program 5 times [2024-05-06 22:19:55,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:55,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:55,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:55,379 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:19:55,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:19:55,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:19:55,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:19:55,492 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:20:08,856 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:20:08,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:20:11,150 INFO L85 PathProgramCache]: Analyzing trace with hash 1535577603, now seen corresponding path program 1 times [2024-05-06 22:20:11,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:11,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:11,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:11,407 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 22:20:11,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:11,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:11,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:11,758 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 22:20:11,834 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:20:11,835 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:20:14,080 INFO L85 PathProgramCache]: Analyzing trace with hash 151732033, now seen corresponding path program 2 times [2024-05-06 22:20:14,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:14,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:14,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:14,259 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:20:14,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:14,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:14,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:14,447 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:20:14,550 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:20:14,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:20:16,815 INFO L85 PathProgramCache]: Analyzing trace with hash 731392507, now seen corresponding path program 3 times [2024-05-06 22:20:16,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:16,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:16,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:16,991 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:20:16,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:16,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:17,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:17,170 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:20:17,806 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:20:17,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:20:20,136 INFO L85 PathProgramCache]: Analyzing trace with hash 973370723, now seen corresponding path program 4 times [2024-05-06 22:20:20,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:20,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:20,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:20,334 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:20:20,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:20,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:20,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:20,527 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-05-06 22:20:38,801 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:20:38,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:20:41,081 INFO L85 PathProgramCache]: Analyzing trace with hash -1661633480, now seen corresponding path program 1 times [2024-05-06 22:20:41,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:41,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:41,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:41,266 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 22:20:41,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:41,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:41,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:41,663 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-05-06 22:20:41,767 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:20:41,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 54 treesize of output 38 [2024-05-06 22:20:44,091 INFO L85 PathProgramCache]: Analyzing trace with hash -1539046420, now seen corresponding path program 2 times [2024-05-06 22:20:44,092 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:44,092 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:44,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:44,317 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:20:44,318 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:20:44,318 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:20:44,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:20:44,542 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-05-06 22:21:23,220 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:23,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:25,712 INFO L85 PathProgramCache]: Analyzing trace with hash -1310648091, now seen corresponding path program 1 times [2024-05-06 22:21:25,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:25,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:25,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:21:25,729 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 22:21:25,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:21:25,923 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:25,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:28,376 INFO L85 PathProgramCache]: Analyzing trace with hash -284387575, now seen corresponding path program 1 times [2024-05-06 22:21:28,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:28,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:28,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:21:28,398 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 22:21:28,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:21:28,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:28,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:30,903 INFO L85 PathProgramCache]: Analyzing trace with hash 2144220492, now seen corresponding path program 1 times [2024-05-06 22:21:30,904 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:30,904 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:30,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:21:30,922 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 22:21:30,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:21:31,112 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:31,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:33,432 INFO L85 PathProgramCache]: Analyzing trace with hash 1152656130, now seen corresponding path program 2 times [2024-05-06 22:21:33,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:33,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:33,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:21:33,454 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-05-06 22:21:33,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-05-06 22:21:33,609 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:33,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:35,898 INFO L85 PathProgramCache]: Analyzing trace with hash -329137646, now seen corresponding path program 1 times [2024-05-06 22:21:35,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:35,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:35,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:36,227 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:36,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:36,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:36,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:36,337 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:36,449 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:21:36,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1311 treesize of output 1083 [2024-05-06 22:21:36,923 INFO L85 PathProgramCache]: Analyzing trace with hash -183177529, now seen corresponding path program 2 times [2024-05-06 22:21:36,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:36,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:36,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:37,046 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:37,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:37,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:37,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:37,156 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:37,274 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:21:37,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2677 treesize of output 2225 [2024-05-06 22:21:39,660 INFO L85 PathProgramCache]: Analyzing trace with hash 113316333, now seen corresponding path program 1 times [2024-05-06 22:21:39,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:39,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:39,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:39,919 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:39,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:39,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:39,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:40,031 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:40,131 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:21:40,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 676 treesize of output 560 [2024-05-06 22:21:40,449 INFO L85 PathProgramCache]: Analyzing trace with hash 2081865331, now seen corresponding path program 1 times [2024-05-06 22:21:40,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:40,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:40,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:40,560 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:40,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:40,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:40,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:40,675 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:40,781 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:21:40,782 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1311 treesize of output 1083 [2024-05-06 22:21:43,125 INFO L85 PathProgramCache]: Analyzing trace with hash -625579729, now seen corresponding path program 1 times [2024-05-06 22:21:43,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:43,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:43,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:43,235 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:43,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:43,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:43,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:43,507 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:43,625 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:21:43,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1375 treesize of output 1147 [2024-05-06 22:21:46,055 INFO L85 PathProgramCache]: Analyzing trace with hash 811103989, now seen corresponding path program 1 times [2024-05-06 22:21:46,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:46,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:46,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:46,162 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:46,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:46,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:46,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:46,269 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:46,345 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:21:46,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 640 treesize of output 524 [2024-05-06 22:21:48,707 INFO L85 PathProgramCache]: Analyzing trace with hash -1359308686, now seen corresponding path program 3 times [2024-05-06 22:21:48,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:48,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:48,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:48,818 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:48,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:48,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:48,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:48,939 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:49,208 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:49,225 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:51,532 INFO L85 PathProgramCache]: Analyzing trace with hash 1895813943, now seen corresponding path program 4 times [2024-05-06 22:21:51,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:51,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:51,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:51,642 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:51,642 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:51,642 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:51,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:51,753 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:51,877 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:51,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:54,210 INFO L85 PathProgramCache]: Analyzing trace with hash 1862270569, now seen corresponding path program 5 times [2024-05-06 22:21:54,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:54,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:54,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:54,322 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:54,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:54,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:54,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:54,428 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:54,549 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:54,560 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:56,990 INFO L85 PathProgramCache]: Analyzing trace with hash 60073209, now seen corresponding path program 6 times [2024-05-06 22:21:56,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:56,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:57,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:57,101 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:57,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:57,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:57,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:57,212 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:57,355 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:21:57,384 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:21:59,686 INFO L85 PathProgramCache]: Analyzing trace with hash -1383535509, now seen corresponding path program 7 times [2024-05-06 22:21:59,686 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:59,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:59,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:59,792 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:21:59,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:21:59,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:21:59,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:21:59,900 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:00,024 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:00,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:02,396 INFO L85 PathProgramCache]: Analyzing trace with hash 1896768247, now seen corresponding path program 1 times [2024-05-06 22:22:02,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:02,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:02,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:02,713 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:02,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:02,713 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:02,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:02,835 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:02,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:02,954 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:05,194 INFO L85 PathProgramCache]: Analyzing trace with hash 1862301352, now seen corresponding path program 1 times [2024-05-06 22:22:05,194 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:05,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:05,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:05,310 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:05,311 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:05,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:05,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:05,428 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:05,544 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:05,558 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:07,893 INFO L85 PathProgramCache]: Analyzing trace with hash 60074201, now seen corresponding path program 1 times [2024-05-06 22:22:07,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:07,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:07,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:08,035 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:08,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:08,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:08,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:08,335 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:08,436 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:08,437 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1311 treesize of output 1083 [2024-05-06 22:22:10,863 INFO L85 PathProgramCache]: Analyzing trace with hash -2084118952, now seen corresponding path program 8 times [2024-05-06 22:22:10,864 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:10,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:10,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:10,978 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:10,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:10,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:10,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:11,090 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:11,191 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:11,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1375 treesize of output 1147 [2024-05-06 22:22:13,562 INFO L85 PathProgramCache]: Analyzing trace with hash 71317673, now seen corresponding path program 9 times [2024-05-06 22:22:13,562 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:13,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:13,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:13,671 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:13,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:13,672 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:13,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:13,778 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:13,887 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:13,887 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2677 treesize of output 2225 [2024-05-06 22:22:14,309 INFO L85 PathProgramCache]: Analyzing trace with hash 1526321210, now seen corresponding path program 10 times [2024-05-06 22:22:14,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:14,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:14,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:14,504 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:14,504 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:14,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:14,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:14,612 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:14,710 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:14,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1339 treesize of output 1111 [2024-05-06 22:22:17,112 INFO L85 PathProgramCache]: Analyzing trace with hash -1613331829, now seen corresponding path program 11 times [2024-05-06 22:22:17,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:17,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:17,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:17,215 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:17,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:17,216 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:17,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:17,319 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-05-06 22:22:17,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:17,704 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:20,066 INFO L85 PathProgramCache]: Analyzing trace with hash -466386886, now seen corresponding path program 3 times [2024-05-06 22:22:20,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:20,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:20,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:20,172 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:20,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:20,173 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:20,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:20,323 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:20,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:20,484 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:22,855 INFO L85 PathProgramCache]: Analyzing trace with hash -850106366, now seen corresponding path program 4 times [2024-05-06 22:22:22,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:22,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:22,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:22,963 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:22,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:22,964 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:22,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:23,072 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:23,216 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:23,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:25,579 INFO L85 PathProgramCache]: Analyzing trace with hash -304517489, now seen corresponding path program 5 times [2024-05-06 22:22:25,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:25,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:25,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:25,693 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:25,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:25,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:25,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:25,798 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:25,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:25,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:28,283 INFO L85 PathProgramCache]: Analyzing trace with hash 1652744804, now seen corresponding path program 6 times [2024-05-06 22:22:28,283 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:28,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:28,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:28,390 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:28,390 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:28,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:28,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:28,538 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:28,663 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:28,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:30,964 INFO L85 PathProgramCache]: Analyzing trace with hash -777969679, now seen corresponding path program 7 times [2024-05-06 22:22:30,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:30,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:30,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:31,071 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:31,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:31,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:31,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:31,178 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:31,317 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:31,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:33,603 INFO L85 PathProgramCache]: Analyzing trace with hash -849152062, now seen corresponding path program 1 times [2024-05-06 22:22:33,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:33,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:33,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:33,865 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:33,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:33,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:33,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:33,996 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:34,163 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:34,179 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:36,427 INFO L85 PathProgramCache]: Analyzing trace with hash -304486706, now seen corresponding path program 1 times [2024-05-06 22:22:36,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:36,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:36,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:36,542 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:36,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:36,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:36,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:36,657 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:36,760 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 68 [2024-05-06 22:22:36,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 70 [2024-05-06 22:22:39,119 INFO L85 PathProgramCache]: Analyzing trace with hash 1652745796, now seen corresponding path program 1 times [2024-05-06 22:22:39,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:39,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:39,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:39,235 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:39,236 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:39,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:39,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:39,351 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:42,027 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:42,027 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2679 treesize of output 2227 [2024-05-06 22:22:42,308 INFO L85 PathProgramCache]: Analyzing trace with hash 250169152, now seen corresponding path program 1 times [2024-05-06 22:22:42,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:42,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:42,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:42,720 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:42,720 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:42,720 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:42,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:42,840 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:42,948 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:42,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1329 treesize of output 1101 [2024-05-06 22:22:43,332 INFO L85 PathProgramCache]: Analyzing trace with hash -823214014, now seen corresponding path program 2 times [2024-05-06 22:22:43,332 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:43,332 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:43,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:43,454 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:43,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:43,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:43,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:43,700 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:43,800 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:43,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 658 treesize of output 542 [2024-05-06 22:22:45,165 INFO L85 PathProgramCache]: Analyzing trace with hash 666181378, now seen corresponding path program 3 times [2024-05-06 22:22:45,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:45,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:45,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:45,289 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:45,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:45,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:45,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:45,480 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:45,574 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:45,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2679 treesize of output 2227 [2024-05-06 22:22:45,862 INFO L85 PathProgramCache]: Analyzing trace with hash 21489732, now seen corresponding path program 4 times [2024-05-06 22:22:45,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:45,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:45,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:46,039 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:46,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:46,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:46,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:46,168 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:46,266 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:46,266 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 658 treesize of output 542 [2024-05-06 22:22:46,910 INFO L85 PathProgramCache]: Analyzing trace with hash -1384780092, now seen corresponding path program 5 times [2024-05-06 22:22:46,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:46,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:46,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:47,067 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:47,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:47,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:47,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:47,193 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-05-06 22:22:47,311 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:47,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1313 treesize of output 1085 [2024-05-06 22:22:47,666 INFO L85 PathProgramCache]: Analyzing trace with hash -1559549537, now seen corresponding path program 1 times [2024-05-06 22:22:47,666 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:47,666 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:47,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:47,827 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:47,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:47,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:47,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:47,956 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:48,059 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:48,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1329 treesize of output 1101 [2024-05-06 22:22:50,454 INFO L85 PathProgramCache]: Analyzing trace with hash -1712876028, now seen corresponding path program 1 times [2024-05-06 22:22:50,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:50,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:50,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:50,583 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:50,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:50,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:50,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:50,706 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:50,798 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:50,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 658 treesize of output 542 [2024-05-06 22:22:51,083 INFO L85 PathProgramCache]: Analyzing trace with hash 1330219265, now seen corresponding path program 1 times [2024-05-06 22:22:51,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:51,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:51,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:51,210 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:51,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:51,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:51,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:51,332 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:51,430 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:51,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 2679 treesize of output 2227 [2024-05-06 22:22:53,856 INFO L85 PathProgramCache]: Analyzing trace with hash 42910310, now seen corresponding path program 1 times [2024-05-06 22:22:53,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:53,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:53,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:54,013 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:54,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:54,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:54,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:54,134 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:54,224 INFO L349 Elim1Store]: treesize reduction 11, result has 26.7 percent of original size [2024-05-06 22:22:54,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 1313 treesize of output 1085 [2024-05-06 22:22:56,537 INFO L85 PathProgramCache]: Analyzing trace with hash -1799731100, now seen corresponding path program 6 times [2024-05-06 22:22:56,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:56,538 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:56,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:58,464 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-05-06 22:22:58,464 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-05-06 22:22:58,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-05-06 22:22:58,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-05-06 22:22:58,740 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked.