./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/libvsync/hclhlock.i --full-output --traceabstraction.use.conditional.por.in.concurrent.analysis false --traceabstraction.commutativity.condition.synthesis NONE --traceabstraction.partial.order.reduction.in.concurrent.analysis SLEEP_NEW_STATES --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 42d87675 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/GemCutterReach.xml -i ../sv-benchmarks/c/libvsync/hclhlock.i -s /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b0a2798ee53cc94366daea227ae4e14ebe705512ec93088d5efc9992b9f84ae5 --traceabstraction.use.conditional.por.in.concurrent.analysis false --traceabstraction.commutativity.condition.synthesis NONE --traceabstraction.partial.order.reduction.in.concurrent.analysis SLEEP_NEW_STATES --- Real Ultimate output --- This is Ultimate 0.3.0-dev-42d8767-m [2025-04-25 01:51:45,047 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-04-25 01:51:45,103 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf [2025-04-25 01:51:45,111 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-04-25 01:51:45,111 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-04-25 01:51:45,132 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-04-25 01:51:45,133 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-04-25 01:51:45,133 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-04-25 01:51:45,133 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-04-25 01:51:45,134 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-04-25 01:51:45,134 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Use SBE=true [2025-04-25 01:51:45,135 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * sizeof long=4 [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * sizeof long double=12 [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Use constant arrays=true [2025-04-25 01:51:45,135 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-04-25 01:51:45,135 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-25 01:51:45,136 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-25 01:51:45,136 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Commutativity condition synthesis=NECESSARY_AND_SUFFICIENT [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2025-04-25 01:51:45,136 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b0a2798ee53cc94366daea227ae4e14ebe705512ec93088d5efc9992b9f84ae5 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Use conditional POR in concurrent analysis -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Commutativity condition synthesis -> NONE Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Partial Order Reduction in concurrent analysis -> SLEEP_NEW_STATES [2025-04-25 01:51:45,395 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-04-25 01:51:45,403 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-04-25 01:51:45,404 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-04-25 01:51:45,405 INFO L270 PluginConnector]: Initializing CDTParser... [2025-04-25 01:51:45,407 INFO L274 PluginConnector]: CDTParser initialized [2025-04-25 01:51:45,408 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../sv-benchmarks/c/libvsync/hclhlock.i [2025-04-25 01:51:46,740 INFO L538 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/4a051d9f0/1a06a5fb91d44c94919daef6aa8bacfa/FLAGac8aef34b [2025-04-25 01:51:47,144 INFO L389 CDTParser]: Found 1 translation units. [2025-04-25 01:51:47,145 INFO L178 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i [2025-04-25 01:51:47,178 INFO L432 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/4a051d9f0/1a06a5fb91d44c94919daef6aa8bacfa/FLAGac8aef34b [2025-04-25 01:51:47,885 INFO L440 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/4a051d9f0/1a06a5fb91d44c94919daef6aa8bacfa [2025-04-25 01:51:47,887 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-04-25 01:51:47,887 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-04-25 01:51:47,888 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-04-25 01:51:47,888 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-04-25 01:51:47,891 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-04-25 01:51:47,893 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.04 01:51:47" (1/1) ... [2025-04-25 01:51:47,894 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@26046f21 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:47, skipping insertion in model container [2025-04-25 01:51:47,894 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.04 01:51:47" (1/1) ... [2025-04-25 01:51:47,960 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-04-25 01:51:49,828 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172094,172107] [2025-04-25 01:51:49,831 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172145,172158] [2025-04-25 01:51:49,832 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172202,172215] [2025-04-25 01:51:49,837 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172763,172776] [2025-04-25 01:51:49,838 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172814,172827] [2025-04-25 01:51:49,844 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174060,174073] [2025-04-25 01:51:49,844 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174118,174131] [2025-04-25 01:51:49,845 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174622,174635] [2025-04-25 01:51:49,845 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174679,174692] [2025-04-25 01:51:49,846 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174746,174759] [2025-04-25 01:51:49,847 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175274,175287] [2025-04-25 01:51:49,847 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175341,175354] [2025-04-25 01:51:49,848 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175944,175957] [2025-04-25 01:51:50,061 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[198494,198507] [2025-04-25 01:51:50,062 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[198561,198574] [2025-04-25 01:51:50,072 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-25 01:51:50,080 INFO L200 MainTranslator]: Completed pre-run [2025-04-25 01:51:50,171 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3755] [2025-04-25 01:51:50,173 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3757] [2025-04-25 01:51:50,173 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3762] [2025-04-25 01:51:50,175 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3764] [2025-04-25 01:51:50,175 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3770] [2025-04-25 01:51:50,176 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3772] [2025-04-25 01:51:50,176 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3778] [2025-04-25 01:51:50,176 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3780] [2025-04-25 01:51:50,176 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3786] [2025-04-25 01:51:50,177 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3788] [2025-04-25 01:51:50,177 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3794] [2025-04-25 01:51:50,177 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3796] [2025-04-25 01:51:50,177 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3802] [2025-04-25 01:51:50,178 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3804] [2025-04-25 01:51:50,178 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3810] [2025-04-25 01:51:50,179 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3812] [2025-04-25 01:51:50,179 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3817] [2025-04-25 01:51:50,180 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3819] [2025-04-25 01:51:50,180 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3824] [2025-04-25 01:51:50,181 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3826] [2025-04-25 01:51:50,181 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3831] [2025-04-25 01:51:50,181 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3833] [2025-04-25 01:51:50,181 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3838] [2025-04-25 01:51:50,181 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3840] [2025-04-25 01:51:50,181 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3845] [2025-04-25 01:51:50,182 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3847] [2025-04-25 01:51:50,183 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3852] [2025-04-25 01:51:50,183 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3855] [2025-04-25 01:51:50,183 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3861] [2025-04-25 01:51:50,184 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3864] [2025-04-25 01:51:50,184 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3870] [2025-04-25 01:51:50,185 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3873] [2025-04-25 01:51:50,185 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3879] [2025-04-25 01:51:50,186 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3882] [2025-04-25 01:51:50,186 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3888] [2025-04-25 01:51:50,186 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3891] [2025-04-25 01:51:50,187 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3897] [2025-04-25 01:51:50,187 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3900] [2025-04-25 01:51:50,187 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3907] [2025-04-25 01:51:50,188 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3910] [2025-04-25 01:51:50,188 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3917] [2025-04-25 01:51:50,188 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3920] [2025-04-25 01:51:50,189 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3927] [2025-04-25 01:51:50,189 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3930] [2025-04-25 01:51:50,189 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3937] [2025-04-25 01:51:50,189 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3940] [2025-04-25 01:51:50,190 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3947] [2025-04-25 01:51:50,190 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3950] [2025-04-25 01:51:50,190 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3957] [2025-04-25 01:51:50,191 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3960] [2025-04-25 01:51:50,192 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3966] [2025-04-25 01:51:50,192 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3969] [2025-04-25 01:51:50,192 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3975] [2025-04-25 01:51:50,193 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3978] [2025-04-25 01:51:50,193 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3984] [2025-04-25 01:51:50,193 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3987] [2025-04-25 01:51:50,194 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3993] [2025-04-25 01:51:50,194 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3996] [2025-04-25 01:51:50,194 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4002] [2025-04-25 01:51:50,195 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4005] [2025-04-25 01:51:50,195 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4011] [2025-04-25 01:51:50,195 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4014] [2025-04-25 01:51:50,195 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4020] [2025-04-25 01:51:50,196 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4023] [2025-04-25 01:51:50,196 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4029] [2025-04-25 01:51:50,196 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4032] [2025-04-25 01:51:50,197 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4038] [2025-04-25 01:51:50,197 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4041] [2025-04-25 01:51:50,197 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4047] [2025-04-25 01:51:50,198 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4050] [2025-04-25 01:51:50,198 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4056] [2025-04-25 01:51:50,198 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4059] [2025-04-25 01:51:50,199 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4065] [2025-04-25 01:51:50,199 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4068] [2025-04-25 01:51:50,199 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4074] [2025-04-25 01:51:50,200 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4077] [2025-04-25 01:51:50,200 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4083] [2025-04-25 01:51:50,200 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4086] [2025-04-25 01:51:50,200 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4092] [2025-04-25 01:51:50,201 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4095] [2025-04-25 01:51:50,201 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4101] [2025-04-25 01:51:50,201 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4103] [2025-04-25 01:51:50,201 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4109] [2025-04-25 01:51:50,202 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4111] [2025-04-25 01:51:50,202 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4117] [2025-04-25 01:51:50,202 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4119] [2025-04-25 01:51:50,202 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4125] [2025-04-25 01:51:50,203 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4127] [2025-04-25 01:51:50,203 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4133] [2025-04-25 01:51:50,203 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4135] [2025-04-25 01:51:50,204 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4141] [2025-04-25 01:51:50,204 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4143] [2025-04-25 01:51:50,204 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4149] [2025-04-25 01:51:50,205 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4151] [2025-04-25 01:51:50,205 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4157] [2025-04-25 01:51:50,206 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4159] [2025-04-25 01:51:50,206 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4165] [2025-04-25 01:51:50,206 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4167] [2025-04-25 01:51:50,207 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4173] [2025-04-25 01:51:50,207 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4175] [2025-04-25 01:51:50,247 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172094,172107] [2025-04-25 01:51:50,247 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172145,172158] [2025-04-25 01:51:50,248 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172202,172215] [2025-04-25 01:51:50,249 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172763,172776] [2025-04-25 01:51:50,249 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172814,172827] [2025-04-25 01:51:50,251 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174060,174073] [2025-04-25 01:51:50,251 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174118,174131] [2025-04-25 01:51:50,252 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174622,174635] [2025-04-25 01:51:50,252 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174679,174692] [2025-04-25 01:51:50,255 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174746,174759] [2025-04-25 01:51:50,256 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175274,175287] [2025-04-25 01:51:50,256 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175341,175354] [2025-04-25 01:51:50,259 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175944,175957] [2025-04-25 01:51:50,267 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[198494,198507] [2025-04-25 01:51:50,268 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[198561,198574] [2025-04-25 01:51:50,273 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-25 01:51:50,489 INFO L204 MainTranslator]: Completed translation [2025-04-25 01:51:50,490 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50 WrapperNode [2025-04-25 01:51:50,490 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-04-25 01:51:50,491 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-04-25 01:51:50,491 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-04-25 01:51:50,491 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-04-25 01:51:50,495 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,555 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,613 INFO L138 Inliner]: procedures = 921, calls = 957, calls flagged for inlining = 833, calls inlined = 67, statements flattened = 799 [2025-04-25 01:51:50,614 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-04-25 01:51:50,615 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-04-25 01:51:50,615 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-04-25 01:51:50,615 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-04-25 01:51:50,623 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,624 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,628 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,628 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,640 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,641 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,655 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,657 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,662 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,679 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-04-25 01:51:50,680 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-04-25 01:51:50,680 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-04-25 01:51:50,680 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-04-25 01:51:50,681 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (1/1) ... [2025-04-25 01:51:50,688 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-25 01:51:50,696 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-25 01:51:50,709 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-04-25 01:51:50,714 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-04-25 01:51:50,727 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-04-25 01:51:50,728 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure run [2025-04-25 01:51:50,728 INFO L138 BoogieDeclarations]: Found implementation of procedure run [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2025-04-25 01:51:50,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2025-04-25 01:51:50,730 WARN L203 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2025-04-25 01:51:50,866 INFO L234 CfgBuilder]: Building ICFG [2025-04-25 01:51:50,868 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-04-25 01:51:51,647 INFO L279 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2025-04-25 01:51:51,647 INFO L283 CfgBuilder]: Performing block encoding [2025-04-25 01:51:52,028 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-04-25 01:51:52,028 INFO L312 CfgBuilder]: Removed 53 assume(true) statements. [2025-04-25 01:51:52,029 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.04 01:51:52 BoogieIcfgContainer [2025-04-25 01:51:52,029 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-04-25 01:51:52,030 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-04-25 01:51:52,030 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-04-25 01:51:52,035 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-04-25 01:51:52,036 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.04 01:51:47" (1/3) ... [2025-04-25 01:51:52,037 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2db840bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.04 01:51:52, skipping insertion in model container [2025-04-25 01:51:52,037 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.04 01:51:50" (2/3) ... [2025-04-25 01:51:52,037 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2db840bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.04 01:51:52, skipping insertion in model container [2025-04-25 01:51:52,037 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.04 01:51:52" (3/3) ... [2025-04-25 01:51:52,038 INFO L128 eAbstractionObserver]: Analyzing ICFG hclhlock.i [2025-04-25 01:51:52,049 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-04-25 01:51:52,051 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG hclhlock.i that has 2 procedures, 243 locations, 382 edges, 1 initial locations, 60 loop locations, and 17 error locations. [2025-04-25 01:51:52,051 INFO L490 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2025-04-25 01:51:52,194 INFO L143 ThreadInstanceAdder]: Constructed 1 joinOtherThreadTransitions. [2025-04-25 01:51:52,237 INFO L125 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-25 01:51:52,237 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2025-04-25 01:51:52,237 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-25 01:51:52,239 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2025-04-25 01:51:52,241 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2025-04-25 01:51:52,353 INFO L177 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2025-04-25 01:51:52,359 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == runThread1of1ForFork0 ======== [2025-04-25 01:51:52,367 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7bb9f3ff, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-25 01:51:52,367 INFO L341 AbstractCegarLoop]: Starting to check reachability of 11 error locations. [2025-04-25 01:51:52,411 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:51:52,416 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:51:52,416 INFO L85 PathProgramCache]: Analyzing trace with hash -1885372546, now seen corresponding path program 1 times [2025-04-25 01:51:52,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:51:52,422 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [696464414] [2025-04-25 01:51:52,423 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:52,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:51:52,494 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-04-25 01:51:52,529 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-04-25 01:51:52,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:52,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:52,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-25 01:51:52,641 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:51:52,641 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [696464414] [2025-04-25 01:51:52,642 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [696464414] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-25 01:51:52,642 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-25 01:51:52,642 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-25 01:51:52,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211439355] [2025-04-25 01:51:52,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-25 01:51:52,646 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-04-25 01:51:52,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:51:52,661 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-04-25 01:51:52,662 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-04-25 01:51:52,662 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:52,663 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:51:52,665 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 18.0) internal successors, (36), 2 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:51:52,665 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:52,817 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:52,818 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-04-25 01:51:52,818 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:51:52,818 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:51:52,819 INFO L85 PathProgramCache]: Analyzing trace with hash -1188624514, now seen corresponding path program 1 times [2025-04-25 01:51:52,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:51:52,819 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912370906] [2025-04-25 01:51:52,819 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:52,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:51:52,868 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 52 statements into 1 equivalence classes. [2025-04-25 01:51:52,905 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 52 of 52 statements. [2025-04-25 01:51:52,906 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:52,906 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:53,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-25 01:51:53,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:51:53,154 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1912370906] [2025-04-25 01:51:53,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1912370906] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-25 01:51:53,154 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-25 01:51:53,155 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-04-25 01:51:53,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [611448233] [2025-04-25 01:51:53,155 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-25 01:51:53,155 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-04-25 01:51:53,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:51:53,157 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-04-25 01:51:53,157 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-04-25 01:51:53,157 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:53,157 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:51:53,157 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.75) internal successors, (51), 4 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:51:53,157 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:53,158 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:53,435 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:53,436 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:53,436 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-04-25 01:51:53,436 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:51:53,437 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:51:53,437 INFO L85 PathProgramCache]: Analyzing trace with hash -1104573297, now seen corresponding path program 1 times [2025-04-25 01:51:53,437 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:51:53,437 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205608136] [2025-04-25 01:51:53,437 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:53,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:51:53,456 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-04-25 01:51:53,473 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-04-25 01:51:53,473 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:53,473 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:53,581 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-04-25 01:51:53,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:51:53,582 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [205608136] [2025-04-25 01:51:53,582 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [205608136] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-25 01:51:53,582 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-25 01:51:53,582 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-25 01:51:53,582 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1837223684] [2025-04-25 01:51:53,582 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-25 01:51:53,582 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-25 01:51:53,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:51:53,583 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-25 01:51:53,583 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-25 01:51:53,583 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:53,584 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:51:53,584 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:51:53,584 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:53,584 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:53,584 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:53,739 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:53,739 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:53,739 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:53,739 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-04-25 01:51:53,740 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:51:53,740 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:51:53,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1249562375, now seen corresponding path program 1 times [2025-04-25 01:51:53,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:51:53,740 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898700053] [2025-04-25 01:51:53,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:53,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:51:53,755 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 59 statements into 1 equivalence classes. [2025-04-25 01:51:53,794 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 59 of 59 statements. [2025-04-25 01:51:53,794 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:53,794 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:53,918 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-04-25 01:51:53,919 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:51:53,919 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [898700053] [2025-04-25 01:51:53,919 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [898700053] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-25 01:51:53,919 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1266066147] [2025-04-25 01:51:53,919 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:53,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-25 01:51:53,920 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-25 01:51:53,922 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-25 01:51:53,925 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-04-25 01:51:54,041 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 59 statements into 1 equivalence classes. [2025-04-25 01:51:54,099 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 59 of 59 statements. [2025-04-25 01:51:54,099 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:54,099 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:54,103 INFO L256 TraceCheckSpWp]: Trace formula consists of 572 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-04-25 01:51:54,107 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-25 01:51:54,123 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-04-25 01:51:54,123 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-25 01:51:54,142 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-04-25 01:51:54,142 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1266066147] provided 1 perfect and 1 imperfect interpolant sequences [2025-04-25 01:51:54,142 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2025-04-25 01:51:54,142 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 4] total 6 [2025-04-25 01:51:54,143 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1001461416] [2025-04-25 01:51:54,143 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-25 01:51:54,143 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-25 01:51:54,143 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:51:54,143 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-25 01:51:54,143 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-04-25 01:51:54,143 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:54,143 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:51:54,143 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.333333333333332) internal successors, (55), 3 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:51:54,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:54,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:54,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:54,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:54,360 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:54,360 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:54,360 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:54,361 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:54,368 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2025-04-25 01:51:54,565 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-25 01:51:54,565 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:51:54,565 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:51:54,565 INFO L85 PathProgramCache]: Analyzing trace with hash -275094196, now seen corresponding path program 1 times [2025-04-25 01:51:54,566 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:51:54,566 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142071672] [2025-04-25 01:51:54,566 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:54,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:51:54,582 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-04-25 01:51:54,608 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-04-25 01:51:54,608 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:54,608 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:54,736 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-04-25 01:51:54,736 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:51:54,736 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2142071672] [2025-04-25 01:51:54,736 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2142071672] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-25 01:51:54,736 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2135476130] [2025-04-25 01:51:54,737 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:54,737 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-25 01:51:54,737 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-25 01:51:54,739 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-25 01:51:54,742 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-04-25 01:51:54,858 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-04-25 01:51:54,921 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-04-25 01:51:54,921 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:54,921 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:54,924 INFO L256 TraceCheckSpWp]: Trace formula consists of 687 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-04-25 01:51:54,926 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-25 01:51:54,961 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-04-25 01:51:54,961 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-25 01:51:55,048 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-04-25 01:51:55,048 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2135476130] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-25 01:51:55,048 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-25 01:51:55,048 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 6] total 10 [2025-04-25 01:51:55,048 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184465019] [2025-04-25 01:51:55,048 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-25 01:51:55,049 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-04-25 01:51:55,049 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:51:55,049 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-04-25 01:51:55,050 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2025-04-25 01:51:55,050 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:55,050 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:51:55,050 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 13.0) internal successors, (130), 10 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:51:55,050 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:55,050 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:55,050 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:55,050 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:55,050 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:55,414 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:55,414 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:55,414 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:55,414 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:55,415 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:51:55,427 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2025-04-25 01:51:55,616 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-25 01:51:55,616 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:51:55,616 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:51:55,617 INFO L85 PathProgramCache]: Analyzing trace with hash 1515179464, now seen corresponding path program 2 times [2025-04-25 01:51:55,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:51:55,617 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961610474] [2025-04-25 01:51:55,617 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-25 01:51:55,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:51:55,639 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 122 statements into 2 equivalence classes. [2025-04-25 01:51:55,669 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 52 of 122 statements. [2025-04-25 01:51:55,670 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-04-25 01:51:55,670 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:55,892 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2025-04-25 01:51:55,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:51:55,892 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961610474] [2025-04-25 01:51:55,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [961610474] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-25 01:51:55,892 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-25 01:51:55,892 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-04-25 01:51:55,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395731164] [2025-04-25 01:51:55,892 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-25 01:51:55,893 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-04-25 01:51:55,893 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:51:55,893 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-04-25 01:51:55,893 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-04-25 01:51:55,893 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:55,893 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:51:55,893 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:51:55,893 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:55,893 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:55,894 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:55,894 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:55,894 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:51:55,894 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:56,141 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:56,141 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:56,141 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:56,141 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:56,141 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:51:56,141 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:51:56,142 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-04-25 01:51:56,142 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting runErr3ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:51:56,142 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:51:56,142 INFO L85 PathProgramCache]: Analyzing trace with hash 830037257, now seen corresponding path program 1 times [2025-04-25 01:51:56,142 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:51:56,142 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854307960] [2025-04-25 01:51:56,143 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:56,143 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:51:56,169 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 119 statements into 1 equivalence classes. [2025-04-25 01:51:56,252 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 119 of 119 statements. [2025-04-25 01:51:56,252 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:56,253 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:56,467 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2025-04-25 01:51:56,467 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:51:56,467 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854307960] [2025-04-25 01:51:56,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854307960] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-25 01:51:56,468 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-25 01:51:56,468 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-25 01:51:56,468 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1683443454] [2025-04-25 01:51:56,468 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-25 01:51:56,468 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-25 01:51:56,468 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:51:56,468 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-25 01:51:56,468 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-25 01:51:56,469 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:56,469 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:51:56,469 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.666666666666668) internal successors, (83), 3 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:51:56,469 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:56,469 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:56,469 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:56,469 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:56,469 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:51:56,469 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:51:56,469 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:56,602 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:56,602 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:56,602 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:56,602 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:56,602 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:51:56,602 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:51:56,602 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:56,602 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-04-25 01:51:56,603 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting runErr3ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:51:56,603 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:51:56,603 INFO L85 PathProgramCache]: Analyzing trace with hash -2132620170, now seen corresponding path program 1 times [2025-04-25 01:51:56,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:51:56,603 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375354329] [2025-04-25 01:51:56,603 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:51:56,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:51:56,623 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 113 statements into 1 equivalence classes. [2025-04-25 01:51:56,699 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 113 of 113 statements. [2025-04-25 01:51:56,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:51:56,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:51:57,141 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2025-04-25 01:51:57,141 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:51:57,141 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375354329] [2025-04-25 01:51:57,141 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1375354329] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-25 01:51:57,141 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-25 01:51:57,141 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-04-25 01:51:57,142 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [442791166] [2025-04-25 01:51:57,142 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-25 01:51:57,142 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-04-25 01:51:57,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:51:57,142 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-04-25 01:51:57,143 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-04-25 01:51:57,143 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:57,143 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:51:57,143 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 7 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:51:57,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:51:57,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:51:57,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:57,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:57,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:51:57,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:51:57,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:51:57,143 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:52:01,203 WARN L532 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-04-25 01:52:05,209 WARN L532 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-04-25 01:52:05,627 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:52:05,627 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:52:05,627 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:05,627 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:05,627 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:52:05,627 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:52:05,627 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:05,628 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:52:05,628 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-04-25 01:52:05,628 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting runErr3ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:52:05,628 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:52:05,628 INFO L85 PathProgramCache]: Analyzing trace with hash 1731330899, now seen corresponding path program 1 times [2025-04-25 01:52:05,628 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:52:05,629 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187149955] [2025-04-25 01:52:05,629 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:52:05,629 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:52:05,652 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 111 statements into 1 equivalence classes. [2025-04-25 01:52:05,749 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 111 of 111 statements. [2025-04-25 01:52:05,749 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:52:05,749 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:52:06,150 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-04-25 01:52:06,151 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:52:06,151 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187149955] [2025-04-25 01:52:06,151 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [187149955] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-25 01:52:06,151 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [508401782] [2025-04-25 01:52:06,152 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-25 01:52:06,152 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-25 01:52:06,152 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-25 01:52:06,153 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-25 01:52:06,155 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-04-25 01:52:06,293 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 111 statements into 1 equivalence classes. [2025-04-25 01:52:06,841 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 111 of 111 statements. [2025-04-25 01:52:06,841 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-25 01:52:06,842 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:52:06,846 INFO L256 TraceCheckSpWp]: Trace formula consists of 944 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-04-25 01:52:06,852 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-25 01:52:06,940 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-04-25 01:52:06,940 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-25 01:52:07,113 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 11 proven. 41 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-04-25 01:52:07,114 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [508401782] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-25 01:52:07,114 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-25 01:52:07,114 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 16 [2025-04-25 01:52:07,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1867692655] [2025-04-25 01:52:07,114 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-25 01:52:07,115 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2025-04-25 01:52:07,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-25 01:52:07,115 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-04-25 01:52:07,116 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2025-04-25 01:52:07,116 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:52:07,116 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-25 01:52:07,116 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 9.75) internal successors, (156), 16 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-25 01:52:07,116 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:52:07,116 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:52:07,116 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:07,116 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:07,116 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:52:07,116 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:52:07,117 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:07,117 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:52:07,117 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:52:07,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-25 01:52:07,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-25 01:52:07,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:07,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:07,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-25 01:52:07,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:52:07,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-25 01:52:07,928 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-25 01:52:07,929 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-25 01:52:07,947 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2025-04-25 01:52:08,129 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-25 01:52:08,130 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting runErr3ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-25 01:52:08,130 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-25 01:52:08,130 INFO L85 PathProgramCache]: Analyzing trace with hash -1325775376, now seen corresponding path program 2 times [2025-04-25 01:52:08,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-25 01:52:08,130 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185954731] [2025-04-25 01:52:08,130 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-25 01:52:08,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-25 01:52:08,155 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 109 statements into 2 equivalence classes. [2025-04-25 01:52:08,356 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 109 of 109 statements. [2025-04-25 01:52:08,356 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-25 01:52:08,356 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:52:17,573 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 59 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-25 01:52:17,573 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-25 01:52:17,573 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185954731] [2025-04-25 01:52:17,573 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1185954731] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-25 01:52:17,574 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1737443] [2025-04-25 01:52:17,574 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-25 01:52:17,574 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-25 01:52:17,574 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-25 01:52:17,576 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-25 01:52:17,577 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-04-25 01:52:17,717 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 109 statements into 2 equivalence classes. [2025-04-25 01:52:18,001 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 109 of 109 statements. [2025-04-25 01:52:18,001 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-25 01:52:18,001 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-25 01:52:18,008 INFO L256 TraceCheckSpWp]: Trace formula consists of 941 conjuncts, 291 conjuncts are in the unsatisfiable core [2025-04-25 01:52:18,018 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-25 01:52:18,069 INFO L325 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2025-04-25 01:52:18,070 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2025-04-25 01:52:18,146 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:18,282 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:18,426 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:18,641 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:19,324 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:19,338 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-04-25 01:52:19,424 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2025-04-25 01:52:19,432 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:19,445 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 7 [2025-04-25 01:52:20,190 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:20,203 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2025-04-25 01:52:20,213 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 16 [2025-04-25 01:52:20,304 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 7 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 35 [2025-04-25 01:52:20,319 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 11 [2025-04-25 01:52:20,335 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:20,960 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:20,960 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2025-04-25 01:52:20,966 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:20,973 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 26 [2025-04-25 01:52:21,060 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:21,068 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,069 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,069 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,074 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,076 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,077 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,077 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,078 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,079 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 15 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 41 [2025-04-25 01:52:21,090 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,091 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-25 01:52:21,092 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2025-04-25 01:52:21,372 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 26 [2025-04-25 01:52:21,384 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:21,388 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:21,705 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:21,712 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-25 01:52:21,717 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 26 [2025-04-25 01:52:22,435 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-04-25 01:52:22,435 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-25 01:52:24,087 WARN L849 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1022 Int) (v_ArrVal_1024 Int) (v_ArrVal_1023 Int) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1019 Int) (v_ArrVal_1030 (Array Int Int))) (< (mod (let ((.cse0 (+ |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| 4)) (.cse1 (+ |c_~#tnode~0.offset| 4))) (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| (store (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base|) .cse0 v_ArrVal_1022) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse1)) (select (select (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| (store (store (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base|) .cse0 v_ArrVal_1019) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| v_ArrVal_1024)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1030) |c_~#tnode~0.base|) .cse1))) 1073741824) 1073741823)) is different from false [2025-04-25 01:52:27,115 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:27,116 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 247 treesize of output 227 [2025-04-25 01:52:27,143 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:27,144 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 724 treesize of output 728 [2025-04-25 01:52:27,154 INFO L172 IndexEqualityManager]: detected equality via solver [2025-04-25 01:52:27,155 INFO L172 IndexEqualityManager]: detected equality via solver [2025-04-25 01:52:27,160 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 352 treesize of output 348 [2025-04-25 01:52:27,173 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 153 [2025-04-25 01:52:27,202 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2025-04-25 01:52:27,220 INFO L172 IndexEqualityManager]: detected equality via solver [2025-04-25 01:52:27,221 INFO L172 IndexEqualityManager]: detected equality via solver [2025-04-25 01:52:27,238 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:27,238 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 497 treesize of output 497 [2025-04-25 01:52:27,599 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:27,600 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 122 treesize of output 126 [2025-04-25 01:52:28,321 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:28,321 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 122 treesize of output 126 [2025-04-25 01:52:28,829 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:28,829 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 245 treesize of output 245 [2025-04-25 01:52:29,064 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:29,064 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 122 treesize of output 126 [2025-04-25 01:52:29,704 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:29,705 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 245 treesize of output 245 [2025-04-25 01:52:30,137 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:30,137 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 245 treesize of output 245 [2025-04-25 01:52:39,267 WARN L871 $PredicateComparison]: unable to prove that (let ((.cse108 (mod (+ |c_ULTIMATE.start_init_~i~4#1| 1) 4294967296)) (.cse113 (mod (+ 2 |c_ULTIMATE.start_init_~i~4#1|) 4294967296))) (or (let ((.cse109 (* .cse108 8)) (.cse21 (= .cse108 0)) (.cse2 (= |c_ULTIMATE.start_main_~#t~0#1.base| |c_~#tnode~0.base|)) (.cse10 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| (store (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base|) (+ |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| 4) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.base|) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| 0))) (.cse12 (+ |c_~#tnode~0.offset| 4)) (.cse3 (+ |c_~#qnode~0.offset| (* .cse113 4))) (.cse16 (+ |c_~#tnode~0.offset| (* 8 .cse113)))) (let ((.cse72 (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse110 (select (store (store (let ((.cse111 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse111 |c_~#qnode~0.base| (store (store (select .cse111 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse110 v_ArrVal_1011) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse110 v_arrayElimCell_36) 1073741824) 1073741822))))))))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< (mod (select (select (store (store (let ((.cse112 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse112 |c_~#qnode~0.base| (store (store (select .cse112 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))))) (.cse66 (= |c_~#qnode~0.base| |c_~#tnode~0.base|)) (.cse19 (not .cse21)) (.cse14 (+ |c_~#tnode~0.offset| 4 .cse109)) (.cse15 (+ |c_~#tnode~0.offset| .cse109)) (.cse7 (+ (* .cse108 4) |c_~#qnode~0.offset|))) (let ((.cse0 (or .cse21 (forall ((v_ArrVal_1008 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse105 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse106 (store (select .cse105 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse107 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< (mod (select (select (store (store (store .cse105 |c_~#qnode~0.base| (store (select (store (store .cse105 |c_~#qnode~0.base| .cse106) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse107) v_arrayElimCell_36) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse105 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse107) v_arrayElimCell_35) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse105 |c_~#qnode~0.base| (store .cse106 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse107) v_arrayElimCell_39) 1073741824) 1073741823))))))) (.cse1 (or .cse19 (forall ((v_ArrVal_1008 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse102 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse103 (store (select .cse102 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse104 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse102 |c_~#qnode~0.base| (store .cse103 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse104) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< (mod (select (select (store (store (store .cse102 |c_~#qnode~0.base| (store (select (store (store .cse102 |c_~#qnode~0.base| .cse103) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse104) v_arrayElimCell_36) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse102 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse104) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))))))) (.cse25 (or (and (or .cse72 .cse19) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse88 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse89 (select .cse88 |c_~#qnode~0.base|)) (.cse90 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse91 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse92 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (or (< (mod (select (select (store (store (store .cse88 |c_~#qnode~0.base| (store (store .cse89 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse90 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse91 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse92 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse88 |c_~#qnode~0.base| (store (store .cse89 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse90 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse91 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse92 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_39) 1073741824) 1073741823)))))) (or .cse21 (and (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (let ((.cse93 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse93 |c_~#qnode~0.base| (store (store (select .cse93 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_39) 1073741824) 1073741823))) .cse2) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse94 (select (store (store (let ((.cse95 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse95 |c_~#qnode~0.base| (store (store (select .cse95 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse94 v_arrayElimCell_36) 1073741824) 1073741822)) (< (mod (select .cse94 v_arrayElimCell_39) 1073741824) 1073741823)))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))))) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse96 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse97 (select .cse96 |c_~#qnode~0.base|)) (.cse98 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse99 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse100 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse101 (select (store (store (store .cse96 |c_~#qnode~0.base| (store (store .cse97 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse98 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse99 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse100 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select (select (store (store (store .cse96 |c_~#qnode~0.base| (store (store .cse97 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse98 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse99 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse100 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse101 v_arrayElimCell_36) 1073741824) 1073741822)) (< (mod (select .cse101 v_arrayElimCell_39) 1073741824) 1073741823)))))) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) .cse66)) (.cse26 (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1008 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse85 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse86 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse87 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse82 (select (select (store (store .cse85 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse86 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse87 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) (.cse81 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (or (< (mod (select (select (store (store (store .cse81 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse82) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_39 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_arrayElimCell_36 Int)) (let ((.cse84 (select .cse81 |c_~#qnode~0.base|))) (let ((.cse83 (store .cse84 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|))) (or (< (mod (select (select (store (store (store .cse81 |c_~#qnode~0.base| (store (select (store (store .cse81 |c_~#qnode~0.base| .cse83) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse82) v_arrayElimCell_36) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse81 |c_~#qnode~0.base| (store .cse83 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse82) v_arrayElimCell_39) 1073741824) 1073741823) (forall ((v_ArrVal_1011 Int)) (<= (mod (select (select (store (store (store .cse81 |c_~#qnode~0.base| (store (store .cse84 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse85 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse86 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse87 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741822)))))))))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) (.cse20 (not .cse66))) (and (or (= |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| |c_~#tnode~0.base|) (and .cse0 .cse1 (or .cse2 (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimArr_3 (Array Int Int)) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse9 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse11 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse13 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse5 (select (select (store (store .cse9 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse11 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse13 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) (.cse4 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (or (< (mod (select (select (store (store (store .cse4 |c_~#qnode~0.base| v_arrayElimArr_3) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse5) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_39 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int)) (let ((.cse6 (select .cse4 |c_~#qnode~0.base|)) (.cse8 (select v_arrayElimArr_3 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) (or (< (mod (select (select (store (store (store .cse4 |c_~#qnode~0.base| (store (store .cse6 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse8)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse5) v_arrayElimCell_39) 1073741824) 1073741823) (forall ((v_ArrVal_1011 Int)) (<= (mod (select (select (store (store (store .cse4 |c_~#qnode~0.base| (store (store .cse6 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse8)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse9 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse11 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse13 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741822))))))))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimArr_3 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse17 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse18 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse17 |c_~#qnode~0.base| v_arrayElimArr_3) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse18) v_arrayElimCell_35) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse17 |c_~#qnode~0.base| (store (store (select .cse17 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_3 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse18) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) .cse19) (or .cse20 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimArr_3 (Array Int Int)) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (or (< (mod (select (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_3) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) (or .cse21 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimArr_3 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimCell_39 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse22 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse23 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse22 |c_~#qnode~0.base| v_arrayElimArr_3) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse23) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse22 |c_~#qnode~0.base| (store (store (select .cse22 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_3 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse23) v_arrayElimCell_39) 1073741824) 1073741823))))))) (or .cse20 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimArr_4 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse24 (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_4) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse24 v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select .cse24 v_arrayElimCell_36) 1073741824) 1073741823))))) .cse25 .cse26)) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse27 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse29 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse30 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse31 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|)) (.cse28 (select .cse27 |c_~#qnode~0.base|))) (let ((.cse32 (store .cse28 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse33 (select (select (store (store .cse29 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse30 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse31 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse27 |c_~#qnode~0.base| (store (store .cse28 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse29 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse30 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse31 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse27 |c_~#qnode~0.base| (store .cse32 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse33) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (forall ((v_ArrVal_1008 (Array Int Int)) (v_arrayElimCell_35 Int)) (or (< (mod (select (select (store (store (store .cse27 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse33) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select (select (store (store (store .cse27 |c_~#qnode~0.base| (store (select (store (store .cse27 |c_~#qnode~0.base| .cse32) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse33) v_arrayElimCell_36) 1073741824) 1073741822))))))))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (or (forall ((v_ArrVal_1008 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< (mod (select (select (store (store (let ((.cse34 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse34 |c_~#qnode~0.base| (store (select (store (store .cse34 |c_~#qnode~0.base| (store (select .cse34 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|)) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_36) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (not .cse2)) (or (and .cse0 (or .cse20 (forall ((v_arrayElimArr_6 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse35 (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_6) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse35 v_arrayElimCell_36) 1073741824) 1073741823) (< (mod (select .cse35 v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))))) .cse1 .cse25 .cse26 (or .cse2 (and (or .cse20 (forall ((v_arrayElimArr_5 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (or (< (mod (select (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_5) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_arrayElimArr_5 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse40 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse41 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse42 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse37 (select (select (store (store .cse40 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse41 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse42 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) (.cse36 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (or (< (mod (select (select (store (store (store .cse36 |c_~#qnode~0.base| v_arrayElimArr_5) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse37) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_39 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int)) (let ((.cse38 (select .cse36 |c_~#qnode~0.base|)) (.cse39 (select v_arrayElimArr_5 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) (or (< (mod (select (select (store (store (store .cse36 |c_~#qnode~0.base| (store (store .cse38 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse39)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse37) v_arrayElimCell_39) 1073741824) 1073741823) (forall ((v_ArrVal_1011 Int)) (<= (mod (select (select (store (store (store .cse36 |c_~#qnode~0.base| (store (store .cse38 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse39)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse40 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse41 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse42 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741822))))))))))))) (or .cse21 (forall ((v_arrayElimArr_5 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimCell_39 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse43 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse44 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse43 |c_~#qnode~0.base| v_arrayElimArr_5) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse44) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse43 |c_~#qnode~0.base| (store (store (select .cse43 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_5 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse44) v_arrayElimCell_39) 1073741824) 1073741823))))) (or .cse19 (forall ((v_arrayElimArr_5 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse45 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse46 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< (mod (select (select (store (store (store .cse45 |c_~#qnode~0.base| (store (store (select .cse45 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_5 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse46) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse45 |c_~#qnode~0.base| v_arrayElimArr_5) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse46) v_arrayElimCell_35) 1073741824) 1073741823)))))))) (= |c_~#tnode~0.offset| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset|)) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_arrayElimArr_2 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse47 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse51 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse52 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse53 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse50 (select (select (store (store .cse51 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse52 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse53 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) (.cse48 (select .cse47 |c_~#qnode~0.base|)) (.cse49 (select v_arrayElimArr_2 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) (or (< (mod (select (select (store (store (store .cse47 |c_~#qnode~0.base| (store (store .cse48 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse49)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse50) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse47 |c_~#qnode~0.base| v_arrayElimArr_2) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse50) v_arrayElimCell_35) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse47 |c_~#qnode~0.base| (store (store .cse48 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse49)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse51 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse52 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse53 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823)))))) (or .cse20 (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_arrayElimArr_7 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimCell_36 Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse54 (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_7) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse54 v_arrayElimCell_35) 1073741824) 1073741823) (< (mod (select .cse54 v_arrayElimCell_36) 1073741824) 1073741823)))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimArr_2 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_2) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_35) 1073741824) 1073741823)))))) (or (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse55 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse56 (select .cse55 |c_~#qnode~0.base|)) (.cse57 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse58 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse59 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse60 (select (store (store (store .cse55 |c_~#qnode~0.base| (store (store .cse56 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse57 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse58 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse59 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select (select (store (store (store .cse55 |c_~#qnode~0.base| (store (store .cse56 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse57 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse58 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse59 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< (mod (select .cse60 |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse60 v_arrayElimCell_36) 1073741824) 1073741822))))))) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3))))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse61 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse62 (select .cse61 |c_~#qnode~0.base|)) (.cse63 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse64 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse65 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (or (< (mod (select (select (store (store (store .cse61 |c_~#qnode~0.base| (store (store .cse62 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse63 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse64 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse65 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse61 |c_~#qnode~0.base| (store (store .cse62 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse63 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse64 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse65 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))))))) .cse66) (or (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse67 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse68 (store (select .cse67 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse69 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse67 |c_~#qnode~0.base| (store .cse68 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse69) v_ArrVal_1011) 1073741824) 1073741823) (forall ((v_ArrVal_1008 (Array Int Int)) (v_arrayElimCell_35 Int)) (or (forall ((v_arrayElimCell_36 Int)) (<= (mod (select (select (store (store (store .cse67 |c_~#qnode~0.base| (store (select (store (store .cse67 |c_~#qnode~0.base| .cse68) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse69) v_arrayElimCell_36) 1073741824) 1073741822)) (< (mod (select (select (store (store (store .cse67 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse69) v_arrayElimCell_35) 1073741824) 1073741823))))))))))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_arrayElimArr_2 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse70 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse71 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse70 |c_~#qnode~0.base| v_arrayElimArr_2) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse71) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse70 |c_~#qnode~0.base| (store (store (select .cse70 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_2 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse71) v_ArrVal_1011) 1073741824) 1073741823))))) (or .cse66 .cse72)) .cse19) (or .cse21 (and (or .cse66 (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse73 (select (store (store (let ((.cse74 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse74 |c_~#qnode~0.base| (store (store (select .cse74 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse73 |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse73 v_arrayElimCell_36) 1073741824) 1073741822))))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (or (< (mod (select (select (store (store (let ((.cse75 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse75 |c_~#qnode~0.base| (store (store (select .cse75 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_arrayElimArr_2 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse76 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse77 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse76 |c_~#qnode~0.base| (store (store (select .cse76 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_2 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse77) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse76 |c_~#qnode~0.base| v_arrayElimArr_2) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse77) v_arrayElimCell_35) 1073741824) 1073741823))))) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse78 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse79 (store (select .cse78 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse80 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse78 |c_~#qnode~0.base| (store .cse79 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse80) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (forall ((v_ArrVal_1008 (Array Int Int)) (v_arrayElimCell_35 Int)) (or (< (mod (select (select (store (store (store .cse78 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse80) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select (select (store (store (store .cse78 |c_~#qnode~0.base| (store (select (store (store .cse78 |c_~#qnode~0.base| .cse79) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse80) v_arrayElimCell_36) 1073741824) 1073741822)))))))))))))))))) (< 2 .cse108) (< 2 .cse113))) is different from true [2025-04-25 01:52:40,104 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:40,104 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 172 treesize of output 165 [2025-04-25 01:52:40,182 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:40,183 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 329998 treesize of output 320748 [2025-04-25 01:52:40,247 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7550 treesize of output 7534 [2025-04-25 01:52:40,275 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7848 treesize of output 7836 [2025-04-25 01:52:40,313 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7652 treesize of output 7620 [2025-04-25 01:52:40,419 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-25 01:52:40,537 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-25 01:52:41,085 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:41,086 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 5910 treesize of output 5906 [2025-04-25 01:52:44,182 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:44,183 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 345 treesize of output 321 [2025-04-25 01:52:44,227 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:44,228 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 81723 treesize of output 79553 [2025-04-25 01:52:44,334 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:44,335 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15287 treesize of output 15279 [2025-04-25 01:52:44,403 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:44,404 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15271 treesize of output 15247 [2025-04-25 01:52:44,470 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:44,471 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15239 treesize of output 15183 [2025-04-25 01:52:44,574 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-25 01:52:45,694 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-25 01:52:46,019 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:52:46,019 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 13819 treesize of output 13821 [2025-04-25 01:59:47,132 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:47,133 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 320 treesize of output 304 [2025-04-25 01:59:47,192 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:47,193 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 15767 treesize of output 15545 [2025-04-25 01:59:47,282 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:47,282 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11299 treesize of output 11295 [2025-04-25 01:59:47,384 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:47,384 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11287 treesize of output 11247 [2025-04-25 01:59:47,447 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:47,447 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11239 treesize of output 11223 [2025-04-25 01:59:47,506 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:47,506 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 9672 treesize of output 9666 [2025-04-25 01:59:47,576 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-25 01:59:47,832 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-25 01:59:48,105 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:48,105 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 8030 treesize of output 8042 [2025-04-25 01:59:59,572 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:59,572 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 512 treesize of output 472 [2025-04-25 01:59:59,646 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:59,647 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 102300 treesize of output 99568 [2025-04-25 01:59:59,811 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:59,812 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 13742 treesize of output 13746 [2025-04-25 01:59:59,941 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 01:59:59,941 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 7849 treesize of output 7845 [2025-04-25 02:00:00,090 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 02:00:00,090 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 15472 treesize of output 15432 [2025-04-25 02:00:00,214 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 02:00:00,215 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 15408 treesize of output 15400 [2025-04-25 02:00:00,337 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-25 02:00:02,265 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-25 02:00:02,751 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-25 02:00:02,751 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 15533 treesize of output 15561