./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/libvsync/hclhlock.i --full-output --traceabstraction.use.conditional.por.in.concurrent.analysis false --traceabstraction.commutativity.condition.synthesis NONE --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 42d87675 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/GemCutterReach.xml -i ../sv-benchmarks/c/libvsync/hclhlock.i -s /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer GemCutter --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b0a2798ee53cc94366daea227ae4e14ebe705512ec93088d5efc9992b9f84ae5 --traceabstraction.use.conditional.por.in.concurrent.analysis false --traceabstraction.commutativity.condition.synthesis NONE --- Real Ultimate output --- This is Ultimate 0.3.0-dev-42d8767-m [2025-04-24 23:41:01,308 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-04-24 23:41:01,355 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/config/svcomp-Reach-32bit-GemCutter_Default.epf [2025-04-24 23:41:01,358 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-04-24 23:41:01,358 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-04-24 23:41:01,374 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-04-24 23:41:01,374 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-04-24 23:41:01,374 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-04-24 23:41:01,375 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-04-24 23:41:01,375 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-04-24 23:41:01,375 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-04-24 23:41:01,375 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-04-24 23:41:01,375 INFO L153 SettingsManager]: * Use SBE=true [2025-04-24 23:41:01,375 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-04-24 23:41:01,375 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-04-24 23:41:01,375 INFO L153 SettingsManager]: * sizeof long=4 [2025-04-24 23:41:01,375 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * sizeof long double=12 [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * Use constant arrays=true [2025-04-24 23:41:01,376 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-04-24 23:41:01,376 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-24 23:41:01,377 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-24 23:41:01,377 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-04-24 23:41:01,377 INFO L153 SettingsManager]: * Commutativity condition synthesis=NECESSARY_AND_SUFFICIENT [2025-04-24 23:41:01,378 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-04-24 23:41:01,378 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-04-24 23:41:01,378 INFO L153 SettingsManager]: * DFS Order used in POR=LOOP_LOCKSTEP [2025-04-24 23:41:01,378 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-04-24 23:41:01,378 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2025-04-24 23:41:01,378 INFO L153 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_THREAD_INSTANCE [2025-04-24 23:41:01,378 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=PERSISTENT_SLEEP_NEW_STATES_FIXEDORDER [2025-04-24 23:41:01,378 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> GemCutter Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b0a2798ee53cc94366daea227ae4e14ebe705512ec93088d5efc9992b9f84ae5 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Use conditional POR in concurrent analysis -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Commutativity condition synthesis -> NONE [2025-04-24 23:41:01,587 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-04-24 23:41:01,593 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-04-24 23:41:01,595 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-04-24 23:41:01,596 INFO L270 PluginConnector]: Initializing CDTParser... [2025-04-24 23:41:01,596 INFO L274 PluginConnector]: CDTParser initialized [2025-04-24 23:41:01,597 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../sv-benchmarks/c/libvsync/hclhlock.i [2025-04-24 23:41:02,926 INFO L538 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/dbc91662c/1ef07342c4494caeaa826ae4e46ff394/FLAG0e6dc4a75 [2025-04-24 23:41:03,348 INFO L389 CDTParser]: Found 1 translation units. [2025-04-24 23:41:03,348 INFO L178 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i [2025-04-24 23:41:03,375 INFO L432 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/dbc91662c/1ef07342c4494caeaa826ae4e46ff394/FLAG0e6dc4a75 [2025-04-24 23:41:03,928 INFO L440 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/data/dbc91662c/1ef07342c4494caeaa826ae4e46ff394 [2025-04-24 23:41:03,930 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-04-24 23:41:03,930 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-04-24 23:41:03,931 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-04-24 23:41:03,931 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-04-24 23:41:03,934 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-04-24 23:41:03,935 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.04 11:41:03" (1/1) ... [2025-04-24 23:41:03,935 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5626b459 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:03, skipping insertion in model container [2025-04-24 23:41:03,935 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.04 11:41:03" (1/1) ... [2025-04-24 23:41:03,991 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-04-24 23:41:05,375 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172094,172107] [2025-04-24 23:41:05,377 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172145,172158] [2025-04-24 23:41:05,377 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172202,172215] [2025-04-24 23:41:05,382 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172763,172776] [2025-04-24 23:41:05,383 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172814,172827] [2025-04-24 23:41:05,393 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174060,174073] [2025-04-24 23:41:05,395 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174118,174131] [2025-04-24 23:41:05,397 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174622,174635] [2025-04-24 23:41:05,397 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174679,174692] [2025-04-24 23:41:05,397 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174746,174759] [2025-04-24 23:41:05,398 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175274,175287] [2025-04-24 23:41:05,398 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175341,175354] [2025-04-24 23:41:05,399 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175944,175957] [2025-04-24 23:41:05,579 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[198494,198507] [2025-04-24 23:41:05,580 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[198561,198574] [2025-04-24 23:41:05,593 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-24 23:41:05,600 INFO L200 MainTranslator]: Completed pre-run [2025-04-24 23:41:05,728 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3755] [2025-04-24 23:41:05,729 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3757] [2025-04-24 23:41:05,729 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3762] [2025-04-24 23:41:05,730 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3764] [2025-04-24 23:41:05,730 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3770] [2025-04-24 23:41:05,731 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3772] [2025-04-24 23:41:05,731 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3778] [2025-04-24 23:41:05,731 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3780] [2025-04-24 23:41:05,731 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3786] [2025-04-24 23:41:05,732 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3788] [2025-04-24 23:41:05,732 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3794] [2025-04-24 23:41:05,732 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3796] [2025-04-24 23:41:05,732 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3802] [2025-04-24 23:41:05,733 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3804] [2025-04-24 23:41:05,733 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3810] [2025-04-24 23:41:05,733 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3812] [2025-04-24 23:41:05,733 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3817] [2025-04-24 23:41:05,733 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3819] [2025-04-24 23:41:05,734 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3824] [2025-04-24 23:41:05,734 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3826] [2025-04-24 23:41:05,734 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3831] [2025-04-24 23:41:05,734 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3833] [2025-04-24 23:41:05,734 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3838] [2025-04-24 23:41:05,735 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3840] [2025-04-24 23:41:05,735 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3845] [2025-04-24 23:41:05,735 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3847] [2025-04-24 23:41:05,735 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3852] [2025-04-24 23:41:05,735 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3855] [2025-04-24 23:41:05,736 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3861] [2025-04-24 23:41:05,736 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3864] [2025-04-24 23:41:05,736 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3870] [2025-04-24 23:41:05,737 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3873] [2025-04-24 23:41:05,737 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3879] [2025-04-24 23:41:05,737 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3882] [2025-04-24 23:41:05,737 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3888] [2025-04-24 23:41:05,738 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3891] [2025-04-24 23:41:05,738 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3897] [2025-04-24 23:41:05,738 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3900] [2025-04-24 23:41:05,738 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3907] [2025-04-24 23:41:05,739 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3910] [2025-04-24 23:41:05,739 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3917] [2025-04-24 23:41:05,739 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3920] [2025-04-24 23:41:05,740 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3927] [2025-04-24 23:41:05,741 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3930] [2025-04-24 23:41:05,742 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3937] [2025-04-24 23:41:05,742 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3940] [2025-04-24 23:41:05,743 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3947] [2025-04-24 23:41:05,743 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3950] [2025-04-24 23:41:05,743 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3957] [2025-04-24 23:41:05,744 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3960] [2025-04-24 23:41:05,745 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3966] [2025-04-24 23:41:05,745 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3969] [2025-04-24 23:41:05,746 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3975] [2025-04-24 23:41:05,746 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3978] [2025-04-24 23:41:05,746 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3984] [2025-04-24 23:41:05,746 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3987] [2025-04-24 23:41:05,746 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3993] [2025-04-24 23:41:05,747 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [3996] [2025-04-24 23:41:05,747 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4002] [2025-04-24 23:41:05,747 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4005] [2025-04-24 23:41:05,747 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4011] [2025-04-24 23:41:05,748 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4014] [2025-04-24 23:41:05,748 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4020] [2025-04-24 23:41:05,748 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4023] [2025-04-24 23:41:05,748 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4029] [2025-04-24 23:41:05,748 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4032] [2025-04-24 23:41:05,749 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4038] [2025-04-24 23:41:05,749 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4041] [2025-04-24 23:41:05,750 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4047] [2025-04-24 23:41:05,750 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4050] [2025-04-24 23:41:05,751 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4056] [2025-04-24 23:41:05,751 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4059] [2025-04-24 23:41:05,751 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4065] [2025-04-24 23:41:05,752 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4068] [2025-04-24 23:41:05,752 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4074] [2025-04-24 23:41:05,753 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4077] [2025-04-24 23:41:05,753 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4083] [2025-04-24 23:41:05,753 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4086] [2025-04-24 23:41:05,754 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4092] [2025-04-24 23:41:05,754 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4095] [2025-04-24 23:41:05,755 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4101] [2025-04-24 23:41:05,755 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4103] [2025-04-24 23:41:05,755 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4109] [2025-04-24 23:41:05,756 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4111] [2025-04-24 23:41:05,756 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4117] [2025-04-24 23:41:05,757 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4119] [2025-04-24 23:41:05,757 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4125] [2025-04-24 23:41:05,758 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4127] [2025-04-24 23:41:05,758 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4133] [2025-04-24 23:41:05,758 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4135] [2025-04-24 23:41:05,758 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4141] [2025-04-24 23:41:05,759 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4143] [2025-04-24 23:41:05,759 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4149] [2025-04-24 23:41:05,759 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4151] [2025-04-24 23:41:05,759 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4157] [2025-04-24 23:41:05,759 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4159] [2025-04-24 23:41:05,760 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4165] [2025-04-24 23:41:05,760 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4167] [2025-04-24 23:41:05,760 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4173] [2025-04-24 23:41:05,760 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ __volatile__("" ::: "memory"); [4175] [2025-04-24 23:41:05,795 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172094,172107] [2025-04-24 23:41:05,796 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172145,172158] [2025-04-24 23:41:05,796 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172202,172215] [2025-04-24 23:41:05,797 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172763,172776] [2025-04-24 23:41:05,797 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[172814,172827] [2025-04-24 23:41:05,799 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174060,174073] [2025-04-24 23:41:05,800 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174118,174131] [2025-04-24 23:41:05,801 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174622,174635] [2025-04-24 23:41:05,801 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174679,174692] [2025-04-24 23:41:05,801 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[174746,174759] [2025-04-24 23:41:05,802 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175274,175287] [2025-04-24 23:41:05,802 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175341,175354] [2025-04-24 23:41:05,804 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[175944,175957] [2025-04-24 23:41:05,811 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[198494,198507] [2025-04-24 23:41:05,811 WARN L116 LibraryModelHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/libvsync/hclhlock.i[198561,198574] [2025-04-24 23:41:05,815 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-04-24 23:41:06,004 INFO L204 MainTranslator]: Completed translation [2025-04-24 23:41:06,005 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06 WrapperNode [2025-04-24 23:41:06,005 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-04-24 23:41:06,006 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-04-24 23:41:06,006 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-04-24 23:41:06,006 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-04-24 23:41:06,009 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,059 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,096 INFO L138 Inliner]: procedures = 921, calls = 957, calls flagged for inlining = 833, calls inlined = 67, statements flattened = 799 [2025-04-24 23:41:06,096 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-04-24 23:41:06,097 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-04-24 23:41:06,097 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-04-24 23:41:06,097 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-04-24 23:41:06,109 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,109 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,113 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,113 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,124 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,125 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,132 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,134 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,140 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,151 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-04-24 23:41:06,151 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-04-24 23:41:06,152 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-04-24 23:41:06,152 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-04-24 23:41:06,152 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (1/1) ... [2025-04-24 23:41:06,155 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-04-24 23:41:06,164 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-24 23:41:06,176 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-04-24 23:41:06,181 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-04-24 23:41:06,196 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-04-24 23:41:06,197 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure run [2025-04-24 23:41:06,197 INFO L138 BoogieDeclarations]: Found implementation of procedure run [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2025-04-24 23:41:06,197 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2025-04-24 23:41:06,198 WARN L203 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement. [2025-04-24 23:41:06,342 INFO L234 CfgBuilder]: Building ICFG [2025-04-24 23:41:06,344 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-04-24 23:41:07,077 INFO L279 CfgBuilder]: Omitted future-live optimization because the input is a concurrent program. [2025-04-24 23:41:07,078 INFO L283 CfgBuilder]: Performing block encoding [2025-04-24 23:41:07,443 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-04-24 23:41:07,444 INFO L312 CfgBuilder]: Removed 53 assume(true) statements. [2025-04-24 23:41:07,445 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.04 11:41:07 BoogieIcfgContainer [2025-04-24 23:41:07,445 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-04-24 23:41:07,446 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-04-24 23:41:07,447 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-04-24 23:41:07,450 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-04-24 23:41:07,450 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.04 11:41:03" (1/3) ... [2025-04-24 23:41:07,451 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1512d2d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.04 11:41:07, skipping insertion in model container [2025-04-24 23:41:07,453 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.04 11:41:06" (2/3) ... [2025-04-24 23:41:07,453 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1512d2d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.04 11:41:07, skipping insertion in model container [2025-04-24 23:41:07,453 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.04 11:41:07" (3/3) ... [2025-04-24 23:41:07,453 INFO L128 eAbstractionObserver]: Analyzing ICFG hclhlock.i [2025-04-24 23:41:07,464 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-04-24 23:41:07,466 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG hclhlock.i that has 2 procedures, 243 locations, 382 edges, 1 initial locations, 60 loop locations, and 17 error locations. [2025-04-24 23:41:07,466 INFO L490 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2025-04-24 23:41:07,617 INFO L143 ThreadInstanceAdder]: Constructed 1 joinOtherThreadTransitions. [2025-04-24 23:41:07,656 INFO L125 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-24 23:41:07,656 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2025-04-24 23:41:07,656 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-24 23:41:07,658 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2025-04-24 23:41:07,660 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2025-04-24 23:41:07,778 INFO L177 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2025-04-24 23:41:07,786 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == runThread1of1ForFork0 ======== [2025-04-24 23:41:07,791 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5f0d2ab3, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-04-24 23:41:07,793 INFO L341 AbstractCegarLoop]: Starting to check reachability of 11 error locations. [2025-04-24 23:41:07,878 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:07,882 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:07,882 INFO L85 PathProgramCache]: Analyzing trace with hash -1885372546, now seen corresponding path program 1 times [2025-04-24 23:41:07,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:07,888 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985197506] [2025-04-24 23:41:07,888 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:07,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:07,962 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-04-24 23:41:07,993 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-04-24 23:41:07,994 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:07,994 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:08,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-24 23:41:08,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:08,104 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [985197506] [2025-04-24 23:41:08,104 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [985197506] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-24 23:41:08,104 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-24 23:41:08,104 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-04-24 23:41:08,105 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634515949] [2025-04-24 23:41:08,106 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-24 23:41:08,109 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-04-24 23:41:08,109 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:08,124 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-04-24 23:41:08,124 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-04-24 23:41:08,125 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:08,126 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:08,127 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 18.0) internal successors, (36), 2 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:08,129 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:08,296 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:08,296 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-04-24 23:41:08,296 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:08,297 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:08,297 INFO L85 PathProgramCache]: Analyzing trace with hash -1188624514, now seen corresponding path program 1 times [2025-04-24 23:41:08,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:08,297 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352910708] [2025-04-24 23:41:08,297 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:08,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:08,325 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 52 statements into 1 equivalence classes. [2025-04-24 23:41:08,371 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 52 of 52 statements. [2025-04-24 23:41:08,371 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:08,371 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:08,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-04-24 23:41:08,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:08,691 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352910708] [2025-04-24 23:41:08,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [352910708] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-24 23:41:08,691 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-24 23:41:08,691 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-04-24 23:41:08,691 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879102731] [2025-04-24 23:41:08,691 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-24 23:41:08,693 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-04-24 23:41:08,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:08,694 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-04-24 23:41:08,694 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-04-24 23:41:08,694 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:08,695 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:08,695 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.75) internal successors, (51), 4 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:08,695 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:08,695 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:08,967 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:08,969 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:08,969 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-04-24 23:41:08,969 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:08,970 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:08,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1104573297, now seen corresponding path program 1 times [2025-04-24 23:41:08,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:08,970 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132485117] [2025-04-24 23:41:08,970 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:08,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:08,995 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-04-24 23:41:09,019 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-04-24 23:41:09,021 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:09,022 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:09,145 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-04-24 23:41:09,146 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:09,146 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132485117] [2025-04-24 23:41:09,146 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [132485117] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-24 23:41:09,146 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-24 23:41:09,146 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-24 23:41:09,146 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [782274202] [2025-04-24 23:41:09,146 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-24 23:41:09,147 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-24 23:41:09,147 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:09,147 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-24 23:41:09,147 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-24 23:41:09,147 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:09,147 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:09,148 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:09,148 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:09,148 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:09,148 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:09,307 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:09,307 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:09,307 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:09,307 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-04-24 23:41:09,307 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:09,308 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:09,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1249562375, now seen corresponding path program 1 times [2025-04-24 23:41:09,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:09,308 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [746522547] [2025-04-24 23:41:09,311 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:09,311 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:09,332 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 59 statements into 1 equivalence classes. [2025-04-24 23:41:09,347 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 59 of 59 statements. [2025-04-24 23:41:09,348 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:09,348 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:09,483 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-04-24 23:41:09,484 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:09,484 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [746522547] [2025-04-24 23:41:09,484 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [746522547] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-24 23:41:09,484 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [822828050] [2025-04-24 23:41:09,484 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:09,484 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-24 23:41:09,485 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-24 23:41:09,487 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-24 23:41:09,489 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-04-24 23:41:09,603 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 59 statements into 1 equivalence classes. [2025-04-24 23:41:09,669 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 59 of 59 statements. [2025-04-24 23:41:09,669 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:09,669 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:09,672 INFO L256 TraceCheckSpWp]: Trace formula consists of 572 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-04-24 23:41:09,676 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-24 23:41:09,692 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-04-24 23:41:09,694 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-24 23:41:09,712 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-04-24 23:41:09,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [822828050] provided 1 perfect and 1 imperfect interpolant sequences [2025-04-24 23:41:09,713 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2025-04-24 23:41:09,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4, 4] total 6 [2025-04-24 23:41:09,713 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [423518369] [2025-04-24 23:41:09,713 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-24 23:41:09,713 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-24 23:41:09,713 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:09,714 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-24 23:41:09,714 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-04-24 23:41:09,714 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:09,714 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:09,714 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 18.333333333333332) internal successors, (55), 3 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:09,714 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:09,714 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:09,714 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:09,714 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:09,908 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:09,908 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:09,908 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:09,908 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:09,916 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2025-04-24 23:41:10,109 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-24 23:41:10,110 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:10,110 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:10,110 INFO L85 PathProgramCache]: Analyzing trace with hash -275094196, now seen corresponding path program 1 times [2025-04-24 23:41:10,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:10,110 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744326732] [2025-04-24 23:41:10,110 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:10,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:10,131 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-04-24 23:41:10,156 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-04-24 23:41:10,157 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:10,157 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:10,336 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-04-24 23:41:10,338 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:10,338 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744326732] [2025-04-24 23:41:10,338 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744326732] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-24 23:41:10,338 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [263643197] [2025-04-24 23:41:10,338 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:10,338 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-24 23:41:10,338 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-24 23:41:10,340 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-24 23:41:10,341 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-04-24 23:41:10,466 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-04-24 23:41:10,535 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-04-24 23:41:10,535 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:10,535 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:10,537 INFO L256 TraceCheckSpWp]: Trace formula consists of 687 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-04-24 23:41:10,540 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-24 23:41:10,580 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-04-24 23:41:10,580 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-24 23:41:10,667 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-04-24 23:41:10,667 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [263643197] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-24 23:41:10,667 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-24 23:41:10,667 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 6] total 10 [2025-04-24 23:41:10,667 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [627602148] [2025-04-24 23:41:10,667 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-24 23:41:10,668 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-04-24 23:41:10,668 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:10,668 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-04-24 23:41:10,668 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2025-04-24 23:41:10,669 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:10,669 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:10,669 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 13.0) internal successors, (130), 10 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:10,669 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:10,669 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:10,669 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:10,669 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:10,669 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:11,061 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:11,061 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:11,061 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:11,061 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:11,061 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:11,072 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2025-04-24 23:41:11,262 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-24 23:41:11,262 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting runErr4ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:11,262 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:11,262 INFO L85 PathProgramCache]: Analyzing trace with hash 1515179464, now seen corresponding path program 2 times [2025-04-24 23:41:11,262 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:11,263 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [984972354] [2025-04-24 23:41:11,263 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-24 23:41:11,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:11,286 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 122 statements into 2 equivalence classes. [2025-04-24 23:41:11,312 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 52 of 122 statements. [2025-04-24 23:41:11,315 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-04-24 23:41:11,315 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:11,505 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2025-04-24 23:41:11,506 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:11,506 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [984972354] [2025-04-24 23:41:11,506 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [984972354] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-24 23:41:11,506 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-24 23:41:11,506 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-04-24 23:41:11,506 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1632083321] [2025-04-24 23:41:11,507 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-24 23:41:11,507 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-04-24 23:41:11,507 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:11,507 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-04-24 23:41:11,508 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-04-24 23:41:11,509 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:11,509 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:11,509 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 12.5) internal successors, (75), 6 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:11,509 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:11,509 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:11,509 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:11,509 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:11,509 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:11,509 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:11,732 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:11,732 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:11,732 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:11,732 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:11,732 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:11,732 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:11,732 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-04-24 23:41:11,733 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting runErr3ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:11,733 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:11,733 INFO L85 PathProgramCache]: Analyzing trace with hash 830037257, now seen corresponding path program 1 times [2025-04-24 23:41:11,733 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:11,733 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084903540] [2025-04-24 23:41:11,733 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:11,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:11,755 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 119 statements into 1 equivalence classes. [2025-04-24 23:41:11,863 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 119 of 119 statements. [2025-04-24 23:41:11,864 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:11,864 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:12,069 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2025-04-24 23:41:12,071 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:12,072 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084903540] [2025-04-24 23:41:12,072 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1084903540] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-24 23:41:12,072 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-24 23:41:12,072 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-04-24 23:41:12,072 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629589016] [2025-04-24 23:41:12,072 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-24 23:41:12,072 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-04-24 23:41:12,072 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:12,073 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-04-24 23:41:12,073 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-04-24 23:41:12,073 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:12,073 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:12,074 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.666666666666668) internal successors, (83), 3 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:12,074 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:12,074 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:12,074 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:12,074 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:12,074 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:12,074 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:12,074 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:12,222 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:12,222 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:12,222 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:12,222 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:12,222 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:12,222 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:12,222 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:12,223 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-04-24 23:41:12,223 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting runErr3ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:12,223 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:12,223 INFO L85 PathProgramCache]: Analyzing trace with hash -2132620170, now seen corresponding path program 1 times [2025-04-24 23:41:12,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:12,223 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148674774] [2025-04-24 23:41:12,223 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:12,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:12,247 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 113 statements into 1 equivalence classes. [2025-04-24 23:41:12,326 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 113 of 113 statements. [2025-04-24 23:41:12,326 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:12,326 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:12,778 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2025-04-24 23:41:12,779 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:12,779 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [148674774] [2025-04-24 23:41:12,779 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [148674774] provided 1 perfect and 0 imperfect interpolant sequences [2025-04-24 23:41:12,780 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-04-24 23:41:12,780 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-04-24 23:41:12,780 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [253081524] [2025-04-24 23:41:12,780 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-04-24 23:41:12,780 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-04-24 23:41:12,780 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:12,781 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-04-24 23:41:12,782 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-04-24 23:41:12,782 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:12,782 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:12,782 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 11.857142857142858) internal successors, (83), 7 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:12,782 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:12,782 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:12,782 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:12,782 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:12,782 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:12,782 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:12,782 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:12,782 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:16,838 WARN L532 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-04-24 23:41:20,842 WARN L532 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-04-24 23:41:21,185 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:21,185 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:21,185 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:21,185 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:21,185 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:21,185 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:21,185 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:21,186 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:21,186 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-04-24 23:41:21,186 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting runErr3ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:21,186 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:21,186 INFO L85 PathProgramCache]: Analyzing trace with hash 1731330899, now seen corresponding path program 1 times [2025-04-24 23:41:21,186 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:21,186 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865116384] [2025-04-24 23:41:21,186 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:21,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:21,206 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 111 statements into 1 equivalence classes. [2025-04-24 23:41:21,296 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 111 of 111 statements. [2025-04-24 23:41:21,296 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:21,296 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:21,682 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-04-24 23:41:21,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:21,682 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [865116384] [2025-04-24 23:41:21,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [865116384] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-24 23:41:21,682 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [717469831] [2025-04-24 23:41:21,682 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-04-24 23:41:21,682 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-24 23:41:21,683 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-24 23:41:21,684 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-24 23:41:21,686 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-04-24 23:41:21,825 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 111 statements into 1 equivalence classes. [2025-04-24 23:41:22,321 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 111 of 111 statements. [2025-04-24 23:41:22,321 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-04-24 23:41:22,322 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:22,326 INFO L256 TraceCheckSpWp]: Trace formula consists of 944 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-04-24 23:41:22,332 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-24 23:41:22,428 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-04-24 23:41:22,430 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-24 23:41:22,588 INFO L134 CoverageAnalysis]: Checked inductivity of 62 backedges. 11 proven. 41 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-04-24 23:41:22,588 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [717469831] provided 0 perfect and 2 imperfect interpolant sequences [2025-04-24 23:41:22,588 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-04-24 23:41:22,588 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 16 [2025-04-24 23:41:22,588 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [993638229] [2025-04-24 23:41:22,588 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-04-24 23:41:22,589 INFO L562 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2025-04-24 23:41:22,589 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-04-24 23:41:22,589 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-04-24 23:41:22,589 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=202, Unknown=0, NotChecked=0, Total=240 [2025-04-24 23:41:22,589 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:22,589 INFO L485 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2025-04-24 23:41:22,589 INFO L486 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 9.75) internal successors, (156), 16 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:22,589 INFO L153 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:23,273 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-04-24 23:41:23,273 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-04-24 23:41:23,273 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:23,273 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:23,273 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-04-24 23:41:23,273 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:23,273 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-04-24 23:41:23,273 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-04-24 23:41:23,274 INFO L140 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-04-24 23:41:23,288 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2025-04-24 23:41:23,474 WARN L466 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-24 23:41:23,474 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting runErr3ASSERT_VIOLATIONERROR_FUNCTION === [runErr0ASSERT_VIOLATIONERROR_FUNCTION, runErr1ASSERT_VIOLATIONERROR_FUNCTION, runErr5ASSERT_VIOLATIONERROR_FUNCTION, runErr6ASSERT_VIOLATIONERROR_FUNCTION (and 7 more)] === [2025-04-24 23:41:23,474 INFO L155 PredicateUnifier]: Initialized classic predicate unifier [2025-04-24 23:41:23,475 INFO L85 PathProgramCache]: Analyzing trace with hash -1325775376, now seen corresponding path program 2 times [2025-04-24 23:41:23,475 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-04-24 23:41:23,475 INFO L324 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592896233] [2025-04-24 23:41:23,475 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-24 23:41:23,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-04-24 23:41:23,495 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 109 statements into 2 equivalence classes. [2025-04-24 23:41:23,637 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 109 of 109 statements. [2025-04-24 23:41:23,638 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-24 23:41:23,638 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:32,541 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 59 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2025-04-24 23:41:32,541 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-04-24 23:41:32,541 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592896233] [2025-04-24 23:41:32,541 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [592896233] provided 0 perfect and 1 imperfect interpolant sequences [2025-04-24 23:41:32,541 INFO L324 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1740095946] [2025-04-24 23:41:32,541 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-04-24 23:41:32,542 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-04-24 23:41:32,542 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2025-04-24 23:41:32,543 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-04-24 23:41:32,544 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-04-24 23:41:32,681 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 109 statements into 2 equivalence classes. [2025-04-24 23:41:32,937 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 109 of 109 statements. [2025-04-24 23:41:32,938 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-04-24 23:41:32,938 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-04-24 23:41:32,948 INFO L256 TraceCheckSpWp]: Trace formula consists of 941 conjuncts, 291 conjuncts are in the unsatisfiable core [2025-04-24 23:41:32,962 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-04-24 23:41:33,013 INFO L325 Elim1Store]: treesize reduction 8, result has 52.9 percent of original size [2025-04-24 23:41:33,013 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 18 [2025-04-24 23:41:33,083 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:33,208 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:33,353 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:33,492 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:34,167 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:34,177 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2025-04-24 23:41:34,252 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2025-04-24 23:41:34,260 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:34,272 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 7 [2025-04-24 23:41:34,906 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:34,917 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2025-04-24 23:41:34,926 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 16 [2025-04-24 23:41:35,029 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 7 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 35 [2025-04-24 23:41:35,044 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 11 [2025-04-24 23:41:35,051 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:35,668 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,669 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2025-04-24 23:41:35,677 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:35,683 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 26 [2025-04-24 23:41:35,770 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:35,779 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,780 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,781 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,781 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,782 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,783 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,784 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,784 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,786 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 4 select indices, 4 select index equivalence classes, 15 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 41 [2025-04-24 23:41:35,794 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,795 INFO L189 IndexEqualityManager]: detected not equals via solver [2025-04-24 23:41:35,796 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 11 [2025-04-24 23:41:36,026 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 26 [2025-04-24 23:41:36,036 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:36,043 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:36,335 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:36,342 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2025-04-24 23:41:36,347 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 26 [2025-04-24 23:41:37,007 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 57 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2025-04-24 23:41:37,007 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-04-24 23:41:38,380 WARN L849 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1030 (Array Int Int))) (< (mod (let ((.cse0 (+ |c_~#tnode~0.offset| 4))) (select (select (store |c_#memory_int| |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse0)) (select (select (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1030) |c_~#tnode~0.base|) .cse0))) 1073741824) 1073741823)) is different from false [2025-04-24 23:41:38,435 WARN L849 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1022 Int) (v_ArrVal_1024 Int) (v_ArrVal_1023 Int) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1019 Int) (v_ArrVal_1030 (Array Int Int))) (< (mod (let ((.cse0 (+ |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| 4)) (.cse1 (+ |c_~#tnode~0.offset| 4))) (select (select (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| (store (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base|) .cse0 v_ArrVal_1022) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse1)) (select (select (store (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| (store (store (select |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base|) .cse0 v_ArrVal_1019) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| v_ArrVal_1024)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1030) |c_~#tnode~0.base|) .cse1))) 1073741824) 1073741823)) is different from false [2025-04-24 23:41:39,337 WARN L849 $PredicateComparison]: unable to prove that (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1016 (Array Int Int)) (v_ArrVal_1024 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1019 Int) (v_ArrVal_1030 (Array Int Int))) (or (< (mod (let ((.cse1 (+ |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| 4)) (.cse2 (+ |c_~#tnode~0.offset| 4))) (select (select (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.base| (store (select |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |ULTIMATE.start_vatomic32_write_~v#1|)) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (let ((.cse0 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.base| v_ArrVal_1018))) (store .cse0 |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| (store (store (select .cse0 |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base|) .cse1 v_ArrVal_1022) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| v_ArrVal_1023))) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse2)) (select (select (store (let ((.cse3 (store |c_#memory_$Pointer$.offset| |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.base| v_ArrVal_1016))) (store .cse3 |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| (store (store (select .cse3 |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base|) .cse1 v_ArrVal_1019) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| v_ArrVal_1024))) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1030) |c_~#tnode~0.base|) .cse2))) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|))) is different from false [2025-04-24 23:41:41,442 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:41,443 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 247 treesize of output 227 [2025-04-24 23:41:41,481 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:41,482 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 724 treesize of output 728 [2025-04-24 23:41:41,496 INFO L172 IndexEqualityManager]: detected equality via solver [2025-04-24 23:41:41,497 INFO L172 IndexEqualityManager]: detected equality via solver [2025-04-24 23:41:41,503 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 352 treesize of output 348 [2025-04-24 23:41:41,523 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 153 [2025-04-24 23:41:41,563 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 4 [2025-04-24 23:41:41,579 INFO L172 IndexEqualityManager]: detected equality via solver [2025-04-24 23:41:41,580 INFO L172 IndexEqualityManager]: detected equality via solver [2025-04-24 23:41:41,592 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:41,593 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 497 treesize of output 497 [2025-04-24 23:41:41,891 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:41,891 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 122 treesize of output 126 [2025-04-24 23:41:42,519 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:42,520 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 122 treesize of output 126 [2025-04-24 23:41:42,977 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:42,977 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 245 treesize of output 245 [2025-04-24 23:41:43,174 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:43,174 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 122 treesize of output 126 [2025-04-24 23:41:43,688 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:43,688 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 245 treesize of output 245 [2025-04-24 23:41:44,048 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:44,049 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 245 treesize of output 245 [2025-04-24 23:41:52,627 WARN L871 $PredicateComparison]: unable to prove that (let ((.cse108 (mod (+ |c_ULTIMATE.start_init_~i~4#1| 1) 4294967296)) (.cse113 (mod (+ 2 |c_ULTIMATE.start_init_~i~4#1|) 4294967296))) (or (let ((.cse109 (* .cse108 8)) (.cse21 (= .cse108 0)) (.cse2 (= |c_ULTIMATE.start_main_~#t~0#1.base| |c_~#tnode~0.base|)) (.cse10 (store |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| (store (store (select |c_#memory_$Pointer$.base| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base|) (+ |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| 4) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.base|) |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset| 0))) (.cse12 (+ |c_~#tnode~0.offset| 4)) (.cse3 (+ |c_~#qnode~0.offset| (* .cse113 4))) (.cse16 (+ |c_~#tnode~0.offset| (* 8 .cse113)))) (let ((.cse72 (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse110 (select (store (store (let ((.cse111 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse111 |c_~#qnode~0.base| (store (store (select .cse111 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse110 v_ArrVal_1011) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse110 v_arrayElimCell_36) 1073741824) 1073741822))))))))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< (mod (select (select (store (store (let ((.cse112 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse112 |c_~#qnode~0.base| (store (store (select .cse112 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))))) (.cse66 (= |c_~#qnode~0.base| |c_~#tnode~0.base|)) (.cse19 (not .cse21)) (.cse14 (+ |c_~#tnode~0.offset| 4 .cse109)) (.cse15 (+ |c_~#tnode~0.offset| .cse109)) (.cse7 (+ (* .cse108 4) |c_~#qnode~0.offset|))) (let ((.cse0 (or .cse21 (forall ((v_ArrVal_1008 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse105 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse106 (store (select .cse105 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse107 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< (mod (select (select (store (store (store .cse105 |c_~#qnode~0.base| (store (select (store (store .cse105 |c_~#qnode~0.base| .cse106) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse107) v_arrayElimCell_36) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse105 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse107) v_arrayElimCell_35) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse105 |c_~#qnode~0.base| (store .cse106 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse107) v_arrayElimCell_39) 1073741824) 1073741823))))))) (.cse1 (or .cse19 (forall ((v_ArrVal_1008 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse102 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse103 (store (select .cse102 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse104 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse102 |c_~#qnode~0.base| (store .cse103 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse104) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< (mod (select (select (store (store (store .cse102 |c_~#qnode~0.base| (store (select (store (store .cse102 |c_~#qnode~0.base| .cse103) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse104) v_arrayElimCell_36) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse102 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse104) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))))))) (.cse25 (or (and (or .cse72 .cse19) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse88 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse89 (select .cse88 |c_~#qnode~0.base|)) (.cse90 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse91 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse92 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (or (< (mod (select (select (store (store (store .cse88 |c_~#qnode~0.base| (store (store .cse89 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse90 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse91 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse92 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse88 |c_~#qnode~0.base| (store (store .cse89 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse90 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse91 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse92 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_39) 1073741824) 1073741823)))))) (or .cse21 (and (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (let ((.cse93 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse93 |c_~#qnode~0.base| (store (store (select .cse93 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_39) 1073741824) 1073741823))) .cse2) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse94 (select (store (store (let ((.cse95 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse95 |c_~#qnode~0.base| (store (store (select .cse95 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse94 v_arrayElimCell_36) 1073741824) 1073741822)) (< (mod (select .cse94 v_arrayElimCell_39) 1073741824) 1073741823)))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))))) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimCell_39 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse96 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse97 (select .cse96 |c_~#qnode~0.base|)) (.cse98 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse99 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse100 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse101 (select (store (store (store .cse96 |c_~#qnode~0.base| (store (store .cse97 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse98 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse99 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse100 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select (select (store (store (store .cse96 |c_~#qnode~0.base| (store (store .cse97 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse98 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse99 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse100 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse101 v_arrayElimCell_36) 1073741824) 1073741822)) (< (mod (select .cse101 v_arrayElimCell_39) 1073741824) 1073741823)))))) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) .cse66)) (.cse26 (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1008 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse85 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse86 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse87 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse82 (select (select (store (store .cse85 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse86 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse87 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) (.cse81 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (or (< (mod (select (select (store (store (store .cse81 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse82) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_39 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_arrayElimCell_36 Int)) (let ((.cse84 (select .cse81 |c_~#qnode~0.base|))) (let ((.cse83 (store .cse84 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|))) (or (< (mod (select (select (store (store (store .cse81 |c_~#qnode~0.base| (store (select (store (store .cse81 |c_~#qnode~0.base| .cse83) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse82) v_arrayElimCell_36) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse81 |c_~#qnode~0.base| (store .cse83 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse82) v_arrayElimCell_39) 1073741824) 1073741823) (forall ((v_ArrVal_1011 Int)) (<= (mod (select (select (store (store (store .cse81 |c_~#qnode~0.base| (store (store .cse84 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse85 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse86 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse87 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741822)))))))))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) (.cse20 (not .cse66))) (and (or (= |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| |c_~#tnode~0.base|) (and .cse0 .cse1 (or .cse2 (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimArr_3 (Array Int Int)) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse9 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse11 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse13 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse5 (select (select (store (store .cse9 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse11 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse13 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) (.cse4 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (or (< (mod (select (select (store (store (store .cse4 |c_~#qnode~0.base| v_arrayElimArr_3) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse5) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_39 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int)) (let ((.cse6 (select .cse4 |c_~#qnode~0.base|)) (.cse8 (select v_arrayElimArr_3 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) (or (< (mod (select (select (store (store (store .cse4 |c_~#qnode~0.base| (store (store .cse6 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse8)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse5) v_arrayElimCell_39) 1073741824) 1073741823) (forall ((v_ArrVal_1011 Int)) (<= (mod (select (select (store (store (store .cse4 |c_~#qnode~0.base| (store (store .cse6 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse8)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse9 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse11 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse13 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741822))))))))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimArr_3 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse17 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse18 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse17 |c_~#qnode~0.base| v_arrayElimArr_3) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse18) v_arrayElimCell_35) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse17 |c_~#qnode~0.base| (store (store (select .cse17 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_3 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse18) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) .cse19) (or .cse20 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimArr_3 (Array Int Int)) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (or (< (mod (select (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_3) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) (or .cse21 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimArr_3 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimCell_39 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse22 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse23 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse22 |c_~#qnode~0.base| v_arrayElimArr_3) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse23) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse22 |c_~#qnode~0.base| (store (store (select .cse22 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_3 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse23) v_arrayElimCell_39) 1073741824) 1073741823))))))) (or .cse20 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_arrayElimArr_4 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse24 (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_4) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse24 v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select .cse24 v_arrayElimCell_36) 1073741824) 1073741823))))) .cse25 .cse26)) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse27 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse29 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse30 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse31 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|)) (.cse28 (select .cse27 |c_~#qnode~0.base|))) (let ((.cse32 (store .cse28 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse33 (select (select (store (store .cse29 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse30 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse31 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse27 |c_~#qnode~0.base| (store (store .cse28 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse29 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse30 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse31 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse27 |c_~#qnode~0.base| (store .cse32 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse33) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (forall ((v_ArrVal_1008 (Array Int Int)) (v_arrayElimCell_35 Int)) (or (< (mod (select (select (store (store (store .cse27 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse33) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select (select (store (store (store .cse27 |c_~#qnode~0.base| (store (select (store (store .cse27 |c_~#qnode~0.base| .cse32) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse33) v_arrayElimCell_36) 1073741824) 1073741822))))))))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (or (forall ((v_ArrVal_1008 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< (mod (select (select (store (store (let ((.cse34 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse34 |c_~#qnode~0.base| (store (select (store (store .cse34 |c_~#qnode~0.base| (store (select .cse34 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|)) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_36) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (not .cse2)) (or (and .cse0 (or .cse20 (forall ((v_arrayElimArr_6 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimCell_36 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse35 (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_6) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse35 v_arrayElimCell_36) 1073741824) 1073741823) (< (mod (select .cse35 v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))))) .cse1 .cse25 .cse26 (or .cse2 (and (or .cse20 (forall ((v_arrayElimArr_5 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (or (< (mod (select (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_5) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_arrayElimArr_5 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse40 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse41 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse42 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse37 (select (select (store (store .cse40 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse41 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse42 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) (.cse36 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (or (< (mod (select (select (store (store (store .cse36 |c_~#qnode~0.base| v_arrayElimArr_5) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse37) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_39 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int)) (let ((.cse38 (select .cse36 |c_~#qnode~0.base|)) (.cse39 (select v_arrayElimArr_5 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) (or (< (mod (select (select (store (store (store .cse36 |c_~#qnode~0.base| (store (store .cse38 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse39)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse37) v_arrayElimCell_39) 1073741824) 1073741823) (forall ((v_ArrVal_1011 Int)) (<= (mod (select (select (store (store (store .cse36 |c_~#qnode~0.base| (store (store .cse38 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse39)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse40 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse41 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse42 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741822))))))))))))) (or .cse21 (forall ((v_arrayElimArr_5 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimCell_39 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse43 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse44 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse43 |c_~#qnode~0.base| v_arrayElimArr_5) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse44) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse43 |c_~#qnode~0.base| (store (store (select .cse43 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_5 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse44) v_arrayElimCell_39) 1073741824) 1073741823))))) (or .cse19 (forall ((v_arrayElimArr_5 (Array Int Int)) (v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse45 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse46 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< (mod (select (select (store (store (store .cse45 |c_~#qnode~0.base| (store (store (select .cse45 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_5 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse46) v_ArrVal_1011) 1073741824) 1073741823) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse45 |c_~#qnode~0.base| v_arrayElimArr_5) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse46) v_arrayElimCell_35) 1073741824) 1073741823)))))))) (= |c_~#tnode~0.offset| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset|)) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_arrayElimArr_2 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse47 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse51 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse52 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse53 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse50 (select (select (store (store .cse51 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse52 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse53 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) (.cse48 (select .cse47 |c_~#qnode~0.base|)) (.cse49 (select v_arrayElimArr_2 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) (or (< (mod (select (select (store (store (store .cse47 |c_~#qnode~0.base| (store (store .cse48 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse49)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse50) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse47 |c_~#qnode~0.base| v_arrayElimArr_2) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse50) v_arrayElimCell_35) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse47 |c_~#qnode~0.base| (store (store .cse48 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse49)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse51 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse52 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse53 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823)))))) (or .cse20 (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_arrayElimArr_7 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (v_arrayElimCell_36 Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse54 (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_7) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse54 v_arrayElimCell_35) 1073741824) 1073741823) (< (mod (select .cse54 v_arrayElimCell_36) 1073741824) 1073741823)))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_arrayElimArr_2 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1023 Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (v_arrayElimCell_35 Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000) |c_~#qnode~0.base| v_arrayElimArr_2) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_arrayElimCell_35) 1073741824) 1073741823)))))) (or (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse55 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse56 (select .cse55 |c_~#qnode~0.base|)) (.cse57 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse58 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse59 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (let ((.cse60 (select (store (store (store .cse55 |c_~#qnode~0.base| (store (store .cse56 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse57 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse58 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse59 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select (select (store (store (store .cse55 |c_~#qnode~0.base| (store (store .cse56 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse57 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse58 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse59 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< (mod (select .cse60 |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse60 v_arrayElimCell_36) 1073741824) 1073741822))))))) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3))))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (let ((.cse61 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse62 (select .cse61 |c_~#qnode~0.base|)) (.cse63 (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018)) (.cse64 (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|)) (.cse65 (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|))) (or (< (mod (select (select (store (store (store .cse61 |c_~#qnode~0.base| (store (store .cse62 |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse63 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse64 .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse65 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) v_ArrVal_1011) 1073741824) 1073741823) (< (mod (select (select (store (store (store .cse61 |c_~#qnode~0.base| (store (store .cse62 .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store .cse63 |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store .cse64 .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) .cse65 v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))))))) .cse66) (or (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse67 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse68 (store (select .cse67 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse69 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse67 |c_~#qnode~0.base| (store .cse68 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse69) v_ArrVal_1011) 1073741824) 1073741823) (forall ((v_ArrVal_1008 (Array Int Int)) (v_arrayElimCell_35 Int)) (or (forall ((v_arrayElimCell_36 Int)) (<= (mod (select (select (store (store (store .cse67 |c_~#qnode~0.base| (store (select (store (store .cse67 |c_~#qnode~0.base| .cse68) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse69) v_arrayElimCell_36) 1073741824) 1073741822)) (< (mod (select (select (store (store (store .cse67 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse69) v_arrayElimCell_35) 1073741824) 1073741823))))))))))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_arrayElimArr_2 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1011 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse70 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse71 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse12 |c_~#qnode~0.base|) |c_~#tnode~0.offset| 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse70 |c_~#qnode~0.base| v_arrayElimArr_2) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse71) v_arrayElimCell_35) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse70 |c_~#qnode~0.base| (store (store (select .cse70 |c_~#qnode~0.base|) |c_~#qnode~0.offset| |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_2 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse71) v_ArrVal_1011) 1073741824) 1073741823))))) (or .cse66 .cse72)) .cse19) (or .cse21 (and (or .cse66 (and (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse73 (select (store (store (let ((.cse74 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse74 |c_~#qnode~0.base| (store (store (select .cse74 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)))) (or (< (mod (select .cse73 |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select .cse73 v_arrayElimCell_36) 1073741824) 1073741822))))))) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (or (< (mod (select (select (store (store (let ((.cse75 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (store .cse75 |c_~#qnode~0.base| (store (store (select .cse75 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12)) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16)))))) (or .cse2 (forall ((v_ArrVal_1018 (Array Int Int)) (v_arrayElimArr_2 (Array Int Int)) (v_ArrVal_1005 (Array Int Int)) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int) (|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int) (v_arrayElimCell_35 Int)) (let ((.cse76 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000)) (.cse77 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse76 |c_~#qnode~0.base| (store (store (select .cse76 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| (select v_arrayElimArr_2 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70|))) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse77) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (< (mod (select (select (store (store (store .cse76 |c_~#qnode~0.base| v_arrayElimArr_2) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse77) v_arrayElimCell_35) 1073741824) 1073741823))))) (forall ((|v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| Int)) (or (< |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| .cse16) (forall ((|v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| Int)) (or (< |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| .cse3) (forall ((v_ArrVal_1018 (Array Int Int)) (v_ArrVal_1022 Int) (v_ArrVal_1005 (Array Int Int)) (|v_ULTIMATE.start_vatomic32_write_~v#1_72| Int) (v_ArrVal_1023 Int) (|ULTIMATE.start_vatomic32_write_~v#1| Int) (v_ArrVal_1000 (Array Int Int)) (v_ArrVal_1032 (Array Int Int)) (v_ArrVal_1021 (Array Int Int)) (v_ArrVal_1031 (Array Int Int))) (let ((.cse78 (store |c_#memory_int| |c_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.base| v_ArrVal_1000))) (let ((.cse79 (store (select .cse78 |c_~#qnode~0.base|) .cse7 |ULTIMATE.start_vatomic32_write_~v#1|)) (.cse80 (select (select (store (store (store .cse10 |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base| (store (store (select (store (store .cse10 |c_~#tnode~0.base| (store (store (select (store .cse10 |c_~#qnode~0.base| v_ArrVal_1005) |c_~#tnode~0.base|) .cse14 |c_~#qnode~0.base|) .cse15 0)) |c_~#qnode~0.base| v_ArrVal_1018) |c_~#tnode~0.base|) (+ 4 |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45|) v_ArrVal_1022) |v_ULTIMATE.start_hclhlock_init_tnode_~tnode#1.offset_45| v_ArrVal_1023)) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1032) |c_~#tnode~0.base|) .cse12))) (or (< (mod (select (select (store (store (store .cse78 |c_~#qnode~0.base| (store .cse79 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse80) |c_ULTIMATE.start_hclhlock_init_tnode_~qnode#1.offset|) 1073741824) 1073741823) (forall ((v_ArrVal_1008 (Array Int Int)) (v_arrayElimCell_35 Int)) (or (< (mod (select (select (store (store (store .cse78 |c_~#qnode~0.base| (store v_ArrVal_1008 |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse80) v_arrayElimCell_35) 1073741824) 1073741823) (forall ((v_arrayElimCell_36 Int)) (<= (mod (select (select (store (store (store .cse78 |c_~#qnode~0.base| (store (select (store (store .cse78 |c_~#qnode~0.base| .cse79) |c_~#tnode~0.base| v_ArrVal_1008) |c_~#qnode~0.base|) |v_ULTIMATE.start_vatomic32_write_~a#1.offset_70| |v_ULTIMATE.start_vatomic32_write_~v#1_72|)) |c_~#tnode~0.base| v_ArrVal_1021) |c_ULTIMATE.start_main_~#t~0#1.base| v_ArrVal_1031) .cse80) v_arrayElimCell_36) 1073741824) 1073741822)))))))))))))))))) (< 2 .cse108) (< 2 .cse113))) is different from true [2025-04-24 23:41:53,512 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:53,513 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 172 treesize of output 165 [2025-04-24 23:41:53,609 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:53,609 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 329998 treesize of output 320748 [2025-04-24 23:41:53,689 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7550 treesize of output 7534 [2025-04-24 23:41:53,760 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7848 treesize of output 7836 [2025-04-24 23:41:53,802 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7652 treesize of output 7620 [2025-04-24 23:41:53,871 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-24 23:41:53,950 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-24 23:41:54,292 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:54,292 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 5910 treesize of output 5906 [2025-04-24 23:41:56,551 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:56,552 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 345 treesize of output 321 [2025-04-24 23:41:56,586 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:56,587 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 81723 treesize of output 79553 [2025-04-24 23:41:56,691 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:56,691 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15287 treesize of output 15279 [2025-04-24 23:41:56,745 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:56,746 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15271 treesize of output 15247 [2025-04-24 23:41:56,804 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:56,804 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 15239 treesize of output 15183 [2025-04-24 23:41:56,915 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-24 23:41:57,761 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-24 23:41:57,989 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:41:57,990 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 13819 treesize of output 13821 [2025-04-24 23:47:22,595 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:22,595 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 320 treesize of output 304 [2025-04-24 23:47:22,670 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:22,670 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 15767 treesize of output 15545 [2025-04-24 23:47:22,748 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:22,748 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11299 treesize of output 11295 [2025-04-24 23:47:22,829 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:22,830 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11287 treesize of output 11247 [2025-04-24 23:47:22,905 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:22,906 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 11239 treesize of output 11223 [2025-04-24 23:47:22,984 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:22,984 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 9672 treesize of output 9666 [2025-04-24 23:47:23,056 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-24 23:47:23,297 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-24 23:47:23,557 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:23,558 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 8030 treesize of output 8042 [2025-04-24 23:47:34,357 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:34,358 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 512 treesize of output 472 [2025-04-24 23:47:34,454 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:34,454 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 102300 treesize of output 99568 [2025-04-24 23:47:34,698 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:34,699 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 13742 treesize of output 13746 [2025-04-24 23:47:34,876 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:34,877 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 7849 treesize of output 7845 [2025-04-24 23:47:35,009 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:35,009 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 15472 treesize of output 15432 [2025-04-24 23:47:35,105 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:35,106 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 15408 treesize of output 15400 [2025-04-24 23:47:35,242 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-24 23:47:36,817 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2025-04-24 23:47:37,162 INFO L325 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2025-04-24 23:47:37,162 INFO L354 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 15533 treesize of output 15561