/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml --traceabstraction.assert.codeblocks.term.scoring.heuristic DAGSIZE --traceabstraction.assert.codeblocks.term.scoring.heuristic.partitioning.strategy FIXED_NUM_PARTITIONS --traceabstraction.assert.codeblocks.term.scoring.heuristic.number.of.partitions 4 --traceabstraction.trace.refinement.strategy CAMEL_SMT_AM -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/transmitter.02.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.25-79ed534 [2020-07-20 04:14:08,495 INFO L177 SettingsManager]: Resetting all preferences to default values... [2020-07-20 04:14:08,507 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2020-07-20 04:14:08,540 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2020-07-20 04:14:08,541 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2020-07-20 04:14:08,545 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2020-07-20 04:14:08,549 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2020-07-20 04:14:08,564 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2020-07-20 04:14:08,570 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2020-07-20 04:14:08,571 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2020-07-20 04:14:08,577 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2020-07-20 04:14:08,582 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2020-07-20 04:14:08,583 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2020-07-20 04:14:08,588 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2020-07-20 04:14:08,592 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2020-07-20 04:14:08,595 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2020-07-20 04:14:08,598 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2020-07-20 04:14:08,599 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2020-07-20 04:14:08,602 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2020-07-20 04:14:08,611 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2020-07-20 04:14:08,620 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2020-07-20 04:14:08,629 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2020-07-20 04:14:08,631 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2020-07-20 04:14:08,632 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2020-07-20 04:14:08,637 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2020-07-20 04:14:08,638 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2020-07-20 04:14:08,638 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2020-07-20 04:14:08,643 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2020-07-20 04:14:08,644 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2020-07-20 04:14:08,645 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2020-07-20 04:14:08,646 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2020-07-20 04:14:08,648 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2020-07-20 04:14:08,650 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2020-07-20 04:14:08,651 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2020-07-20 04:14:08,654 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2020-07-20 04:14:08,654 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2020-07-20 04:14:08,656 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2020-07-20 04:14:08,656 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2020-07-20 04:14:08,656 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2020-07-20 04:14:08,658 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2020-07-20 04:14:08,661 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2020-07-20 04:14:08,663 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2020-07-20 04:14:08,702 INFO L113 SettingsManager]: Loading preferences was successful [2020-07-20 04:14:08,703 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2020-07-20 04:14:08,706 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2020-07-20 04:14:08,707 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2020-07-20 04:14:08,707 INFO L138 SettingsManager]: * Use SBE=true [2020-07-20 04:14:08,707 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2020-07-20 04:14:08,708 INFO L138 SettingsManager]: * sizeof long=4 [2020-07-20 04:14:08,709 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2020-07-20 04:14:08,709 INFO L138 SettingsManager]: * sizeof POINTER=4 [2020-07-20 04:14:08,709 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2020-07-20 04:14:08,711 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2020-07-20 04:14:08,711 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2020-07-20 04:14:08,711 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2020-07-20 04:14:08,712 INFO L138 SettingsManager]: * sizeof long double=12 [2020-07-20 04:14:08,713 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2020-07-20 04:14:08,713 INFO L138 SettingsManager]: * Use constant arrays=true [2020-07-20 04:14:08,713 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2020-07-20 04:14:08,713 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2020-07-20 04:14:08,714 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2020-07-20 04:14:08,716 INFO L138 SettingsManager]: * To the following directory=./dump/ [2020-07-20 04:14:08,717 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2020-07-20 04:14:08,719 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-07-20 04:14:08,720 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2020-07-20 04:14:08,722 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2020-07-20 04:14:08,723 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2020-07-20 04:14:08,723 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2020-07-20 04:14:08,723 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2020-07-20 04:14:08,724 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2020-07-20 04:14:08,724 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2020-07-20 04:14:08,724 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Assert CodeBlocks Term Scoring Heuristic -> DAGSIZE Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Assert CodeBlocks Term Scoring Heuristic Partitioning Strategy -> FIXED_NUM_PARTITIONS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Assert CodeBlocks Term Scoring Heuristic number of partitions -> 4 Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> CAMEL_SMT_AM [2020-07-20 04:14:09,121 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2020-07-20 04:14:09,150 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2020-07-20 04:14:09,155 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2020-07-20 04:14:09,157 INFO L271 PluginConnector]: Initializing CDTParser... [2020-07-20 04:14:09,158 INFO L275 PluginConnector]: CDTParser initialized [2020-07-20 04:14:09,159 INFO L429 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/transmitter.02.cil.c [2020-07-20 04:14:09,276 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/76624694e/8402a2cc8d3247aeb5a9bba783480786/FLAGda7c2722f [2020-07-20 04:14:09,998 INFO L306 CDTParser]: Found 1 translation units. [2020-07-20 04:14:09,999 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/transmitter.02.cil.c [2020-07-20 04:14:10,016 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/76624694e/8402a2cc8d3247aeb5a9bba783480786/FLAGda7c2722f [2020-07-20 04:14:10,277 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/76624694e/8402a2cc8d3247aeb5a9bba783480786 [2020-07-20 04:14:10,294 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2020-07-20 04:14:10,300 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2020-07-20 04:14:10,306 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2020-07-20 04:14:10,307 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2020-07-20 04:14:10,312 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2020-07-20 04:14:10,314 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:10,320 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@472545e5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10, skipping insertion in model container [2020-07-20 04:14:10,321 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:10,335 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2020-07-20 04:14:10,414 INFO L178 MainTranslator]: Built tables and reachable declarations [2020-07-20 04:14:10,749 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-07-20 04:14:10,761 INFO L203 MainTranslator]: Completed pre-run [2020-07-20 04:14:10,819 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-07-20 04:14:10,985 INFO L208 MainTranslator]: Completed translation [2020-07-20 04:14:10,986 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10 WrapperNode [2020-07-20 04:14:10,986 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2020-07-20 04:14:10,988 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2020-07-20 04:14:10,988 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2020-07-20 04:14:10,989 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2020-07-20 04:14:11,008 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:11,009 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:11,021 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:11,022 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:11,034 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:11,051 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:11,055 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (1/1) ... [2020-07-20 04:14:11,060 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2020-07-20 04:14:11,061 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2020-07-20 04:14:11,062 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2020-07-20 04:14:11,062 INFO L275 PluginConnector]: RCFGBuilder initialized [2020-07-20 04:14:11,064 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-07-20 04:14:11,161 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2020-07-20 04:14:11,162 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2020-07-20 04:14:11,162 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2020-07-20 04:14:11,162 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2020-07-20 04:14:11,162 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2020-07-20 04:14:11,163 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2020-07-20 04:14:11,163 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2020-07-20 04:14:11,163 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2020-07-20 04:14:11,163 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2020-07-20 04:14:11,164 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2020-07-20 04:14:11,164 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2020-07-20 04:14:11,164 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2020-07-20 04:14:11,164 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2020-07-20 04:14:11,165 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2020-07-20 04:14:11,165 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2020-07-20 04:14:11,165 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2020-07-20 04:14:11,166 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2020-07-20 04:14:11,166 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2020-07-20 04:14:11,166 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2020-07-20 04:14:11,166 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2020-07-20 04:14:11,167 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2020-07-20 04:14:11,167 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2020-07-20 04:14:11,167 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2020-07-20 04:14:11,168 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2020-07-20 04:14:11,168 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2020-07-20 04:14:11,169 INFO L130 BoogieDeclarations]: Found specification of procedure error [2020-07-20 04:14:11,169 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2020-07-20 04:14:11,169 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2020-07-20 04:14:11,170 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2020-07-20 04:14:11,170 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2020-07-20 04:14:11,170 INFO L130 BoogieDeclarations]: Found specification of procedure master [2020-07-20 04:14:11,170 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2020-07-20 04:14:11,170 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2020-07-20 04:14:11,170 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2020-07-20 04:14:11,171 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2020-07-20 04:14:11,171 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2020-07-20 04:14:11,171 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2020-07-20 04:14:11,172 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2020-07-20 04:14:11,172 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2020-07-20 04:14:11,172 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2020-07-20 04:14:11,172 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2020-07-20 04:14:11,172 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2020-07-20 04:14:11,173 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2020-07-20 04:14:11,173 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2020-07-20 04:14:11,173 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2020-07-20 04:14:11,173 INFO L130 BoogieDeclarations]: Found specification of procedure main [2020-07-20 04:14:11,173 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2020-07-20 04:14:11,173 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2020-07-20 04:14:12,017 INFO L290 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2020-07-20 04:14:12,018 INFO L295 CfgBuilder]: Removed 6 assume(true) statements. [2020-07-20 04:14:12,028 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.07 04:14:12 BoogieIcfgContainer [2020-07-20 04:14:12,029 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2020-07-20 04:14:12,030 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2020-07-20 04:14:12,031 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2020-07-20 04:14:12,037 INFO L275 PluginConnector]: TraceAbstraction initialized [2020-07-20 04:14:12,037 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 20.07 04:14:10" (1/3) ... [2020-07-20 04:14:12,039 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@687d2102 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.07 04:14:12, skipping insertion in model container [2020-07-20 04:14:12,040 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 20.07 04:14:10" (2/3) ... [2020-07-20 04:14:12,041 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@687d2102 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 20.07 04:14:12, skipping insertion in model container [2020-07-20 04:14:12,041 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 20.07 04:14:12" (3/3) ... [2020-07-20 04:14:12,044 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.02.cil.c [2020-07-20 04:14:12,062 INFO L157 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2020-07-20 04:14:12,077 INFO L169 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2020-07-20 04:14:12,096 INFO L251 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2020-07-20 04:14:12,133 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-07-20 04:14:12,134 INFO L376 AbstractCegarLoop]: Hoare is true [2020-07-20 04:14:12,134 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-07-20 04:14:12,134 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-07-20 04:14:12,134 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-07-20 04:14:12,134 INFO L380 AbstractCegarLoop]: Difference is false [2020-07-20 04:14:12,134 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-07-20 04:14:12,135 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-07-20 04:14:12,170 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states. [2020-07-20 04:14:12,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:12,186 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:12,188 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:12,189 INFO L427 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:12,197 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:12,197 INFO L82 PathProgramCache]: Analyzing trace with hash 1996614335, now seen corresponding path program 1 times [2020-07-20 04:14:12,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:12,208 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824797342] [2020-07-20 04:14:12,209 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:12,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:12,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:13,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:13,017 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1824797342] [2020-07-20 04:14:13,019 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:13,020 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-07-20 04:14:13,021 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [792514799] [2020-07-20 04:14:13,032 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2020-07-20 04:14:13,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:13,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-07-20 04:14:13,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2020-07-20 04:14:13,059 INFO L87 Difference]: Start difference. First operand 169 states. Second operand 8 states. [2020-07-20 04:14:15,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:15,937 INFO L93 Difference]: Finished difference Result 412 states and 626 transitions. [2020-07-20 04:14:15,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-20 04:14:15,941 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 90 [2020-07-20 04:14:15,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:15,968 INFO L225 Difference]: With dead ends: 412 [2020-07-20 04:14:15,969 INFO L226 Difference]: Without dead ends: 247 [2020-07-20 04:14:15,978 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=62, Invalid=148, Unknown=0, NotChecked=0, Total=210 [2020-07-20 04:14:16,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2020-07-20 04:14:16,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 160. [2020-07-20 04:14:16,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2020-07-20 04:14:16,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 212 transitions. [2020-07-20 04:14:16,109 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 212 transitions. Word has length 90 [2020-07-20 04:14:16,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:16,110 INFO L479 AbstractCegarLoop]: Abstraction has 160 states and 212 transitions. [2020-07-20 04:14:16,110 INFO L480 AbstractCegarLoop]: Interpolant automaton has 8 states. [2020-07-20 04:14:16,110 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 212 transitions. [2020-07-20 04:14:16,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:16,117 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:16,118 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:16,118 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2020-07-20 04:14:16,119 INFO L427 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:16,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:16,120 INFO L82 PathProgramCache]: Analyzing trace with hash -387310403, now seen corresponding path program 1 times [2020-07-20 04:14:16,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:16,120 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217537453] [2020-07-20 04:14:16,121 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:16,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:16,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:16,559 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1217537453] [2020-07-20 04:14:16,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:16,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2020-07-20 04:14:16,560 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [643060195] [2020-07-20 04:14:16,563 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-07-20 04:14:16,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:16,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-07-20 04:14:16,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2020-07-20 04:14:16,565 INFO L87 Difference]: Start difference. First operand 160 states and 212 transitions. Second operand 9 states. [2020-07-20 04:14:19,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:19,681 INFO L93 Difference]: Finished difference Result 579 states and 839 transitions. [2020-07-20 04:14:19,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2020-07-20 04:14:19,683 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 90 [2020-07-20 04:14:19,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:19,705 INFO L225 Difference]: With dead ends: 579 [2020-07-20 04:14:19,705 INFO L226 Difference]: Without dead ends: 439 [2020-07-20 04:14:19,716 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2020-07-20 04:14:19,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2020-07-20 04:14:19,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 294. [2020-07-20 04:14:19,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2020-07-20 04:14:19,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 393 transitions. [2020-07-20 04:14:19,810 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 393 transitions. Word has length 90 [2020-07-20 04:14:19,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:19,811 INFO L479 AbstractCegarLoop]: Abstraction has 294 states and 393 transitions. [2020-07-20 04:14:19,811 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-07-20 04:14:19,811 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 393 transitions. [2020-07-20 04:14:19,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:19,815 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:19,815 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:19,815 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2020-07-20 04:14:19,815 INFO L427 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:19,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:19,816 INFO L82 PathProgramCache]: Analyzing trace with hash 1952833149, now seen corresponding path program 1 times [2020-07-20 04:14:19,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:19,816 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046803090] [2020-07-20 04:14:19,817 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:19,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:19,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:19,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:19,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:19,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:19,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:20,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:20,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:20,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:20,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:20,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:20,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:20,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:20,048 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046803090] [2020-07-20 04:14:20,048 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:20,048 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-20 04:14:20,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1078368857] [2020-07-20 04:14:20,050 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-20 04:14:20,050 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:20,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-20 04:14:20,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-20 04:14:20,051 INFO L87 Difference]: Start difference. First operand 294 states and 393 transitions. Second operand 10 states. [2020-07-20 04:14:21,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:21,331 INFO L93 Difference]: Finished difference Result 704 states and 993 transitions. [2020-07-20 04:14:21,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2020-07-20 04:14:21,331 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-20 04:14:21,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:21,341 INFO L225 Difference]: With dead ends: 704 [2020-07-20 04:14:21,342 INFO L226 Difference]: Without dead ends: 430 [2020-07-20 04:14:21,370 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=145, Unknown=0, NotChecked=0, Total=210 [2020-07-20 04:14:21,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2020-07-20 04:14:21,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 294. [2020-07-20 04:14:21,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2020-07-20 04:14:21,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 386 transitions. [2020-07-20 04:14:21,441 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 386 transitions. Word has length 90 [2020-07-20 04:14:21,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:21,443 INFO L479 AbstractCegarLoop]: Abstraction has 294 states and 386 transitions. [2020-07-20 04:14:21,443 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-20 04:14:21,443 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 386 transitions. [2020-07-20 04:14:21,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:21,446 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:21,447 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:21,447 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2020-07-20 04:14:21,447 INFO L427 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:21,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:21,448 INFO L82 PathProgramCache]: Analyzing trace with hash 227206333, now seen corresponding path program 1 times [2020-07-20 04:14:21,448 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:21,448 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164729752] [2020-07-20 04:14:21,449 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:21,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:21,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:21,690 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164729752] [2020-07-20 04:14:21,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:21,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-20 04:14:21,692 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318288285] [2020-07-20 04:14:21,693 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-20 04:14:21,694 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:21,694 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-20 04:14:21,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-20 04:14:21,695 INFO L87 Difference]: Start difference. First operand 294 states and 386 transitions. Second operand 10 states. [2020-07-20 04:14:23,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:23,022 INFO L93 Difference]: Finished difference Result 700 states and 971 transitions. [2020-07-20 04:14:23,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2020-07-20 04:14:23,023 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-20 04:14:23,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:23,029 INFO L225 Difference]: With dead ends: 700 [2020-07-20 04:14:23,029 INFO L226 Difference]: Without dead ends: 426 [2020-07-20 04:14:23,031 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=145, Unknown=0, NotChecked=0, Total=210 [2020-07-20 04:14:23,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2020-07-20 04:14:23,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 294. [2020-07-20 04:14:23,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2020-07-20 04:14:23,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 379 transitions. [2020-07-20 04:14:23,083 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 379 transitions. Word has length 90 [2020-07-20 04:14:23,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:23,083 INFO L479 AbstractCegarLoop]: Abstraction has 294 states and 379 transitions. [2020-07-20 04:14:23,084 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-20 04:14:23,084 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 379 transitions. [2020-07-20 04:14:23,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:23,087 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:23,087 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:23,090 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2020-07-20 04:14:23,091 INFO L427 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:23,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:23,092 INFO L82 PathProgramCache]: Analyzing trace with hash 1418466941, now seen corresponding path program 1 times [2020-07-20 04:14:23,092 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:23,092 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945253681] [2020-07-20 04:14:23,093 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:23,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:23,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:23,293 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945253681] [2020-07-20 04:14:23,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:23,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-20 04:14:23,294 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17572456] [2020-07-20 04:14:23,296 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-20 04:14:23,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:23,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-20 04:14:23,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-20 04:14:23,298 INFO L87 Difference]: Start difference. First operand 294 states and 379 transitions. Second operand 10 states. [2020-07-20 04:14:25,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:25,052 INFO L93 Difference]: Finished difference Result 855 states and 1230 transitions. [2020-07-20 04:14:25,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2020-07-20 04:14:25,053 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-20 04:14:25,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:25,058 INFO L225 Difference]: With dead ends: 855 [2020-07-20 04:14:25,058 INFO L226 Difference]: Without dead ends: 581 [2020-07-20 04:14:25,060 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=123, Invalid=297, Unknown=0, NotChecked=0, Total=420 [2020-07-20 04:14:25,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 581 states. [2020-07-20 04:14:25,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 581 to 366. [2020-07-20 04:14:25,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366 states. [2020-07-20 04:14:25,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 457 transitions. [2020-07-20 04:14:25,102 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 457 transitions. Word has length 90 [2020-07-20 04:14:25,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:25,102 INFO L479 AbstractCegarLoop]: Abstraction has 366 states and 457 transitions. [2020-07-20 04:14:25,102 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-20 04:14:25,102 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 457 transitions. [2020-07-20 04:14:25,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:25,104 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:25,104 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:25,104 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2020-07-20 04:14:25,104 INFO L427 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:25,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:25,105 INFO L82 PathProgramCache]: Analyzing trace with hash 1504622653, now seen corresponding path program 1 times [2020-07-20 04:14:25,105 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:25,105 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411611963] [2020-07-20 04:14:25,105 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:25,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:25,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:25,278 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [411611963] [2020-07-20 04:14:25,278 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:25,278 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-20 04:14:25,279 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1128174379] [2020-07-20 04:14:25,279 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-20 04:14:25,279 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:25,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-20 04:14:25,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2020-07-20 04:14:25,280 INFO L87 Difference]: Start difference. First operand 366 states and 457 transitions. Second operand 10 states. [2020-07-20 04:14:27,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:27,092 INFO L93 Difference]: Finished difference Result 877 states and 1164 transitions. [2020-07-20 04:14:27,093 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-20 04:14:27,093 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-20 04:14:27,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:27,099 INFO L225 Difference]: With dead ends: 877 [2020-07-20 04:14:27,099 INFO L226 Difference]: Without dead ends: 532 [2020-07-20 04:14:27,101 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2020-07-20 04:14:27,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 532 states. [2020-07-20 04:14:27,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 532 to 376. [2020-07-20 04:14:27,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 376 states. [2020-07-20 04:14:27,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 465 transitions. [2020-07-20 04:14:27,147 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 465 transitions. Word has length 90 [2020-07-20 04:14:27,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:27,147 INFO L479 AbstractCegarLoop]: Abstraction has 376 states and 465 transitions. [2020-07-20 04:14:27,147 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-20 04:14:27,148 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 465 transitions. [2020-07-20 04:14:27,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:27,149 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:27,149 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:27,149 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2020-07-20 04:14:27,150 INFO L427 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:27,150 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:27,150 INFO L82 PathProgramCache]: Analyzing trace with hash -523963457, now seen corresponding path program 1 times [2020-07-20 04:14:27,150 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:27,151 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850696770] [2020-07-20 04:14:27,151 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:27,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:27,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:27,355 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [850696770] [2020-07-20 04:14:27,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:27,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-20 04:14:27,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043181028] [2020-07-20 04:14:27,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-20 04:14:27,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:27,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-20 04:14:27,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2020-07-20 04:14:27,361 INFO L87 Difference]: Start difference. First operand 376 states and 465 transitions. Second operand 10 states. [2020-07-20 04:14:29,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:29,062 INFO L93 Difference]: Finished difference Result 915 states and 1208 transitions. [2020-07-20 04:14:29,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2020-07-20 04:14:29,063 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-20 04:14:29,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:29,068 INFO L225 Difference]: With dead ends: 915 [2020-07-20 04:14:29,068 INFO L226 Difference]: Without dead ends: 560 [2020-07-20 04:14:29,070 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2020-07-20 04:14:29,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 560 states. [2020-07-20 04:14:29,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 560 to 396. [2020-07-20 04:14:29,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 396 states. [2020-07-20 04:14:29,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 485 transitions. [2020-07-20 04:14:29,113 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 485 transitions. Word has length 90 [2020-07-20 04:14:29,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:29,114 INFO L479 AbstractCegarLoop]: Abstraction has 396 states and 485 transitions. [2020-07-20 04:14:29,114 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-20 04:14:29,114 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 485 transitions. [2020-07-20 04:14:29,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:29,116 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:29,116 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:29,116 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2020-07-20 04:14:29,117 INFO L427 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:29,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:29,117 INFO L82 PathProgramCache]: Analyzing trace with hash -275816963, now seen corresponding path program 1 times [2020-07-20 04:14:29,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:29,118 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [177778552] [2020-07-20 04:14:29,118 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:29,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:29,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:29,386 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [177778552] [2020-07-20 04:14:29,386 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:29,386 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-20 04:14:29,387 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [148904898] [2020-07-20 04:14:29,387 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-20 04:14:29,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:29,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-20 04:14:29,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2020-07-20 04:14:29,389 INFO L87 Difference]: Start difference. First operand 396 states and 485 transitions. Second operand 10 states. [2020-07-20 04:14:31,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:31,084 INFO L93 Difference]: Finished difference Result 939 states and 1222 transitions. [2020-07-20 04:14:31,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2020-07-20 04:14:31,084 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-20 04:14:31,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:31,091 INFO L225 Difference]: With dead ends: 939 [2020-07-20 04:14:31,091 INFO L226 Difference]: Without dead ends: 564 [2020-07-20 04:14:31,093 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2020-07-20 04:14:31,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 564 states. [2020-07-20 04:14:31,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 564 to 406. [2020-07-20 04:14:31,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2020-07-20 04:14:31,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 493 transitions. [2020-07-20 04:14:31,141 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 493 transitions. Word has length 90 [2020-07-20 04:14:31,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:31,143 INFO L479 AbstractCegarLoop]: Abstraction has 406 states and 493 transitions. [2020-07-20 04:14:31,144 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-20 04:14:31,144 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 493 transitions. [2020-07-20 04:14:31,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:31,145 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:31,145 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:31,145 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2020-07-20 04:14:31,146 INFO L427 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:31,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:31,146 INFO L82 PathProgramCache]: Analyzing trace with hash -348203521, now seen corresponding path program 1 times [2020-07-20 04:14:31,147 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:31,147 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980787583] [2020-07-20 04:14:31,147 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:31,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:31,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:31,345 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1980787583] [2020-07-20 04:14:31,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:31,346 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-20 04:14:31,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1838383976] [2020-07-20 04:14:31,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-20 04:14:31,347 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:31,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-20 04:14:31,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-20 04:14:31,347 INFO L87 Difference]: Start difference. First operand 406 states and 493 transitions. Second operand 10 states. [2020-07-20 04:14:33,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:33,111 INFO L93 Difference]: Finished difference Result 1144 states and 1493 transitions. [2020-07-20 04:14:33,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2020-07-20 04:14:33,112 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-20 04:14:33,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:33,119 INFO L225 Difference]: With dead ends: 1144 [2020-07-20 04:14:33,119 INFO L226 Difference]: Without dead ends: 758 [2020-07-20 04:14:33,122 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=161, Invalid=439, Unknown=0, NotChecked=0, Total=600 [2020-07-20 04:14:33,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 758 states. [2020-07-20 04:14:33,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 758 to 467. [2020-07-20 04:14:33,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 467 states. [2020-07-20 04:14:33,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 467 states and 547 transitions. [2020-07-20 04:14:33,170 INFO L78 Accepts]: Start accepts. Automaton has 467 states and 547 transitions. Word has length 90 [2020-07-20 04:14:33,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:33,171 INFO L479 AbstractCegarLoop]: Abstraction has 467 states and 547 transitions. [2020-07-20 04:14:33,171 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-20 04:14:33,171 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 547 transitions. [2020-07-20 04:14:33,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-20 04:14:33,172 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:33,172 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:33,173 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2020-07-20 04:14:33,173 INFO L427 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:33,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:33,173 INFO L82 PathProgramCache]: Analyzing trace with hash -286163907, now seen corresponding path program 1 times [2020-07-20 04:14:33,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:33,174 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283576957] [2020-07-20 04:14:33,174 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:33,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:33,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:33,311 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283576957] [2020-07-20 04:14:33,311 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:33,312 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-07-20 04:14:33,312 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1338972921] [2020-07-20 04:14:33,312 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2020-07-20 04:14:33,313 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:33,313 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-07-20 04:14:33,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2020-07-20 04:14:33,313 INFO L87 Difference]: Start difference. First operand 467 states and 547 transitions. Second operand 7 states. [2020-07-20 04:14:34,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:34,925 INFO L93 Difference]: Finished difference Result 1503 states and 1877 transitions. [2020-07-20 04:14:34,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-20 04:14:34,927 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 90 [2020-07-20 04:14:34,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:34,935 INFO L225 Difference]: With dead ends: 1503 [2020-07-20 04:14:34,935 INFO L226 Difference]: Without dead ends: 1058 [2020-07-20 04:14:34,937 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2020-07-20 04:14:34,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1058 states. [2020-07-20 04:14:35,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1058 to 847. [2020-07-20 04:14:35,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 847 states. [2020-07-20 04:14:35,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 847 states to 847 states and 1018 transitions. [2020-07-20 04:14:35,023 INFO L78 Accepts]: Start accepts. Automaton has 847 states and 1018 transitions. Word has length 90 [2020-07-20 04:14:35,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:35,023 INFO L479 AbstractCegarLoop]: Abstraction has 847 states and 1018 transitions. [2020-07-20 04:14:35,024 INFO L480 AbstractCegarLoop]: Interpolant automaton has 7 states. [2020-07-20 04:14:35,024 INFO L276 IsEmpty]: Start isEmpty. Operand 847 states and 1018 transitions. [2020-07-20 04:14:35,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2020-07-20 04:14:35,026 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:35,026 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:35,026 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2020-07-20 04:14:35,026 INFO L427 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:35,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:35,027 INFO L82 PathProgramCache]: Analyzing trace with hash 1417763379, now seen corresponding path program 1 times [2020-07-20 04:14:35,027 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:35,027 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [223781401] [2020-07-20 04:14:35,027 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:35,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:35,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-20 04:14:35,200 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [223781401] [2020-07-20 04:14:35,200 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:35,200 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-07-20 04:14:35,200 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1490857376] [2020-07-20 04:14:35,201 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2020-07-20 04:14:35,201 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:35,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-07-20 04:14:35,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2020-07-20 04:14:35,202 INFO L87 Difference]: Start difference. First operand 847 states and 1018 transitions. Second operand 7 states. [2020-07-20 04:14:36,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:36,813 INFO L93 Difference]: Finished difference Result 2813 states and 3701 transitions. [2020-07-20 04:14:36,814 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-20 04:14:36,814 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 91 [2020-07-20 04:14:36,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:36,829 INFO L225 Difference]: With dead ends: 2813 [2020-07-20 04:14:36,829 INFO L226 Difference]: Without dead ends: 1993 [2020-07-20 04:14:36,835 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 27 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2020-07-20 04:14:36,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1993 states. [2020-07-20 04:14:37,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1993 to 1710. [2020-07-20 04:14:37,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1710 states. [2020-07-20 04:14:37,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1710 states to 1710 states and 2141 transitions. [2020-07-20 04:14:37,070 INFO L78 Accepts]: Start accepts. Automaton has 1710 states and 2141 transitions. Word has length 91 [2020-07-20 04:14:37,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:37,070 INFO L479 AbstractCegarLoop]: Abstraction has 1710 states and 2141 transitions. [2020-07-20 04:14:37,070 INFO L480 AbstractCegarLoop]: Interpolant automaton has 7 states. [2020-07-20 04:14:37,071 INFO L276 IsEmpty]: Start isEmpty. Operand 1710 states and 2141 transitions. [2020-07-20 04:14:37,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2020-07-20 04:14:37,073 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:37,073 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:37,074 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2020-07-20 04:14:37,074 INFO L427 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:37,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:37,074 INFO L82 PathProgramCache]: Analyzing trace with hash 1387972843, now seen corresponding path program 1 times [2020-07-20 04:14:37,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:37,075 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672192894] [2020-07-20 04:14:37,076 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:37,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:37,236 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2020-07-20 04:14:37,237 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672192894] [2020-07-20 04:14:37,237 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:37,237 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2020-07-20 04:14:37,237 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [878811174] [2020-07-20 04:14:37,238 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-07-20 04:14:37,238 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:37,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-07-20 04:14:37,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2020-07-20 04:14:37,239 INFO L87 Difference]: Start difference. First operand 1710 states and 2141 transitions. Second operand 9 states. [2020-07-20 04:14:39,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:39,037 INFO L93 Difference]: Finished difference Result 3845 states and 5084 transitions. [2020-07-20 04:14:39,037 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-20 04:14:39,038 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 111 [2020-07-20 04:14:39,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:39,052 INFO L225 Difference]: With dead ends: 3845 [2020-07-20 04:14:39,052 INFO L226 Difference]: Without dead ends: 2157 [2020-07-20 04:14:39,058 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2020-07-20 04:14:39,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2157 states. [2020-07-20 04:14:39,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2157 to 1767. [2020-07-20 04:14:39,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1767 states. [2020-07-20 04:14:39,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1767 states to 1767 states and 2232 transitions. [2020-07-20 04:14:39,271 INFO L78 Accepts]: Start accepts. Automaton has 1767 states and 2232 transitions. Word has length 111 [2020-07-20 04:14:39,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:39,271 INFO L479 AbstractCegarLoop]: Abstraction has 1767 states and 2232 transitions. [2020-07-20 04:14:39,271 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-07-20 04:14:39,271 INFO L276 IsEmpty]: Start isEmpty. Operand 1767 states and 2232 transitions. [2020-07-20 04:14:39,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2020-07-20 04:14:39,273 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:39,274 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:39,274 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2020-07-20 04:14:39,275 INFO L427 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:39,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:39,275 INFO L82 PathProgramCache]: Analyzing trace with hash 36587625, now seen corresponding path program 1 times [2020-07-20 04:14:39,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:39,276 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091997729] [2020-07-20 04:14:39,276 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:39,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:39,431 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2020-07-20 04:14:39,431 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091997729] [2020-07-20 04:14:39,432 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:39,432 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-07-20 04:14:39,432 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634932802] [2020-07-20 04:14:39,433 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2020-07-20 04:14:39,434 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:39,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-07-20 04:14:39,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2020-07-20 04:14:39,435 INFO L87 Difference]: Start difference. First operand 1767 states and 2232 transitions. Second operand 8 states. [2020-07-20 04:14:41,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:41,516 INFO L93 Difference]: Finished difference Result 5835 states and 7942 transitions. [2020-07-20 04:14:41,516 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2020-07-20 04:14:41,517 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2020-07-20 04:14:41,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:41,540 INFO L225 Difference]: With dead ends: 5835 [2020-07-20 04:14:41,541 INFO L226 Difference]: Without dead ends: 3120 [2020-07-20 04:14:41,555 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=236, Unknown=0, NotChecked=0, Total=342 [2020-07-20 04:14:41,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3120 states. [2020-07-20 04:14:42,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3120 to 2788. [2020-07-20 04:14:42,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2788 states. [2020-07-20 04:14:42,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2788 states to 2788 states and 3646 transitions. [2020-07-20 04:14:42,080 INFO L78 Accepts]: Start accepts. Automaton has 2788 states and 3646 transitions. Word has length 111 [2020-07-20 04:14:42,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:42,081 INFO L479 AbstractCegarLoop]: Abstraction has 2788 states and 3646 transitions. [2020-07-20 04:14:42,081 INFO L480 AbstractCegarLoop]: Interpolant automaton has 8 states. [2020-07-20 04:14:42,081 INFO L276 IsEmpty]: Start isEmpty. Operand 2788 states and 3646 transitions. [2020-07-20 04:14:42,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2020-07-20 04:14:42,087 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:42,088 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:42,088 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2020-07-20 04:14:42,088 INFO L427 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:42,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:42,089 INFO L82 PathProgramCache]: Analyzing trace with hash -1178118941, now seen corresponding path program 1 times [2020-07-20 04:14:42,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:42,093 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40022620] [2020-07-20 04:14:42,093 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:42,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:42,318 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2020-07-20 04:14:42,319 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [40022620] [2020-07-20 04:14:42,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:42,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2020-07-20 04:14:42,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375972375] [2020-07-20 04:14:42,320 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-07-20 04:14:42,321 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:42,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-07-20 04:14:42,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2020-07-20 04:14:42,321 INFO L87 Difference]: Start difference. First operand 2788 states and 3646 transitions. Second operand 9 states. [2020-07-20 04:14:45,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:45,029 INFO L93 Difference]: Finished difference Result 8089 states and 11637 transitions. [2020-07-20 04:14:45,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2020-07-20 04:14:45,030 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 155 [2020-07-20 04:14:45,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:45,077 INFO L225 Difference]: With dead ends: 8089 [2020-07-20 04:14:45,077 INFO L226 Difference]: Without dead ends: 5323 [2020-07-20 04:14:45,107 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=125, Invalid=295, Unknown=0, NotChecked=0, Total=420 [2020-07-20 04:14:45,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5323 states. [2020-07-20 04:14:46,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5323 to 4852. [2020-07-20 04:14:46,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4852 states. [2020-07-20 04:14:46,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4852 states to 4852 states and 6633 transitions. [2020-07-20 04:14:46,120 INFO L78 Accepts]: Start accepts. Automaton has 4852 states and 6633 transitions. Word has length 155 [2020-07-20 04:14:46,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:46,121 INFO L479 AbstractCegarLoop]: Abstraction has 4852 states and 6633 transitions. [2020-07-20 04:14:46,121 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-07-20 04:14:46,122 INFO L276 IsEmpty]: Start isEmpty. Operand 4852 states and 6633 transitions. [2020-07-20 04:14:46,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2020-07-20 04:14:46,131 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:46,131 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:46,131 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2020-07-20 04:14:46,132 INFO L427 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:46,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:46,132 INFO L82 PathProgramCache]: Analyzing trace with hash -390866386, now seen corresponding path program 1 times [2020-07-20 04:14:46,133 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:46,133 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [109892118] [2020-07-20 04:14:46,133 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:46,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:46,487 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2020-07-20 04:14:46,488 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [109892118] [2020-07-20 04:14:46,488 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:46,488 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-20 04:14:46,488 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891090981] [2020-07-20 04:14:46,489 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-20 04:14:46,490 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:46,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-20 04:14:46,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-20 04:14:46,491 INFO L87 Difference]: Start difference. First operand 4852 states and 6633 transitions. Second operand 10 states. [2020-07-20 04:14:50,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:50,552 INFO L93 Difference]: Finished difference Result 12975 states and 19533 transitions. [2020-07-20 04:14:50,553 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-07-20 04:14:50,553 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 156 [2020-07-20 04:14:50,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:50,631 INFO L225 Difference]: With dead ends: 12975 [2020-07-20 04:14:50,631 INFO L226 Difference]: Without dead ends: 6726 [2020-07-20 04:14:50,691 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=137, Invalid=415, Unknown=0, NotChecked=0, Total=552 [2020-07-20 04:14:50,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6726 states. [2020-07-20 04:14:51,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6726 to 6174. [2020-07-20 04:14:51,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6174 states. [2020-07-20 04:14:51,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6174 states to 6174 states and 8297 transitions. [2020-07-20 04:14:51,656 INFO L78 Accepts]: Start accepts. Automaton has 6174 states and 8297 transitions. Word has length 156 [2020-07-20 04:14:51,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:51,657 INFO L479 AbstractCegarLoop]: Abstraction has 6174 states and 8297 transitions. [2020-07-20 04:14:51,657 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-20 04:14:51,657 INFO L276 IsEmpty]: Start isEmpty. Operand 6174 states and 8297 transitions. [2020-07-20 04:14:51,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2020-07-20 04:14:51,667 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:51,668 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:51,668 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2020-07-20 04:14:51,668 INFO L427 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:51,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:51,668 INFO L82 PathProgramCache]: Analyzing trace with hash -1382123670, now seen corresponding path program 1 times [2020-07-20 04:14:51,669 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:51,669 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [629883890] [2020-07-20 04:14:51,669 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:51,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-20 04:14:51,965 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2020-07-20 04:14:51,965 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [629883890] [2020-07-20 04:14:51,966 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-20 04:14:51,966 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2020-07-20 04:14:51,966 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [236011419] [2020-07-20 04:14:51,967 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-07-20 04:14:51,967 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_SMT_AM [2020-07-20 04:14:51,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-07-20 04:14:51,968 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2020-07-20 04:14:51,968 INFO L87 Difference]: Start difference. First operand 6174 states and 8297 transitions. Second operand 11 states. [2020-07-20 04:14:54,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-20 04:14:54,730 INFO L93 Difference]: Finished difference Result 12270 states and 16979 transitions. [2020-07-20 04:14:54,731 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2020-07-20 04:14:54,731 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 207 [2020-07-20 04:14:54,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-20 04:14:54,751 INFO L225 Difference]: With dead ends: 12270 [2020-07-20 04:14:54,751 INFO L226 Difference]: Without dead ends: 3143 [2020-07-20 04:14:54,783 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 125 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=158, Invalid=492, Unknown=0, NotChecked=0, Total=650 [2020-07-20 04:14:54,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3143 states. [2020-07-20 04:14:55,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3143 to 2950. [2020-07-20 04:14:55,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2950 states. [2020-07-20 04:14:55,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2950 states to 2950 states and 3443 transitions. [2020-07-20 04:14:55,233 INFO L78 Accepts]: Start accepts. Automaton has 2950 states and 3443 transitions. Word has length 207 [2020-07-20 04:14:55,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-20 04:14:55,234 INFO L479 AbstractCegarLoop]: Abstraction has 2950 states and 3443 transitions. [2020-07-20 04:14:55,234 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-07-20 04:14:55,234 INFO L276 IsEmpty]: Start isEmpty. Operand 2950 states and 3443 transitions. [2020-07-20 04:14:55,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2020-07-20 04:14:55,240 INFO L414 BasicCegarLoop]: Found error trace [2020-07-20 04:14:55,240 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-20 04:14:55,240 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2020-07-20 04:14:55,241 INFO L427 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-20 04:14:55,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-20 04:14:55,241 INFO L82 PathProgramCache]: Analyzing trace with hash 89354437, now seen corresponding path program 1 times [2020-07-20 04:14:55,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL_SMT_AM [2020-07-20 04:14:55,242 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [702205454] [2020-07-20 04:14:55,242 INFO L95 rtionOrderModulation]: Keeping assertion order de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.tracecheck.ITraceCheckPreferences$AssertCodeBlockOrder@64c4a593 [2020-07-20 04:14:55,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-20 04:14:55,270 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-20 04:14:55,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-20 04:14:55,307 INFO L221 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2020-07-20 04:14:55,411 INFO L174 FreeRefinementEngine]: Strategy CAMEL_SMT_AM found a feasible trace [2020-07-20 04:14:55,411 INFO L520 BasicCegarLoop]: Counterexample might be feasible [2020-07-20 04:14:55,412 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2020-07-20 04:14:55,599 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 20.07 04:14:55 BoogieIcfgContainer [2020-07-20 04:14:55,599 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2020-07-20 04:14:55,603 INFO L168 Benchmark]: Toolchain (without parser) took 45304.09 ms. Allocated memory was 145.8 MB in the beginning and 785.9 MB in the end (delta: 640.2 MB). Free memory was 103.4 MB in the beginning and 513.7 MB in the end (delta: -410.3 MB). Peak memory consumption was 229.9 MB. Max. memory is 7.1 GB. [2020-07-20 04:14:55,603 INFO L168 Benchmark]: CDTParser took 0.42 ms. Allocated memory is still 145.8 MB. Free memory was 122.0 MB in the beginning and 121.8 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2020-07-20 04:14:55,604 INFO L168 Benchmark]: CACSL2BoogieTranslator took 680.86 ms. Allocated memory was 145.8 MB in the beginning and 203.9 MB in the end (delta: 58.2 MB). Free memory was 103.0 MB in the beginning and 182.5 MB in the end (delta: -79.5 MB). Peak memory consumption was 23.8 MB. Max. memory is 7.1 GB. [2020-07-20 04:14:55,605 INFO L168 Benchmark]: Boogie Preprocessor took 72.51 ms. Allocated memory is still 203.9 MB. Free memory was 182.5 MB in the beginning and 180.1 MB in the end (delta: 2.4 MB). Peak memory consumption was 2.4 MB. Max. memory is 7.1 GB. [2020-07-20 04:14:55,606 INFO L168 Benchmark]: RCFGBuilder took 967.57 ms. Allocated memory is still 203.9 MB. Free memory was 179.4 MB in the beginning and 144.2 MB in the end (delta: 35.2 MB). Peak memory consumption was 35.2 MB. Max. memory is 7.1 GB. [2020-07-20 04:14:55,606 INFO L168 Benchmark]: TraceAbstraction took 43568.82 ms. Allocated memory was 203.9 MB in the beginning and 785.9 MB in the end (delta: 582.0 MB). Free memory was 143.5 MB in the beginning and 513.7 MB in the end (delta: -370.2 MB). Peak memory consumption was 211.8 MB. Max. memory is 7.1 GB. [2020-07-20 04:14:55,610 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.42 ms. Allocated memory is still 145.8 MB. Free memory was 122.0 MB in the beginning and 121.8 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 680.86 ms. Allocated memory was 145.8 MB in the beginning and 203.9 MB in the end (delta: 58.2 MB). Free memory was 103.0 MB in the beginning and 182.5 MB in the end (delta: -79.5 MB). Peak memory consumption was 23.8 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 72.51 ms. Allocated memory is still 203.9 MB. Free memory was 182.5 MB in the beginning and 180.1 MB in the end (delta: 2.4 MB). Peak memory consumption was 2.4 MB. Max. memory is 7.1 GB. * RCFGBuilder took 967.57 ms. Allocated memory is still 203.9 MB. Free memory was 179.4 MB in the beginning and 144.2 MB in the end (delta: 35.2 MB). Peak memory consumption was 35.2 MB. Max. memory is 7.1 GB. * TraceAbstraction took 43568.82 ms. Allocated memory was 203.9 MB in the beginning and 785.9 MB in the end (delta: 582.0 MB). Free memory was 143.5 MB in the beginning and 513.7 MB in the end (delta: -370.2 MB). Peak memory consumption was 211.8 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int t2_i ; [L24] int M_E = 2; [L25] int T1_E = 2; [L26] int T2_E = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; VAL [\old(E_1)=17, \old(E_2)=6, \old(M_E)=14, \old(m_i)=8, \old(m_pc)=12, \old(m_st)=13, \old(T1_E)=4, \old(t1_i)=16, \old(t1_pc)=9, \old(t1_st)=5, \old(T2_E)=15, \old(t2_i)=7, \old(t2_pc)=10, \old(t2_st)=11, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L563] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L567] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L477] m_i = 1 [L478] t1_i = 1 [L479] t2_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L567] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L568] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L504] int kernel_st ; [L505] int tmp ; [L506] int tmp___0 ; [L510] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L511] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L512] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L211] COND TRUE m_i == 1 [L212] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L216] COND TRUE t1_i == 1 [L217] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L221] COND TRUE t2_i == 1 [L222] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L512] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L513] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L324] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L329] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L334] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L339] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L344] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L513] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L514] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L146] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L165] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L175] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L184] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L194] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0, tmp___1=0] [L514] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L515] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L357] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L362] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L367] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L372] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L377] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L515] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L518] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L521] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L522] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L257] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L261] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L231] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L252] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1] [L291] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L78] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L89] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L291] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L305] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L113] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L124] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L126] t2_pc = 1 [L127] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L305] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L261] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L264] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L231] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L252] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L264] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND TRUE \read(tmp_ndt_1) [L276] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=-1, tmp_ndt_3=1] [L277] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L37] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L48] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L51] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L52] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L425] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND TRUE E_1 == 1 [L167] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=1, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND TRUE \read(tmp___0) [L404] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L194] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1, tmp___1=0] [L425] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L52] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L53] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L56] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L58] m_pc = 1 [L59] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L277] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=-1, tmp_ndt_3=1] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=3, tmp_ndt_3=1] [L291] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L78] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L81] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L97] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L98] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L425] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L147] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L175] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=0] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND TRUE E_2 == 1 [L186] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=1, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND TRUE \read(tmp___1) [L412] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, tmp=0, tmp___0=0, tmp___1=1] [L425] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L98] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L99] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L89] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L291] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=3, tmp_ndt_3=1] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=3, tmp_ndt_3=1] [L305] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L113] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L116] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L132] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 23 procedures, 169 locations, 1 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 43.2s, OverallIterations: 17, TraceHistogramMax: 3, AutomataDifference: 34.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 2605 SDtfs, 11531 SDslu, 735 SDs, 0 SdLazy, 15845 SolverSat, 5831 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 20.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 756 GetRequests, 486 SyntacticMatches, 2 SemanticMatches, 268 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 797 ImplicationChecksByTransitivity, 5.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6174occurred in iteration=15, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 4.0s AutomataMinimizationTime, 16 MinimizatonAttempts, 3916 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.4s InterpolantComputationTime, 1939 NumberOfCodeBlocks, 1939 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 1715 ConstructedInterpolants, 0 QuantifiedInterpolants, 487945 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 237/237 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...