java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerBplInlineTransformed.xml --icfgtransformation.transformationtype MAP_ELIMINATION_MONNIAUX --rcfgbuilder.size.of.a.code.block SingleStatement -i ../../../trunk/examples/programs/real-life/GuiTestExample.bpl


--------------------------------------------------------------------------------


This is Ultimate 0.1.24-1c58c86
[2019-05-15 10:43:01,349 INFO  L170        SettingsManager]: Resetting all preferences to default values...
[2019-05-15 10:43:01,354 INFO  L174        SettingsManager]: Resetting UltimateCore preferences to default values
[2019-05-15 10:43:01,370 INFO  L177        SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2019-05-15 10:43:01,371 INFO  L174        SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2019-05-15 10:43:01,372 INFO  L174        SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2019-05-15 10:43:01,374 INFO  L174        SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2019-05-15 10:43:01,375 INFO  L174        SettingsManager]: Resetting LassoRanker preferences to default values
[2019-05-15 10:43:01,377 INFO  L174        SettingsManager]: Resetting Reaching Definitions preferences to default values
[2019-05-15 10:43:01,378 INFO  L174        SettingsManager]: Resetting SyntaxChecker preferences to default values
[2019-05-15 10:43:01,379 INFO  L177        SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2019-05-15 10:43:01,380 INFO  L174        SettingsManager]: Resetting LTL2Aut preferences to default values
[2019-05-15 10:43:01,381 INFO  L174        SettingsManager]: Resetting PEA to Boogie preferences to default values
[2019-05-15 10:43:01,382 INFO  L174        SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2019-05-15 10:43:01,383 INFO  L174        SettingsManager]: Resetting ChcToBoogie preferences to default values
[2019-05-15 10:43:01,384 INFO  L174        SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2019-05-15 10:43:01,385 INFO  L174        SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2019-05-15 10:43:01,387 INFO  L174        SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2019-05-15 10:43:01,389 INFO  L174        SettingsManager]: Resetting CodeCheck preferences to default values
[2019-05-15 10:43:01,391 INFO  L174        SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2019-05-15 10:43:01,392 INFO  L174        SettingsManager]: Resetting RCFGBuilder preferences to default values
[2019-05-15 10:43:01,395 INFO  L174        SettingsManager]: Resetting TraceAbstraction preferences to default values
[2019-05-15 10:43:01,398 INFO  L177        SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2019-05-15 10:43:01,399 INFO  L177        SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2019-05-15 10:43:01,399 INFO  L174        SettingsManager]: Resetting TreeAutomizer preferences to default values
[2019-05-15 10:43:01,403 INFO  L174        SettingsManager]: Resetting IcfgToChc preferences to default values
[2019-05-15 10:43:01,404 INFO  L174        SettingsManager]: Resetting IcfgTransformer preferences to default values
[2019-05-15 10:43:01,405 INFO  L177        SettingsManager]: ReqToTest provides no preferences, ignoring...
[2019-05-15 10:43:01,405 INFO  L174        SettingsManager]: Resetting Boogie Printer preferences to default values
[2019-05-15 10:43:01,409 INFO  L174        SettingsManager]: Resetting ChcSmtPrinter preferences to default values
[2019-05-15 10:43:01,410 INFO  L174        SettingsManager]: Resetting ReqPrinter preferences to default values
[2019-05-15 10:43:01,413 INFO  L174        SettingsManager]: Resetting Witness Printer preferences to default values
[2019-05-15 10:43:01,414 INFO  L177        SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2019-05-15 10:43:01,414 INFO  L174        SettingsManager]: Resetting CDTParser preferences to default values
[2019-05-15 10:43:01,415 INFO  L177        SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2019-05-15 10:43:01,415 INFO  L177        SettingsManager]: ReqParser provides no preferences, ignoring...
[2019-05-15 10:43:01,415 INFO  L174        SettingsManager]: Resetting SmtParser preferences to default values
[2019-05-15 10:43:01,416 INFO  L174        SettingsManager]: Resetting Witness Parser preferences to default values
[2019-05-15 10:43:01,419 INFO  L181        SettingsManager]: Finished resetting all preferences to default values...
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation: TransformationType -> MAP_ELIMINATION_MONNIAUX
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder: Size of a code block -> SingleStatement
[2019-05-15 10:43:01,457 INFO  L81    nceAwareModelManager]: Repository-Root is: /tmp
[2019-05-15 10:43:01,469 INFO  L259   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2019-05-15 10:43:01,473 INFO  L215   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2019-05-15 10:43:01,474 INFO  L271        PluginConnector]: Initializing Boogie PL CUP Parser...
[2019-05-15 10:43:01,475 INFO  L275        PluginConnector]: Boogie PL CUP Parser initialized
[2019-05-15 10:43:01,476 INFO  L430   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl
[2019-05-15 10:43:01,476 INFO  L110           BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl'
[2019-05-15 10:43:01,566 INFO  L297   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2019-05-15 10:43:01,568 INFO  L131        ToolchainWalker]: Walking toolchain with 5 elements.
[2019-05-15 10:43:01,568 INFO  L113        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2019-05-15 10:43:01,569 INFO  L271        PluginConnector]: Initializing Boogie Procedure Inliner...
[2019-05-15 10:43:01,569 INFO  L275        PluginConnector]: Boogie Procedure Inliner initialized
[2019-05-15 10:43:01,586 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,604 INFO  L185        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,613 WARN  L165                Inliner]: Program contained no entry procedure!
[2019-05-15 10:43:01,613 WARN  L168                Inliner]: Missing entry procedures: [ULTIMATE.start]
[2019-05-15 10:43:01,613 WARN  L175                Inliner]: Fallback enabled. All procedures will be processed.
[2019-05-15 10:43:01,663 INFO  L132        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2019-05-15 10:43:01,664 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2019-05-15 10:43:01,665 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2019-05-15 10:43:01,665 INFO  L275        PluginConnector]: Boogie Preprocessor initialized
[2019-05-15 10:43:01,677 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,677 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,686 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,687 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,709 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,717 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,721 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
[2019-05-15 10:43:01,738 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2019-05-15 10:43:01,739 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2019-05-15 10:43:01,739 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2019-05-15 10:43:01,740 INFO  L275        PluginConnector]: RCFGBuilder initialized
[2019-05-15 10:43:01,742 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/1) ...
No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2019-05-15 10:43:01,820 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration
[2019-05-15 10:43:01,821 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885
[2019-05-15 10:43:01,821 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885
[2019-05-15 10:43:01,821 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration
[2019-05-15 10:43:01,821 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553
[2019-05-15 10:43:01,822 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553
[2019-05-15 10:43:01,822 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration
[2019-05-15 10:43:01,822 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886
[2019-05-15 10:43:01,822 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886
[2019-05-15 10:43:01,823 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration
[2019-05-15 10:43:01,823 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805
[2019-05-15 10:43:01,823 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805
[2019-05-15 10:43:01,824 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration
[2019-05-15 10:43:01,824 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802
[2019-05-15 10:43:01,824 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802
[2019-05-15 10:43:01,824 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940
[2019-05-15 10:43:01,824 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827
[2019-05-15 10:43:01,825 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration
[2019-05-15 10:43:01,825 INFO  L130     BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806
[2019-05-15 10:43:01,825 INFO  L138     BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806
[2019-05-15 10:43:01,826 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration
[2019-05-15 10:43:01,826 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552
[2019-05-15 10:43:01,826 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552
[2019-05-15 10:43:01,826 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858
[2019-05-15 10:43:01,827 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration
[2019-05-15 10:43:01,827 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246
[2019-05-15 10:43:01,827 INFO  L138     BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246
[2019-05-15 10:43:01,827 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration
[2019-05-15 10:43:01,828 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809
[2019-05-15 10:43:01,828 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809
[2019-05-15 10:43:01,828 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration
[2019-05-15 10:43:01,828 INFO  L130     BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808
[2019-05-15 10:43:01,829 INFO  L138     BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808
[2019-05-15 10:43:01,829 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816
[2019-05-15 10:43:01,829 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123
[2019-05-15 10:43:01,829 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913
[2019-05-15 10:43:01,830 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration
[2019-05-15 10:43:01,830 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887
[2019-05-15 10:43:01,830 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887
[2019-05-15 10:43:01,830 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration
[2019-05-15 10:43:01,831 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888
[2019-05-15 10:43:01,831 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888
[2019-05-15 10:43:01,831 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131
[2019-05-15 10:43:01,831 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918
[2019-05-15 10:43:01,831 INFO  L130     BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305
[2019-05-15 10:43:01,832 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909
[2019-05-15 10:43:01,832 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255
[2019-05-15 10:43:01,832 INFO  L130     BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304
[2019-05-15 10:43:01,832 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852
[2019-05-15 10:43:01,832 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration
[2019-05-15 10:43:01,833 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807
[2019-05-15 10:43:01,833 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807
[2019-05-15 10:43:01,833 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889
[2019-05-15 10:43:01,833 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration
[2019-05-15 10:43:01,834 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803
[2019-05-15 10:43:01,834 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803
[2019-05-15 10:43:01,834 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration
[2019-05-15 10:43:01,834 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804
[2019-05-15 10:43:01,835 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804
[2019-05-15 10:43:01,835 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558
[2019-05-15 10:43:01,835 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration
[2019-05-15 10:43:01,835 INFO  L130     BoogieDeclarations]: Found specification of procedure $EFG_Procedure
[2019-05-15 10:43:01,835 INFO  L138     BoogieDeclarations]: Found implementation of procedure $EFG_Procedure
[2019-05-15 10:43:01,836 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075
[2019-05-15 10:43:01,836 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38
[2019-05-15 10:43:02,264 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:02,380 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:02,537 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:02,713 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:03,445 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:03,457 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:03,470 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:03,475 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:03,489 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:03,507 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:03,656 WARN  L731   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-05-15 10:43:04,861 INFO  L275             CfgBuilder]: Using library mode
[2019-05-15 10:43:04,862 INFO  L283             CfgBuilder]: Removed 44 assume(true) statements.
[2019-05-15 10:43:04,863 INFO  L202        PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.05 10:43:04 BoogieIcfgContainer
[2019-05-15 10:43:04,863 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2019-05-15 10:43:04,864 INFO  L113        PluginConnector]: ------------------------IcfgTransformer----------------------------
[2019-05-15 10:43:04,864 INFO  L271        PluginConnector]: Initializing IcfgTransformer...
[2019-05-15 10:43:04,865 INFO  L275        PluginConnector]: IcfgTransformer initialized
[2019-05-15 10:43:04,868 INFO  L185        PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.05 10:43:04" (1/1) ...
[2019-05-15 10:43:05,447 INFO  L202        PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.05 10:43:05 BasicIcfg
[2019-05-15 10:43:05,448 INFO  L132        PluginConnector]: ------------------------ END IcfgTransformer----------------------------
[2019-05-15 10:43:05,449 INFO  L113        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2019-05-15 10:43:05,449 INFO  L271        PluginConnector]: Initializing TraceAbstraction...
[2019-05-15 10:43:05,452 INFO  L275        PluginConnector]: TraceAbstraction initialized
[2019-05-15 10:43:05,454 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.05 10:43:01" (1/3) ...
[2019-05-15 10:43:05,456 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61d2e18b and model type GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.05 10:43:05, skipping insertion in model container
[2019-05-15 10:43:05,456 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.05 10:43:04" (2/3) ...
[2019-05-15 10:43:05,457 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@61d2e18b and model type GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.05 10:43:05, skipping insertion in model container
[2019-05-15 10:43:05,457 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 15.05 10:43:05" (3/3) ...
[2019-05-15 10:43:05,458 INFO  L109   eAbstractionObserver]: Analyzing ICFG GuiTestExample.bplME
[2019-05-15 10:43:05,467 INFO  L152   ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION
[2019-05-15 10:43:05,476 INFO  L164   ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations.
[2019-05-15 10:43:05,491 INFO  L252      AbstractCegarLoop]: Starting to check reachability of 87 error locations.
[2019-05-15 10:43:05,515 INFO  L127   ementStrategyFactory]: Using default assertion order modulation
[2019-05-15 10:43:05,516 INFO  L377      AbstractCegarLoop]: Interprodecural is true
[2019-05-15 10:43:05,516 INFO  L378      AbstractCegarLoop]: Hoare is false
[2019-05-15 10:43:05,517 INFO  L379      AbstractCegarLoop]: Compute interpolants for ForwardPredicates
[2019-05-15 10:43:05,517 INFO  L380      AbstractCegarLoop]: Backedges is STRAIGHT_LINE
[2019-05-15 10:43:05,517 INFO  L381      AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2019-05-15 10:43:05,517 INFO  L382      AbstractCegarLoop]: Difference is false
[2019-05-15 10:43:05,517 INFO  L383      AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2019-05-15 10:43:05,517 INFO  L388      AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2019-05-15 10:43:05,555 INFO  L276                IsEmpty]: Start isEmpty. Operand 645 states.
[2019-05-15 10:43:05,564 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-05-15 10:43:05,565 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:05,566 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-05-15 10:43:05,571 INFO  L418      AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:05,577 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:05,578 INFO  L82        PathProgramCache]: Analyzing trace with hash 767125, now seen corresponding path program 1 times
[2019-05-15 10:43:05,627 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:05,651 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:05,655 WARN  L254         TraceCheckSpWp]: Trace formula consists of 5 conjuncts, 3 conjunts are in the unsatisfiable core
[2019-05-15 10:43:05,670 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:05,674 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:05,844 INFO  L273        TraceCheckUtils]: 0: Hoare triple {648#true} [742] void$SimpleFrame2Cons$1$$la$init$ra$$1802ENTRY-->$Ultimate##0: Formula: (not (= v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_1 $null))  InVars {void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_1}  OutVars{void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_1}  AuxVars[]  AssignedVars[] {653#(not (= $null void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} is VALID
[2019-05-15 10:43:05,846 INFO  L273        TraceCheckUtils]: 1: Hoare triple {653#(not (= $null void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} [758] $Ultimate##0-->L434: Formula: (= v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_1 v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_2)  InVars {void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_2}  OutVars{void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01=v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_1, void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01] {657#(not (= void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01 $null))} is VALID
[2019-05-15 10:43:05,847 INFO  L273        TraceCheckUtils]: 2: Hoare triple {657#(not (= void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01 $null))} [774] L434-->void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT: Formula: (= v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_2 $null)  InVars {void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01=v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_2}  OutVars{void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01=v_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_2}  AuxVars[]  AssignedVars[] {649#false} is VALID
[2019-05-15 10:43:05,850 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:05,853 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:05,853 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-05-15 10:43:05,859 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-05-15 10:43:05,861 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:05,864 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states.
[2019-05-15 10:43:05,891 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 3 edges. 3 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:05,892 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-05-15 10:43:05,903 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-05-15 10:43:05,904 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-05-15 10:43:05,908 INFO  L87              Difference]: Start difference. First operand 645 states. Second operand 4 states.
[2019-05-15 10:43:08,110 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:08,110 INFO  L93              Difference]: Finished difference Result 640 states and 642 transitions.
[2019-05-15 10:43:08,111 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-05-15 10:43:08,111 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-05-15 10:43:08,111 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:08,112 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:08,126 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 647 transitions.
[2019-05-15 10:43:08,126 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:08,136 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 647 transitions.
[2019-05-15 10:43:08,136 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 647 transitions.
[2019-05-15 10:43:09,024 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 647 edges. 647 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:09,097 INFO  L225             Difference]: With dead ends: 640
[2019-05-15 10:43:09,097 INFO  L226             Difference]: Without dead ends: 558
[2019-05-15 10:43:09,099 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:09,122 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 558 states.
[2019-05-15 10:43:09,180 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 558 to 558.
[2019-05-15 10:43:09,181 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:09,182 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 558 states. Second operand 558 states.
[2019-05-15 10:43:09,182 INFO  L74              IsIncluded]: Start isIncluded. First operand 558 states. Second operand 558 states.
[2019-05-15 10:43:09,182 INFO  L87              Difference]: Start difference. First operand 558 states. Second operand 558 states.
[2019-05-15 10:43:09,182 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:09,276 INFO  L93              Difference]: Finished difference Result 558 states and 564 transitions.
[2019-05-15 10:43:09,277 INFO  L276                IsEmpty]: Start isEmpty. Operand 558 states and 564 transitions.
[2019-05-15 10:43:09,282 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:09,282 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:09,282 INFO  L74              IsIncluded]: Start isIncluded. First operand 558 states. Second operand 558 states.
[2019-05-15 10:43:09,283 INFO  L87              Difference]: Start difference. First operand 558 states. Second operand 558 states.
[2019-05-15 10:43:09,283 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:09,314 INFO  L93              Difference]: Finished difference Result 558 states and 564 transitions.
[2019-05-15 10:43:09,314 INFO  L276                IsEmpty]: Start isEmpty. Operand 558 states and 564 transitions.
[2019-05-15 10:43:09,318 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:09,318 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:09,318 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:09,319 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:09,319 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 558 states.
[2019-05-15 10:43:09,345 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 558 states to 558 states and 564 transitions.
[2019-05-15 10:43:09,346 INFO  L78                 Accepts]: Start accepts. Automaton has 558 states and 564 transitions. Word has length 3
[2019-05-15 10:43:09,347 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:09,347 INFO  L475      AbstractCegarLoop]: Abstraction has 558 states and 564 transitions.
[2019-05-15 10:43:09,347 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-05-15 10:43:09,347 INFO  L276                IsEmpty]: Start isEmpty. Operand 558 states and 564 transitions.
[2019-05-15 10:43:09,348 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2019-05-15 10:43:09,348 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:09,348 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2019-05-15 10:43:09,351 INFO  L418      AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:09,351 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:09,351 INFO  L82        PathProgramCache]: Analyzing trace with hash 23874049, now seen corresponding path program 1 times
[2019-05-15 10:43:09,353 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:09,355 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:09,355 WARN  L254         TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 3 conjunts are in the unsatisfiable core
[2019-05-15 10:43:09,367 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:09,367 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:09,404 INFO  L273        TraceCheckUtils]: 0: Hoare triple {4078#true} [745] void$SimpleFrame2Cons$main$1804ENTRY-->L450: Formula: (= v_void$SimpleFrame2Cons$main$1804_r09_1 v_void$SimpleFrame2Cons$main$1804_$param_0_1)  InVars {void$SimpleFrame2Cons$main$1804_$param_0=v_void$SimpleFrame2Cons$main$1804_$param_0_1}  OutVars{void$SimpleFrame2Cons$main$1804_r09=v_void$SimpleFrame2Cons$main$1804_r09_1, void$SimpleFrame2Cons$main$1804_$param_0=v_void$SimpleFrame2Cons$main$1804_$param_0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_r09] {4078#true} is VALID
[2019-05-15 10:43:09,406 INFO  L273        TraceCheckUtils]: 1: Hoare triple {4078#true} [761] L450-->L451: Formula: (= v_void$SimpleFrame2Cons$main$1804_$r110_2 v_$fresh2_1)  InVars {$fresh2=v_$fresh2_1}  OutVars{void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_2, $fresh2=v_$fresh2_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_$r110] {4086#(= void$SimpleFrame2Cons$main$1804_$r110 $fresh2)} is VALID
[2019-05-15 10:43:09,408 INFO  L273        TraceCheckUtils]: 2: Hoare triple {4086#(= void$SimpleFrame2Cons$main$1804_$r110 $fresh2)} [778] L451-->L452: Formula: (not (= v_$fresh2_2 $null))  InVars {$fresh2=v_$fresh2_2}  OutVars{$fresh2=v_$fresh2_2}  AuxVars[]  AssignedVars[] {4090#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} is VALID
[2019-05-15 10:43:09,408 INFO  L273        TraceCheckUtils]: 3: Hoare triple {4090#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} [794] L452-->void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT: Formula: (= v_void$SimpleFrame2Cons$main$1804_$r110_3 $null)  InVars {void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_3}  OutVars{void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_3}  AuxVars[]  AssignedVars[] {4079#false} is VALID
[2019-05-15 10:43:09,409 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:09,409 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:09,409 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-05-15 10:43:09,411 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 4
[2019-05-15 10:43:09,411 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:09,411 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states.
[2019-05-15 10:43:09,415 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 4 edges. 4 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:09,415 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-05-15 10:43:09,416 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-05-15 10:43:09,416 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-05-15 10:43:09,416 INFO  L87              Difference]: Start difference. First operand 558 states and 564 transitions. Second operand 4 states.
[2019-05-15 10:43:11,404 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:11,405 INFO  L93              Difference]: Finished difference Result 557 states and 563 transitions.
[2019-05-15 10:43:11,405 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-05-15 10:43:11,405 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 4
[2019-05-15 10:43:11,405 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:11,405 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:11,411 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 564 transitions.
[2019-05-15 10:43:11,411 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:11,417 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 564 transitions.
[2019-05-15 10:43:11,417 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 564 transitions.
[2019-05-15 10:43:11,960 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 564 edges. 564 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:11,983 INFO  L225             Difference]: With dead ends: 557
[2019-05-15 10:43:11,983 INFO  L226             Difference]: Without dead ends: 557
[2019-05-15 10:43:11,984 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:11,986 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 557 states.
[2019-05-15 10:43:12,005 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 557.
[2019-05-15 10:43:12,005 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:12,005 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 557 states. Second operand 557 states.
[2019-05-15 10:43:12,006 INFO  L74              IsIncluded]: Start isIncluded. First operand 557 states. Second operand 557 states.
[2019-05-15 10:43:12,006 INFO  L87              Difference]: Start difference. First operand 557 states. Second operand 557 states.
[2019-05-15 10:43:12,006 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:12,042 INFO  L93              Difference]: Finished difference Result 557 states and 563 transitions.
[2019-05-15 10:43:12,042 INFO  L276                IsEmpty]: Start isEmpty. Operand 557 states and 563 transitions.
[2019-05-15 10:43:12,044 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:12,045 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:12,045 INFO  L74              IsIncluded]: Start isIncluded. First operand 557 states. Second operand 557 states.
[2019-05-15 10:43:12,045 INFO  L87              Difference]: Start difference. First operand 557 states. Second operand 557 states.
[2019-05-15 10:43:12,045 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:12,076 INFO  L93              Difference]: Finished difference Result 557 states and 563 transitions.
[2019-05-15 10:43:12,077 INFO  L276                IsEmpty]: Start isEmpty. Operand 557 states and 563 transitions.
[2019-05-15 10:43:12,078 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:12,079 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:12,079 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:12,079 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:12,079 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 557 states.
[2019-05-15 10:43:12,119 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 557 states to 557 states and 563 transitions.
[2019-05-15 10:43:12,120 INFO  L78                 Accepts]: Start accepts. Automaton has 557 states and 563 transitions. Word has length 4
[2019-05-15 10:43:12,120 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:12,120 INFO  L475      AbstractCegarLoop]: Abstraction has 557 states and 563 transitions.
[2019-05-15 10:43:12,120 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-05-15 10:43:12,121 INFO  L276                IsEmpty]: Start isEmpty. Operand 557 states and 563 transitions.
[2019-05-15 10:43:12,121 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-05-15 10:43:12,121 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:12,121 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-05-15 10:43:12,124 INFO  L418      AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:12,125 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:12,125 INFO  L82        PathProgramCache]: Analyzing trace with hash 735323842, now seen corresponding path program 1 times
[2019-05-15 10:43:12,128 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:12,131 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:12,133 INFO  L256         TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 3 conjunts are in the unsatisfiable core
[2019-05-15 10:43:12,150 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:12,151 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:12,259 INFO  L273        TraceCheckUtils]: 0: Hoare triple {7423#true} [740] void$SimpleFrame2Cons$4$$la$init$ra$$4887ENTRY-->$Ultimate##0: Formula: (not (= $null v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this_1))  InVars {void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this_1}  OutVars{void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this_1}  AuxVars[]  AssignedVars[] {7428#(not (= void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this $null))} is VALID
[2019-05-15 10:43:12,260 INFO  L273        TraceCheckUtils]: 1: Hoare triple {7428#(not (= void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this $null))} [756] $Ultimate##0-->L587: Formula: (= v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120_1 v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this_2)  InVars {void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this_2}  OutVars{void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120_1, void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$__this_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120] {7432#(not (= $null void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120))} is VALID
[2019-05-15 10:43:12,261 INFO  L273        TraceCheckUtils]: 2: Hoare triple {7432#(not (= $null void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120))} [772] L587-->L589: Formula: (= v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121_1 v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$param_0_1)  InVars {void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$param_0=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$param_0_1}  OutVars{void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$param_0=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_void$SimpleFrame2Cons$4$$la$init$ra$$4887$param_0_1, void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121] {7432#(not (= $null void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120))} is VALID
[2019-05-15 10:43:12,262 INFO  L273        TraceCheckUtils]: 3: Hoare triple {7432#(not (= $null void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120))} [789] L589-->L590: Formula: (= v_SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763_2 v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121_2)  InVars {void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121_2}  OutVars{SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763=v_SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763_2, void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r1121_2}  AuxVars[]  AssignedVars[SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763] {7432#(not (= $null void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120))} is VALID
[2019-05-15 10:43:12,263 INFO  L273        TraceCheckUtils]: 4: Hoare triple {7432#(not (= $null void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120))} [804] L590-->void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT: Formula: (= $null v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120_2)  InVars {void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120_2}  OutVars{void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120=v_void$SimpleFrame2Cons$4$$la$init$ra$$4887_r0120_2}  AuxVars[]  AssignedVars[] {7424#false} is VALID
[2019-05-15 10:43:12,264 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:12,264 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:12,265 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-05-15 10:43:12,265 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-05-15 10:43:12,265 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:12,269 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states.
[2019-05-15 10:43:12,276 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 5 edges. 5 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:12,276 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-05-15 10:43:12,276 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-05-15 10:43:12,276 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-05-15 10:43:12,277 INFO  L87              Difference]: Start difference. First operand 557 states and 563 transitions. Second operand 4 states.
[2019-05-15 10:43:13,497 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:13,497 INFO  L93              Difference]: Finished difference Result 556 states and 562 transitions.
[2019-05-15 10:43:13,498 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-05-15 10:43:13,498 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-05-15 10:43:13,498 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:13,498 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:13,502 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 563 transitions.
[2019-05-15 10:43:13,502 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:13,505 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 563 transitions.
[2019-05-15 10:43:13,505 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 563 transitions.
[2019-05-15 10:43:14,402 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 563 edges. 563 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:14,418 INFO  L225             Difference]: With dead ends: 556
[2019-05-15 10:43:14,418 INFO  L226             Difference]: Without dead ends: 551
[2019-05-15 10:43:14,418 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:14,420 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 551 states.
[2019-05-15 10:43:14,427 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551.
[2019-05-15 10:43:14,428 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:14,428 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 551 states. Second operand 551 states.
[2019-05-15 10:43:14,428 INFO  L74              IsIncluded]: Start isIncluded. First operand 551 states. Second operand 551 states.
[2019-05-15 10:43:14,428 INFO  L87              Difference]: Start difference. First operand 551 states. Second operand 551 states.
[2019-05-15 10:43:14,428 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:14,450 INFO  L93              Difference]: Finished difference Result 551 states and 558 transitions.
[2019-05-15 10:43:14,450 INFO  L276                IsEmpty]: Start isEmpty. Operand 551 states and 558 transitions.
[2019-05-15 10:43:14,451 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:14,452 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:14,452 INFO  L74              IsIncluded]: Start isIncluded. First operand 551 states. Second operand 551 states.
[2019-05-15 10:43:14,452 INFO  L87              Difference]: Start difference. First operand 551 states. Second operand 551 states.
[2019-05-15 10:43:14,452 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:14,474 INFO  L93              Difference]: Finished difference Result 551 states and 558 transitions.
[2019-05-15 10:43:14,474 INFO  L276                IsEmpty]: Start isEmpty. Operand 551 states and 558 transitions.
[2019-05-15 10:43:14,476 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:14,476 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:14,476 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:14,476 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:14,476 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 551 states.
[2019-05-15 10:43:14,496 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 558 transitions.
[2019-05-15 10:43:14,496 INFO  L78                 Accepts]: Start accepts. Automaton has 551 states and 558 transitions. Word has length 5
[2019-05-15 10:43:14,496 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:14,496 INFO  L475      AbstractCegarLoop]: Abstraction has 551 states and 558 transitions.
[2019-05-15 10:43:14,497 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-05-15 10:43:14,497 INFO  L276                IsEmpty]: Start isEmpty. Operand 551 states and 558 transitions.
[2019-05-15 10:43:14,497 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-05-15 10:43:14,497 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:14,497 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-05-15 10:43:14,500 INFO  L418      AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:14,500 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:14,500 INFO  L82        PathProgramCache]: Analyzing trace with hash 730552317, now seen corresponding path program 1 times
[2019-05-15 10:43:14,502 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:14,504 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:14,505 INFO  L256         TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 3 conjunts are in the unsatisfiable core
[2019-05-15 10:43:14,533 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:14,534 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:14,830 INFO  L273        TraceCheckUtils]: 0: Hoare triple {10742#true} [735] void$SimpleFrame2Cons$3$$la$init$ra$$4885ENTRY-->$Ultimate##0: Formula: (not (= v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this_1 $null))  InVars {void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this_1}  OutVars{void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this_1}  AuxVars[]  AssignedVars[] {10747#(not (= void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this $null))} is VALID
[2019-05-15 10:43:14,843 INFO  L273        TraceCheckUtils]: 1: Hoare triple {10747#(not (= void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this $null))} [751] $Ultimate##0-->L704: Formula: (= v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107_1 v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this_2)  InVars {void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this_2}  OutVars{void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107_1, void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$__this_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107] {10751#(not (= $null void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107))} is VALID
[2019-05-15 10:43:14,856 INFO  L273        TraceCheckUtils]: 2: Hoare triple {10751#(not (= $null void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107))} [767] L704-->L706: Formula: (= v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108_1 v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$param_0_1)  InVars {void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$param_0=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$param_0_1}  OutVars{void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$param_0=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_void$SimpleFrame2Cons$3$$la$init$ra$$4885$param_0_1, void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108] {10751#(not (= $null void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107))} is VALID
[2019-05-15 10:43:14,869 INFO  L273        TraceCheckUtils]: 3: Hoare triple {10751#(not (= $null void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107))} [784] L706-->L707: Formula: (= v_SimpleFrame2Cons$SimpleFrame2Cons$3$this$0762_1 v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108_2)  InVars {void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108_2}  OutVars{SimpleFrame2Cons$SimpleFrame2Cons$3$this$0762=v_SimpleFrame2Cons$SimpleFrame2Cons$3$this$0762_1, void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r1108_2}  AuxVars[]  AssignedVars[SimpleFrame2Cons$SimpleFrame2Cons$3$this$0762] {10751#(not (= $null void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107))} is VALID
[2019-05-15 10:43:14,882 INFO  L273        TraceCheckUtils]: 4: Hoare triple {10751#(not (= $null void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107))} [799] L707-->void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT: Formula: (= v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107_2 $null)  InVars {void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107_2}  OutVars{void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107=v_void$SimpleFrame2Cons$3$$la$init$ra$$4885_r0107_2}  AuxVars[]  AssignedVars[] {10743#false} is VALID
[2019-05-15 10:43:14,883 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:14,884 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:14,884 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-05-15 10:43:14,884 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-05-15 10:43:14,884 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:14,885 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states.
[2019-05-15 10:43:14,951 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 5 edges. 5 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:14,951 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-05-15 10:43:14,951 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-05-15 10:43:14,952 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-05-15 10:43:14,952 INFO  L87              Difference]: Start difference. First operand 551 states and 558 transitions. Second operand 4 states.
[2019-05-15 10:43:16,497 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:16,497 INFO  L93              Difference]: Finished difference Result 550 states and 557 transitions.
[2019-05-15 10:43:16,497 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-05-15 10:43:16,497 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-05-15 10:43:16,498 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:16,498 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:16,501 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 558 transitions.
[2019-05-15 10:43:16,501 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:16,504 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 558 transitions.
[2019-05-15 10:43:16,505 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 558 transitions.
[2019-05-15 10:43:17,276 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 558 edges. 558 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:17,291 INFO  L225             Difference]: With dead ends: 550
[2019-05-15 10:43:17,291 INFO  L226             Difference]: Without dead ends: 545
[2019-05-15 10:43:17,291 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:17,293 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 545 states.
[2019-05-15 10:43:17,300 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 545.
[2019-05-15 10:43:17,300 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:17,300 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 545 states. Second operand 545 states.
[2019-05-15 10:43:17,300 INFO  L74              IsIncluded]: Start isIncluded. First operand 545 states. Second operand 545 states.
[2019-05-15 10:43:17,301 INFO  L87              Difference]: Start difference. First operand 545 states. Second operand 545 states.
[2019-05-15 10:43:17,301 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:17,321 INFO  L93              Difference]: Finished difference Result 545 states and 553 transitions.
[2019-05-15 10:43:17,321 INFO  L276                IsEmpty]: Start isEmpty. Operand 545 states and 553 transitions.
[2019-05-15 10:43:17,323 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:17,323 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:17,323 INFO  L74              IsIncluded]: Start isIncluded. First operand 545 states. Second operand 545 states.
[2019-05-15 10:43:17,323 INFO  L87              Difference]: Start difference. First operand 545 states. Second operand 545 states.
[2019-05-15 10:43:17,323 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:17,344 INFO  L93              Difference]: Finished difference Result 545 states and 553 transitions.
[2019-05-15 10:43:17,344 INFO  L276                IsEmpty]: Start isEmpty. Operand 545 states and 553 transitions.
[2019-05-15 10:43:17,345 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:17,346 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:17,346 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:17,346 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:17,346 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 545 states.
[2019-05-15 10:43:17,367 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 553 transitions.
[2019-05-15 10:43:17,367 INFO  L78                 Accepts]: Start accepts. Automaton has 545 states and 553 transitions. Word has length 5
[2019-05-15 10:43:17,368 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:17,368 INFO  L475      AbstractCegarLoop]: Abstraction has 545 states and 553 transitions.
[2019-05-15 10:43:17,368 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-05-15 10:43:17,368 INFO  L276                IsEmpty]: Start isEmpty. Operand 545 states and 553 transitions.
[2019-05-15 10:43:17,368 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-05-15 10:43:17,368 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:17,369 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-05-15 10:43:17,371 INFO  L418      AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:17,372 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:17,372 INFO  L82        PathProgramCache]: Analyzing trace with hash 742004970, now seen corresponding path program 1 times
[2019-05-15 10:43:17,373 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:17,375 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:17,376 INFO  L256         TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 3 conjunts are in the unsatisfiable core
[2019-05-15 10:43:17,391 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:17,392 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:17,624 INFO  L273        TraceCheckUtils]: 0: Hoare triple {14027#true} [747] void$SimpleFrame2Cons$$la$init$ra$$1805ENTRY-->$Ultimate##0: Formula: (not (= $null v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_1))  InVars {void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_1}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_1}  AuxVars[]  AssignedVars[] {14032#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} is VALID
[2019-05-15 10:43:17,625 INFO  L273        TraceCheckUtils]: 1: Hoare triple {14032#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} [763] $Ultimate##0-->L790: Formula: (= v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$caughtEx0_1 $null)  InVars {}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$caughtEx0=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$caughtEx0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$caughtEx0] {14032#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} is VALID
[2019-05-15 10:43:17,625 INFO  L273        TraceCheckUtils]: 2: Hoare triple {14032#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} [780] L790-->L791: Formula: (= v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1_1 $null)  InVars {}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1] {14032#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} is VALID
[2019-05-15 10:43:17,626 INFO  L273        TraceCheckUtils]: 3: Hoare triple {14032#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} [797] L791-->L796: Formula: (= v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_1 v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2)  InVars {void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_r012=v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_1, void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$$la$init$ra$$1805_r012] {14042#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_r012))} is VALID
[2019-05-15 10:43:17,626 INFO  L273        TraceCheckUtils]: 4: Hoare triple {14042#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_r012))} [812] L796-->void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT: Formula: (= $null v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_2)  InVars {void$SimpleFrame2Cons$$la$init$ra$$1805_r012=v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_2}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_r012=v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_2}  AuxVars[]  AssignedVars[] {14028#false} is VALID
[2019-05-15 10:43:17,627 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:17,627 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:17,627 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-05-15 10:43:17,627 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-05-15 10:43:17,627 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:17,628 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states.
[2019-05-15 10:43:17,631 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 5 edges. 5 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:17,632 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-05-15 10:43:17,632 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-05-15 10:43:17,632 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-05-15 10:43:17,632 INFO  L87              Difference]: Start difference. First operand 545 states and 553 transitions. Second operand 4 states.
[2019-05-15 10:43:18,879 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:18,879 INFO  L93              Difference]: Finished difference Result 533 states and 541 transitions.
[2019-05-15 10:43:18,880 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-05-15 10:43:18,880 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-05-15 10:43:18,880 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:18,880 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:18,883 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 553 transitions.
[2019-05-15 10:43:18,883 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:18,887 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 553 transitions.
[2019-05-15 10:43:18,888 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 553 transitions.
[2019-05-15 10:43:19,684 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 553 edges. 553 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:19,697 INFO  L225             Difference]: With dead ends: 533
[2019-05-15 10:43:19,697 INFO  L226             Difference]: Without dead ends: 515
[2019-05-15 10:43:19,697 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:19,698 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 515 states.
[2019-05-15 10:43:19,705 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 515 to 515.
[2019-05-15 10:43:19,705 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:19,706 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 515 states. Second operand 515 states.
[2019-05-15 10:43:19,706 INFO  L74              IsIncluded]: Start isIncluded. First operand 515 states. Second operand 515 states.
[2019-05-15 10:43:19,706 INFO  L87              Difference]: Start difference. First operand 515 states. Second operand 515 states.
[2019-05-15 10:43:19,706 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:19,744 INFO  L93              Difference]: Finished difference Result 515 states and 523 transitions.
[2019-05-15 10:43:19,745 INFO  L276                IsEmpty]: Start isEmpty. Operand 515 states and 523 transitions.
[2019-05-15 10:43:19,746 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:19,746 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:19,746 INFO  L74              IsIncluded]: Start isIncluded. First operand 515 states. Second operand 515 states.
[2019-05-15 10:43:19,746 INFO  L87              Difference]: Start difference. First operand 515 states. Second operand 515 states.
[2019-05-15 10:43:19,746 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:19,766 INFO  L93              Difference]: Finished difference Result 515 states and 523 transitions.
[2019-05-15 10:43:19,767 INFO  L276                IsEmpty]: Start isEmpty. Operand 515 states and 523 transitions.
[2019-05-15 10:43:19,768 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:19,768 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:19,769 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:19,769 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:19,769 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 515 states.
[2019-05-15 10:43:19,789 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 515 states to 515 states and 523 transitions.
[2019-05-15 10:43:19,790 INFO  L78                 Accepts]: Start accepts. Automaton has 515 states and 523 transitions. Word has length 5
[2019-05-15 10:43:19,790 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:19,790 INFO  L475      AbstractCegarLoop]: Abstraction has 515 states and 523 transitions.
[2019-05-15 10:43:19,791 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-05-15 10:43:19,791 INFO  L276                IsEmpty]: Start isEmpty. Operand 515 states and 523 transitions.
[2019-05-15 10:43:19,791 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-05-15 10:43:19,791 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:19,791 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-05-15 10:43:19,794 INFO  L418      AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:19,794 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:19,794 INFO  L82        PathProgramCache]: Analyzing trace with hash 741050664, now seen corresponding path program 1 times
[2019-05-15 10:43:19,796 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:19,799 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:19,800 INFO  L256         TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 3 conjunts are in the unsatisfiable core
[2019-05-15 10:43:19,816 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:19,817 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:19,926 INFO  L273        TraceCheckUtils]: 0: Hoare triple {17145#true} [746] void$SimpleFrame2Cons$2$$la$init$ra$$4552ENTRY-->$Ultimate##0: Formula: (not (= $null v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this_1))  InVars {void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this_1}  OutVars{void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this_1}  AuxVars[]  AssignedVars[] {17150#(not (= $null void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this))} is VALID
[2019-05-15 10:43:19,927 INFO  L273        TraceCheckUtils]: 1: Hoare triple {17150#(not (= $null void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this))} [762] $Ultimate##0-->L682: Formula: (= v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093_1 v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this_2)  InVars {void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this_2}  OutVars{void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093_1, void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$__this_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093] {17154#(not (= void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093 $null))} is VALID
[2019-05-15 10:43:19,928 INFO  L273        TraceCheckUtils]: 2: Hoare triple {17154#(not (= void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093 $null))} [779] L682-->L684: Formula: (= v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194_1 v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$param_0_1)  InVars {void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$param_0=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$param_0_1}  OutVars{void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194_1, void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$param_0=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_void$SimpleFrame2Cons$2$$la$init$ra$$4552$param_0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194] {17154#(not (= void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093 $null))} is VALID
[2019-05-15 10:43:19,928 INFO  L273        TraceCheckUtils]: 3: Hoare triple {17154#(not (= void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093 $null))} [796] L684-->L685: Formula: (= v_SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711_4 v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194_2)  InVars {void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194_2}  OutVars{void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r194_2, SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711=v_SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711_4}  AuxVars[]  AssignedVars[SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711] {17154#(not (= void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093 $null))} is VALID
[2019-05-15 10:43:19,929 INFO  L273        TraceCheckUtils]: 4: Hoare triple {17154#(not (= void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093 $null))} [810] L685-->void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT: Formula: (= $null v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093_2)  InVars {void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093_2}  OutVars{void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093=v_void$SimpleFrame2Cons$2$$la$init$ra$$4552_r093_2}  AuxVars[]  AssignedVars[] {17146#false} is VALID
[2019-05-15 10:43:19,930 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:19,930 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:19,931 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-05-15 10:43:19,931 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-05-15 10:43:19,932 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:19,932 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states.
[2019-05-15 10:43:19,940 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 5 edges. 5 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:19,940 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-05-15 10:43:19,941 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-05-15 10:43:19,941 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-05-15 10:43:19,941 INFO  L87              Difference]: Start difference. First operand 515 states and 523 transitions. Second operand 4 states.
[2019-05-15 10:43:20,882 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:20,883 INFO  L93              Difference]: Finished difference Result 514 states and 522 transitions.
[2019-05-15 10:43:20,883 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-05-15 10:43:20,883 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-05-15 10:43:20,883 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:20,883 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:20,886 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 523 transitions.
[2019-05-15 10:43:20,886 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:20,888 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 523 transitions.
[2019-05-15 10:43:20,888 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 523 transitions.
[2019-05-15 10:43:21,319 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 523 edges. 523 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:21,332 INFO  L225             Difference]: With dead ends: 514
[2019-05-15 10:43:21,332 INFO  L226             Difference]: Without dead ends: 509
[2019-05-15 10:43:21,332 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:21,333 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 509 states.
[2019-05-15 10:43:21,340 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 509 to 509.
[2019-05-15 10:43:21,340 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:21,340 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 509 states. Second operand 509 states.
[2019-05-15 10:43:21,341 INFO  L74              IsIncluded]: Start isIncluded. First operand 509 states. Second operand 509 states.
[2019-05-15 10:43:21,341 INFO  L87              Difference]: Start difference. First operand 509 states. Second operand 509 states.
[2019-05-15 10:43:21,341 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:21,358 INFO  L93              Difference]: Finished difference Result 509 states and 518 transitions.
[2019-05-15 10:43:21,358 INFO  L276                IsEmpty]: Start isEmpty. Operand 509 states and 518 transitions.
[2019-05-15 10:43:21,359 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:21,360 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:21,360 INFO  L74              IsIncluded]: Start isIncluded. First operand 509 states. Second operand 509 states.
[2019-05-15 10:43:21,360 INFO  L87              Difference]: Start difference. First operand 509 states. Second operand 509 states.
[2019-05-15 10:43:21,360 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:21,377 INFO  L93              Difference]: Finished difference Result 509 states and 518 transitions.
[2019-05-15 10:43:21,378 INFO  L276                IsEmpty]: Start isEmpty. Operand 509 states and 518 transitions.
[2019-05-15 10:43:21,379 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:21,379 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:21,379 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:21,379 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:21,380 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 509 states.
[2019-05-15 10:43:21,394 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 509 states to 509 states and 518 transitions.
[2019-05-15 10:43:21,395 INFO  L78                 Accepts]: Start accepts. Automaton has 509 states and 518 transitions. Word has length 5
[2019-05-15 10:43:21,395 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:21,395 INFO  L475      AbstractCegarLoop]: Abstraction has 509 states and 518 transitions.
[2019-05-15 10:43:21,395 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-05-15 10:43:21,395 INFO  L276                IsEmpty]: Start isEmpty. Operand 509 states and 518 transitions.
[2019-05-15 10:43:21,395 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 7
[2019-05-15 10:43:21,396 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:21,396 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1]
[2019-05-15 10:43:21,398 INFO  L418      AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:21,398 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:21,399 INFO  L82        PathProgramCache]: Analyzing trace with hash 1468151470, now seen corresponding path program 1 times
[2019-05-15 10:43:21,400 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:21,402 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:21,403 WARN  L254         TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 4 conjunts are in the unsatisfiable core
[2019-05-15 10:43:21,424 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:21,425 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:21,889 INFO  L273        TraceCheckUtils]: 0: Hoare triple {20216#true} [745] void$SimpleFrame2Cons$main$1804ENTRY-->L450: Formula: (= v_void$SimpleFrame2Cons$main$1804_r09_1 v_void$SimpleFrame2Cons$main$1804_$param_0_1)  InVars {void$SimpleFrame2Cons$main$1804_$param_0=v_void$SimpleFrame2Cons$main$1804_$param_0_1}  OutVars{void$SimpleFrame2Cons$main$1804_r09=v_void$SimpleFrame2Cons$main$1804_r09_1, void$SimpleFrame2Cons$main$1804_$param_0=v_void$SimpleFrame2Cons$main$1804_$param_0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_r09] {20216#true} is VALID
[2019-05-15 10:43:21,902 INFO  L273        TraceCheckUtils]: 1: Hoare triple {20216#true} [761] L450-->L451: Formula: (= v_void$SimpleFrame2Cons$main$1804_$r110_2 v_$fresh2_1)  InVars {$fresh2=v_$fresh2_1}  OutVars{void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_2, $fresh2=v_$fresh2_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_$r110] {20224#(= void$SimpleFrame2Cons$main$1804_$r110 $fresh2)} is VALID
[2019-05-15 10:43:21,921 INFO  L273        TraceCheckUtils]: 2: Hoare triple {20224#(= void$SimpleFrame2Cons$main$1804_$r110 $fresh2)} [778] L451-->L452: Formula: (not (= v_$fresh2_2 $null))  InVars {$fresh2=v_$fresh2_2}  OutVars{$fresh2=v_$fresh2_2}  AuxVars[]  AssignedVars[] {20228#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} is VALID
[2019-05-15 10:43:21,930 INFO  L273        TraceCheckUtils]: 3: Hoare triple {20228#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} [795] L452-->L454: Formula: (not (= v_void$SimpleFrame2Cons$main$1804_$r110_4 $null))  InVars {void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_4}  OutVars{void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_4}  AuxVars[]  AssignedVars[] {20228#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} is VALID
[2019-05-15 10:43:21,943 INFO  L273        TraceCheckUtils]: 4: Hoare triple {20228#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} [809] L454-->L420: Formula: (= v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_1 v_void$SimpleFrame2Cons$main$1804_$r110_5)  InVars {void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_5}  OutVars{void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_1, void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_5}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this] {20235#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} is VALID
[2019-05-15 10:43:21,946 INFO  L273        TraceCheckUtils]: 5: Hoare triple {20235#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} [821] L420-->void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT: Formula: (= v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_2 $null)  InVars {void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_2}  OutVars{void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_2}  AuxVars[]  AssignedVars[] {20217#false} is VALID
[2019-05-15 10:43:21,947 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:21,947 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:21,948 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2019-05-15 10:43:21,948 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 6
[2019-05-15 10:43:21,948 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:21,948 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states.
[2019-05-15 10:43:21,959 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 6 edges. 6 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:21,959 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 5 states
[2019-05-15 10:43:21,959 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2019-05-15 10:43:21,959 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:21,960 INFO  L87              Difference]: Start difference. First operand 509 states and 518 transitions. Second operand 5 states.
[2019-05-15 10:43:23,839 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:23,839 INFO  L93              Difference]: Finished difference Result 508 states and 517 transitions.
[2019-05-15 10:43:23,839 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2019-05-15 10:43:23,839 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 6
[2019-05-15 10:43:23,839 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:23,839 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 5 states.
[2019-05-15 10:43:23,841 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 518 transitions.
[2019-05-15 10:43:23,841 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 5 states.
[2019-05-15 10:43:23,843 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 518 transitions.
[2019-05-15 10:43:23,843 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 518 transitions.
[2019-05-15 10:43:24,252 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 518 edges. 518 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:24,266 INFO  L225             Difference]: With dead ends: 508
[2019-05-15 10:43:24,266 INFO  L226             Difference]: Without dead ends: 508
[2019-05-15 10:43:24,266 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2019-05-15 10:43:24,267 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 508 states.
[2019-05-15 10:43:24,272 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 508.
[2019-05-15 10:43:24,272 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:24,272 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 508 states. Second operand 508 states.
[2019-05-15 10:43:24,273 INFO  L74              IsIncluded]: Start isIncluded. First operand 508 states. Second operand 508 states.
[2019-05-15 10:43:24,273 INFO  L87              Difference]: Start difference. First operand 508 states. Second operand 508 states.
[2019-05-15 10:43:24,273 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:24,288 INFO  L93              Difference]: Finished difference Result 508 states and 517 transitions.
[2019-05-15 10:43:24,288 INFO  L276                IsEmpty]: Start isEmpty. Operand 508 states and 517 transitions.
[2019-05-15 10:43:24,289 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:24,289 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:24,289 INFO  L74              IsIncluded]: Start isIncluded. First operand 508 states. Second operand 508 states.
[2019-05-15 10:43:24,290 INFO  L87              Difference]: Start difference. First operand 508 states. Second operand 508 states.
[2019-05-15 10:43:24,290 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:24,305 INFO  L93              Difference]: Finished difference Result 508 states and 517 transitions.
[2019-05-15 10:43:24,305 INFO  L276                IsEmpty]: Start isEmpty. Operand 508 states and 517 transitions.
[2019-05-15 10:43:24,306 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:24,306 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:24,306 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:24,307 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:24,307 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 508 states.
[2019-05-15 10:43:24,320 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 508 states to 508 states and 517 transitions.
[2019-05-15 10:43:24,320 INFO  L78                 Accepts]: Start accepts. Automaton has 508 states and 517 transitions. Word has length 6
[2019-05-15 10:43:24,320 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:24,320 INFO  L475      AbstractCegarLoop]: Abstraction has 508 states and 517 transitions.
[2019-05-15 10:43:24,321 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 5 states.
[2019-05-15 10:43:24,321 INFO  L276                IsEmpty]: Start isEmpty. Operand 508 states and 517 transitions.
[2019-05-15 10:43:24,321 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 8
[2019-05-15 10:43:24,321 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:24,321 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1]
[2019-05-15 10:43:24,323 INFO  L418      AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:24,323 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:24,323 INFO  L82        PathProgramCache]: Analyzing trace with hash 102232374, now seen corresponding path program 1 times
[2019-05-15 10:43:24,324 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:24,327 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:24,328 INFO  L256         TraceCheckSpWp]: Trace formula consists of 9 conjuncts, 4 conjunts are in the unsatisfiable core
[2019-05-15 10:43:24,344 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:24,344 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:24,418 INFO  L273        TraceCheckUtils]: 0: Hoare triple {23282#true} [747] void$SimpleFrame2Cons$$la$init$ra$$1805ENTRY-->$Ultimate##0: Formula: (not (= $null v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_1))  InVars {void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_1}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_1}  AuxVars[]  AssignedVars[] {23287#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} is VALID
[2019-05-15 10:43:24,419 INFO  L273        TraceCheckUtils]: 1: Hoare triple {23287#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} [763] $Ultimate##0-->L790: Formula: (= v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$caughtEx0_1 $null)  InVars {}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$caughtEx0=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$caughtEx0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$caughtEx0] {23287#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} is VALID
[2019-05-15 10:43:24,419 INFO  L273        TraceCheckUtils]: 2: Hoare triple {23287#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} [780] L790-->L791: Formula: (= v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1_1 $null)  InVars {}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1] {23287#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} is VALID
[2019-05-15 10:43:24,420 INFO  L273        TraceCheckUtils]: 3: Hoare triple {23287#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this))} [797] L791-->L796: Formula: (= v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_1 v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2)  InVars {void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_r012=v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_1, void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$$la$init$ra$$1805_r012] {23297#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_r012))} is VALID
[2019-05-15 10:43:24,421 INFO  L273        TraceCheckUtils]: 4: Hoare triple {23297#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_r012))} [813] L796-->L798: Formula: (not (= $null v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_3))  InVars {void$SimpleFrame2Cons$$la$init$ra$$1805_r012=v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_3}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_r012=v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_3}  AuxVars[]  AssignedVars[] {23297#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_r012))} is VALID
[2019-05-15 10:43:24,422 INFO  L273        TraceCheckUtils]: 5: Hoare triple {23297#(not (= $null void$SimpleFrame2Cons$$la$init$ra$$1805_r012))} [824] L798-->L734: Formula: (= v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this_1 v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_4)  InVars {void$SimpleFrame2Cons$$la$init$ra$$1805_r012=v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_4}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this_1, void$SimpleFrame2Cons$$la$init$ra$$1805_r012=v_void$SimpleFrame2Cons$$la$init$ra$$1805_r012_4}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this] {23304#(not (= void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this $null))} is VALID
[2019-05-15 10:43:24,422 INFO  L273        TraceCheckUtils]: 6: Hoare triple {23304#(not (= void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this $null))} [835] L734-->void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT: Formula: (= v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this_2 $null)  InVars {void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this_2}  OutVars{void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this=v_void$SimpleFrame2Cons$$la$init$ra$$1805_void$javax.swing.JFrame$$la$init$ra$$1809_void$javax.swing.JFrame$$la$init$ra$$1809$__this_2}  AuxVars[]  AssignedVars[] {23283#false} is VALID
[2019-05-15 10:43:24,423 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:24,423 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:24,423 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-05-15 10:43:24,424 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 7
[2019-05-15 10:43:24,424 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:24,424 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states.
[2019-05-15 10:43:24,429 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 7 edges. 7 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:24,429 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 5 states
[2019-05-15 10:43:24,429 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2019-05-15 10:43:24,430 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:24,430 INFO  L87              Difference]: Start difference. First operand 508 states and 517 transitions. Second operand 5 states.
[2019-05-15 10:43:25,439 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:25,439 INFO  L93              Difference]: Finished difference Result 507 states and 516 transitions.
[2019-05-15 10:43:25,440 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2019-05-15 10:43:25,440 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 7
[2019-05-15 10:43:25,440 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:25,440 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 5 states.
[2019-05-15 10:43:25,442 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 517 transitions.
[2019-05-15 10:43:25,442 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 5 states.
[2019-05-15 10:43:25,443 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 517 transitions.
[2019-05-15 10:43:25,443 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 517 transitions.
[2019-05-15 10:43:25,867 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 517 edges. 517 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:25,880 INFO  L225             Difference]: With dead ends: 507
[2019-05-15 10:43:25,880 INFO  L226             Difference]: Without dead ends: 507
[2019-05-15 10:43:25,881 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2019-05-15 10:43:25,882 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 507 states.
[2019-05-15 10:43:25,886 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 507 to 507.
[2019-05-15 10:43:25,886 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:25,886 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 507 states. Second operand 507 states.
[2019-05-15 10:43:25,886 INFO  L74              IsIncluded]: Start isIncluded. First operand 507 states. Second operand 507 states.
[2019-05-15 10:43:25,887 INFO  L87              Difference]: Start difference. First operand 507 states. Second operand 507 states.
[2019-05-15 10:43:25,887 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:25,902 INFO  L93              Difference]: Finished difference Result 507 states and 516 transitions.
[2019-05-15 10:43:25,902 INFO  L276                IsEmpty]: Start isEmpty. Operand 507 states and 516 transitions.
[2019-05-15 10:43:25,903 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:25,903 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:25,903 INFO  L74              IsIncluded]: Start isIncluded. First operand 507 states. Second operand 507 states.
[2019-05-15 10:43:25,904 INFO  L87              Difference]: Start difference. First operand 507 states. Second operand 507 states.
[2019-05-15 10:43:25,904 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:25,919 INFO  L93              Difference]: Finished difference Result 507 states and 516 transitions.
[2019-05-15 10:43:25,919 INFO  L276                IsEmpty]: Start isEmpty. Operand 507 states and 516 transitions.
[2019-05-15 10:43:25,920 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:25,920 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:25,920 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:25,920 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:25,921 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 507 states.
[2019-05-15 10:43:25,934 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 507 states to 507 states and 516 transitions.
[2019-05-15 10:43:25,934 INFO  L78                 Accepts]: Start accepts. Automaton has 507 states and 516 transitions. Word has length 7
[2019-05-15 10:43:25,934 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:25,934 INFO  L475      AbstractCegarLoop]: Abstraction has 507 states and 516 transitions.
[2019-05-15 10:43:25,934 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 5 states.
[2019-05-15 10:43:25,935 INFO  L276                IsEmpty]: Start isEmpty. Operand 507 states and 516 transitions.
[2019-05-15 10:43:25,935 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 8
[2019-05-15 10:43:25,935 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:25,935 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1]
[2019-05-15 10:43:25,936 INFO  L418      AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:25,937 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:25,939 INFO  L82        PathProgramCache]: Analyzing trace with hash 437427531, now seen corresponding path program 1 times
[2019-05-15 10:43:25,940 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:25,945 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:25,945 INFO  L256         TraceCheckSpWp]: Trace formula consists of 9 conjuncts, 3 conjunts are in the unsatisfiable core
[2019-05-15 10:43:25,957 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:25,958 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:25,990 INFO  L273        TraceCheckUtils]: 0: Hoare triple {26345#true} [738] void$SimpleFrame2Cons$1$run$1803ENTRY-->$Ultimate##0: Formula: (not (= $null v_void$SimpleFrame2Cons$1$run$1803___this_1))  InVars {void$SimpleFrame2Cons$1$run$1803___this=v_void$SimpleFrame2Cons$1$run$1803___this_1}  OutVars{void$SimpleFrame2Cons$1$run$1803___this=v_void$SimpleFrame2Cons$1$run$1803___this_1}  AuxVars[]  AssignedVars[] {26345#true} is VALID
[2019-05-15 10:43:25,991 INFO  L273        TraceCheckUtils]: 1: Hoare triple {26345#true} [754] $Ultimate##0-->L534: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_$caughtEx0_1 $null)  InVars {}  OutVars{void$SimpleFrame2Cons$1$run$1803_$caughtEx0=v_void$SimpleFrame2Cons$1$run$1803_$caughtEx0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_$caughtEx0] {26345#true} is VALID
[2019-05-15 10:43:25,991 INFO  L273        TraceCheckUtils]: 2: Hoare triple {26345#true} [770] L534-->L535: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3_1 $null)  InVars {}  OutVars{void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3=v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3] {26345#true} is VALID
[2019-05-15 10:43:25,991 INFO  L273        TraceCheckUtils]: 3: Hoare triple {26345#true} [787] L535-->L541: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_r03_1 v_void$SimpleFrame2Cons$1$run$1803___this_2)  InVars {void$SimpleFrame2Cons$1$run$1803___this=v_void$SimpleFrame2Cons$1$run$1803___this_2}  OutVars{void$SimpleFrame2Cons$1$run$1803_r03=v_void$SimpleFrame2Cons$1$run$1803_r03_1, void$SimpleFrame2Cons$1$run$1803___this=v_void$SimpleFrame2Cons$1$run$1803___this_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_r03] {26345#true} is VALID
[2019-05-15 10:43:25,992 INFO  L273        TraceCheckUtils]: 4: Hoare triple {26345#true} [802] L541-->L542: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_$r14_1 v_$fresh1_1)  InVars {$fresh1=v_$fresh1_1}  OutVars{$fresh1=v_$fresh1_1, void$SimpleFrame2Cons$1$run$1803_$r14=v_void$SimpleFrame2Cons$1$run$1803_$r14_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_$r14] {26362#(= void$SimpleFrame2Cons$1$run$1803_$r14 $fresh1)} is VALID
[2019-05-15 10:43:25,992 INFO  L273        TraceCheckUtils]: 5: Hoare triple {26362#(= void$SimpleFrame2Cons$1$run$1803_$r14 $fresh1)} [816] L542-->L543: Formula: (not (= v_$fresh1_2 $null))  InVars {$fresh1=v_$fresh1_2}  OutVars{$fresh1=v_$fresh1_2}  AuxVars[]  AssignedVars[] {26366#(not (= $null void$SimpleFrame2Cons$1$run$1803_$r14))} is VALID
[2019-05-15 10:43:26,009 INFO  L273        TraceCheckUtils]: 6: Hoare triple {26366#(not (= $null void$SimpleFrame2Cons$1$run$1803_$r14))} [827] L543-->void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_$r14_2 $null)  InVars {void$SimpleFrame2Cons$1$run$1803_$r14=v_void$SimpleFrame2Cons$1$run$1803_$r14_2}  OutVars{void$SimpleFrame2Cons$1$run$1803_$r14=v_void$SimpleFrame2Cons$1$run$1803_$r14_2}  AuxVars[]  AssignedVars[] {26346#false} is VALID
[2019-05-15 10:43:26,010 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:26,010 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:26,010 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-05-15 10:43:26,010 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 7
[2019-05-15 10:43:26,010 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:26,010 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states.
[2019-05-15 10:43:26,036 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 7 edges. 7 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:26,037 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-05-15 10:43:26,037 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-05-15 10:43:26,037 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-05-15 10:43:26,037 INFO  L87              Difference]: Start difference. First operand 507 states and 516 transitions. Second operand 4 states.
[2019-05-15 10:43:26,752 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:26,752 INFO  L93              Difference]: Finished difference Result 506 states and 515 transitions.
[2019-05-15 10:43:26,752 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-05-15 10:43:26,752 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 7
[2019-05-15 10:43:26,752 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:26,752 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:26,754 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 516 transitions.
[2019-05-15 10:43:26,754 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 4 states.
[2019-05-15 10:43:26,755 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 516 transitions.
[2019-05-15 10:43:26,755 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 4 states and 516 transitions.
[2019-05-15 10:43:27,206 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 516 edges. 516 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:27,219 INFO  L225             Difference]: With dead ends: 506
[2019-05-15 10:43:27,219 INFO  L226             Difference]: Without dead ends: 506
[2019-05-15 10:43:27,220 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:27,221 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 506 states.
[2019-05-15 10:43:27,226 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 506.
[2019-05-15 10:43:27,226 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:27,226 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 506 states. Second operand 506 states.
[2019-05-15 10:43:27,226 INFO  L74              IsIncluded]: Start isIncluded. First operand 506 states. Second operand 506 states.
[2019-05-15 10:43:27,226 INFO  L87              Difference]: Start difference. First operand 506 states. Second operand 506 states.
[2019-05-15 10:43:27,227 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:27,241 INFO  L93              Difference]: Finished difference Result 506 states and 515 transitions.
[2019-05-15 10:43:27,241 INFO  L276                IsEmpty]: Start isEmpty. Operand 506 states and 515 transitions.
[2019-05-15 10:43:27,242 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:27,242 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:27,242 INFO  L74              IsIncluded]: Start isIncluded. First operand 506 states. Second operand 506 states.
[2019-05-15 10:43:27,242 INFO  L87              Difference]: Start difference. First operand 506 states. Second operand 506 states.
[2019-05-15 10:43:27,242 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:27,257 INFO  L93              Difference]: Finished difference Result 506 states and 515 transitions.
[2019-05-15 10:43:27,257 INFO  L276                IsEmpty]: Start isEmpty. Operand 506 states and 515 transitions.
[2019-05-15 10:43:27,258 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:27,258 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:27,259 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:27,259 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:27,259 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 506 states.
[2019-05-15 10:43:27,271 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 515 transitions.
[2019-05-15 10:43:27,271 INFO  L78                 Accepts]: Start accepts. Automaton has 506 states and 515 transitions. Word has length 7
[2019-05-15 10:43:27,271 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:27,271 INFO  L475      AbstractCegarLoop]: Abstraction has 506 states and 515 transitions.
[2019-05-15 10:43:27,271 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-05-15 10:43:27,271 INFO  L276                IsEmpty]: Start isEmpty. Operand 506 states and 515 transitions.
[2019-05-15 10:43:27,271 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 10
[2019-05-15 10:43:27,271 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:27,272 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1]
[2019-05-15 10:43:27,272 INFO  L418      AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:27,272 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:27,272 INFO  L82        PathProgramCache]: Analyzing trace with hash -538909933, now seen corresponding path program 1 times
[2019-05-15 10:43:27,274 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:27,277 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:27,277 INFO  L256         TraceCheckSpWp]: Trace formula consists of 11 conjuncts, 4 conjunts are in the unsatisfiable core
[2019-05-15 10:43:27,282 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:27,283 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:27,326 INFO  L273        TraceCheckUtils]: 0: Hoare triple {29399#true} [738] void$SimpleFrame2Cons$1$run$1803ENTRY-->$Ultimate##0: Formula: (not (= $null v_void$SimpleFrame2Cons$1$run$1803___this_1))  InVars {void$SimpleFrame2Cons$1$run$1803___this=v_void$SimpleFrame2Cons$1$run$1803___this_1}  OutVars{void$SimpleFrame2Cons$1$run$1803___this=v_void$SimpleFrame2Cons$1$run$1803___this_1}  AuxVars[]  AssignedVars[] {29399#true} is VALID
[2019-05-15 10:43:27,327 INFO  L273        TraceCheckUtils]: 1: Hoare triple {29399#true} [754] $Ultimate##0-->L534: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_$caughtEx0_1 $null)  InVars {}  OutVars{void$SimpleFrame2Cons$1$run$1803_$caughtEx0=v_void$SimpleFrame2Cons$1$run$1803_$caughtEx0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_$caughtEx0] {29399#true} is VALID
[2019-05-15 10:43:27,327 INFO  L273        TraceCheckUtils]: 2: Hoare triple {29399#true} [770] L534-->L535: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3_1 $null)  InVars {}  OutVars{void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3=v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3] {29399#true} is VALID
[2019-05-15 10:43:27,327 INFO  L273        TraceCheckUtils]: 3: Hoare triple {29399#true} [787] L535-->L541: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_r03_1 v_void$SimpleFrame2Cons$1$run$1803___this_2)  InVars {void$SimpleFrame2Cons$1$run$1803___this=v_void$SimpleFrame2Cons$1$run$1803___this_2}  OutVars{void$SimpleFrame2Cons$1$run$1803_r03=v_void$SimpleFrame2Cons$1$run$1803_r03_1, void$SimpleFrame2Cons$1$run$1803___this=v_void$SimpleFrame2Cons$1$run$1803___this_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_r03] {29399#true} is VALID
[2019-05-15 10:43:27,329 INFO  L273        TraceCheckUtils]: 4: Hoare triple {29399#true} [802] L541-->L542: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_$r14_1 v_$fresh1_1)  InVars {$fresh1=v_$fresh1_1}  OutVars{$fresh1=v_$fresh1_1, void$SimpleFrame2Cons$1$run$1803_$r14=v_void$SimpleFrame2Cons$1$run$1803_$r14_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_$r14] {29416#(= void$SimpleFrame2Cons$1$run$1803_$r14 $fresh1)} is VALID
[2019-05-15 10:43:27,332 INFO  L273        TraceCheckUtils]: 5: Hoare triple {29416#(= void$SimpleFrame2Cons$1$run$1803_$r14 $fresh1)} [816] L542-->L543: Formula: (not (= v_$fresh1_2 $null))  InVars {$fresh1=v_$fresh1_2}  OutVars{$fresh1=v_$fresh1_2}  AuxVars[]  AssignedVars[] {29420#(not (= $null void$SimpleFrame2Cons$1$run$1803_$r14))} is VALID
[2019-05-15 10:43:27,333 INFO  L273        TraceCheckUtils]: 6: Hoare triple {29420#(not (= $null void$SimpleFrame2Cons$1$run$1803_$r14))} [828] L543-->L545: Formula: (not (= v_void$SimpleFrame2Cons$1$run$1803_$r14_3 $null))  InVars {void$SimpleFrame2Cons$1$run$1803_$r14=v_void$SimpleFrame2Cons$1$run$1803_$r14_3}  OutVars{void$SimpleFrame2Cons$1$run$1803_$r14=v_void$SimpleFrame2Cons$1$run$1803_$r14_3}  AuxVars[]  AssignedVars[] {29420#(not (= $null void$SimpleFrame2Cons$1$run$1803_$r14))} is VALID
[2019-05-15 10:43:27,333 INFO  L273        TraceCheckUtils]: 7: Hoare triple {29420#(not (= $null void$SimpleFrame2Cons$1$run$1803_$r14))} [838] L545-->L753: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_1 v_void$SimpleFrame2Cons$1$run$1803_$r14_4)  InVars {void$SimpleFrame2Cons$1$run$1803_$r14=v_void$SimpleFrame2Cons$1$run$1803_$r14_4}  OutVars{void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_1, void$SimpleFrame2Cons$1$run$1803_$r14=v_void$SimpleFrame2Cons$1$run$1803_$r14_4}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this] {29427#(not (= void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this $null))} is VALID
[2019-05-15 10:43:27,335 INFO  L273        TraceCheckUtils]: 8: Hoare triple {29427#(not (= void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this $null))} [845] L753-->void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT: Formula: (= v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2 $null)  InVars {void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2}  OutVars{void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this=v_void$SimpleFrame2Cons$1$run$1803_void$SimpleFrame2Cons$$la$init$ra$$1805_void$SimpleFrame2Cons$$la$init$ra$$1805$__this_2}  AuxVars[]  AssignedVars[] {29400#false} is VALID
[2019-05-15 10:43:27,335 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:27,335 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:27,336 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2019-05-15 10:43:27,336 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 9
[2019-05-15 10:43:27,336 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:27,336 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states.
[2019-05-15 10:43:27,349 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 9 edges. 9 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:27,349 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 5 states
[2019-05-15 10:43:27,349 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2019-05-15 10:43:27,349 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2019-05-15 10:43:27,349 INFO  L87              Difference]: Start difference. First operand 506 states and 515 transitions. Second operand 5 states.
[2019-05-15 10:43:28,286 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:28,287 INFO  L93              Difference]: Finished difference Result 505 states and 514 transitions.
[2019-05-15 10:43:28,287 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2019-05-15 10:43:28,287 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 9
[2019-05-15 10:43:28,287 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:28,287 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 5 states.
[2019-05-15 10:43:28,288 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 515 transitions.
[2019-05-15 10:43:28,288 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 5 states.
[2019-05-15 10:43:28,290 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 515 transitions.
[2019-05-15 10:43:28,290 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 5 states and 515 transitions.
[2019-05-15 10:43:30,402 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 515 edges. 515 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:30,413 INFO  L225             Difference]: With dead ends: 505
[2019-05-15 10:43:30,414 INFO  L226             Difference]: Without dead ends: 505
[2019-05-15 10:43:30,414 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2019-05-15 10:43:30,415 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 505 states.
[2019-05-15 10:43:30,419 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 505 to 505.
[2019-05-15 10:43:30,419 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:30,419 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 505 states. Second operand 505 states.
[2019-05-15 10:43:30,419 INFO  L74              IsIncluded]: Start isIncluded. First operand 505 states. Second operand 505 states.
[2019-05-15 10:43:30,419 INFO  L87              Difference]: Start difference. First operand 505 states. Second operand 505 states.
[2019-05-15 10:43:30,419 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:30,429 INFO  L93              Difference]: Finished difference Result 505 states and 514 transitions.
[2019-05-15 10:43:30,429 INFO  L276                IsEmpty]: Start isEmpty. Operand 505 states and 514 transitions.
[2019-05-15 10:43:30,429 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:30,429 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:30,430 INFO  L74              IsIncluded]: Start isIncluded. First operand 505 states. Second operand 505 states.
[2019-05-15 10:43:30,430 INFO  L87              Difference]: Start difference. First operand 505 states. Second operand 505 states.
[2019-05-15 10:43:30,430 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:30,444 INFO  L93              Difference]: Finished difference Result 505 states and 514 transitions.
[2019-05-15 10:43:30,445 INFO  L276                IsEmpty]: Start isEmpty. Operand 505 states and 514 transitions.
[2019-05-15 10:43:30,446 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:30,446 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:30,446 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:30,446 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:30,446 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 505 states.
[2019-05-15 10:43:30,459 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 505 states to 505 states and 514 transitions.
[2019-05-15 10:43:30,460 INFO  L78                 Accepts]: Start accepts. Automaton has 505 states and 514 transitions. Word has length 9
[2019-05-15 10:43:30,460 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:30,460 INFO  L475      AbstractCegarLoop]: Abstraction has 505 states and 514 transitions.
[2019-05-15 10:43:30,460 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 5 states.
[2019-05-15 10:43:30,460 INFO  L276                IsEmpty]: Start isEmpty. Operand 505 states and 514 transitions.
[2019-05-15 10:43:30,460 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 11
[2019-05-15 10:43:30,461 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:30,461 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2019-05-15 10:43:30,461 INFO  L418      AbstractCegarLoop]: === Iteration 11 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:30,462 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:30,462 INFO  L82        PathProgramCache]: Analyzing trace with hash -895437985, now seen corresponding path program 1 times
[2019-05-15 10:43:30,463 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:30,466 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:30,466 INFO  L256         TraceCheckSpWp]: Trace formula consists of 12 conjuncts, 5 conjunts are in the unsatisfiable core
[2019-05-15 10:43:30,485 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-05-15 10:43:30,485 INFO  L279         TraceCheckSpWp]: Computing forward predicates...
[2019-05-15 10:43:30,588 INFO  L273        TraceCheckUtils]: 0: Hoare triple {32456#true} [745] void$SimpleFrame2Cons$main$1804ENTRY-->L450: Formula: (= v_void$SimpleFrame2Cons$main$1804_r09_1 v_void$SimpleFrame2Cons$main$1804_$param_0_1)  InVars {void$SimpleFrame2Cons$main$1804_$param_0=v_void$SimpleFrame2Cons$main$1804_$param_0_1}  OutVars{void$SimpleFrame2Cons$main$1804_r09=v_void$SimpleFrame2Cons$main$1804_r09_1, void$SimpleFrame2Cons$main$1804_$param_0=v_void$SimpleFrame2Cons$main$1804_$param_0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_r09] {32456#true} is VALID
[2019-05-15 10:43:30,589 INFO  L273        TraceCheckUtils]: 1: Hoare triple {32456#true} [761] L450-->L451: Formula: (= v_void$SimpleFrame2Cons$main$1804_$r110_2 v_$fresh2_1)  InVars {$fresh2=v_$fresh2_1}  OutVars{void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_2, $fresh2=v_$fresh2_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_$r110] {32464#(= void$SimpleFrame2Cons$main$1804_$r110 $fresh2)} is VALID
[2019-05-15 10:43:30,590 INFO  L273        TraceCheckUtils]: 2: Hoare triple {32464#(= void$SimpleFrame2Cons$main$1804_$r110 $fresh2)} [778] L451-->L452: Formula: (not (= v_$fresh2_2 $null))  InVars {$fresh2=v_$fresh2_2}  OutVars{$fresh2=v_$fresh2_2}  AuxVars[]  AssignedVars[] {32468#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} is VALID
[2019-05-15 10:43:30,591 INFO  L273        TraceCheckUtils]: 3: Hoare triple {32468#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} [795] L452-->L454: Formula: (not (= v_void$SimpleFrame2Cons$main$1804_$r110_4 $null))  InVars {void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_4}  OutVars{void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_4}  AuxVars[]  AssignedVars[] {32468#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} is VALID
[2019-05-15 10:43:30,591 INFO  L273        TraceCheckUtils]: 4: Hoare triple {32468#(not (= void$SimpleFrame2Cons$main$1804_$r110 $null))} [809] L454-->L420: Formula: (= v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_1 v_void$SimpleFrame2Cons$main$1804_$r110_5)  InVars {void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_5}  OutVars{void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_1, void$SimpleFrame2Cons$main$1804_$r110=v_void$SimpleFrame2Cons$main$1804_$r110_5}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this] {32475#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} is VALID
[2019-05-15 10:43:30,592 INFO  L273        TraceCheckUtils]: 5: Hoare triple {32475#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} [822] L420-->L420-1: Formula: (not (= v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_3 $null))  InVars {void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_3}  OutVars{void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_3}  AuxVars[]  AssignedVars[] {32475#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} is VALID
[2019-05-15 10:43:30,592 INFO  L273        TraceCheckUtils]: 6: Hoare triple {32475#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} [833] L420-1-->L454-1: Formula: (not (= v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_4 $null))  InVars {void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_4}  OutVars{void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_4}  AuxVars[]  AssignedVars[] {32475#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} is VALID
[2019-05-15 10:43:30,594 INFO  L273        TraceCheckUtils]: 7: Hoare triple {32475#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} [842] L454-1-->L431: Formula: true  InVars {}  OutVars{void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3_1, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1_1, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep2=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep2_1, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_1, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep0=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep0_1}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep3, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep1, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep2, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$Exep0] {32475#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} is VALID
[2019-05-15 10:43:30,595 INFO  L273        TraceCheckUtils]: 8: Hoare triple {32475#(not (= $null void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this))} [850] L431-->L434: Formula: (= v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_2 v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_5)  InVars {void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_5}  OutVars{void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_void$SimpleFrame2Cons$1$$la$init$ra$$1802$__this_5, void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_2}  AuxVars[]  AssignedVars[void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01] {32488#(not (= void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01 $null))} is VALID
[2019-05-15 10:43:30,596 INFO  L273        TraceCheckUtils]: 9: Hoare triple {32488#(not (= void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01 $null))} [857] L434-->void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT: Formula: (= v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_3 $null)  InVars {void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_3}  OutVars{void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01=v_void$SimpleFrame2Cons$main$1804_void$SimpleFrame2Cons$1$$la$init$ra$$1802_r01_3}  AuxVars[]  AssignedVars[] {32457#false} is VALID
[2019-05-15 10:43:30,597 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-05-15 10:43:30,597 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-05-15 10:43:30,598 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2019-05-15 10:43:30,598 INFO  L78                 Accepts]: Start accepts. Automaton has 6 states. Word has length 10
[2019-05-15 10:43:30,598 INFO  L84                 Accepts]: Finished accepts. word is accepted.
[2019-05-15 10:43:30,599 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states.
[2019-05-15 10:43:30,607 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 10 edges. 10 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:30,607 INFO  L454      AbstractCegarLoop]: Interpolant automaton has 6 states
[2019-05-15 10:43:30,607 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2019-05-15 10:43:30,607 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2019-05-15 10:43:30,608 INFO  L87              Difference]: Start difference. First operand 505 states and 514 transitions. Second operand 6 states.
[2019-05-15 10:43:32,048 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-05-15 10:43:32,048 INFO  L93              Difference]: Finished difference Result 504 states and 513 transitions.
[2019-05-15 10:43:32,048 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2019-05-15 10:43:32,049 INFO  L78                 Accepts]: Start accepts. Automaton has 6 states. Word has length 10
[2019-05-15 10:43:32,049 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-05-15 10:43:32,049 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 6 states.
[2019-05-15 10:43:32,051 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 514 transitions.
[2019-05-15 10:43:32,051 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 6 states.
[2019-05-15 10:43:32,053 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 514 transitions.
[2019-05-15 10:43:32,053 INFO  L86        InductivityCheck]: Starting indutivity check of a Floyd-Hoare automaton with 6 states and 514 transitions.
[2019-05-15 10:43:32,439 INFO  L119       InductivityCheck]: Floyd-Hoare automaton has 514 edges. 514 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 
[2019-05-15 10:43:32,453 INFO  L225             Difference]: With dead ends: 504
[2019-05-15 10:43:32,453 INFO  L226             Difference]: Without dead ends: 494
[2019-05-15 10:43:32,454 INFO  L628         BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72
[2019-05-15 10:43:32,455 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 494 states.
[2019-05-15 10:43:32,461 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 494 to 494.
[2019-05-15 10:43:32,461 INFO  L214    AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa
[2019-05-15 10:43:32,461 INFO  L82        GeneralOperation]: Start isEquivalent. First operand 494 states. Second operand 494 states.
[2019-05-15 10:43:32,461 INFO  L74              IsIncluded]: Start isIncluded. First operand 494 states. Second operand 494 states.
[2019-05-15 10:43:32,461 INFO  L87              Difference]: Start difference. First operand 494 states. Second operand 494 states.
[2019-05-15 10:43:32,462 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:32,475 INFO  L93              Difference]: Finished difference Result 494 states and 504 transitions.
[2019-05-15 10:43:32,475 INFO  L276                IsEmpty]: Start isEmpty. Operand 494 states and 504 transitions.
[2019-05-15 10:43:32,476 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:32,476 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:32,477 INFO  L74              IsIncluded]: Start isIncluded. First operand 494 states. Second operand 494 states.
[2019-05-15 10:43:32,477 INFO  L87              Difference]: Start difference. First operand 494 states. Second operand 494 states.
[2019-05-15 10:43:32,477 INFO  L127             Difference]: Subtrahend was not deterministic. Computing result with determinization.
[2019-05-15 10:43:32,491 INFO  L93              Difference]: Finished difference Result 494 states and 504 transitions.
[2019-05-15 10:43:32,491 INFO  L276                IsEmpty]: Start isEmpty. Operand 494 states and 504 transitions.
[2019-05-15 10:43:32,492 INFO  L282                IsEmpty]: Finished isEmpty. No accepting run.
[2019-05-15 10:43:32,492 INFO  L83              IsIncluded]: Finished isIncluded. Language is included
[2019-05-15 10:43:32,492 INFO  L88        GeneralOperation]: Finished isEquivalent.
[2019-05-15 10:43:32,492 INFO  L221    AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa
[2019-05-15 10:43:32,493 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 494 states.
[2019-05-15 10:43:32,506 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 494 states to 494 states and 504 transitions.
[2019-05-15 10:43:32,506 INFO  L78                 Accepts]: Start accepts. Automaton has 494 states and 504 transitions. Word has length 10
[2019-05-15 10:43:32,506 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-05-15 10:43:32,506 INFO  L475      AbstractCegarLoop]: Abstraction has 494 states and 504 transitions.
[2019-05-15 10:43:32,506 INFO  L476      AbstractCegarLoop]: Interpolant automaton has 6 states.
[2019-05-15 10:43:32,506 INFO  L276                IsEmpty]: Start isEmpty. Operand 494 states and 504 transitions.
[2019-05-15 10:43:32,507 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 13
[2019-05-15 10:43:32,507 INFO  L391         BasicCegarLoop]: Found error trace
[2019-05-15 10:43:32,507 INFO  L399         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2019-05-15 10:43:32,508 INFO  L418      AbstractCegarLoop]: === Iteration 12 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-05-15 10:43:32,508 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-05-15 10:43:32,508 INFO  L82        PathProgramCache]: Analyzing trace with hash -1371145850, now seen corresponding path program 1 times
[2019-05-15 10:43:32,510 INFO  L69    tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy
[2019-05-15 10:43:32,513 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2019-05-15 10:43:32,517 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2019-05-15 10:43:32,531 INFO  L466         BasicCegarLoop]: Counterexample might be feasible
[2019-05-15 10:43:32,542 INFO  L303   ceAbstractionStarter]: Did not count any witness invariants because Icfg is not BoogieIcfg
[2019-05-15 10:43:32,544 INFO  L202        PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.05 10:43:32 BasicIcfg
[2019-05-15 10:43:32,544 INFO  L132        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2019-05-15 10:43:32,545 INFO  L168              Benchmark]: Toolchain (without parser) took 30978.75 ms. Allocated memory was 139.5 MB in the beginning and 467.1 MB in the end (delta: 327.7 MB). Free memory was 105.4 MB in the beginning and 78.4 MB in the end (delta: 27.0 MB). Peak memory consumption was 354.7 MB. Max. memory is 7.1 GB.
[2019-05-15 10:43:32,546 INFO  L168              Benchmark]: Boogie PL CUP Parser took 0.21 ms. Allocated memory is still 139.5 MB. Free memory is still 108.8 MB. There was no memory consumed. Max. memory is 7.1 GB.
[2019-05-15 10:43:32,547 INFO  L168              Benchmark]: Boogie Procedure Inliner took 95.70 ms. Allocated memory is still 139.5 MB. Free memory was 105.4 MB in the beginning and 100.2 MB in the end (delta: 5.2 MB). Peak memory consumption was 5.2 MB. Max. memory is 7.1 GB.
[2019-05-15 10:43:32,547 INFO  L168              Benchmark]: Boogie Preprocessor took 74.23 ms. Allocated memory is still 139.5 MB. Free memory was 100.2 MB in the beginning and 98.1 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB.
[2019-05-15 10:43:32,548 INFO  L168              Benchmark]: RCFGBuilder took 3124.35 ms. Allocated memory was 139.5 MB in the beginning and 202.4 MB in the end (delta: 62.9 MB). Free memory was 98.1 MB in the beginning and 160.5 MB in the end (delta: -62.4 MB). Peak memory consumption was 83.9 MB. Max. memory is 7.1 GB.
[2019-05-15 10:43:32,549 INFO  L168              Benchmark]: IcfgTransformer took 583.74 ms. Allocated memory is still 202.4 MB. Free memory was 160.5 MB in the beginning and 96.4 MB in the end (delta: 64.1 MB). Peak memory consumption was 64.1 MB. Max. memory is 7.1 GB.
[2019-05-15 10:43:32,550 INFO  L168              Benchmark]: TraceAbstraction took 27094.92 ms. Allocated memory was 202.4 MB in the beginning and 467.1 MB in the end (delta: 264.8 MB). Free memory was 94.6 MB in the beginning and 78.4 MB in the end (delta: 16.2 MB). Peak memory consumption was 280.9 MB. Max. memory is 7.1 GB.
[2019-05-15 10:43:32,554 INFO  L337   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - GenericResult: Assertions are enabled
    Assertions are enabled
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * Boogie PL CUP Parser took 0.21 ms. Allocated memory is still 139.5 MB. Free memory is still 108.8 MB. There was no memory consumed. Max. memory is 7.1 GB.
 * Boogie Procedure Inliner took 95.70 ms. Allocated memory is still 139.5 MB. Free memory was 105.4 MB in the beginning and 100.2 MB in the end (delta: 5.2 MB). Peak memory consumption was 5.2 MB. Max. memory is 7.1 GB.
 * Boogie Preprocessor took 74.23 ms. Allocated memory is still 139.5 MB. Free memory was 100.2 MB in the beginning and 98.1 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB.
 * RCFGBuilder took 3124.35 ms. Allocated memory was 139.5 MB in the beginning and 202.4 MB in the end (delta: 62.9 MB). Free memory was 98.1 MB in the beginning and 160.5 MB in the end (delta: -62.4 MB). Peak memory consumption was 83.9 MB. Max. memory is 7.1 GB.
 * IcfgTransformer took 583.74 ms. Allocated memory is still 202.4 MB. Free memory was 160.5 MB in the beginning and 96.4 MB in the end (delta: 64.1 MB). Peak memory consumption was 64.1 MB. Max. memory is 7.1 GB.
 * TraceAbstraction took 27094.92 ms. Allocated memory was 202.4 MB in the beginning and 467.1 MB in the end (delta: 264.8 MB). Free memory was 94.6 MB in the beginning and 78.4 MB in the end (delta: 16.2 MB). Peak memory consumption was 280.9 MB. Max. memory is 7.1 GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - CounterExampleResult [Line: 481]: assertion can be violated
    assertion can be violated
We found a FailurePath: 
[L462-L464]        requires void$SimpleFrame2Cons$2$actionPerformed$4553$__this != $null;
[L474]             r098 := void$SimpleFrame2Cons$2$actionPerformed$4553$__this;
[L476]             r199 := void$SimpleFrame2Cons$2$actionPerformed$4553$param_0;
[L478]             $r2102 := SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711;
[L390]             r083 := $param_0;
[L392]             $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227;
[L394]             __ret := $r185;
[L481]             assert $r3103 != $null;

  - StatisticsResult: Ultimate Automizer benchmark data
    CFG has 16 procedures, 645 locations, 87 error locations. UNSAFE Result, 27.0s OverallTime, 12 OverallIterations, 1 TraceHistogramMax, 23.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5899 SDtfs, 1503 SDslu, 12931 SDs, 0 SdLazy, 82 SolverSat, 11 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 71 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=645occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.9s AutomataMinimizationTime, 11 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 78 NumberOfCodeBlocks, 78 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 55 ConstructedInterpolants, 0 QuantifiedInterpolants, 1026 SizeOfPredicates, 16 NumberOfNonLiveVariables, 88 ConjunctsInSsa, 38 ConjunctsInUnsatCore, 11 InterpolantComputations, 11 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
Received shutdown request...