env EmpireAutomatonOG.Timeout=-1 benchexec/../run-test.sh Library-ProofsTest 'de.uni_freiburg.informatik.ultimate.lib.proofs.owickigries.OGProofProducerTest$EmpireAutomatonOG' NoOverflow.char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_configure.ats true -------------------------------------------------------------------------------- Thanks for using JUnit! Support its development at https://junit.org/sponsoring Test plan execution started. Number of static tests: 1 ╷ ├─ JUnit Jupiter └─ JUnit Jupiter finished after 5 ms. ├─ JUnit Vintage │ ├─ EmpireAutomatonOG │ │ ├─ NoOverflow_char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_configure_ats │ │ │ tags: [] │ │ │ uniqueId: [engine:junit-vintage]/[runner:de.uni_freiburg.informatik.ultimate.lib.proofs.owickigries.OGProofProducerTest$EmpireAutomatonOG]/[test:NoOverflow_char_pc8736x_gpio_pc8736x_gpio_open_pc8736x_gpio_configure_ats(de.uni_freiburg.informatik.ultimate.lib.proofs.owickigries.OGProofProducerTest$EmpireAutomatonOG)] │ │ │ parent: [engine:junit-vintage]/[runner:de.uni_freiburg.informatik.ultimate.lib.proofs.owickigries.OGProofProducerTest$EmpireAutomatonOG] │ │ │ source: ClassSource [className = 'de.uni_freiburg.informatik.ultimate.lib.proofs.owickigries.OGProofProducerTest$EmpireAutomatonOG', filePosition = null] [WARN]: Using environment timeout: -1ms [INFO]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/adds/z3 [INFO]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/adds/z3 SMTLIB2_COMPLIANT=true -t:1000 -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) [INFO]: [MP /storage/repos/ultimate/releaseScripts/default/adds/z3 SMTLIB2_COMPLIANT=true -t:1000 -memory:2024 -smt2 -in (1)] Waiting until timeout for monitored process [INFO]: Initialized classic predicate unifier [INFO]: Initialized classic predicate unifier [INFO]: Initialized classic predicate unifier [INFO]: Initialized classic predicate unifier [INFO]: Initialized classic predicate unifier [INFO]: Initialized classic predicate unifier [INFO]: Initialized classic predicate unifier [INFO]: Start isDeterministic. Operand 2 states and 1950 transitions. [INFO]: Finished isDeterministic. Operand is deterministic. [INFO]: Starting Floyd-Hoare check of an automaton with has 2 states, 2 states have (on average 975.0) internal successors, (1950), 2 states have internal predecessors, (1950), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [INFO]: Floyd-Hoare annotation has 1950 edges. 1950 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [INFO]: Start isDeterministic. Operand 5 states and 4628 transitions. [INFO]: Finished isDeterministic. Operand is deterministic. [INFO]: Starting Floyd-Hoare check of an automaton with has 5 states, 5 states have (on average 925.6) internal successors, (4628), 5 states have internal predecessors, (4628), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [INFO]: Floyd-Hoare annotation has 4628 edges. 4628 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [INFO]: Start isDeterministic. Operand 5 states and 4626 transitions. [INFO]: Finished isDeterministic. Operand is deterministic. [INFO]: Starting Floyd-Hoare check of an automaton with has 5 states, 5 states have (on average 925.2) internal successors, (4626), 5 states have internal predecessors, (4626), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [INFO]: Floyd-Hoare annotation has 4626 edges. 4626 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [INFO]: Start isDeterministic. Operand 3 states and 2824 transitions. [INFO]: Finished isDeterministic. Operand is deterministic. [INFO]: Starting Floyd-Hoare check of an automaton with has 3 states, 3 states have (on average 941.3333333333334) internal successors, (2824), 3 states have internal predecessors, (2824), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [INFO]: Floyd-Hoare annotation has 2824 edges. 2824 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [INFO]: Start isDeterministic. Operand 3 states and 2831 transitions. [INFO]: Finished isDeterministic. Operand is deterministic. [INFO]: Starting Floyd-Hoare check of an automaton with has 3 states, 3 states have (on average 943.6666666666666) internal successors, (2831), 3 states have internal predecessors, (2831), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [INFO]: Floyd-Hoare annotation has 2831 edges. 2831 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [INFO]: Start isDeterministic. Operand 4 states and 3760 transitions. [INFO]: Finished isDeterministic. Operand is deterministic. [INFO]: Starting Floyd-Hoare check of an automaton with has 4 states, 4 states have (on average 940.0) internal successors, (3760), 4 states have internal predecessors, (3760), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [INFO]: Floyd-Hoare annotation has 3760 edges. 3760 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [INFO]: Start isDeterministic. Operand 3 states and 2821 transitions. [INFO]: Finished isDeterministic. Operand is deterministic. [INFO]: Starting Floyd-Hoare check of an automaton with has 3 states, 3 states have (on average 940.3333333333334) internal successors, (2821), 3 states have internal predecessors, (2821), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [INFO]: Floyd-Hoare annotation has 2821 edges. 2821 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. 0 times interpolants missing. [INFO]: Number of proof automata: 7 [INFO]: 959 / 1006 letters are loopers in proof 0 [INFO]: 915 / 1006 letters are loopers in proof 1 [INFO]: 915 / 1006 letters are loopers in proof 2 [INFO]: 944 / 1006 letters are loopers in proof 3 [INFO]: 938 / 1006 letters are loopers in proof 4 [INFO]: 938 / 1006 letters are loopers in proof 5 [INFO]: 937 / 1006 letters are loopers in proof 6 [INFO]: Loopers in proof automata: min=915, max=959, median=938 [INFO]: Start finitePrefix. Operand will be constructed on-demand [INFO]: 70/2081 cut-off events. [INFO]: For 714/789 co-relation queries the response was YES. [INFO]: Finished finitePrefix Result has 2478 conditions, 2081 events. 70/2081 cut-off events. For 714/789 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 5701 event pairs, 6 based on Foata normal form. 1/2009 useless extension candidates. Maximal degree in co-relation 2468. Up to 62 conditions per place. [INFO]: OwickiGriesTestSuite setup time: 12043ms [INFO]: Constructing Owicki-Gries proof for Petri program that has 965 places, 1006 transitions, 2026 flow. [INFO]: Interfering actions: min=0, max=856, median=0 [INFO]: Computed Owicki-Gries annotation with 1 ghost variables, 25 ghost updates, and overall size 122052 Assertions: l816 : 13#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l815 : 16#(and (= v_g_1 26) (= ~major~0 0)) l818 : 21#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l817 : 22#false l819 : 23#false l810 : 26#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l812 : 29#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l811 : 36#(or (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l814 : 49#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l813 : 52#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l805 : 65#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l804 : 78#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l807 : 81#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l806 : 84#(and (= v_g_1 31) (= ~major~0 0)) l809 : 87#(and (= v_g_1 30) (= ~major~0 0)) l808 : 88#false l801 : 91#(and (= v_g_1 26) (= ~major~0 0)) l800 : 92#false l803 : 105#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l802 : 106#false l838 : 109#(and (= v_g_1 26) (= ~major~0 0)) l837 : 110#false l839 : 113#(and (= v_g_1 26) (= ~major~0 0)) l830 : 116#(and (= v_g_1 26) (= ~major~0 0)) l832 : 129#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l831 : 130#false l834 : 133#(and (= v_g_1 31) (= ~major~0 0)) l833 : 146#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l836 : 149#(and (= ~major~0 0) (= v_g_1 6)) l835 : 152#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l827 : 155#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l826 : 158#(and (= v_g_1 13) (= ~major~0 0)) l829 : 171#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l828 : 176#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l821 : 179#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l820 : 194#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l823 : 195#false l822 : 198#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l825 : 211#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l824 : 214#(and (= v_g_1 26) (= ~major~0 0)) l618 : 215#false l617 : 218#(and (= v_g_1 26) (= ~major~0 0)) l859 : 221#(and (= v_g_1 26) (= ~major~0 0)) l619 : 224#(and (= v_g_1 26) (= ~major~0 0)) l850 : 237#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l610 : 240#(and (= v_g_1 26) (= ~major~0 0)) l852 : 243#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l851 : 246#(and (= v_g_1 26) (= ~major~0 0)) l612 : 259#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l854 : 262#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l611 : 265#(and (= v_g_1 26) (= ~major~0 0)) l853 : 268#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) l614 : 269#false l856 : 282#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l613 : 285#(and (= v_g_1 26) (= ~major~0 0)) l855 : 288#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l616 : 291#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l858 : 306#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l615 : 309#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l857 : 316#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 27) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 34) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 22))) l607 : 319#(and (= v_g_1 30) (= ~major~0 0)) l849 : 322#(= v_g_1 19) l606 : 335#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l848 : 348#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l609 : 361#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l608 : 362#false l841 : 365#(and (= v_g_1 26) (= ~major~0 0)) l840 : 378#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l601 : 381#(and (= v_g_1 26) (= ~major~0 0)) l843 : 384#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l600 : 385#false l842 : 388#(and (= v_g_1 26) (= ~major~0 0)) l603 : 401#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l845 : 404#(and (= v_g_1 26) (= ~major~0 0)) l602 : 417#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l844 : 422#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l605 : 425#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l847 : 438#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l604 : 441#(and (= v_g_1 26) (= ~major~0 0)) l846 : 446#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l639 : 449#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l870 : 452#(and (= v_g_1 30) (= ~major~0 0)) l630 : 465#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l872 : 468#(and (= v_g_1 26) (= ~major~0 0)) l871 : 481#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l632 : 494#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l874 : 497#(and (= v_g_1 30) (= ~major~0 0)) l631 : 500#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l873 : 513#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l634 : 516#(and (= v_g_1 26) (= ~major~0 0)) l876 : 529#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l633 : 532#(and (= v_g_1 26) (= ~major~0 0)) l875 : 545#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l636 : 550#(or (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 2))) l878 : 553#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l635 : 556#(= v_g_1 19) l877 : 559#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) l638 : 576#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l637 : 579#(and (= v_g_1 31) (= ~major~0 0)) l879 : 592#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l629 : 593#false l628 : 598#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l861 : 599#false l860 : 612#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l621 : 625#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l863 : 628#(and (= v_g_1 26) (= ~major~0 0)) l620 : 631#(and (= v_g_1 13) (= ~major~0 0)) l862 : 634#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l623 : 637#(and (= v_g_1 26) (= ~major~0 0)) l865 : 640#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l622 : 641#false l864 : 644#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l625 : 647#(and (= v_g_1 26) (= ~major~0 0)) l867 : 650#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l624 : 663#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l866 : 666#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l627 : 669#(= v_g_1 19) l869 : 672#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l626 : 675#(and (= v_g_1 26) (= ~major~0 0)) l868 : 678#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l419 : 679#false l890 : 682#(and (= ~major~0 0) (= v_g_1 6)) l650 : 685#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l892 : 688#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l891 : 701#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l410 : 714#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l652 : 727#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l894 : 730#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l651 : 733#(and (= v_g_1 26) (= ~major~0 0)) l893 : 736#(and (= v_g_1 26) (= ~major~0 0)) l412 : 737#false l654 : 740#(and (= v_g_1 26) (= ~major~0 0)) l896 : 743#(and (= v_g_1 30) (= ~major~0 0)) l411 : 756#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l653 : 759#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l895 : 762#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l414 : 779#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l656 : 782#(and (= ~major~0 0) (= v_g_1 6)) l898 : 785#(and (= v_g_1 30) (= ~major~0 0)) l413 : 788#(and (= v_g_1 26) (= ~major~0 0)) l655 : 791#(and (= v_g_1 31) (= ~major~0 0)) l897 : 804#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l416 : 817#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l658 : 830#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l415 : 843#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l657 : 844#false l899 : 847#(and (= v_g_1 26) (= ~major~0 0)) l418 : 850#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l417 : 863#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l659 : 866#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l409 : 869#(and (= v_g_1 26) (= ~major~0 0)) l408 : 872#(and (= v_g_1 26) (= ~major~0 0)) l881 : 885#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l880 : 888#(and (= v_g_1 26) (= ~major~0 0)) l641 : 891#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l883 : 906#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l640 : 919#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l882 : 922#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l401 : 925#(and (= v_g_1 26) (= ~major~0 0)) l643 : 928#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l885 : 941#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l400 : 944#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l642 : 947#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l884 : 950#(and (= v_g_1 26) (= ~major~0 0)) l403 : 967#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l645 : 970#(= v_g_1 19) l887 : 973#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l402 : 986#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l644 : 989#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l886 : 994#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l405 : 997#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l647 : 1000#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l889 : 1003#(and (= v_g_1 26) (= ~major~0 0)) l404 : 1006#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l646 : 1009#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l888 : 1012#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l407 : 1015#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l649 : 1028#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l406 : 1031#(and (= v_g_1 26) (= ~major~0 0)) l648 : 1048#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l670 : 1061#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l430 : 1074#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l672 : 1087#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l671 : 1088#false l432 : 1091#(and (= v_g_1 26) (= ~major~0 0)) l674 : 1094#(and (= v_g_1 26) (= ~major~0 0)) l431 : 1097#(and (= v_g_1 26) (= ~major~0 0)) l673 : 1100#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l434 : 1113#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l676 : 1114#false l433 : 1127#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l675 : 1130#(and (= v_g_1 26) (= ~major~0 0)) l436 : 1133#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l678 : 1136#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l435 : 1141#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l677 : 1154#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l438 : 1157#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l437 : 1214#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 27) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 11) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 30) (= ~major~0 0)) (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (= v_g_1 34) (= ~major~0 0)) (and (= v_g_1 31) (= ~major~0 0)) (and (= ~major~0 0) (= v_g_1 6)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 2)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) (and (= v_g_1 13) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 22)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 21) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (= v_g_1 19) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0)) (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 8))) l679 : 1217#(and (= v_g_1 26) (= ~major~0 0)) l439 : 1230#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l661 : 1233#(and (= v_g_1 26) (= ~major~0 0)) l660 : 1246#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l421 : 1253#(or (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l663 : 1256#(and (= v_g_1 26) (= ~major~0 0)) l420 : 1259#(and (= v_g_1 26) (= ~major~0 0)) l662 : 1272#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l423 : 1285#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l665 : 1302#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l422 : 1305#(and (= v_g_1 26) (= ~major~0 0)) l664 : 1318#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l425 : 1319#false l667 : 1322#(and (= v_g_1 26) (= ~major~0 0)) l424 : 1325#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 11) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l666 : 1340#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l427 : 1345#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l669 : 1358#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l426 : 1361#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l668 : 1378#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l429 : 1381#(and (= v_g_1 26) (= ~major~0 0)) l428 : 1398#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l690 : 1411#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l450 : 1414#(and (= v_g_1 26) (= ~major~0 0)) l692 : 1417#(and (= v_g_1 26) (= ~major~0 0)) l691 : 1430#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l210 : 1431#false l452 : 1434#(and (= v_g_1 26) (= ~major~0 0)) l694 : 1437#(and (= v_g_1 30) (= ~major~0 0)) l451 : 1440#(and (= v_g_1 26) (= ~major~0 0)) l693 : 1443#(and (= v_g_1 26) (= ~major~0 0)) l212 : 1456#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l454 : 1459#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l696 : 1472#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l211 : 1475#(= v_g_1 19) l453 : 1478#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l695 : 1481#(and (= v_g_1 31) (= ~major~0 0)) l214 : 1494#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l456 : 1509#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l698 : 1512#(and (= v_g_1 26) (= ~major~0 0)) l213 : 1525#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l455 : 1528#(and (= v_g_1 26) (= ~major~0 0)) l697 : 1531#(and (= v_g_1 26) (= ~major~0 0)) l216 : 1534#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l458 : 1535#false l215 : 1538#(and (= v_g_1 26) (= ~major~0 0)) l457 : 1541#(and (= ~major~0 0) (= v_g_1 6)) l699 : 1544#(and (= v_g_1 26) (= ~major~0 0)) l218 : 1547#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l217 : 1550#(and (= v_g_1 26) (= ~major~0 0)) l459 : 1553#(and (= v_g_1 26) (= ~major~0 0)) l219 : 1558#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l681 : 1563#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l680 : 1566#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l441 : 1623#(or (and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 27) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 11) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 30) (= ~major~0 0)) (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (= v_g_1 34) (= ~major~0 0)) (and (= v_g_1 31) (= ~major~0 0)) (and (= ~major~0 0) (= v_g_1 6)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 2)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) (and (= v_g_1 13) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 22)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 21) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (= v_g_1 19) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0)) (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 8))) l683 : 1636#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l440 : 1639#(and (= v_g_1 26) (= ~major~0 0)) l682 : 1652#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l201 : 1655#(and (= v_g_1 31) (= ~major~0 0)) l443 : 1660#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l685 : 1663#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) l200 : 1664#false l442 : 1677#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l684 : 1680#(and (= v_g_1 26) (= ~major~0 0)) l203 : 1693#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l445 : 1696#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l687 : 1701#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l202 : 1704#(and (= v_g_1 26) (= ~major~0 0)) l444 : 1707#(and (= v_g_1 26) (= ~major~0 0)) l686 : 1710#(and (= v_g_1 26) (= ~major~0 0)) l205 : 1727#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l447 : 1730#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l689 : 1733#(and (= v_g_1 13) (= ~major~0 0)) l204 : 1746#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l446 : 1749#(and (= ~major~0 0) (= v_g_1 6)) l688 : 1752#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l207 : 1755#(and (= ~major~0 0) (= v_g_1 6)) l449 : 1768#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l206 : 1771#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l448 : 1772#false l209 : 1775#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l208 : 1778#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l470 : 1791#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l230 : 1804#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l472 : 1807#(and (= v_g_1 31) (= ~major~0 0)) l471 : 1820#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l232 : 1833#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l474 : 1846#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l231 : 1859#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l473 : 1872#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l234 : 1875#(and (= v_g_1 26) (= ~major~0 0)) l476 : 1878#(and (= v_g_1 26) (= ~major~0 0)) l233 : 1881#(and (= v_g_1 26) (= ~major~0 0)) l475 : 1884#(and (= v_g_1 26) (= ~major~0 0)) l236 : 1885#false l478 : 1898#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l235 : 1911#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l477 : 1914#(and (= v_g_1 26) (= ~major~0 0)) l238 : 1917#(and (= v_g_1 26) (= ~major~0 0)) l237 : 1924#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 27) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 34) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 22))) l479 : 1937#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l239 : 1940#(and (= v_g_1 26) (= ~major~0 0)) l461 : 1943#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l460 : 1956#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l221 : 1959#(and (= v_g_1 31) (= ~major~0 0)) l463 : 1962#(and (= v_g_1 30) (= ~major~0 0)) l220 : 1975#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l462 : 1978#(and (= v_g_1 26) (= ~major~0 0)) l223 : 1991#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l465 : 1994#(and (= v_g_1 26) (= ~major~0 0)) l222 : 1997#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l464 : 2010#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l225 : 2013#(and (= v_g_1 31) (= ~major~0 0)) l467 : 2026#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l224 : 2039#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l466 : 2040#false l227 : 2043#(and (= v_g_1 26) (= ~major~0 0)) l469 : 2048#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0)) (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 8))) l226 : 2049#false l468 : 2062#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l229 : 2065#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l228 : 2068#(= v_g_1 19) l250 : 2081#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l492 : 2094#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l491 : 2097#(and (= v_g_1 26) (= ~major~0 0)) l252 : 2100#(and (= v_g_1 13) (= ~major~0 0)) l494 : 2103#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l251 : 2116#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l493 : 2119#(and (= v_g_1 26) (= ~major~0 0)) l254 : 2122#(and (= v_g_1 26) (= ~major~0 0)) l496 : 2125#(and (= v_g_1 26) (= ~major~0 0)) l253 : 2128#(and (= v_g_1 26) (= ~major~0 0)) l495 : 2131#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l256 : 2132#false l498 : 2135#(= v_g_1 19) l255 : 2138#(and (= v_g_1 26) (= ~major~0 0)) l497 : 2141#(and (= v_g_1 26) (= ~major~0 0)) l258 : 2144#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l257 : 2147#(and (= ~major~0 0) (= v_g_1 6)) l499 : 2160#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l259 : 2163#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l490 : 2166#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l481 : 2179#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l480 : 2182#(and (= v_g_1 26) (= ~major~0 0)) l241 : 2185#(and (= v_g_1 26) (= ~major~0 0)) l483 : 2192#(or (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l240 : 2195#(and (= v_g_1 30) (= ~major~0 0)) l482 : 2198#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l243 : 2201#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l485 : 2204#(and (= v_g_1 26) (= ~major~0 0)) l242 : 2207#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l484 : 2210#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l245 : 2213#(and (= v_g_1 26) (= ~major~0 0)) l487 : 2226#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l244 : 2229#(and (= v_g_1 26) (= ~major~0 0)) l486 : 2232#(and (= v_g_1 26) (= ~major~0 0)) l247 : 2235#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l489 : 2238#(and (= v_g_1 26) (= ~major~0 0)) l246 : 2241#(and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 8)) l488 : 2244#(and (= v_g_1 26) (= ~major~0 0)) l249 : 2247#(and (= v_g_1 26) (= ~major~0 0)) l248 : 2252#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l281 : 2257#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l280 : 2260#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l272 : 2263#(and (= v_g_1 26) (= ~major~0 0)) l271 : 2266#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l274 : 2279#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l273 : 2296#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l276 : 2309#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l275 : 2312#(and (= v_g_1 26) (= ~major~0 0)) l278 : 2315#(and (= v_g_1 26) (= ~major~0 0)) l277 : 2318#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l279 : 2321#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l270 : 2324#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l261 : 2325#false l260 : 2338#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l263 : 2341#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l262 : 2344#(and (= ~major~0 0) (= v_g_1 6)) l265 : 2357#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l264 : 2370#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l267 : 2383#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l266 : 2396#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l269 : 2399#(and (= v_g_1 26) (= ~major~0 0)) l268 : 2402#(and (= v_g_1 26) (= ~major~0 0)) l294 : 2405#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l293 : 2418#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l296 : 2421#(and (= v_g_1 31) (= ~major~0 0)) l295 : 2424#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l298 : 2429#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l297 : 2434#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l299 : 2437#(= v_g_1 19) l290 : 2440#(and (= v_g_1 26) (= ~major~0 0)) l292 : 2443#(= v_g_1 19) l291 : 2456#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l283 : 2459#(and (= v_g_1 26) (= ~major~0 0)) l282 : 2462#(and (= v_g_1 26) (= ~major~0 0)) l285 : 2475#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l284 : 2478#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l287 : 2491#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l286 : 2504#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l289 : 2507#(and (= v_g_1 26) (= ~major~0 0)) l288 : 2510#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 11) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l10 : 2513#(and (= v_g_1 26) (= ~major~0 0)) l12 : 2516#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l11 : 2519#(and (= v_g_1 26) (= ~major~0 0)) l14 : 2532#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l13 : 2545#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l16 : 2548#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l15 : 2551#(and (= v_g_1 26) (= ~major~0 0)) l18 : 2552#false l17 : 2565#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l19 : 2568#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) l21 : 2571#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l20 : 2578#(or (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l23 : 2581#(and (= v_g_1 31) (= ~major~0 0)) l22 : 2584#(= v_g_1 19) l25 : 2587#(and (= v_g_1 26) (= ~major~0 0)) l24 : 2590#(and (= v_g_1 26) (= ~major~0 0)) l27 : 2593#(and (= v_g_1 26) (= ~major~0 0)) l26 : 2606#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l29 : 2609#(and (= v_g_1 26) (= ~major~0 0)) l28 : 2612#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l30 : 2615#(and (= v_g_1 26) (= ~major~0 0)) l32 : 2618#(and (= v_g_1 26) (= ~major~0 0)) l31 : 2631#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l34 : 2634#(and (= v_g_1 26) (= ~major~0 0)) l33 : 2637#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l36 : 2642#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l35 : 2645#(and (= v_g_1 30) (= ~major~0 0)) l38 : 2658#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l37 : 2671#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l39 : 2684#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l41 : 2687#(and (= v_g_1 26) (= ~major~0 0)) l40 : 2690#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l43 : 2693#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l42 : 2696#(and (= v_g_1 26) (= ~major~0 0)) l45 : 2709#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l44 : 2712#(and (= v_g_1 26) (= ~major~0 0)) l47 : 2713#false l46 : 2716#(and (= v_g_1 13) (= ~major~0 0)) l49 : 2719#(and (= v_g_1 26) (= ~major~0 0)) l48 : 2722#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l915 : 2725#(and (= v_g_1 26) (= ~major~0 0)) l914 : 2728#(and (= v_g_1 26) (= ~major~0 0)) l917 : 2731#(and (= v_g_1 26) (= ~major~0 0)) l916 : 2734#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l919 : 2737#(and (= v_g_1 26) (= ~major~0 0)) l918 : 2738#false l50 : 2741#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l52 : 2746#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l51 : 2749#(and (= v_g_1 13) (= ~major~0 0)) l54 : 2762#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l53 : 2765#(and (= v_g_1 31) (= ~major~0 0)) l56 : 2768#(and (= v_g_1 13) (= ~major~0 0)) l55 : 2771#(and (= v_g_1 26) (= ~major~0 0)) l58 : 2774#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l57 : 2779#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l59 : 2782#(and (= v_g_1 26) (= ~major~0 0)) l911 : 2795#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l910 : 2808#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l913 : 2821#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l912 : 2828#(or (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l904 : 2831#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l903 : 2844#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l906 : 2845#false l905 : 2850#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l908 : 2853#(and (= v_g_1 26) (= ~major~0 0)) l907 : 2856#(and (= v_g_1 13) (= ~major~0 0)) l61 : 2859#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l60 : 2862#(and (= v_g_1 13) (= ~major~0 0)) l909 : 2865#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) l63 : 2868#(and (= v_g_1 13) (= ~major~0 0)) l62 : 2881#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l65 : 2894#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l64 : 2907#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l67 : 2910#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l66 : 2911#false l69 : 2914#(and (= v_g_1 26) (= ~major~0 0)) l68 : 2917#(and (= ~major~0 0) (= v_g_1 6)) l900 : 2930#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l902 : 2943#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l901 : 2946#(and (= v_g_1 26) (= ~major~0 0)) l937 : 2959#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l936 : 2972#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l939 : 2973#false l938 : 2976#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l70 : 2989#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l72 : 3002#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l71 : 3015#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l74 : 3016#false l73 : 3029#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l76 : 3032#(and (= v_g_1 26) (= ~major~0 0)) l75 : 3035#(and (= v_g_1 26) (= ~major~0 0)) l78 : 3048#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l77 : 3061#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l79 : 3064#(and (= v_g_1 26) (= ~major~0 0)) l931 : 3067#(and (= v_g_1 26) (= ~major~0 0)) l930 : 3070#(and (= v_g_1 30) (= ~major~0 0)) l933 : 3073#(and (= v_g_1 26) (= ~major~0 0)) l932 : 3076#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l935 : 3093#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l934 : 3106#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l926 : 3107#false l925 : 3112#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l928 : 3115#(and (= v_g_1 26) (= ~major~0 0)) l927 : 3116#false l81 : 3117#false l80 : 3120#(and (= v_g_1 26) (= ~major~0 0)) l929 : 3125#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l83 : 3128#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l82 : 3141#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l85 : 3154#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l84 : 3157#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l87 : 3160#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l86 : 3163#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l89 : 3166#(and (= v_g_1 26) (= ~major~0 0)) l88 : 3179#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l920 : 3192#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l922 : 3199#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14))) l921 : 3202#(and (= v_g_1 30) (= ~major~0 0)) l924 : 3205#(and (= v_g_1 26) (= ~major~0 0)) l923 : 3208#(and (= v_g_1 13) (= ~major~0 0)) l717 : 3211#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l959 : 3214#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l716 : 3217#(and (= v_g_1 26) (= ~major~0 0)) l958 : 3220#(and (= v_g_1 13) (= ~major~0 0)) l90 : 3223#(= v_g_1 19) l719 : 3224#false l718 : 3225#false l92 : 3228#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l91 : 3231#(and (= v_g_1 13) (= ~major~0 0)) l94 : 3234#(and (= v_g_1 26) (= ~major~0 0)) l93 : 3237#(and (= v_g_1 26) (= ~major~0 0)) l96 : 3250#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l95 : 3253#(and (= v_g_1 26) (= ~major~0 0)) l98 : 3256#(and (= v_g_1 26) (= ~major~0 0)) l97 : 3259#(and (= v_g_1 13) (= ~major~0 0)) l99 : 3272#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l951 : 3277#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l950 : 3280#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l711 : 3281#false l953 : 3284#(and (= v_g_1 26) (= ~major~0 0)) l710 : 3285#false l952 : 3288#(and (= v_g_1 26) (= ~major~0 0)) l713 : 3291#(and (= v_g_1 30) (= ~major~0 0)) l955 : 3304#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l712 : 3317#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l954 : 3320#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l715 : 3323#(and (= v_g_1 26) (= ~major~0 0)) l957 : 3336#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l714 : 3339#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l956 : 3342#(and (= v_g_1 31) (= ~major~0 0)) l706 : 3345#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l948 : 3358#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l705 : 3371#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l947 : 3374#(and (= ~major~0 0) (= v_g_1 6)) l708 : 3377#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l707 : 3380#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l949 : 3383#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l709 : 3386#(and (= v_g_1 26) (= ~major~0 0)) l940 : 3389#(and (= v_g_1 26) (= ~major~0 0)) l700 : 3394#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l942 : 3397#(and (= v_g_1 26) (= ~major~0 0)) l941 : 3410#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l702 : 3413#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) l944 : 3416#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l701 : 3419#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l943 : 3422#(and (= v_g_1 30) (= ~major~0 0)) l704 : 3435#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l946 : 3452#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l703 : 3455#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l945 : 3460#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l739 : 3463#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l738 : 3466#(and (= v_g_1 26) (= ~major~0 0)) l731 : 3479#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l730 : 3480#false l733 : 3483#(and (= v_g_1 26) (= ~major~0 0)) l732 : 3486#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l735 : 3493#(or (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l734 : 3496#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l737 : 3499#(and (= v_g_1 26) (= ~major~0 0)) l736 : 3502#(and (= v_g_1 31) (= ~major~0 0)) l728 : 3505#(and (= v_g_1 26) (= ~major~0 0)) l727 : 3508#(and (= v_g_1 26) (= ~major~0 0)) l729 : 3511#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l960 : 3524#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l720 : 3525#false l962 : 3528#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l961 : 3531#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l722 : 3536#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l964 : 3549#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l721 : 3562#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l963 : 3569#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 27) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 34) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 22))) l724 : 3582#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l723 : 3585#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l726 : 3598#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l725 : 3601#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l519 : 3604#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 2)) l518 : 3607#(and (= v_g_1 26) (= ~major~0 0)) l751 : 3614#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 27) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 34) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 22))) l750 : 3617#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l511 : 3620#(and (= v_g_1 26) (= ~major~0 0)) l753 : 3623#(and (= v_g_1 26) (= ~major~0 0)) l510 : 3626#(and (= v_g_1 26) (= ~major~0 0)) l752 : 3629#(and (= v_g_1 26) (= ~major~0 0)) l513 : 3642#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l755 : 3645#(and (= v_g_1 26) (= ~major~0 0)) l512 : 3648#(and (= v_g_1 26) (= ~major~0 0)) l754 : 3651#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l515 : 3654#(and (= v_g_1 26) (= ~major~0 0)) l757 : 3657#(and (= v_g_1 26) (= ~major~0 0)) l514 : 3660#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) l756 : 3663#(and (= v_g_1 31) (= ~major~0 0)) l517 : 3680#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l759 : 3683#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l516 : 3686#(and (= v_g_1 13) (= ~major~0 0)) l758 : 3689#(and (= ~major~0 0) (= v_g_1 6)) l508 : 3692#(and (= v_g_1 26) (= ~major~0 0)) l507 : 3705#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l749 : 3718#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l509 : 3721#(and (= v_g_1 26) (= ~major~0 0)) l740 : 3724#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l500 : 3727#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l742 : 3740#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l741 : 3743#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l502 : 3746#(and (= v_g_1 26) (= ~major~0 0)) l744 : 3759#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l501 : 3764#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l743 : 3767#(and (= ~major~0 0) (= v_g_1 6)) l504 : 3780#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l746 : 3783#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l503 : 3786#(and (= v_g_1 26) (= ~major~0 0)) l745 : 3803#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l506 : 3816#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l748 : 3819#(and (= v_g_1 26) (= ~major~0 0)) l505 : 3822#(and (= v_g_1 30) (= ~major~0 0)) l747 : 3825#(and (= v_g_1 26) (= ~major~0 0)) l0 : 3828#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l1 : 3831#(and (= v_g_1 26) (= ~major~0 0)) l2 : 3834#(and (= v_g_1 26) (= ~major~0 0)) l3 : 3847#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l4 : 3850#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l5 : 3853#(and (= v_g_1 26) (= ~major~0 0)) l6 : 3866#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l7 : 3869#(and (= v_g_1 26) (= ~major~0 0)) l8 : 3872#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l9 : 3875#(and (= v_g_1 26) (= ~major~0 0)) l771 : 3888#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l770 : 3901#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l531 : 3904#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l773 : 3917#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l530 : 3920#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l772 : 3921#false l533 : 3938#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l775 : 3951#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l532 : 3954#(and (= v_g_1 26) (= ~major~0 0)) l774 : 3967#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l535 : 3970#(and (= ~major~0 0) (= v_g_1 6)) l777 : 3973#(and (= v_g_1 26) (= ~major~0 0)) l534 : 3976#(and (= ~major~0 0) (= v_g_1 6)) l776 : 3979#(and (= v_g_1 26) (= ~major~0 0)) l537 : 3992#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l779 : 3999#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14))) l536 : 4000#false l778 : 4003#(and (= ~major~0 0) (= v_g_1 6)) l539 : 4020#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l538 : 4023#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l529 : 4036#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l760 : 4039#(and (= v_g_1 26) (= ~major~0 0)) l520 : 4042#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l762 : 4045#(and (= v_g_1 26) (= ~major~0 0)) l761 : 4050#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l522 : 4053#(and (= v_g_1 26) (= ~major~0 0)) l764 : 4056#(and (= v_g_1 26) (= ~major~0 0)) l521 : 4059#(and (= v_g_1 26) (= ~major~0 0)) l763 : 4062#(and (= v_g_1 26) (= ~major~0 0)) l524 : 4065#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l766 : 4066#false l523 : 4069#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l765 : 4072#(and (= v_g_1 26) (= ~major~0 0)) l526 : 4075#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l768 : 4090#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l525 : 4093#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l767 : 4096#(and (= v_g_1 31) (= ~major~0 0)) l528 : 4099#(and (= v_g_1 26) (= ~major~0 0)) l527 : 4112#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l769 : 4115#(and (= v_g_1 26) (= ~major~0 0)) l791 : 4118#(and (= v_g_1 26) (= ~major~0 0)) l790 : 4131#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l551 : 4134#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l793 : 4147#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l550 : 4160#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l792 : 4173#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l311 : 4178#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l553 : 4181#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l795 : 4184#(and (= v_g_1 30) (= ~major~0 0)) l310 : 4197#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l552 : 4210#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l794 : 4213#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l313 : 4216#(and (= v_g_1 26) (= ~major~0 0)) l555 : 4217#false l797 : 4230#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l312 : 4233#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l554 : 4236#(and (= v_g_1 26) (= ~major~0 0)) l796 : 4239#(and (= v_g_1 30) (= ~major~0 0)) l315 : 4252#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l557 : 4253#false l799 : 4254#false l314 : 4267#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l556 : 4280#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l798 : 4283#(and (= v_g_1 31) (= ~major~0 0)) l317 : 4296#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l559 : 4311#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l316 : 4324#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l558 : 4327#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l319 : 4340#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l318 : 4353#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l309 : 4356#(and (= ~major~0 0) (= v_g_1 6)) l780 : 4359#(and (= v_g_1 31) (= ~major~0 0)) l540 : 4362#(and (= v_g_1 26) (= ~major~0 0)) l782 : 4365#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l781 : 4372#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14))) l300 : 4375#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l542 : 4388#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l784 : 4391#(and (= v_g_1 26) (= ~major~0 0)) l541 : 4394#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l783 : 4397#(and (= v_g_1 26) (= ~major~0 0)) l302 : 4410#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l544 : 4413#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l786 : 4426#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l301 : 4439#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l543 : 4452#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l785 : 4455#(and (= ~major~0 0) (= v_g_1 6)) l304 : 4458#(and (= ~major~0 0) (= v_g_1 6)) l546 : 4461#(and (= v_g_1 26) (= ~major~0 0)) l788 : 4474#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l303 : 4487#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l545 : 4490#(and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 8)) l787 : 4493#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l306 : 4506#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l548 : 4511#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l305 : 4514#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l547 : 4517#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l789 : 4520#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l308 : 4533#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l307 : 4546#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l549 : 4549#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l571 : 4552#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l570 : 4555#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l331 : 4568#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l573 : 4581#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l330 : 4584#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l572 : 4587#(and (= v_g_1 26) (= ~major~0 0)) l333 : 4590#(and (= v_g_1 26) (= ~major~0 0)) l575 : 4593#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l332 : 4596#(and (= v_g_1 26) (= ~major~0 0)) l574 : 4609#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l335 : 4622#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l577 : 4625#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l334 : 4628#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l576 : 4645#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l337 : 4658#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l579 : 4661#(and (= v_g_1 26) (= ~major~0 0)) l336 : 4674#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l578 : 4687#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l339 : 4700#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l338 : 4715#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l560 : 4718#(and (= v_g_1 26) (= ~major~0 0)) l320 : 4721#(and (= v_g_1 26) (= ~major~0 0)) l562 : 4724#(and (= v_g_1 26) (= ~major~0 0)) l561 : 4727#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l322 : 4732#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l564 : 4735#(and (= v_g_1 26) (= ~major~0 0)) l321 : 4748#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l563 : 4751#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l324 : 4754#(and (= v_g_1 13) (= ~major~0 0)) l566 : 4755#false l323 : 4768#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l565 : 4771#(= v_g_1 19) l326 : 4784#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l568 : 4787#(and (= v_g_1 26) (= ~major~0 0)) l325 : 4790#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l567 : 4803#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l328 : 4806#(and (= v_g_1 26) (= ~major~0 0)) l327 : 4807#false l569 : 4808#false l329 : 4811#(and (= v_g_1 26) (= ~major~0 0)) l591 : 4814#(and (= v_g_1 26) (= ~major~0 0)) l590 : 4817#(and (= v_g_1 26) (= ~major~0 0)) l351 : 4820#(and (= v_g_1 26) (= ~major~0 0)) l593 : 4823#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l350 : 4826#(and (= v_g_1 13) (= ~major~0 0)) l592 : 4829#(and (= v_g_1 26) (= ~major~0 0)) l111 : 4842#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l353 : 4845#(and (= v_g_1 31) (= ~major~0 0)) l595 : 4848#(and (= v_g_1 26) (= ~major~0 0)) l110 : 4849#false l352 : 4852#(and (= v_g_1 13) (= ~major~0 0)) l594 : 4865#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l113 : 4870#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l355 : 4883#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l597 : 4886#(and (= v_g_1 26) (= ~major~0 0)) l112 : 4899#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l354 : 4902#(and (= v_g_1 26) (= ~major~0 0)) l596 : 4905#(and (= v_g_1 26) (= ~major~0 0)) l115 : 4908#(and (= v_g_1 31) (= ~major~0 0)) l357 : 4909#false l599 : 4912#(and (= v_g_1 26) (= ~major~0 0)) l114 : 4915#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l356 : 4918#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 28) (= ~major~0 0)) l598 : 4921#(and (= v_g_1 31) (= ~major~0 0)) l117 : 4926#(or (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 2))) l359 : 4929#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l116 : 4932#(and (= v_g_1 26) (= ~major~0 0)) l358 : 4935#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l119 : 4938#(and (= v_g_1 26) (= ~major~0 0)) l118 : 4951#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l580 : 4954#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l340 : 4967#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l582 : 4980#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l581 : 4983#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l100 : 4996#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l342 : 5009#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l584 : 5022#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l341 : 5025#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l583 : 5028#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l102 : 5041#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l344 : 5054#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l586 : 5067#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l101 : 5070#(and (= v_g_1 26) (= ~major~0 0)) l343 : 5083#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l585 : 5096#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l104 : 5109#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l346 : 5110#false l588 : 5123#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l103 : 5126#(and (= ~major~0 0) (= v_g_1 6)) l345 : 5129#(and (= v_g_1 26) (= ~major~0 0)) l587 : 5132#(and (= v_g_1 26) (= ~major~0 0)) l106 : 5135#(and (= v_g_1 26) (= ~major~0 0)) l348 : 5140#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l105 : 5143#(and (= v_g_1 13) (= ~major~0 0)) l347 : 5156#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l589 : 5169#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l108 : 5174#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l107 : 5177#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l349 : 5180#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l109 : 5193#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l380 : 5206#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l371 : 5209#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l370 : 5222#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l131 : 5235#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l373 : 5238#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l130 : 5251#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l372 : 5254#(and (= v_g_1 26) (= ~major~0 0)) l133 : 5257#(and (= v_g_1 30) (= ~major~0 0)) l375 : 5270#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l132 : 5273#(= v_g_1 19) l374 : 5286#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l135 : 5289#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l377 : 5292#(and (= v_g_1 26) (= ~major~0 0)) l134 : 5297#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l376 : 5310#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l137 : 5313#(and (= v_g_1 26) (= ~major~0 0)) l379 : 5316#(and (= ~major~0 0) (= v_g_1 6)) l136 : 5319#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l378 : 5332#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l139 : 5335#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) l138 : 5338#(and (= v_g_1 26) (= ~major~0 0)) l360 : 5351#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l120 : 5354#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l362 : 5357#(= v_g_1 19) l361 : 5370#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l122 : 5373#(and (= v_g_1 26) (= ~major~0 0)) l364 : 5376#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l121 : 5379#(and (= v_g_1 26) (= ~major~0 0)) l363 : 5382#(and (= v_g_1 26) (= ~major~0 0)) l124 : 5383#false l366 : 5386#(and (= v_g_1 26) (= ~major~0 0)) l123 : 5389#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l365 : 5392#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l126 : 5395#(and (= v_g_1 26) (= ~major~0 0)) l368 : 5400#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l125 : 5403#(and (= v_g_1 26) (= ~major~0 0)) l367 : 5416#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l128 : 5429#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l127 : 5434#(or (and (<= 1 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 18) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (<= 0 |ULTIMATE.start_pc8736x_init_shadow_~port~3#1|) (= v_g_1 32) (<= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 3) (= |ULTIMATE.start_pc8736x_init_shadow_~port~3#1| 0))) l369 : 5451#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) (and (= v_g_1 26) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 3) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0))) l129 : 5464#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l160 : 5477#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l151 : 5480#(and (= v_g_1 26) (= ~major~0 0)) l393 : 5483#(and (= v_g_1 30) (= ~major~0 0)) l150 : 5486#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l392 : 5489#(and (= v_g_1 30) (= ~major~0 0)) l153 : 5492#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l395 : 5495#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l152 : 5508#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l394 : 5521#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l155 : 5534#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l397 : 5537#(and (= v_g_1 13) (= ~major~0 0)) l154 : 5540#(and (= v_g_1 26) (= ~major~0 0)) l396 : 5553#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l157 : 5566#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l399 : 5579#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l156 : 5582#(and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) l398 : 5595#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l159 : 5598#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l158 : 5601#(and (= v_g_1 30) (= ~major~0 0)) l391 : 5604#(and (= v_g_1 26) (= ~major~0 0)) l390 : 5617#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l140 : 5620#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l382 : 5623#(and (= v_g_1 26) (= ~major~0 0)) l381 : 5626#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l142 : 5629#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l384 : 5642#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l141 : 5645#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l383 : 5648#(and (= v_g_1 26) (= ~major~0 0)) l144 : 5651#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l386 : 5654#(and (= v_g_1 26) (= ~major~0 0)) l143 : 5667#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l385 : 5670#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 9) (= ~major~0 0)) l146 : 5673#(and (= v_g_1 26) (= ~major~0 0)) l388 : 5676#(and (= v_g_1 26) (= ~major~0 0)) l145 : 5679#(and (= v_g_1 26) (= ~major~0 0)) l387 : 5692#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l148 : 5705#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l147 : 5710#(or (and (= v_g_1 7) (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 2))) l389 : 5713#(= v_g_1 19) l149 : 5716#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l180 : 5729#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l182 : 5732#(and (= v_g_1 26) (= ~major~0 0)) l181 : 5735#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l173 : 5738#(and (= v_g_1 13) (= ~major~0 0)) l172 : 5741#(and (= v_g_1 26) (= ~major~0 0)) l175 : 5744#(and (= v_g_1 26) (= ~major~0 0)) l174 : 5757#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l177 : 5760#(and (= v_g_1 26) (= ~major~0 0)) l176 : 5763#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l179 : 5766#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l178 : 5769#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 21) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l171 : 5772#(and (<= 0 |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1|) (<= |ULTIMATE.start_pc8736x_gpio_init_#t~ret1152#1| 255) (= v_g_1 20) (= ~major~0 0)) l170 : 5775#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 33)) l162 : 5778#(and (= v_g_1 26) (= ~major~0 0)) l161 : 5781#(and (= v_g_1 26) (= ~major~0 0)) l164 : 5784#(and (= v_g_1 26) (= ~major~0 0)) l163 : 5787#(and (= v_g_1 26) (= ~major~0 0)) l166 : 5800#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l165 : 5803#(and (= v_g_1 26) (= ~major~0 0)) l168 : 5806#(and (= ~major~0 0) (= v_g_1 6)) l167 : 5809#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 12) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) l169 : 5822#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l195 : 5823#false l194 : 5836#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (= v_g_1 23) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 29) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 15))) l197 : 5839#(and (= v_g_1 26) (= ~major~0 0)) l196 : 5842#(and (= v_g_1 26) (= ~major~0 0)) l199 : 5845#(and (= v_g_1 26) (= ~major~0 0)) l198 : 5848#(and (= v_g_1 26) (= ~major~0 0)) l191 : 5853#(or (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (= v_g_1 24) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 1))) l190 : 5856#(and (= v_g_1 26) (= ~major~0 0)) l193 : 5859#(and (= v_g_1 26) (= ~major~0 0)) l192 : 5872#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l184 : 5875#(and (= v_g_1 26) (= ~major~0 0)) l183 : 5878#(and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 4) (= ~major~0 0)) l186 : 5891#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l185 : 5904#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 10)) (and (= v_g_1 17) (= ~major~0 0)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= ~major~0 0) (= v_g_1 14)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) l188 : 5907#(and (= v_g_1 26) (= ~major~0 0)) l187 : 5910#(and (= v_g_1 26) (= ~major~0 0)) l189 : 5917#(or (and (= ~major~0 0) (= v_g_1 25)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 16)) (and (<= |ULTIMATE.start_superio_inb_#res#1| 255) (<= 0 |ULTIMATE.start_superio_inb_#res#1|) (= v_g_1 5) (= ~major~0 0))) Ghost Variables (and initial values): v_g_1 : 19 Ghost Updates: [979][705] : (v_g_1) := ((ite (= v_g_1 18) 8 (ite (= v_g_1 32) 8 v_g_1))) [467][902] : (v_g_1) := ((ite (= v_g_1 5) 27 (ite (= v_g_1 25) 34 (ite (= v_g_1 16) 22 v_g_1)))) [163][967] : (v_g_1) := ((ite (= v_g_1 3) 6 v_g_1)) [904][588] : (v_g_1) := ((ite (= v_g_1 28) 12 v_g_1)) [73][845] : (v_g_1) := ((ite (= v_g_1 8) 33 v_g_1)) [624][207] : (v_g_1) := ((ite (= v_g_1 31) 3 v_g_1)) [34][784] : (v_g_1) := ((ite (= v_g_1 32) 32 (ite (= v_g_1 8) 18 v_g_1))) [906][594] : (v_g_1) := ((ite (= v_g_1 11) 9 v_g_1)) [994][722] : (v_g_1) := ((ite (= v_g_1 7) 21 v_g_1)) [677][278] : (v_g_1) := ((ite (= v_g_1 6) 11 v_g_1)) [864][536] : (v_g_1) := ((ite (= v_g_1 19) 26 v_g_1)) [818][473] : (v_g_1) := ((ite (= v_g_1 21) 2 v_g_1)) [769][411] : (v_g_1) := ((ite (= v_g_1 7) 32 (ite (= v_g_1 2) 32 v_g_1))) [955][667] : (v_g_1) := ((ite (= v_g_1 30) 1 v_g_1)) [85][859] : (v_g_1) := ((ite (= v_g_1 24) 30 v_g_1)) [770][412] : (v_g_1) := ((ite (= v_g_1 9) 20 v_g_1)) [914][606] : (v_g_1) := ((ite (= v_g_1 12) 7 v_g_1)) [821][481] : (v_g_1) := ((ite (= v_g_1 4) 31 v_g_1)) [139][930] : (v_g_1) := ((ite (= v_g_1 1) 13 (ite (= v_g_1 24) 13 v_g_1))) [959][675] : (v_g_1) := ((ite (= v_g_1 26) 24 v_g_1)) [465][173] : (v_g_1) := ((ite (= v_g_1 23) 17 (ite (= v_g_1 29) 14 (ite (= v_g_1 15) 10 v_g_1)))) [832][494] : (v_g_1) := ((ite (= v_g_1 20) 28 v_g_1)) [463][754] : (v_g_1) := ((ite (= v_g_1 3) 29 (ite (= v_g_1 12) 29 (ite (= v_g_1 1) 29 (ite (= v_g_1 33) 15 (ite (= v_g_1 7) 15 (ite (= v_g_1 26) 23 (ite (= v_g_1 4) 29 (ite (= v_g_1 24) 29 v_g_1))))))))) [466][183] : (v_g_1) := ((ite (= v_g_1 17) 25 (ite (= v_g_1 10) 16 (ite (= v_g_1 14) 5 v_g_1)))) [794][446] : (v_g_1) := ((ite (= v_g_1 13) 4 v_g_1)) [INFO]: EmpireComputation time [ms]: 1, EmpireComputation statistics: automaton size: 34, number of unique pairs: 34, empire law size: 608, empire annotation size: 642, number of regions: 32, number of territories: 26, Min number of regions per territory: 3, Max number of regions per territory: 5, Median number of regions per territory: 3, Min number of places per region: 1, Max number of places per region: 275, Median number of places per region: 17, Empire validity check time [ms]: 4106, EmpireToOwickiGries time [ms]: 2884, Owicki-Gries validity check time [ms]: 16274 │ │ │ duration: 35363 ms │ │ │ status: ✔ SUCCESSFUL │ └─ EmpireAutomatonOG finished after 35369 ms. └─ JUnit Vintage finished after 35376 ms. ├─ JUnit Platform Suite └─ JUnit Platform Suite finished after 0 ms. Test plan execution finished. Number of all tests: 1  Test run finished after 35409 ms [ 4 containers found ] [ 0 containers skipped ] [ 4 containers started ] [ 0 containers aborted ] [ 4 containers successful ] [ 0 containers failed ] [ 1 tests found ] [ 0 tests skipped ] [ 1 tests started ] [ 0 tests aborted ] [ 1 tests successful ] [ 0 tests failed ]