java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/pu-bench/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/programs/real-life/GuiTestExample.bpl -------------------------------------------------------------------------------- This is Ultimate 0.1.23-d19836b [2018-09-26 21:12:00,709 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-26 21:12:00,711 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-26 21:12:00,723 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-26 21:12:00,724 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-26 21:12:00,725 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-26 21:12:00,729 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-26 21:12:00,732 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-26 21:12:00,734 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-26 21:12:00,737 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-26 21:12:00,739 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-26 21:12:00,739 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-26 21:12:00,741 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-26 21:12:00,742 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-26 21:12:00,749 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-26 21:12:00,751 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-26 21:12:00,754 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-26 21:12:00,756 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-26 21:12:00,761 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-26 21:12:00,763 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-26 21:12:00,764 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-26 21:12:00,765 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-26 21:12:00,768 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-26 21:12:00,768 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-26 21:12:00,770 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-26 21:12:00,772 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-26 21:12:00,773 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-26 21:12:00,773 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-26 21:12:00,774 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-26 21:12:00,777 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-26 21:12:00,777 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-26 21:12:00,778 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-26 21:12:00,779 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-26 21:12:00,779 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-26 21:12:00,780 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-26 21:12:00,782 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-26 21:12:00,783 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/pu-bench/svcomp-Reach-32bit-Automizer_Default.epf [2018-09-26 21:12:00,809 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-26 21:12:00,809 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-26 21:12:00,810 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-26 21:12:00,810 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-09-26 21:12:00,811 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-09-26 21:12:00,811 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-09-26 21:12:00,811 INFO L133 SettingsManager]: * Use SBE=true [2018-09-26 21:12:00,811 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-26 21:12:00,812 INFO L133 SettingsManager]: * sizeof long=4 [2018-09-26 21:12:00,812 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-26 21:12:00,812 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-09-26 21:12:00,812 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-26 21:12:00,812 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-26 21:12:00,813 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-26 21:12:00,813 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-26 21:12:00,813 INFO L133 SettingsManager]: * sizeof long double=12 [2018-09-26 21:12:00,813 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-26 21:12:00,813 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-26 21:12:00,814 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-26 21:12:00,814 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-26 21:12:00,814 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-26 21:12:00,814 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-26 21:12:00,815 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-26 21:12:00,815 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-26 21:12:00,815 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-26 21:12:00,815 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-26 21:12:00,815 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-09-26 21:12:00,816 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-26 21:12:00,816 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-26 21:12:00,816 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-26 21:12:00,861 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-26 21:12:00,877 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-26 21:12:00,883 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-26 21:12:00,884 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2018-09-26 21:12:00,885 INFO L276 PluginConnector]: Boogie PL CUP Parser initialized [2018-09-26 21:12:00,886 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl [2018-09-26 21:12:00,886 INFO L111 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl' [2018-09-26 21:12:01,017 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-26 21:12:01,021 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-09-26 21:12:01,022 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-26 21:12:01,022 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-26 21:12:01,022 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-26 21:12:01,042 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,073 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,082 WARN L165 Inliner]: Program contained no entry procedure! [2018-09-26 21:12:01,082 WARN L168 Inliner]: Missing entry procedures: [ULTIMATE.start] [2018-09-26 21:12:01,083 WARN L175 Inliner]: Fallback enabled. All procedures will be processed. [2018-09-26 21:12:01,111 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-26 21:12:01,112 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-26 21:12:01,113 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-26 21:12:01,113 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-26 21:12:01,124 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,125 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,132 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,133 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,143 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,147 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,151 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... [2018-09-26 21:12:01,158 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-26 21:12:01,159 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-26 21:12:01,159 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-26 21:12:01,159 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-26 21:12:01,160 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-26 21:12:01,250 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration [2018-09-26 21:12:01,250 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2018-09-26 21:12:01,250 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2018-09-26 21:12:01,251 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration [2018-09-26 21:12:01,251 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2018-09-26 21:12:01,251 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2018-09-26 21:12:01,251 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration [2018-09-26 21:12:01,251 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2018-09-26 21:12:01,252 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2018-09-26 21:12:01,252 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration [2018-09-26 21:12:01,252 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2018-09-26 21:12:01,252 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2018-09-26 21:12:01,253 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration [2018-09-26 21:12:01,253 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2018-09-26 21:12:01,253 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2018-09-26 21:12:01,253 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940 [2018-09-26 21:12:01,253 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827 [2018-09-26 21:12:01,253 INFO L124 BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration [2018-09-26 21:12:01,254 INFO L130 BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2018-09-26 21:12:01,254 INFO L138 BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2018-09-26 21:12:01,254 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration [2018-09-26 21:12:01,254 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2018-09-26 21:12:01,254 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2018-09-26 21:12:01,255 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858 [2018-09-26 21:12:01,255 INFO L124 BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration [2018-09-26 21:12:01,255 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2018-09-26 21:12:01,255 INFO L138 BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2018-09-26 21:12:01,257 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration [2018-09-26 21:12:01,257 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2018-09-26 21:12:01,257 INFO L138 BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2018-09-26 21:12:01,257 INFO L124 BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration [2018-09-26 21:12:01,259 INFO L130 BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808 [2018-09-26 21:12:01,259 INFO L138 BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808 [2018-09-26 21:12:01,259 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816 [2018-09-26 21:12:01,259 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123 [2018-09-26 21:12:01,259 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration [2018-09-26 21:12:01,259 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2018-09-26 21:12:01,260 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2018-09-26 21:12:01,260 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913 [2018-09-26 21:12:01,260 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131 [2018-09-26 21:12:01,260 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration [2018-09-26 21:12:01,260 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2018-09-26 21:12:01,261 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2018-09-26 21:12:01,261 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918 [2018-09-26 21:12:01,261 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305 [2018-09-26 21:12:01,261 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909 [2018-09-26 21:12:01,261 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255 [2018-09-26 21:12:01,265 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852 [2018-09-26 21:12:01,265 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304 [2018-09-26 21:12:01,265 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration [2018-09-26 21:12:01,265 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807 [2018-09-26 21:12:01,266 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807 [2018-09-26 21:12:01,266 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889 [2018-09-26 21:12:01,266 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration [2018-09-26 21:12:01,266 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803 [2018-09-26 21:12:01,268 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803 [2018-09-26 21:12:01,268 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration [2018-09-26 21:12:01,268 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804 [2018-09-26 21:12:01,269 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804 [2018-09-26 21:12:01,269 INFO L124 BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration [2018-09-26 21:12:01,269 INFO L130 BoogieDeclarations]: Found specification of procedure $EFG_Procedure [2018-09-26 21:12:01,269 INFO L138 BoogieDeclarations]: Found implementation of procedure $EFG_Procedure [2018-09-26 21:12:01,270 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558 [2018-09-26 21:12:01,270 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38 [2018-09-26 21:12:01,270 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075 [2018-09-26 21:12:01,530 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:01,606 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:01,647 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:01,706 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:02,035 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:02,062 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:02,066 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:02,069 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:02,078 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:02,085 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:02,104 WARN L639 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-26 21:12:02,621 INFO L343 CfgBuilder]: Using library mode [2018-09-26 21:12:02,622 INFO L202 PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.09 09:12:02 BoogieIcfgContainer [2018-09-26 21:12:02,622 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-26 21:12:02,626 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-26 21:12:02,626 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-26 21:12:02,634 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-26 21:12:02,635 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 26.09 09:12:00" (1/2) ... [2018-09-26 21:12:02,636 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dc88814 and model type GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.09 09:12:02, skipping insertion in model container [2018-09-26 21:12:02,636 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.09 09:12:02" (2/2) ... [2018-09-26 21:12:02,638 INFO L112 eAbstractionObserver]: Analyzing ICFG GuiTestExample.bpl [2018-09-26 21:12:02,648 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-26 21:12:02,658 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 78 error locations. [2018-09-26 21:12:02,725 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-09-26 21:12:02,726 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-26 21:12:02,726 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-26 21:12:02,726 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-26 21:12:02,726 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-26 21:12:02,726 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-26 21:12:02,727 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-26 21:12:02,727 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-26 21:12:02,728 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-26 21:12:02,782 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states. [2018-09-26 21:12:02,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2018-09-26 21:12:02,796 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:02,797 INFO L375 BasicCegarLoop]: trace histogram [1, 1] [2018-09-26 21:12:02,802 INFO L423 AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:02,809 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:02,810 INFO L82 PathProgramCache]: Analyzing trace with hash 10786, now seen corresponding path program 1 times [2018-09-26 21:12:02,812 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:02,813 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:02,868 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:02,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:02,869 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:02,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:02,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:02,964 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:02,964 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2018-09-26 21:12:02,969 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-26 21:12:02,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-26 21:12:02,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-26 21:12:02,988 INFO L87 Difference]: Start difference. First operand 374 states. Second operand 3 states. [2018-09-26 21:12:03,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:03,066 INFO L93 Difference]: Finished difference Result 374 states and 395 transitions. [2018-09-26 21:12:03,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-26 21:12:03,068 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 2 [2018-09-26 21:12:03,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:03,088 INFO L225 Difference]: With dead ends: 374 [2018-09-26 21:12:03,089 INFO L226 Difference]: Without dead ends: 333 [2018-09-26 21:12:03,093 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-26 21:12:03,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-09-26 21:12:03,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 333. [2018-09-26 21:12:03,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2018-09-26 21:12:03,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 352 transitions. [2018-09-26 21:12:03,213 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 352 transitions. Word has length 2 [2018-09-26 21:12:03,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:03,213 INFO L480 AbstractCegarLoop]: Abstraction has 333 states and 352 transitions. [2018-09-26 21:12:03,214 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-26 21:12:03,214 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 352 transitions. [2018-09-26 21:12:03,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-26 21:12:03,215 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:03,215 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-26 21:12:03,218 INFO L423 AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:03,218 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:03,219 INFO L82 PathProgramCache]: Analyzing trace with hash 334707, now seen corresponding path program 1 times [2018-09-26 21:12:03,219 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:03,219 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:03,220 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:03,221 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:03,221 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:03,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:03,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:03,308 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:03,308 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-26 21:12:03,310 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-26 21:12:03,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-26 21:12:03,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-26 21:12:03,311 INFO L87 Difference]: Start difference. First operand 333 states and 352 transitions. Second operand 4 states. [2018-09-26 21:12:03,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:03,477 INFO L93 Difference]: Finished difference Result 333 states and 352 transitions. [2018-09-26 21:12:03,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-26 21:12:03,478 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-26 21:12:03,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:03,481 INFO L225 Difference]: With dead ends: 333 [2018-09-26 21:12:03,482 INFO L226 Difference]: Without dead ends: 332 [2018-09-26 21:12:03,483 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-26 21:12:03,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 332 states. [2018-09-26 21:12:03,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 332 to 332. [2018-09-26 21:12:03,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2018-09-26 21:12:03,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 351 transitions. [2018-09-26 21:12:03,511 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 351 transitions. Word has length 3 [2018-09-26 21:12:03,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:03,511 INFO L480 AbstractCegarLoop]: Abstraction has 332 states and 351 transitions. [2018-09-26 21:12:03,512 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-26 21:12:03,512 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 351 transitions. [2018-09-26 21:12:03,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-26 21:12:03,513 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:03,513 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-26 21:12:03,515 INFO L423 AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:03,516 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:03,516 INFO L82 PathProgramCache]: Analyzing trace with hash 172816, now seen corresponding path program 1 times [2018-09-26 21:12:03,516 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:03,516 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:03,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:03,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:03,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:03,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:03,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:03,655 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:03,655 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-26 21:12:03,655 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-26 21:12:03,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-26 21:12:03,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-26 21:12:03,656 INFO L87 Difference]: Start difference. First operand 332 states and 351 transitions. Second operand 4 states. [2018-09-26 21:12:03,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:03,766 INFO L93 Difference]: Finished difference Result 332 states and 351 transitions. [2018-09-26 21:12:03,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-26 21:12:03,768 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-26 21:12:03,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:03,771 INFO L225 Difference]: With dead ends: 332 [2018-09-26 21:12:03,771 INFO L226 Difference]: Without dead ends: 331 [2018-09-26 21:12:03,772 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-26 21:12:03,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-09-26 21:12:03,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 331. [2018-09-26 21:12:03,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-09-26 21:12:03,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 350 transitions. [2018-09-26 21:12:03,794 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 350 transitions. Word has length 3 [2018-09-26 21:12:03,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:03,795 INFO L480 AbstractCegarLoop]: Abstraction has 331 states and 350 transitions. [2018-09-26 21:12:03,795 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-26 21:12:03,795 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 350 transitions. [2018-09-26 21:12:03,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-26 21:12:03,796 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:03,796 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-26 21:12:03,798 INFO L423 AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:03,799 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:03,799 INFO L82 PathProgramCache]: Analyzing trace with hash 186718, now seen corresponding path program 1 times [2018-09-26 21:12:03,799 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:03,799 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:03,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:03,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:03,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:03,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:03,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:03,840 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:03,840 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-26 21:12:03,840 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-26 21:12:03,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-26 21:12:03,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-26 21:12:03,841 INFO L87 Difference]: Start difference. First operand 331 states and 350 transitions. Second operand 4 states. [2018-09-26 21:12:04,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:04,041 INFO L93 Difference]: Finished difference Result 331 states and 350 transitions. [2018-09-26 21:12:04,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-26 21:12:04,053 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-26 21:12:04,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:04,055 INFO L225 Difference]: With dead ends: 331 [2018-09-26 21:12:04,055 INFO L226 Difference]: Without dead ends: 330 [2018-09-26 21:12:04,056 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-26 21:12:04,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-09-26 21:12:04,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 330. [2018-09-26 21:12:04,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 330 states. [2018-09-26 21:12:04,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330 states to 330 states and 349 transitions. [2018-09-26 21:12:04,081 INFO L78 Accepts]: Start accepts. Automaton has 330 states and 349 transitions. Word has length 3 [2018-09-26 21:12:04,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:04,081 INFO L480 AbstractCegarLoop]: Abstraction has 330 states and 349 transitions. [2018-09-26 21:12:04,082 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-26 21:12:04,082 INFO L276 IsEmpty]: Start isEmpty. Operand 330 states and 349 transitions. [2018-09-26 21:12:04,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-26 21:12:04,082 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:04,083 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-26 21:12:04,085 INFO L423 AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:04,086 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:04,086 INFO L82 PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times [2018-09-26 21:12:04,086 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:04,086 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:04,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,088 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:04,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:04,179 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:04,180 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:04,180 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-26 21:12:04,180 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-26 21:12:04,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-26 21:12:04,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-26 21:12:04,181 INFO L87 Difference]: Start difference. First operand 330 states and 349 transitions. Second operand 4 states. [2018-09-26 21:12:04,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:04,288 INFO L93 Difference]: Finished difference Result 330 states and 349 transitions. [2018-09-26 21:12:04,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-26 21:12:04,290 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-26 21:12:04,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:04,292 INFO L225 Difference]: With dead ends: 330 [2018-09-26 21:12:04,293 INFO L226 Difference]: Without dead ends: 329 [2018-09-26 21:12:04,293 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-26 21:12:04,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-09-26 21:12:04,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 329. [2018-09-26 21:12:04,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-09-26 21:12:04,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 348 transitions. [2018-09-26 21:12:04,308 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 348 transitions. Word has length 3 [2018-09-26 21:12:04,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:04,308 INFO L480 AbstractCegarLoop]: Abstraction has 329 states and 348 transitions. [2018-09-26 21:12:04,308 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-26 21:12:04,308 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 348 transitions. [2018-09-26 21:12:04,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-26 21:12:04,309 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:04,309 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-26 21:12:04,311 INFO L423 AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:04,312 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:04,312 INFO L82 PathProgramCache]: Analyzing trace with hash 164872, now seen corresponding path program 1 times [2018-09-26 21:12:04,312 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:04,312 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:04,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:04,314 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:04,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:04,356 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:04,356 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-26 21:12:04,357 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-26 21:12:04,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-26 21:12:04,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-26 21:12:04,358 INFO L87 Difference]: Start difference. First operand 329 states and 348 transitions. Second operand 4 states. [2018-09-26 21:12:04,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:04,386 INFO L93 Difference]: Finished difference Result 329 states and 348 transitions. [2018-09-26 21:12:04,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-26 21:12:04,386 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-26 21:12:04,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:04,389 INFO L225 Difference]: With dead ends: 329 [2018-09-26 21:12:04,389 INFO L226 Difference]: Without dead ends: 325 [2018-09-26 21:12:04,390 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-26 21:12:04,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-09-26 21:12:04,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 325. [2018-09-26 21:12:04,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325 states. [2018-09-26 21:12:04,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 345 transitions. [2018-09-26 21:12:04,403 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 345 transitions. Word has length 3 [2018-09-26 21:12:04,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:04,403 INFO L480 AbstractCegarLoop]: Abstraction has 325 states and 345 transitions. [2018-09-26 21:12:04,403 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-26 21:12:04,403 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 345 transitions. [2018-09-26 21:12:04,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-09-26 21:12:04,404 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:04,404 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-09-26 21:12:04,407 INFO L423 AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:04,407 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:04,407 INFO L82 PathProgramCache]: Analyzing trace with hash 6250211, now seen corresponding path program 1 times [2018-09-26 21:12:04,408 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:04,408 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:04,409 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,410 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:04,410 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:04,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:04,425 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:04,426 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-26 21:12:04,427 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-26 21:12:04,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-26 21:12:04,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-26 21:12:04,429 INFO L87 Difference]: Start difference. First operand 325 states and 345 transitions. Second operand 3 states. [2018-09-26 21:12:04,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:04,480 INFO L93 Difference]: Finished difference Result 325 states and 345 transitions. [2018-09-26 21:12:04,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-26 21:12:04,481 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-09-26 21:12:04,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:04,484 INFO L225 Difference]: With dead ends: 325 [2018-09-26 21:12:04,484 INFO L226 Difference]: Without dead ends: 324 [2018-09-26 21:12:04,485 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-26 21:12:04,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-09-26 21:12:04,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 324. [2018-09-26 21:12:04,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324 states. [2018-09-26 21:12:04,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 344 transitions. [2018-09-26 21:12:04,501 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 344 transitions. Word has length 4 [2018-09-26 21:12:04,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:04,502 INFO L480 AbstractCegarLoop]: Abstraction has 324 states and 344 transitions. [2018-09-26 21:12:04,502 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-26 21:12:04,502 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 344 transitions. [2018-09-26 21:12:04,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-09-26 21:12:04,504 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:04,504 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-09-26 21:12:04,507 INFO L423 AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:04,508 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:04,508 INFO L82 PathProgramCache]: Analyzing trace with hash 1632611, now seen corresponding path program 1 times [2018-09-26 21:12:04,508 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:04,508 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:04,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:04,510 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:04,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:04,530 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:04,531 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-26 21:12:04,531 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-26 21:12:04,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-26 21:12:04,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-26 21:12:04,533 INFO L87 Difference]: Start difference. First operand 324 states and 344 transitions. Second operand 4 states. [2018-09-26 21:12:04,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:04,668 INFO L93 Difference]: Finished difference Result 324 states and 344 transitions. [2018-09-26 21:12:04,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-26 21:12:04,669 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 4 [2018-09-26 21:12:04,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:04,672 INFO L225 Difference]: With dead ends: 324 [2018-09-26 21:12:04,672 INFO L226 Difference]: Without dead ends: 300 [2018-09-26 21:12:04,674 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-26 21:12:04,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-09-26 21:12:04,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 300. [2018-09-26 21:12:04,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2018-09-26 21:12:04,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 319 transitions. [2018-09-26 21:12:04,689 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 319 transitions. Word has length 4 [2018-09-26 21:12:04,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:04,690 INFO L480 AbstractCegarLoop]: Abstraction has 300 states and 319 transitions. [2018-09-26 21:12:04,690 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-26 21:12:04,690 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 319 transitions. [2018-09-26 21:12:04,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-09-26 21:12:04,691 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:04,691 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-09-26 21:12:04,693 INFO L423 AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:04,693 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:04,693 INFO L82 PathProgramCache]: Analyzing trace with hash 321664405, now seen corresponding path program 1 times [2018-09-26 21:12:04,694 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:04,694 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:04,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:04,695 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:04,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:04,861 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:04,861 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-26 21:12:04,861 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-26 21:12:04,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-26 21:12:04,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-26 21:12:04,862 INFO L87 Difference]: Start difference. First operand 300 states and 319 transitions. Second operand 5 states. [2018-09-26 21:12:04,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:04,937 INFO L93 Difference]: Finished difference Result 300 states and 319 transitions. [2018-09-26 21:12:04,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-26 21:12:04,938 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2018-09-26 21:12:04,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:04,944 INFO L225 Difference]: With dead ends: 300 [2018-09-26 21:12:04,945 INFO L226 Difference]: Without dead ends: 294 [2018-09-26 21:12:04,945 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-09-26 21:12:04,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-09-26 21:12:04,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 294. [2018-09-26 21:12:04,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-09-26 21:12:04,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 314 transitions. [2018-09-26 21:12:04,971 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 314 transitions. Word has length 5 [2018-09-26 21:12:04,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:04,971 INFO L480 AbstractCegarLoop]: Abstraction has 294 states and 314 transitions. [2018-09-26 21:12:04,971 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-26 21:12:04,971 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 314 transitions. [2018-09-26 21:12:04,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-09-26 21:12:04,972 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:04,972 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-09-26 21:12:04,974 INFO L423 AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:04,974 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:04,975 INFO L82 PathProgramCache]: Analyzing trace with hash 193756751, now seen corresponding path program 1 times [2018-09-26 21:12:04,975 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:04,975 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:04,981 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,981 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:04,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:04,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-26 21:12:05,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-26 21:12:05,130 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-26 21:12:05,130 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-26 21:12:05,130 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-26 21:12:05,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-26 21:12:05,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-26 21:12:05,131 INFO L87 Difference]: Start difference. First operand 294 states and 314 transitions. Second operand 4 states. [2018-09-26 21:12:05,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-26 21:12:05,334 INFO L93 Difference]: Finished difference Result 294 states and 314 transitions. [2018-09-26 21:12:05,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-26 21:12:05,335 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 5 [2018-09-26 21:12:05,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-26 21:12:05,337 INFO L225 Difference]: With dead ends: 294 [2018-09-26 21:12:05,338 INFO L226 Difference]: Without dead ends: 293 [2018-09-26 21:12:05,338 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-26 21:12:05,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-09-26 21:12:05,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2018-09-26 21:12:05,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 293 states. [2018-09-26 21:12:05,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 313 transitions. [2018-09-26 21:12:05,360 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 313 transitions. Word has length 5 [2018-09-26 21:12:05,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-26 21:12:05,360 INFO L480 AbstractCegarLoop]: Abstraction has 293 states and 313 transitions. [2018-09-26 21:12:05,360 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-26 21:12:05,360 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 313 transitions. [2018-09-26 21:12:05,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-09-26 21:12:05,361 INFO L367 BasicCegarLoop]: Found error trace [2018-09-26 21:12:05,361 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-09-26 21:12:05,362 INFO L423 AbstractCegarLoop]: === Iteration 11 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-26 21:12:05,362 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-26 21:12:05,363 INFO L82 PathProgramCache]: Analyzing trace with hash -923897177, now seen corresponding path program 1 times [2018-09-26 21:12:05,363 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-26 21:12:05,363 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-26 21:12:05,364 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:05,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-26 21:12:05,365 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-26 21:12:05,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-09-26 21:12:05,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-09-26 21:12:05,406 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-09-26 21:12:05,434 INFO L202 PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.09 09:12:05 BoogieIcfgContainer [2018-09-26 21:12:05,435 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-26 21:12:05,436 INFO L168 Benchmark]: Toolchain (without parser) took 4417.56 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.3 GB in the end (delta: 201.0 MB). Peak memory consumption was 201.0 MB. Max. memory is 7.1 GB. [2018-09-26 21:12:05,440 INFO L168 Benchmark]: Boogie PL CUP Parser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-26 21:12:05,440 INFO L168 Benchmark]: Boogie Procedure Inliner took 90.24 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-26 21:12:05,441 INFO L168 Benchmark]: Boogie Preprocessor took 45.69 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-26 21:12:05,441 INFO L168 Benchmark]: RCFGBuilder took 1463.57 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 74.1 MB). Peak memory consumption was 74.1 MB. Max. memory is 7.1 GB. [2018-09-26 21:12:05,442 INFO L168 Benchmark]: TraceAbstraction took 2808.72 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 126.9 MB). Peak memory consumption was 126.9 MB. Max. memory is 7.1 GB. [2018-09-26 21:12:05,451 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 90.24 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 45.69 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 1463.57 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 74.1 MB). Peak memory consumption was 74.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 2808.72 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 126.9 MB). Peak memory consumption was 126.9 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 481]: assertion can be violated assertion can be violated We found a FailurePath: [L462-L464] requires void$SimpleFrame2Cons$2$actionPerformed$4553$__this != $null; [L474] r098 := void$SimpleFrame2Cons$2$actionPerformed$4553$__this; [L476] r199 := void$SimpleFrame2Cons$2$actionPerformed$4553$param_0; [L478] $r2102 := SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711; [L480] CALL call $r3103 := javax.swing.JButton$SimpleFrame2Cons$access$0$1806($r2102); [L390] r083 := $param_0; [L392] $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227; [L394] __ret := $r185; [L480] RET call $r3103 := javax.swing.JButton$SimpleFrame2Cons$access$0$1806($r2102); [L481] assert $r3103 != $null; - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 374 locations, 78 error locations. UNSAFE Result, 2.7s OverallTime, 11 OverallIterations, 1 TraceHistogramMax, 1.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3399 SDtfs, 494 SDslu, 5897 SDs, 0 SdLazy, 71 SolverSat, 32 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=374occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 10 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 42 NumberOfCodeBlocks, 42 NumberOfCodeBlocksAsserted, 11 NumberOfCheckSat, 25 ConstructedInterpolants, 0 QuantifiedInterpolants, 242 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 10 InterpolantComputations, 10 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/GuiTestExample.bpl_svcomp-Reach-32bit-Automizer_Default.epf_AutomizerBplInline.xml/Csv-Benchmark-0-2018-09-26_21-12-05-466.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/GuiTestExample.bpl_svcomp-Reach-32bit-Automizer_Default.epf_AutomizerBplInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-26_21-12-05-466.csv Received shutdown request...