java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/pu-bench/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/programs/real-life/GuiTestExample.bpl -------------------------------------------------------------------------------- This is Ultimate 0.1.23-b2fde6a [2018-09-28 09:55:28,637 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-09-28 09:55:28,640 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-09-28 09:55:28,652 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-09-28 09:55:28,652 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-09-28 09:55:28,654 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-09-28 09:55:28,655 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-09-28 09:55:28,657 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-09-28 09:55:28,659 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-09-28 09:55:28,660 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-09-28 09:55:28,661 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-09-28 09:55:28,662 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-09-28 09:55:28,663 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-09-28 09:55:28,664 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-09-28 09:55:28,665 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-09-28 09:55:28,666 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-09-28 09:55:28,667 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-09-28 09:55:28,669 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-09-28 09:55:28,671 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-09-28 09:55:28,673 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-09-28 09:55:28,674 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-09-28 09:55:28,676 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-09-28 09:55:28,678 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-09-28 09:55:28,679 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-09-28 09:55:28,679 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-09-28 09:55:28,680 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-09-28 09:55:28,681 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-09-28 09:55:28,682 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-09-28 09:55:28,683 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-09-28 09:55:28,684 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-09-28 09:55:28,684 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-09-28 09:55:28,685 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-09-28 09:55:28,685 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-09-28 09:55:28,686 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-09-28 09:55:28,687 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-09-28 09:55:28,688 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-09-28 09:55:28,688 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/pu-bench/svcomp-Reach-32bit-Automizer_Default.epf [2018-09-28 09:55:28,707 INFO L110 SettingsManager]: Loading preferences was successful [2018-09-28 09:55:28,708 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-09-28 09:55:28,708 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-09-28 09:55:28,709 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-09-28 09:55:28,709 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-09-28 09:55:28,709 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-09-28 09:55:28,710 INFO L133 SettingsManager]: * Use SBE=true [2018-09-28 09:55:28,710 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-09-28 09:55:28,710 INFO L133 SettingsManager]: * sizeof long=4 [2018-09-28 09:55:28,710 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-09-28 09:55:28,711 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-09-28 09:55:28,711 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-09-28 09:55:28,711 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-09-28 09:55:28,711 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-09-28 09:55:28,711 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-09-28 09:55:28,711 INFO L133 SettingsManager]: * sizeof long double=12 [2018-09-28 09:55:28,712 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-09-28 09:55:28,712 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-09-28 09:55:28,712 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-09-28 09:55:28,712 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-09-28 09:55:28,713 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-09-28 09:55:28,713 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-09-28 09:55:28,713 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-28 09:55:28,713 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-09-28 09:55:28,713 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-09-28 09:55:28,714 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-09-28 09:55:28,714 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-09-28 09:55:28,714 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-09-28 09:55:28,714 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-09-28 09:55:28,714 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-09-28 09:55:28,787 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-09-28 09:55:28,800 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-09-28 09:55:28,804 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-09-28 09:55:28,806 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2018-09-28 09:55:28,806 INFO L276 PluginConnector]: Boogie PL CUP Parser initialized [2018-09-28 09:55:28,807 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl [2018-09-28 09:55:28,807 INFO L111 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl' [2018-09-28 09:55:28,903 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-09-28 09:55:28,907 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-09-28 09:55:28,908 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-09-28 09:55:28,908 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-09-28 09:55:28,908 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-09-28 09:55:28,932 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:28,959 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:28,983 WARN L165 Inliner]: Program contained no entry procedure! [2018-09-28 09:55:28,983 WARN L168 Inliner]: Missing entry procedures: [ULTIMATE.start] [2018-09-28 09:55:28,984 WARN L175 Inliner]: Fallback enabled. All procedures will be processed. [2018-09-28 09:55:29,018 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-09-28 09:55:29,019 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-09-28 09:55:29,019 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-09-28 09:55:29,019 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-09-28 09:55:29,032 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:29,032 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:29,047 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:29,048 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:29,066 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:29,076 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:29,085 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... [2018-09-28 09:55:29,098 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-09-28 09:55:29,099 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-09-28 09:55:29,099 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-09-28 09:55:29,099 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-09-28 09:55:29,100 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-09-28 09:55:29,179 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration [2018-09-28 09:55:29,180 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2018-09-28 09:55:29,180 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2018-09-28 09:55:29,180 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration [2018-09-28 09:55:29,180 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2018-09-28 09:55:29,180 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2018-09-28 09:55:29,181 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration [2018-09-28 09:55:29,181 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2018-09-28 09:55:29,181 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2018-09-28 09:55:29,181 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration [2018-09-28 09:55:29,181 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2018-09-28 09:55:29,182 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2018-09-28 09:55:29,182 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration [2018-09-28 09:55:29,182 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2018-09-28 09:55:29,182 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2018-09-28 09:55:29,182 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940 [2018-09-28 09:55:29,183 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827 [2018-09-28 09:55:29,183 INFO L124 BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration [2018-09-28 09:55:29,183 INFO L130 BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2018-09-28 09:55:29,183 INFO L138 BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2018-09-28 09:55:29,183 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration [2018-09-28 09:55:29,184 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2018-09-28 09:55:29,184 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2018-09-28 09:55:29,184 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858 [2018-09-28 09:55:29,184 INFO L124 BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration [2018-09-28 09:55:29,186 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2018-09-28 09:55:29,187 INFO L138 BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2018-09-28 09:55:29,187 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration [2018-09-28 09:55:29,187 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2018-09-28 09:55:29,187 INFO L138 BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2018-09-28 09:55:29,188 INFO L124 BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration [2018-09-28 09:55:29,188 INFO L130 BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808 [2018-09-28 09:55:29,188 INFO L138 BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808 [2018-09-28 09:55:29,188 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816 [2018-09-28 09:55:29,188 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123 [2018-09-28 09:55:29,189 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration [2018-09-28 09:55:29,189 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2018-09-28 09:55:29,189 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2018-09-28 09:55:29,189 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913 [2018-09-28 09:55:29,189 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131 [2018-09-28 09:55:29,190 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration [2018-09-28 09:55:29,190 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2018-09-28 09:55:29,190 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2018-09-28 09:55:29,190 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918 [2018-09-28 09:55:29,190 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305 [2018-09-28 09:55:29,190 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909 [2018-09-28 09:55:29,190 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255 [2018-09-28 09:55:29,191 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852 [2018-09-28 09:55:29,191 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304 [2018-09-28 09:55:29,191 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration [2018-09-28 09:55:29,191 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807 [2018-09-28 09:55:29,191 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807 [2018-09-28 09:55:29,191 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889 [2018-09-28 09:55:29,192 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration [2018-09-28 09:55:29,192 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803 [2018-09-28 09:55:29,192 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803 [2018-09-28 09:55:29,192 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration [2018-09-28 09:55:29,192 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804 [2018-09-28 09:55:29,193 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804 [2018-09-28 09:55:29,193 INFO L124 BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration [2018-09-28 09:55:29,193 INFO L130 BoogieDeclarations]: Found specification of procedure $EFG_Procedure [2018-09-28 09:55:29,193 INFO L138 BoogieDeclarations]: Found implementation of procedure $EFG_Procedure [2018-09-28 09:55:29,193 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558 [2018-09-28 09:55:29,194 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38 [2018-09-28 09:55:29,194 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075 [2018-09-28 09:55:29,477 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:29,583 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:29,719 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:29,801 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:30,116 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:30,139 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:30,147 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:30,184 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:30,245 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:30,316 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:30,332 WARN L650 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-09-28 09:55:30,906 INFO L350 CfgBuilder]: Using library mode [2018-09-28 09:55:30,907 INFO L202 PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.09 09:55:30 BoogieIcfgContainer [2018-09-28 09:55:30,908 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-09-28 09:55:30,909 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-09-28 09:55:30,909 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-09-28 09:55:30,913 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-09-28 09:55:30,914 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.09 09:55:28" (1/2) ... [2018-09-28 09:55:30,915 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a70c16c and model type GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.09 09:55:30, skipping insertion in model container [2018-09-28 09:55:30,915 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.09 09:55:30" (2/2) ... [2018-09-28 09:55:30,917 INFO L112 eAbstractionObserver]: Analyzing ICFG GuiTestExample.bpl [2018-09-28 09:55:30,928 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-09-28 09:55:30,938 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 78 error locations. [2018-09-28 09:55:31,021 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-09-28 09:55:31,022 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-09-28 09:55:31,022 INFO L382 AbstractCegarLoop]: Hoare is true [2018-09-28 09:55:31,023 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-09-28 09:55:31,023 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-09-28 09:55:31,023 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-09-28 09:55:31,023 INFO L386 AbstractCegarLoop]: Difference is false [2018-09-28 09:55:31,024 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-09-28 09:55:31,026 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-09-28 09:55:31,065 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states. [2018-09-28 09:55:31,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2018-09-28 09:55:31,071 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:31,072 INFO L375 BasicCegarLoop]: trace histogram [1, 1] [2018-09-28 09:55:31,076 INFO L423 AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:31,083 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:31,084 INFO L82 PathProgramCache]: Analyzing trace with hash 10786, now seen corresponding path program 1 times [2018-09-28 09:55:31,086 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:31,087 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:31,158 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:31,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:31,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:31,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:31,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:31,300 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:31,300 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2018-09-28 09:55:31,305 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-28 09:55:31,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-28 09:55:31,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-28 09:55:31,324 INFO L87 Difference]: Start difference. First operand 374 states. Second operand 3 states. [2018-09-28 09:55:31,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:31,434 INFO L93 Difference]: Finished difference Result 374 states and 395 transitions. [2018-09-28 09:55:31,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-28 09:55:31,436 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 2 [2018-09-28 09:55:31,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:31,462 INFO L225 Difference]: With dead ends: 374 [2018-09-28 09:55:31,462 INFO L226 Difference]: Without dead ends: 333 [2018-09-28 09:55:31,478 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-28 09:55:31,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-09-28 09:55:31,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 333. [2018-09-28 09:55:31,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2018-09-28 09:55:31,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 352 transitions. [2018-09-28 09:55:31,556 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 352 transitions. Word has length 2 [2018-09-28 09:55:31,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:31,556 INFO L480 AbstractCegarLoop]: Abstraction has 333 states and 352 transitions. [2018-09-28 09:55:31,557 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-28 09:55:31,557 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 352 transitions. [2018-09-28 09:55:31,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-28 09:55:31,558 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:31,558 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-28 09:55:31,561 INFO L423 AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:31,561 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:31,561 INFO L82 PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times [2018-09-28 09:55:31,562 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:31,562 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:31,563 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:31,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:31,564 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:31,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:31,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:31,621 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:31,622 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-28 09:55:31,623 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-28 09:55:31,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-28 09:55:31,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-28 09:55:31,625 INFO L87 Difference]: Start difference. First operand 333 states and 352 transitions. Second operand 4 states. [2018-09-28 09:55:31,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:31,760 INFO L93 Difference]: Finished difference Result 333 states and 352 transitions. [2018-09-28 09:55:31,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-28 09:55:31,768 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-28 09:55:31,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:31,771 INFO L225 Difference]: With dead ends: 333 [2018-09-28 09:55:31,772 INFO L226 Difference]: Without dead ends: 332 [2018-09-28 09:55:31,773 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-28 09:55:31,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 332 states. [2018-09-28 09:55:31,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 332 to 332. [2018-09-28 09:55:31,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2018-09-28 09:55:31,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 351 transitions. [2018-09-28 09:55:31,813 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 351 transitions. Word has length 3 [2018-09-28 09:55:31,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:31,814 INFO L480 AbstractCegarLoop]: Abstraction has 332 states and 351 transitions. [2018-09-28 09:55:31,814 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-28 09:55:31,814 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 351 transitions. [2018-09-28 09:55:31,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-28 09:55:31,815 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:31,815 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-28 09:55:31,817 INFO L423 AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:31,818 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:31,818 INFO L82 PathProgramCache]: Analyzing trace with hash 186718, now seen corresponding path program 1 times [2018-09-28 09:55:31,818 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:31,818 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:31,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:31,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:31,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:31,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:31,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:31,858 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:31,858 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-28 09:55:31,859 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-28 09:55:31,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-28 09:55:31,860 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-28 09:55:31,860 INFO L87 Difference]: Start difference. First operand 332 states and 351 transitions. Second operand 4 states. [2018-09-28 09:55:31,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:31,957 INFO L93 Difference]: Finished difference Result 332 states and 351 transitions. [2018-09-28 09:55:31,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-28 09:55:31,961 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-28 09:55:31,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:31,964 INFO L225 Difference]: With dead ends: 332 [2018-09-28 09:55:31,966 INFO L226 Difference]: Without dead ends: 331 [2018-09-28 09:55:31,967 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-28 09:55:31,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-09-28 09:55:32,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 331. [2018-09-28 09:55:32,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-09-28 09:55:32,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 350 transitions. [2018-09-28 09:55:32,005 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 350 transitions. Word has length 3 [2018-09-28 09:55:32,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:32,006 INFO L480 AbstractCegarLoop]: Abstraction has 331 states and 350 transitions. [2018-09-28 09:55:32,006 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-28 09:55:32,006 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 350 transitions. [2018-09-28 09:55:32,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-28 09:55:32,007 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:32,007 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-28 09:55:32,010 INFO L423 AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:32,010 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:32,010 INFO L82 PathProgramCache]: Analyzing trace with hash 172816, now seen corresponding path program 1 times [2018-09-28 09:55:32,012 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:32,012 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:32,013 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,013 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:32,014 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:32,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:32,114 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:32,114 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-28 09:55:32,114 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-28 09:55:32,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-28 09:55:32,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-28 09:55:32,115 INFO L87 Difference]: Start difference. First operand 331 states and 350 transitions. Second operand 4 states. [2018-09-28 09:55:32,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:32,178 INFO L93 Difference]: Finished difference Result 331 states and 350 transitions. [2018-09-28 09:55:32,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-28 09:55:32,180 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-28 09:55:32,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:32,183 INFO L225 Difference]: With dead ends: 331 [2018-09-28 09:55:32,183 INFO L226 Difference]: Without dead ends: 330 [2018-09-28 09:55:32,184 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-28 09:55:32,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-09-28 09:55:32,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 330. [2018-09-28 09:55:32,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 330 states. [2018-09-28 09:55:32,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330 states to 330 states and 349 transitions. [2018-09-28 09:55:32,201 INFO L78 Accepts]: Start accepts. Automaton has 330 states and 349 transitions. Word has length 3 [2018-09-28 09:55:32,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:32,201 INFO L480 AbstractCegarLoop]: Abstraction has 330 states and 349 transitions. [2018-09-28 09:55:32,201 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-28 09:55:32,202 INFO L276 IsEmpty]: Start isEmpty. Operand 330 states and 349 transitions. [2018-09-28 09:55:32,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-28 09:55:32,202 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:32,203 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-28 09:55:32,205 INFO L423 AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:32,205 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:32,206 INFO L82 PathProgramCache]: Analyzing trace with hash 334707, now seen corresponding path program 1 times [2018-09-28 09:55:32,206 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:32,206 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:32,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:32,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:32,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:32,276 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:32,277 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-28 09:55:32,277 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-28 09:55:32,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-28 09:55:32,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-28 09:55:32,278 INFO L87 Difference]: Start difference. First operand 330 states and 349 transitions. Second operand 4 states. [2018-09-28 09:55:32,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:32,334 INFO L93 Difference]: Finished difference Result 330 states and 349 transitions. [2018-09-28 09:55:32,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-28 09:55:32,335 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-28 09:55:32,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:32,339 INFO L225 Difference]: With dead ends: 330 [2018-09-28 09:55:32,340 INFO L226 Difference]: Without dead ends: 329 [2018-09-28 09:55:32,341 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-28 09:55:32,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-09-28 09:55:32,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 329. [2018-09-28 09:55:32,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-09-28 09:55:32,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 348 transitions. [2018-09-28 09:55:32,361 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 348 transitions. Word has length 3 [2018-09-28 09:55:32,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:32,362 INFO L480 AbstractCegarLoop]: Abstraction has 329 states and 348 transitions. [2018-09-28 09:55:32,362 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-28 09:55:32,362 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 348 transitions. [2018-09-28 09:55:32,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-09-28 09:55:32,366 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:32,366 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-09-28 09:55:32,372 INFO L423 AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:32,373 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:32,374 INFO L82 PathProgramCache]: Analyzing trace with hash 164872, now seen corresponding path program 1 times [2018-09-28 09:55:32,374 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:32,374 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:32,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,383 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:32,383 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:32,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:32,507 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:32,507 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-28 09:55:32,507 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-28 09:55:32,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-28 09:55:32,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-28 09:55:32,508 INFO L87 Difference]: Start difference. First operand 329 states and 348 transitions. Second operand 4 states. [2018-09-28 09:55:32,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:32,631 INFO L93 Difference]: Finished difference Result 329 states and 348 transitions. [2018-09-28 09:55:32,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-28 09:55:32,632 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-09-28 09:55:32,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:32,634 INFO L225 Difference]: With dead ends: 329 [2018-09-28 09:55:32,634 INFO L226 Difference]: Without dead ends: 325 [2018-09-28 09:55:32,635 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-28 09:55:32,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-09-28 09:55:32,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 325. [2018-09-28 09:55:32,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325 states. [2018-09-28 09:55:32,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 345 transitions. [2018-09-28 09:55:32,650 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 345 transitions. Word has length 3 [2018-09-28 09:55:32,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:32,651 INFO L480 AbstractCegarLoop]: Abstraction has 325 states and 345 transitions. [2018-09-28 09:55:32,651 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-28 09:55:32,651 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 345 transitions. [2018-09-28 09:55:32,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-09-28 09:55:32,652 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:32,652 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-09-28 09:55:32,657 INFO L423 AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:32,657 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:32,657 INFO L82 PathProgramCache]: Analyzing trace with hash 1632611, now seen corresponding path program 1 times [2018-09-28 09:55:32,657 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:32,657 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:32,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:32,659 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:32,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:32,691 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:32,691 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-28 09:55:32,691 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-28 09:55:32,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-28 09:55:32,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-28 09:55:32,692 INFO L87 Difference]: Start difference. First operand 325 states and 345 transitions. Second operand 4 states. [2018-09-28 09:55:32,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:32,920 INFO L93 Difference]: Finished difference Result 325 states and 345 transitions. [2018-09-28 09:55:32,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-28 09:55:32,921 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 4 [2018-09-28 09:55:32,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:32,924 INFO L225 Difference]: With dead ends: 325 [2018-09-28 09:55:32,924 INFO L226 Difference]: Without dead ends: 301 [2018-09-28 09:55:32,925 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-28 09:55:32,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-09-28 09:55:32,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 301. [2018-09-28 09:55:32,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301 states. [2018-09-28 09:55:32,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301 states to 301 states and 320 transitions. [2018-09-28 09:55:32,946 INFO L78 Accepts]: Start accepts. Automaton has 301 states and 320 transitions. Word has length 4 [2018-09-28 09:55:32,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:32,946 INFO L480 AbstractCegarLoop]: Abstraction has 301 states and 320 transitions. [2018-09-28 09:55:32,946 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-28 09:55:32,946 INFO L276 IsEmpty]: Start isEmpty. Operand 301 states and 320 transitions. [2018-09-28 09:55:32,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-09-28 09:55:32,947 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:32,947 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-09-28 09:55:32,951 INFO L423 AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:32,951 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:32,951 INFO L82 PathProgramCache]: Analyzing trace with hash 6250211, now seen corresponding path program 1 times [2018-09-28 09:55:32,951 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:32,952 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:32,955 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,955 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:32,955 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:32,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:33,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:33,020 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:33,020 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-09-28 09:55:33,020 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-09-28 09:55:33,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-09-28 09:55:33,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-28 09:55:33,021 INFO L87 Difference]: Start difference. First operand 301 states and 320 transitions. Second operand 3 states. [2018-09-28 09:55:33,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:33,066 INFO L93 Difference]: Finished difference Result 301 states and 320 transitions. [2018-09-28 09:55:33,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-09-28 09:55:33,066 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-09-28 09:55:33,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:33,069 INFO L225 Difference]: With dead ends: 301 [2018-09-28 09:55:33,069 INFO L226 Difference]: Without dead ends: 300 [2018-09-28 09:55:33,070 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-09-28 09:55:33,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-09-28 09:55:33,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 300. [2018-09-28 09:55:33,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2018-09-28 09:55:33,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 319 transitions. [2018-09-28 09:55:33,085 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 319 transitions. Word has length 4 [2018-09-28 09:55:33,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:33,085 INFO L480 AbstractCegarLoop]: Abstraction has 300 states and 319 transitions. [2018-09-28 09:55:33,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-09-28 09:55:33,085 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 319 transitions. [2018-09-28 09:55:33,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-09-28 09:55:33,086 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:33,086 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-09-28 09:55:33,088 INFO L423 AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:33,089 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:33,089 INFO L82 PathProgramCache]: Analyzing trace with hash 193756751, now seen corresponding path program 1 times [2018-09-28 09:55:33,089 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:33,089 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:33,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:33,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:33,091 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:33,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:33,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:33,131 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:33,132 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-28 09:55:33,132 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-09-28 09:55:33,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-09-28 09:55:33,132 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-09-28 09:55:33,133 INFO L87 Difference]: Start difference. First operand 300 states and 319 transitions. Second operand 4 states. [2018-09-28 09:55:33,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:33,298 INFO L93 Difference]: Finished difference Result 300 states and 319 transitions. [2018-09-28 09:55:33,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-09-28 09:55:33,300 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 5 [2018-09-28 09:55:33,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:33,302 INFO L225 Difference]: With dead ends: 300 [2018-09-28 09:55:33,303 INFO L226 Difference]: Without dead ends: 299 [2018-09-28 09:55:33,303 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-09-28 09:55:33,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states. [2018-09-28 09:55:33,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 299. [2018-09-28 09:55:33,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 299 states. [2018-09-28 09:55:33,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 318 transitions. [2018-09-28 09:55:33,318 INFO L78 Accepts]: Start accepts. Automaton has 299 states and 318 transitions. Word has length 5 [2018-09-28 09:55:33,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:33,318 INFO L480 AbstractCegarLoop]: Abstraction has 299 states and 318 transitions. [2018-09-28 09:55:33,319 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-09-28 09:55:33,319 INFO L276 IsEmpty]: Start isEmpty. Operand 299 states and 318 transitions. [2018-09-28 09:55:33,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-09-28 09:55:33,319 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:33,320 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-09-28 09:55:33,321 INFO L423 AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:33,321 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:33,322 INFO L82 PathProgramCache]: Analyzing trace with hash 321664405, now seen corresponding path program 1 times [2018-09-28 09:55:33,322 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:33,322 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:33,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:33,324 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:33,324 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:33,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-09-28 09:55:33,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-09-28 09:55:33,400 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-09-28 09:55:33,400 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-09-28 09:55:33,400 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-09-28 09:55:33,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-09-28 09:55:33,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-09-28 09:55:33,401 INFO L87 Difference]: Start difference. First operand 299 states and 318 transitions. Second operand 5 states. [2018-09-28 09:55:33,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-09-28 09:55:33,459 INFO L93 Difference]: Finished difference Result 299 states and 318 transitions. [2018-09-28 09:55:33,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-09-28 09:55:33,459 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2018-09-28 09:55:33,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-09-28 09:55:33,461 INFO L225 Difference]: With dead ends: 299 [2018-09-28 09:55:33,462 INFO L226 Difference]: Without dead ends: 293 [2018-09-28 09:55:33,462 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-09-28 09:55:33,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-09-28 09:55:33,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2018-09-28 09:55:33,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 293 states. [2018-09-28 09:55:33,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 313 transitions. [2018-09-28 09:55:33,477 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 313 transitions. Word has length 5 [2018-09-28 09:55:33,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-09-28 09:55:33,477 INFO L480 AbstractCegarLoop]: Abstraction has 293 states and 313 transitions. [2018-09-28 09:55:33,477 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-09-28 09:55:33,478 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 313 transitions. [2018-09-28 09:55:33,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-09-28 09:55:33,478 INFO L367 BasicCegarLoop]: Found error trace [2018-09-28 09:55:33,478 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-09-28 09:55:33,479 INFO L423 AbstractCegarLoop]: === Iteration 11 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-09-28 09:55:33,480 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-09-28 09:55:33,480 INFO L82 PathProgramCache]: Analyzing trace with hash -923897177, now seen corresponding path program 1 times [2018-09-28 09:55:33,480 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-09-28 09:55:33,480 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-09-28 09:55:33,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:33,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-09-28 09:55:33,482 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-09-28 09:55:33,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-09-28 09:55:33,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-09-28 09:55:33,509 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-09-28 09:55:33,530 INFO L202 PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.09 09:55:33 BoogieIcfgContainer [2018-09-28 09:55:33,531 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-09-28 09:55:33,532 INFO L168 Benchmark]: Toolchain (without parser) took 4627.73 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.3 GB in the end (delta: 211.4 MB). Peak memory consumption was 211.4 MB. Max. memory is 7.1 GB. [2018-09-28 09:55:33,534 INFO L168 Benchmark]: Boogie PL CUP Parser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-28 09:55:33,534 INFO L168 Benchmark]: Boogie Procedure Inliner took 110.52 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-28 09:55:33,535 INFO L168 Benchmark]: Boogie Preprocessor took 79.61 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-09-28 09:55:33,535 INFO L168 Benchmark]: RCFGBuilder took 1808.78 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 74.0 MB). Peak memory consumption was 74.0 MB. Max. memory is 7.1 GB. [2018-09-28 09:55:33,536 INFO L168 Benchmark]: TraceAbstraction took 2621.55 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 137.4 MB). Peak memory consumption was 137.4 MB. Max. memory is 7.1 GB. [2018-09-28 09:55:33,540 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.22 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 110.52 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 79.61 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 1808.78 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 74.0 MB). Peak memory consumption was 74.0 MB. Max. memory is 7.1 GB. * TraceAbstraction took 2621.55 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 137.4 MB). Peak memory consumption was 137.4 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 481]: assertion can be violated assertion can be violated We found a FailurePath: [L462-L464] requires void$SimpleFrame2Cons$2$actionPerformed$4553$__this != $null; [L474] r098 := void$SimpleFrame2Cons$2$actionPerformed$4553$__this; [L476] r199 := void$SimpleFrame2Cons$2$actionPerformed$4553$param_0; [L478] $r2102 := SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711; [L480] CALL call $r3103 := javax.swing.JButton$SimpleFrame2Cons$access$0$1806($r2102); [L390] r083 := $param_0; [L392] $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227; [L394] __ret := $r185; [L480] RET call $r3103 := javax.swing.JButton$SimpleFrame2Cons$access$0$1806($r2102); [L481] assert $r3103 != $null; - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 374 locations, 78 error locations. UNSAFE Result, 2.5s OverallTime, 11 OverallIterations, 1 TraceHistogramMax, 1.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3379 SDtfs, 494 SDslu, 5881 SDs, 0 SdLazy, 71 SolverSat, 32 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=374occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 10 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 42 NumberOfCodeBlocks, 42 NumberOfCodeBlocksAsserted, 11 NumberOfCheckSat, 25 ConstructedInterpolants, 0 QuantifiedInterpolants, 242 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 10 InterpolantComputations, 10 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/GuiTestExample.bpl_svcomp-Reach-32bit-Automizer_Default.epf_AutomizerBplInline.xml/Csv-Benchmark-0-2018-09-28_09-55-33-552.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/GuiTestExample.bpl_svcomp-Reach-32bit-Automizer_Default.epf_AutomizerBplInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-09-28_09-55-33-552.csv Received shutdown request...