java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/pu-bench/svcomp-Reach-32bit-Automizer_Default_PUPT.epf -i ../../../trunk/examples/programs/real-life/threadpooling_product_WithoutIf.bpl -------------------------------------------------------------------------------- This is Ultimate 0.1.23-1cc990c [2018-10-01 00:24:58,751 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-01 00:24:58,754 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-01 00:24:58,771 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-01 00:24:58,771 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-01 00:24:58,772 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-01 00:24:58,774 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-01 00:24:58,775 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-01 00:24:58,779 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-01 00:24:58,780 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-01 00:24:58,783 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-01 00:24:58,783 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-01 00:24:58,784 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-01 00:24:58,785 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-01 00:24:58,788 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-01 00:24:58,789 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-01 00:24:58,790 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-01 00:24:58,800 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-01 00:24:58,805 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-01 00:24:58,806 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-01 00:24:58,810 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-01 00:24:58,811 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-01 00:24:58,813 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-10-01 00:24:58,821 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/pu-bench/svcomp-Reach-32bit-Automizer_Default_PUPT.epf [2018-10-01 00:24:58,835 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-01 00:24:58,836 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-01 00:24:58,836 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-01 00:24:58,837 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-10-01 00:24:58,837 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-01 00:24:58,837 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-01 00:24:58,838 INFO L133 SettingsManager]: * Use SBE=true [2018-10-01 00:24:58,838 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-01 00:24:58,838 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-01 00:24:58,838 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-01 00:24:58,839 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-01 00:24:58,839 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-01 00:24:58,839 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-01 00:24:58,839 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-01 00:24:58,839 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-01 00:24:58,839 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-01 00:24:58,840 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-01 00:24:58,840 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-01 00:24:58,840 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-01 00:24:58,840 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-01 00:24:58,841 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-01 00:24:58,841 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-01 00:24:58,841 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-01 00:24:58,841 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-01 00:24:58,843 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-01 00:24:58,843 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-01 00:24:58,843 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-10-01 00:24:58,844 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-01 00:24:58,844 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-01 00:24:58,844 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-10-01 00:24:58,844 INFO L133 SettingsManager]: * Use predicate trie based predicate unification=true [2018-10-01 00:24:58,897 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-01 00:24:58,912 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-01 00:24:58,916 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-01 00:24:58,918 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2018-10-01 00:24:58,918 INFO L276 PluginConnector]: Boogie PL CUP Parser initialized [2018-10-01 00:24:58,919 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/threadpooling_product_WithoutIf.bpl [2018-10-01 00:24:58,920 INFO L111 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/threadpooling_product_WithoutIf.bpl' [2018-10-01 00:24:58,968 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-01 00:24:58,971 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-10-01 00:24:58,972 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-01 00:24:58,972 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-01 00:24:58,973 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-01 00:24:58,992 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,006 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,011 WARN L165 Inliner]: Program contained no entry procedure! [2018-10-01 00:24:59,011 WARN L168 Inliner]: Missing entry procedures: [ULTIMATE.start] [2018-10-01 00:24:59,011 WARN L175 Inliner]: Fallback enabled. All procedures will be processed. [2018-10-01 00:24:59,014 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-01 00:24:59,015 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-01 00:24:59,015 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-01 00:24:59,015 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-01 00:24:59,026 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,027 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,028 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,028 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,031 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,034 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,035 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... [2018-10-01 00:24:59,036 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-01 00:24:59,037 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-01 00:24:59,037 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-01 00:24:59,037 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-01 00:24:59,038 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-01 00:24:59,110 INFO L124 BoogieDeclarations]: Specification and implementation of procedure product given in one single declaration [2018-10-01 00:24:59,110 INFO L130 BoogieDeclarations]: Found specification of procedure product [2018-10-01 00:24:59,111 INFO L138 BoogieDeclarations]: Found implementation of procedure product [2018-10-01 00:24:59,574 INFO L345 CfgBuilder]: Using library mode [2018-10-01 00:24:59,575 INFO L202 PluginConnector]: Adding new model threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.10 12:24:59 BoogieIcfgContainer [2018-10-01 00:24:59,575 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-01 00:24:59,576 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-01 00:24:59,576 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-01 00:24:59,580 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-01 00:24:59,581 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 01.10 12:24:58" (1/2) ... [2018-10-01 00:24:59,582 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c37e802 and model type threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 01.10 12:24:59, skipping insertion in model container [2018-10-01 00:24:59,582 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "threadpooling_product_WithoutIf.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 01.10 12:24:59" (2/2) ... [2018-10-01 00:24:59,584 INFO L112 eAbstractionObserver]: Analyzing ICFG threadpooling_product_WithoutIf.bpl [2018-10-01 00:24:59,594 INFO L137 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-01 00:24:59,603 INFO L149 ceAbstractionStarter]: Appying trace abstraction to program that has 4 error locations. [2018-10-01 00:24:59,653 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-10-01 00:24:59,653 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-10-01 00:24:59,654 INFO L382 AbstractCegarLoop]: Hoare is true [2018-10-01 00:24:59,654 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-01 00:24:59,654 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-01 00:24:59,654 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-01 00:24:59,654 INFO L386 AbstractCegarLoop]: Difference is false [2018-10-01 00:24:59,655 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-01 00:24:59,655 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-01 00:24:59,671 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states. [2018-10-01 00:24:59,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-10-01 00:24:59,678 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:24:59,679 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-10-01 00:24:59,680 INFO L423 AbstractCegarLoop]: === Iteration 1 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:24:59,687 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:24:59,688 INFO L82 PathProgramCache]: Analyzing trace with hash 927686, now seen corresponding path program 1 times [2018-10-01 00:24:59,690 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:24:59,690 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:24:59,736 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:24:59,737 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:24:59,737 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:24:59,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:24:59,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:24:59,929 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:24:59,929 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-01 00:24:59,933 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-01 00:24:59,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-01 00:24:59,949 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:24:59,951 INFO L87 Difference]: Start difference. First operand 17 states. Second operand 5 states. [2018-10-01 00:25:01,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:01,420 INFO L93 Difference]: Finished difference Result 32 states and 51 transitions. [2018-10-01 00:25:01,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-01 00:25:01,423 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 4 [2018-10-01 00:25:01,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:01,436 INFO L225 Difference]: With dead ends: 32 [2018-10-01 00:25:01,437 INFO L226 Difference]: Without dead ends: 30 [2018-10-01 00:25:01,440 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:25:01,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-10-01 00:25:01,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 24. [2018-10-01 00:25:01,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-10-01 00:25:01,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 37 transitions. [2018-10-01 00:25:01,483 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 37 transitions. Word has length 4 [2018-10-01 00:25:01,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:01,484 INFO L480 AbstractCegarLoop]: Abstraction has 24 states and 37 transitions. [2018-10-01 00:25:01,484 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-01 00:25:01,484 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 37 transitions. [2018-10-01 00:25:01,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-10-01 00:25:01,485 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:01,485 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-10-01 00:25:01,486 INFO L423 AbstractCegarLoop]: === Iteration 2 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:01,486 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:01,486 INFO L82 PathProgramCache]: Analyzing trace with hash 930088, now seen corresponding path program 1 times [2018-10-01 00:25:01,486 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:01,487 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:01,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:01,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:01,488 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:01,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:01,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:01,571 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:25:01,571 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-01 00:25:01,572 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-01 00:25:01,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-01 00:25:01,573 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:01,573 INFO L87 Difference]: Start difference. First operand 24 states and 37 transitions. Second operand 5 states. [2018-10-01 00:25:02,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:02,190 INFO L93 Difference]: Finished difference Result 38 states and 61 transitions. [2018-10-01 00:25:02,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-10-01 00:25:02,192 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 4 [2018-10-01 00:25:02,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:02,194 INFO L225 Difference]: With dead ends: 38 [2018-10-01 00:25:02,194 INFO L226 Difference]: Without dead ends: 36 [2018-10-01 00:25:02,195 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:25:02,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-10-01 00:25:02,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 30. [2018-10-01 00:25:02,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-10-01 00:25:02,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 47 transitions. [2018-10-01 00:25:02,203 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 47 transitions. Word has length 4 [2018-10-01 00:25:02,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:02,203 INFO L480 AbstractCegarLoop]: Abstraction has 30 states and 47 transitions. [2018-10-01 00:25:02,204 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-01 00:25:02,204 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 47 transitions. [2018-10-01 00:25:02,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-10-01 00:25:02,204 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:02,205 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-10-01 00:25:02,205 INFO L423 AbstractCegarLoop]: === Iteration 3 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:02,205 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:02,206 INFO L82 PathProgramCache]: Analyzing trace with hash 28768015, now seen corresponding path program 1 times [2018-10-01 00:25:02,206 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:02,206 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:02,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:02,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:02,207 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:02,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:02,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:02,316 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:25:02,316 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-01 00:25:02,316 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-01 00:25:02,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-01 00:25:02,317 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:02,317 INFO L87 Difference]: Start difference. First operand 30 states and 47 transitions. Second operand 6 states. [2018-10-01 00:25:03,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:03,532 INFO L93 Difference]: Finished difference Result 43 states and 67 transitions. [2018-10-01 00:25:03,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-01 00:25:03,533 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 5 [2018-10-01 00:25:03,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:03,534 INFO L225 Difference]: With dead ends: 43 [2018-10-01 00:25:03,535 INFO L226 Difference]: Without dead ends: 41 [2018-10-01 00:25:03,535 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time [2018-10-01 00:25:03,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-10-01 00:25:03,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 37. [2018-10-01 00:25:03,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-10-01 00:25:03,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 59 transitions. [2018-10-01 00:25:03,545 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 59 transitions. Word has length 5 [2018-10-01 00:25:03,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:03,546 INFO L480 AbstractCegarLoop]: Abstraction has 37 states and 59 transitions. [2018-10-01 00:25:03,546 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-01 00:25:03,546 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 59 transitions. [2018-10-01 00:25:03,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-10-01 00:25:03,547 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:03,547 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-10-01 00:25:03,547 INFO L423 AbstractCegarLoop]: === Iteration 4 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:03,548 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:03,548 INFO L82 PathProgramCache]: Analyzing trace with hash 28831153, now seen corresponding path program 1 times [2018-10-01 00:25:03,548 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:03,548 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:03,549 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:03,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:03,550 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:03,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:03,630 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:03,630 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:25:03,631 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-10-01 00:25:03,631 INFO L459 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-10-01 00:25:03,631 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-10-01 00:25:03,632 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:03,632 INFO L87 Difference]: Start difference. First operand 37 states and 59 transitions. Second operand 6 states. [2018-10-01 00:25:04,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:04,291 INFO L93 Difference]: Finished difference Result 54 states and 89 transitions. [2018-10-01 00:25:04,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-10-01 00:25:04,293 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 5 [2018-10-01 00:25:04,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:04,295 INFO L225 Difference]: With dead ends: 54 [2018-10-01 00:25:04,295 INFO L226 Difference]: Without dead ends: 52 [2018-10-01 00:25:04,295 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time [2018-10-01 00:25:04,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-10-01 00:25:04,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 43. [2018-10-01 00:25:04,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-10-01 00:25:04,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 70 transitions. [2018-10-01 00:25:04,307 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 70 transitions. Word has length 5 [2018-10-01 00:25:04,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:04,307 INFO L480 AbstractCegarLoop]: Abstraction has 43 states and 70 transitions. [2018-10-01 00:25:04,307 INFO L481 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-10-01 00:25:04,308 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 70 transitions. [2018-10-01 00:25:04,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:04,308 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:04,308 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:04,309 INFO L423 AbstractCegarLoop]: === Iteration 5 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:04,309 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:04,309 INFO L82 PathProgramCache]: Analyzing trace with hash -1974033510, now seen corresponding path program 1 times [2018-10-01 00:25:04,310 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:04,310 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:04,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:04,311 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:04,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:04,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:04,422 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:04,423 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:04,423 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:04,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:04,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:04,451 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:04,592 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:04,613 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:04,614 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2018-10-01 00:25:04,614 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-01 00:25:04,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-01 00:25:04,614 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:04,614 INFO L87 Difference]: Start difference. First operand 43 states and 70 transitions. Second operand 14 states. [2018-10-01 00:25:07,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:07,349 INFO L93 Difference]: Finished difference Result 107 states and 168 transitions. [2018-10-01 00:25:07,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-01 00:25:07,350 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 8 [2018-10-01 00:25:07,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:07,352 INFO L225 Difference]: With dead ends: 107 [2018-10-01 00:25:07,353 INFO L226 Difference]: Without dead ends: 106 [2018-10-01 00:25:07,353 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s Time [2018-10-01 00:25:07,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-10-01 00:25:07,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 64. [2018-10-01 00:25:07,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-10-01 00:25:07,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 109 transitions. [2018-10-01 00:25:07,368 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 109 transitions. Word has length 8 [2018-10-01 00:25:07,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:07,368 INFO L480 AbstractCegarLoop]: Abstraction has 64 states and 109 transitions. [2018-10-01 00:25:07,368 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-01 00:25:07,368 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 109 transitions. [2018-10-01 00:25:07,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:07,369 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:07,369 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:07,370 INFO L423 AbstractCegarLoop]: === Iteration 6 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:07,370 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:07,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1974032228, now seen corresponding path program 1 times [2018-10-01 00:25:07,370 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:07,370 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:07,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:07,371 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:07,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:07,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:07,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:07,470 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:25:07,471 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-01 00:25:07,471 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-01 00:25:07,471 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-01 00:25:07,471 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:07,471 INFO L87 Difference]: Start difference. First operand 64 states and 109 transitions. Second operand 8 states. [2018-10-01 00:25:09,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:09,176 INFO L93 Difference]: Finished difference Result 95 states and 152 transitions. [2018-10-01 00:25:09,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-01 00:25:09,176 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 8 [2018-10-01 00:25:09,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:09,178 INFO L225 Difference]: With dead ends: 95 [2018-10-01 00:25:09,179 INFO L226 Difference]: Without dead ends: 93 [2018-10-01 00:25:09,179 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time [2018-10-01 00:25:09,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-10-01 00:25:09,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 77. [2018-10-01 00:25:09,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-10-01 00:25:09,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 134 transitions. [2018-10-01 00:25:09,195 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 134 transitions. Word has length 8 [2018-10-01 00:25:09,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:09,195 INFO L480 AbstractCegarLoop]: Abstraction has 77 states and 134 transitions. [2018-10-01 00:25:09,195 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-01 00:25:09,196 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 134 transitions. [2018-10-01 00:25:09,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:09,196 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:09,197 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:09,197 INFO L423 AbstractCegarLoop]: === Iteration 7 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:09,197 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:09,197 INFO L82 PathProgramCache]: Analyzing trace with hash -1965445341, now seen corresponding path program 1 times [2018-10-01 00:25:09,198 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:09,198 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:09,199 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:09,199 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:09,199 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:09,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:09,419 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:09,420 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:09,420 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:09,437 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:09,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:09,448 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:09,732 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:09,753 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:09,754 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 7] total 12 [2018-10-01 00:25:09,754 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-01 00:25:09,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-01 00:25:09,754 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:09,755 INFO L87 Difference]: Start difference. First operand 77 states and 134 transitions. Second operand 13 states. [2018-10-01 00:25:14,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:14,255 INFO L93 Difference]: Finished difference Result 150 states and 246 transitions. [2018-10-01 00:25:14,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-10-01 00:25:14,259 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 8 [2018-10-01 00:25:14,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:14,261 INFO L225 Difference]: With dead ends: 150 [2018-10-01 00:25:14,261 INFO L226 Difference]: Without dead ends: 148 [2018-10-01 00:25:14,261 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7s Time [2018-10-01 00:25:14,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-10-01 00:25:14,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 106. [2018-10-01 00:25:14,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-10-01 00:25:14,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 185 transitions. [2018-10-01 00:25:14,282 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 185 transitions. Word has length 8 [2018-10-01 00:25:14,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:14,282 INFO L480 AbstractCegarLoop]: Abstraction has 106 states and 185 transitions. [2018-10-01 00:25:14,282 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-01 00:25:14,283 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 185 transitions. [2018-10-01 00:25:14,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:14,283 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:14,284 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:14,284 INFO L423 AbstractCegarLoop]: === Iteration 8 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:14,284 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:14,284 INFO L82 PathProgramCache]: Analyzing trace with hash -1965445053, now seen corresponding path program 1 times [2018-10-01 00:25:14,284 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:14,285 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:14,285 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:14,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:14,286 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:14,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:14,344 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:14,345 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:14,345 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:14,354 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:14,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:14,360 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:14,489 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:14,512 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:14,512 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 6] total 11 [2018-10-01 00:25:14,512 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-01 00:25:14,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-01 00:25:14,513 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:14,513 INFO L87 Difference]: Start difference. First operand 106 states and 185 transitions. Second operand 13 states. [2018-10-01 00:25:16,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:16,808 INFO L93 Difference]: Finished difference Result 137 states and 241 transitions. [2018-10-01 00:25:16,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-01 00:25:16,809 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 8 [2018-10-01 00:25:16,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:16,811 INFO L225 Difference]: With dead ends: 137 [2018-10-01 00:25:16,811 INFO L226 Difference]: Without dead ends: 135 [2018-10-01 00:25:16,811 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s Time [2018-10-01 00:25:16,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-10-01 00:25:16,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 111. [2018-10-01 00:25:16,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-10-01 00:25:16,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 194 transitions. [2018-10-01 00:25:16,836 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 194 transitions. Word has length 8 [2018-10-01 00:25:16,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:16,836 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 194 transitions. [2018-10-01 00:25:16,836 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-01 00:25:16,836 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 194 transitions. [2018-10-01 00:25:16,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:16,837 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:16,837 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:16,838 INFO L423 AbstractCegarLoop]: === Iteration 9 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:16,838 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:16,838 INFO L82 PathProgramCache]: Analyzing trace with hash 2040447037, now seen corresponding path program 1 times [2018-10-01 00:25:16,838 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:16,838 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:16,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:16,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:16,839 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:16,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:16,937 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:16,938 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:16,938 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:16,947 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:16,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:16,953 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:17,028 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:17,050 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:17,051 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 11 [2018-10-01 00:25:17,051 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-01 00:25:17,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-01 00:25:17,051 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:17,051 INFO L87 Difference]: Start difference. First operand 111 states and 194 transitions. Second operand 13 states. [2018-10-01 00:25:19,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:19,375 INFO L93 Difference]: Finished difference Result 137 states and 241 transitions. [2018-10-01 00:25:19,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-01 00:25:19,382 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 8 [2018-10-01 00:25:19,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:19,383 INFO L225 Difference]: With dead ends: 137 [2018-10-01 00:25:19,383 INFO L226 Difference]: Without dead ends: 135 [2018-10-01 00:25:19,383 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time [2018-10-01 00:25:19,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-10-01 00:25:19,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 111. [2018-10-01 00:25:19,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-10-01 00:25:19,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 194 transitions. [2018-10-01 00:25:19,404 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 194 transitions. Word has length 8 [2018-10-01 00:25:19,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:19,404 INFO L480 AbstractCegarLoop]: Abstraction has 111 states and 194 transitions. [2018-10-01 00:25:19,404 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-01 00:25:19,405 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 194 transitions. [2018-10-01 00:25:19,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:19,405 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:19,406 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:19,406 INFO L423 AbstractCegarLoop]: === Iteration 10 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:19,406 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:19,406 INFO L82 PathProgramCache]: Analyzing trace with hash -84509544, now seen corresponding path program 1 times [2018-10-01 00:25:19,406 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:19,407 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:19,407 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:19,408 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:19,408 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:19,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:19,496 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:19,496 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:19,497 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:19,506 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:19,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:19,513 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:19,575 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:19,595 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:19,595 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 10 [2018-10-01 00:25:19,596 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-01 00:25:19,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-01 00:25:19,596 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:19,596 INFO L87 Difference]: Start difference. First operand 111 states and 194 transitions. Second operand 11 states. [2018-10-01 00:25:21,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:21,203 INFO L93 Difference]: Finished difference Result 168 states and 277 transitions. [2018-10-01 00:25:21,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-01 00:25:21,203 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 8 [2018-10-01 00:25:21,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:21,205 INFO L225 Difference]: With dead ends: 168 [2018-10-01 00:25:21,205 INFO L226 Difference]: Without dead ends: 167 [2018-10-01 00:25:21,205 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time [2018-10-01 00:25:21,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-10-01 00:25:21,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 129. [2018-10-01 00:25:21,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-10-01 00:25:21,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 228 transitions. [2018-10-01 00:25:21,234 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 228 transitions. Word has length 8 [2018-10-01 00:25:21,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:21,234 INFO L480 AbstractCegarLoop]: Abstraction has 129 states and 228 transitions. [2018-10-01 00:25:21,235 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-01 00:25:21,235 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 228 transitions. [2018-10-01 00:25:21,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:21,236 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:21,236 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:21,236 INFO L423 AbstractCegarLoop]: === Iteration 11 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:21,236 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:21,236 INFO L82 PathProgramCache]: Analyzing trace with hash -84508262, now seen corresponding path program 1 times [2018-10-01 00:25:21,237 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:21,237 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:21,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:21,238 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:21,238 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:21,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:21,340 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:21,340 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:21,340 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:21,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:21,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:21,371 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:21,400 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:21,421 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:21,421 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-10-01 00:25:21,421 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:25:21,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:25:21,421 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:21,421 INFO L87 Difference]: Start difference. First operand 129 states and 228 transitions. Second operand 7 states. [2018-10-01 00:25:22,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:22,283 INFO L93 Difference]: Finished difference Result 174 states and 298 transitions. [2018-10-01 00:25:22,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-01 00:25:22,284 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 8 [2018-10-01 00:25:22,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:22,285 INFO L225 Difference]: With dead ends: 174 [2018-10-01 00:25:22,285 INFO L226 Difference]: Without dead ends: 172 [2018-10-01 00:25:22,286 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:25:22,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-10-01 00:25:22,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 138. [2018-10-01 00:25:22,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-10-01 00:25:22,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 245 transitions. [2018-10-01 00:25:22,308 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 245 transitions. Word has length 8 [2018-10-01 00:25:22,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:22,309 INFO L480 AbstractCegarLoop]: Abstraction has 138 states and 245 transitions. [2018-10-01 00:25:22,309 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:25:22,309 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 245 transitions. [2018-10-01 00:25:22,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:22,310 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:22,310 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:22,310 INFO L423 AbstractCegarLoop]: === Iteration 12 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:22,310 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:22,310 INFO L82 PathProgramCache]: Analyzing trace with hash -75921375, now seen corresponding path program 1 times [2018-10-01 00:25:22,311 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:22,311 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:22,311 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:22,312 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:22,312 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:22,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:22,376 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:22,376 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:22,377 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:22,385 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:22,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:22,392 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:22,433 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:22,455 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:22,455 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2018-10-01 00:25:22,456 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-01 00:25:22,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-01 00:25:22,456 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:22,456 INFO L87 Difference]: Start difference. First operand 138 states and 245 transitions. Second operand 10 states. [2018-10-01 00:25:23,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:23,643 INFO L93 Difference]: Finished difference Result 186 states and 318 transitions. [2018-10-01 00:25:23,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-10-01 00:25:23,644 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 8 [2018-10-01 00:25:23,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:23,645 INFO L225 Difference]: With dead ends: 186 [2018-10-01 00:25:23,645 INFO L226 Difference]: Without dead ends: 185 [2018-10-01 00:25:23,646 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:25:23,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-10-01 00:25:23,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 156. [2018-10-01 00:25:23,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-10-01 00:25:23,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 277 transitions. [2018-10-01 00:25:23,671 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 277 transitions. Word has length 8 [2018-10-01 00:25:23,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:23,671 INFO L480 AbstractCegarLoop]: Abstraction has 156 states and 277 transitions. [2018-10-01 00:25:23,671 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-01 00:25:23,671 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 277 transitions. [2018-10-01 00:25:23,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:23,672 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:23,672 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:23,672 INFO L423 AbstractCegarLoop]: === Iteration 13 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:23,672 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:23,673 INFO L82 PathProgramCache]: Analyzing trace with hash -75920285, now seen corresponding path program 1 times [2018-10-01 00:25:23,673 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:23,673 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:23,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:23,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:23,674 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:23,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:23,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:23,745 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:25:23,745 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-10-01 00:25:23,745 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:25:23,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:25:23,746 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:23,746 INFO L87 Difference]: Start difference. First operand 156 states and 277 transitions. Second operand 7 states. [2018-10-01 00:25:25,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:25,064 INFO L93 Difference]: Finished difference Result 221 states and 385 transitions. [2018-10-01 00:25:25,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-01 00:25:25,064 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 8 [2018-10-01 00:25:25,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:25,066 INFO L225 Difference]: With dead ends: 221 [2018-10-01 00:25:25,066 INFO L226 Difference]: Without dead ends: 219 [2018-10-01 00:25:25,066 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:25:25,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-10-01 00:25:25,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 168. [2018-10-01 00:25:25,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-10-01 00:25:25,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 298 transitions. [2018-10-01 00:25:25,093 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 298 transitions. Word has length 8 [2018-10-01 00:25:25,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:25,093 INFO L480 AbstractCegarLoop]: Abstraction has 168 states and 298 transitions. [2018-10-01 00:25:25,093 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:25:25,093 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 298 transitions. [2018-10-01 00:25:25,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-10-01 00:25:25,094 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:25,094 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:25,095 INFO L423 AbstractCegarLoop]: === Iteration 14 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:25,095 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:25,095 INFO L82 PathProgramCache]: Analyzing trace with hash -35778354, now seen corresponding path program 1 times [2018-10-01 00:25:25,095 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:25,095 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:25,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:25,096 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:25,096 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:25,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:25,163 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:25,164 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:25,164 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:25,180 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:25,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:25,186 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:25,216 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:25,237 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:25,237 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-10-01 00:25:25,238 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:25:25,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:25:25,238 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:25,238 INFO L87 Difference]: Start difference. First operand 168 states and 298 transitions. Second operand 7 states. [2018-10-01 00:25:26,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:26,056 INFO L93 Difference]: Finished difference Result 296 states and 523 transitions. [2018-10-01 00:25:26,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-10-01 00:25:26,056 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 8 [2018-10-01 00:25:26,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:26,059 INFO L225 Difference]: With dead ends: 296 [2018-10-01 00:25:26,059 INFO L226 Difference]: Without dead ends: 294 [2018-10-01 00:25:26,059 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:25:26,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-10-01 00:25:26,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 239. [2018-10-01 00:25:26,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-10-01 00:25:26,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 427 transitions. [2018-10-01 00:25:26,101 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 427 transitions. Word has length 8 [2018-10-01 00:25:26,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:26,101 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 427 transitions. [2018-10-01 00:25:26,101 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:25:26,101 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 427 transitions. [2018-10-01 00:25:26,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-01 00:25:26,102 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:26,102 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:25:26,102 INFO L423 AbstractCegarLoop]: === Iteration 15 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:26,102 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:26,103 INFO L82 PathProgramCache]: Analyzing trace with hash -799219888, now seen corresponding path program 1 times [2018-10-01 00:25:26,103 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:26,103 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:26,103 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:26,104 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:26,104 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:26,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:26,186 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:26,186 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:26,186 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:26,202 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:26,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:26,212 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:26,347 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:26,369 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:26,369 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 11 [2018-10-01 00:25:26,369 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-01 00:25:26,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-01 00:25:26,370 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:26,370 INFO L87 Difference]: Start difference. First operand 239 states and 427 transitions. Second operand 13 states. [2018-10-01 00:25:28,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:28,387 INFO L93 Difference]: Finished difference Result 315 states and 571 transitions. [2018-10-01 00:25:28,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-10-01 00:25:28,389 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 9 [2018-10-01 00:25:28,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:28,391 INFO L225 Difference]: With dead ends: 315 [2018-10-01 00:25:28,391 INFO L226 Difference]: Without dead ends: 313 [2018-10-01 00:25:28,392 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s Time [2018-10-01 00:25:28,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-10-01 00:25:28,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 261. [2018-10-01 00:25:28,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261 states. [2018-10-01 00:25:28,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 467 transitions. [2018-10-01 00:25:28,446 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 467 transitions. Word has length 9 [2018-10-01 00:25:28,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:28,447 INFO L480 AbstractCegarLoop]: Abstraction has 261 states and 467 transitions. [2018-10-01 00:25:28,447 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-01 00:25:28,447 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 467 transitions. [2018-10-01 00:25:28,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-10-01 00:25:28,447 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:28,448 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:28,448 INFO L423 AbstractCegarLoop]: === Iteration 16 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:28,448 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:28,448 INFO L82 PathProgramCache]: Analyzing trace with hash -1170716006, now seen corresponding path program 1 times [2018-10-01 00:25:28,449 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:28,449 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:28,449 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:28,449 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:28,450 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:28,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:28,553 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:28,554 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:28,554 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:28,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:28,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:28,568 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:28,699 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:28,720 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:28,720 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 12 [2018-10-01 00:25:28,721 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-01 00:25:28,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-01 00:25:28,721 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:28,721 INFO L87 Difference]: Start difference. First operand 261 states and 467 transitions. Second operand 14 states. [2018-10-01 00:25:33,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:33,438 INFO L93 Difference]: Finished difference Result 582 states and 1032 transitions. [2018-10-01 00:25:33,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-10-01 00:25:33,438 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 9 [2018-10-01 00:25:33,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:33,441 INFO L225 Difference]: With dead ends: 582 [2018-10-01 00:25:33,441 INFO L226 Difference]: Without dead ends: 580 [2018-10-01 00:25:33,442 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s Time [2018-10-01 00:25:33,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 580 states. [2018-10-01 00:25:33,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 580 to 463. [2018-10-01 00:25:33,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 463 states. [2018-10-01 00:25:33,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 463 states to 463 states and 838 transitions. [2018-10-01 00:25:33,567 INFO L78 Accepts]: Start accepts. Automaton has 463 states and 838 transitions. Word has length 9 [2018-10-01 00:25:33,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:33,568 INFO L480 AbstractCegarLoop]: Abstraction has 463 states and 838 transitions. [2018-10-01 00:25:33,568 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-01 00:25:33,568 INFO L276 IsEmpty]: Start isEmpty. Operand 463 states and 838 transitions. [2018-10-01 00:25:33,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:33,569 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:33,569 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:33,569 INFO L423 AbstractCegarLoop]: === Iteration 17 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:33,569 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:33,569 INFO L82 PathProgramCache]: Analyzing trace with hash -1740000584, now seen corresponding path program 1 times [2018-10-01 00:25:33,570 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:33,570 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:33,570 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:33,571 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:33,571 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:33,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:33,798 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:33,798 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:33,799 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:33,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:33,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:33,826 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:33,917 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:33,938 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:33,939 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2018-10-01 00:25:33,939 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-10-01 00:25:33,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-10-01 00:25:33,939 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:33,939 INFO L87 Difference]: Start difference. First operand 463 states and 838 transitions. Second operand 10 states. [2018-10-01 00:25:37,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:37,502 INFO L93 Difference]: Finished difference Result 594 states and 1059 transitions. [2018-10-01 00:25:37,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-10-01 00:25:37,505 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 11 [2018-10-01 00:25:37,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:37,508 INFO L225 Difference]: With dead ends: 594 [2018-10-01 00:25:37,508 INFO L226 Difference]: Without dead ends: 592 [2018-10-01 00:25:37,508 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s Time [2018-10-01 00:25:37,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2018-10-01 00:25:37,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 467. [2018-10-01 00:25:37,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 467 states. [2018-10-01 00:25:37,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 467 states and 846 transitions. [2018-10-01 00:25:37,617 INFO L78 Accepts]: Start accepts. Automaton has 467 states and 846 transitions. Word has length 11 [2018-10-01 00:25:37,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:37,617 INFO L480 AbstractCegarLoop]: Abstraction has 467 states and 846 transitions. [2018-10-01 00:25:37,618 INFO L481 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-10-01 00:25:37,618 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 846 transitions. [2018-10-01 00:25:37,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:37,618 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:37,619 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:37,619 INFO L423 AbstractCegarLoop]: === Iteration 18 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:37,619 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:37,619 INFO L82 PathProgramCache]: Analyzing trace with hash -1701828094, now seen corresponding path program 1 times [2018-10-01 00:25:37,619 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:37,619 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:37,620 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:37,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:37,620 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:37,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:37,725 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:37,726 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:37,726 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:37,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:37,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:37,744 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:37,816 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:37,838 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-10-01 00:25:37,838 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [7] total 14 [2018-10-01 00:25:37,839 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-01 00:25:37,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-01 00:25:37,839 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:37,839 INFO L87 Difference]: Start difference. First operand 467 states and 846 transitions. Second operand 14 states. [2018-10-01 00:25:42,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:42,940 INFO L93 Difference]: Finished difference Result 1089 states and 1952 transitions. [2018-10-01 00:25:42,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-10-01 00:25:42,940 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 11 [2018-10-01 00:25:42,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:42,945 INFO L225 Difference]: With dead ends: 1089 [2018-10-01 00:25:42,945 INFO L226 Difference]: Without dead ends: 661 [2018-10-01 00:25:42,947 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.3s Time [2018-10-01 00:25:42,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 661 states. [2018-10-01 00:25:43,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 661 to 537. [2018-10-01 00:25:43,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 537 states. [2018-10-01 00:25:43,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 537 states to 537 states and 963 transitions. [2018-10-01 00:25:43,084 INFO L78 Accepts]: Start accepts. Automaton has 537 states and 963 transitions. Word has length 11 [2018-10-01 00:25:43,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:43,085 INFO L480 AbstractCegarLoop]: Abstraction has 537 states and 963 transitions. [2018-10-01 00:25:43,085 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-01 00:25:43,085 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states and 963 transitions. [2018-10-01 00:25:43,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:43,086 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:43,086 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:43,086 INFO L423 AbstractCegarLoop]: === Iteration 19 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:43,086 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:43,086 INFO L82 PathProgramCache]: Analyzing trace with hash 707064552, now seen corresponding path program 1 times [2018-10-01 00:25:43,086 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:43,087 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:43,087 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:43,087 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:43,088 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:43,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:43,218 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:43,219 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:25:43,219 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-10-01 00:25:43,219 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-01 00:25:43,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-01 00:25:43,220 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:43,220 INFO L87 Difference]: Start difference. First operand 537 states and 963 transitions. Second operand 8 states. [2018-10-01 00:25:44,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:44,786 INFO L93 Difference]: Finished difference Result 613 states and 1088 transitions. [2018-10-01 00:25:44,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-01 00:25:44,786 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 11 [2018-10-01 00:25:44,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:44,790 INFO L225 Difference]: With dead ends: 613 [2018-10-01 00:25:44,790 INFO L226 Difference]: Without dead ends: 611 [2018-10-01 00:25:44,790 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s Time [2018-10-01 00:25:44,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 611 states. [2018-10-01 00:25:44,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 611 to 547. [2018-10-01 00:25:44,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 547 states. [2018-10-01 00:25:44,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 547 states to 547 states and 976 transitions. [2018-10-01 00:25:44,923 INFO L78 Accepts]: Start accepts. Automaton has 547 states and 976 transitions. Word has length 11 [2018-10-01 00:25:44,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:44,924 INFO L480 AbstractCegarLoop]: Abstraction has 547 states and 976 transitions. [2018-10-01 00:25:44,924 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-01 00:25:44,924 INFO L276 IsEmpty]: Start isEmpty. Operand 547 states and 976 transitions. [2018-10-01 00:25:44,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:44,925 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:44,925 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:44,925 INFO L423 AbstractCegarLoop]: === Iteration 20 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:44,925 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:44,925 INFO L82 PathProgramCache]: Analyzing trace with hash 739509354, now seen corresponding path program 1 times [2018-10-01 00:25:44,926 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:44,926 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:44,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:44,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:44,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:44,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:45,021 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:45,022 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:45,022 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:45,029 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:45,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:45,035 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:45,292 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:45,322 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:45,322 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 13 [2018-10-01 00:25:45,323 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-01 00:25:45,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-01 00:25:45,323 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:45,323 INFO L87 Difference]: Start difference. First operand 547 states and 976 transitions. Second operand 13 states. [2018-10-01 00:25:47,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:47,966 INFO L93 Difference]: Finished difference Result 1152 states and 2033 transitions. [2018-10-01 00:25:47,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-10-01 00:25:47,967 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 11 [2018-10-01 00:25:47,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:47,969 INFO L225 Difference]: With dead ends: 1152 [2018-10-01 00:25:47,970 INFO L226 Difference]: Without dead ends: 636 [2018-10-01 00:25:47,971 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s Time [2018-10-01 00:25:47,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 636 states. [2018-10-01 00:25:48,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 636 to 561. [2018-10-01 00:25:48,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 561 states. [2018-10-01 00:25:48,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 561 states to 561 states and 1000 transitions. [2018-10-01 00:25:48,169 INFO L78 Accepts]: Start accepts. Automaton has 561 states and 1000 transitions. Word has length 11 [2018-10-01 00:25:48,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:48,169 INFO L480 AbstractCegarLoop]: Abstraction has 561 states and 1000 transitions. [2018-10-01 00:25:48,169 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-01 00:25:48,169 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 1000 transitions. [2018-10-01 00:25:48,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:48,170 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:48,170 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:48,171 INFO L423 AbstractCegarLoop]: === Iteration 21 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:48,171 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:48,171 INFO L82 PathProgramCache]: Analyzing trace with hash -1106731073, now seen corresponding path program 1 times [2018-10-01 00:25:48,171 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:48,171 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:48,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:48,172 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:48,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:48,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:48,507 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:48,507 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:25:48,507 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-01 00:25:48,508 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-01 00:25:48,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-01 00:25:48,508 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:48,508 INFO L87 Difference]: Start difference. First operand 561 states and 1000 transitions. Second operand 8 states. [2018-10-01 00:25:49,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:49,819 INFO L93 Difference]: Finished difference Result 590 states and 1032 transitions. [2018-10-01 00:25:49,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-01 00:25:49,820 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 11 [2018-10-01 00:25:49,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:49,823 INFO L225 Difference]: With dead ends: 590 [2018-10-01 00:25:49,823 INFO L226 Difference]: Without dead ends: 588 [2018-10-01 00:25:49,823 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s Time [2018-10-01 00:25:49,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 588 states. [2018-10-01 00:25:49,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 588 to 561. [2018-10-01 00:25:49,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 561 states. [2018-10-01 00:25:49,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 561 states to 561 states and 1000 transitions. [2018-10-01 00:25:49,973 INFO L78 Accepts]: Start accepts. Automaton has 561 states and 1000 transitions. Word has length 11 [2018-10-01 00:25:49,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:49,973 INFO L480 AbstractCegarLoop]: Abstraction has 561 states and 1000 transitions. [2018-10-01 00:25:49,973 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-01 00:25:49,973 INFO L276 IsEmpty]: Start isEmpty. Operand 561 states and 1000 transitions. [2018-10-01 00:25:49,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:49,974 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:49,974 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:49,974 INFO L423 AbstractCegarLoop]: === Iteration 22 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:49,974 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:49,975 INFO L82 PathProgramCache]: Analyzing trace with hash -1098144186, now seen corresponding path program 1 times [2018-10-01 00:25:49,975 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:49,975 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:49,975 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:49,976 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:49,976 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:49,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:50,176 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:50,177 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:50,177 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:50,184 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:50,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:50,190 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:50,227 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:50,248 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:50,248 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2018-10-01 00:25:50,248 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-10-01 00:25:50,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-10-01 00:25:50,249 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:50,249 INFO L87 Difference]: Start difference. First operand 561 states and 1000 transitions. Second operand 9 states. [2018-10-01 00:25:51,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:51,401 INFO L93 Difference]: Finished difference Result 615 states and 1081 transitions. [2018-10-01 00:25:51,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-01 00:25:51,401 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 11 [2018-10-01 00:25:51,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:51,404 INFO L225 Difference]: With dead ends: 615 [2018-10-01 00:25:51,404 INFO L226 Difference]: Without dead ends: 613 [2018-10-01 00:25:51,405 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s Time [2018-10-01 00:25:51,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 613 states. [2018-10-01 00:25:51,532 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 613 to 560. [2018-10-01 00:25:51,532 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 560 states. [2018-10-01 00:25:51,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 560 states to 560 states and 998 transitions. [2018-10-01 00:25:51,534 INFO L78 Accepts]: Start accepts. Automaton has 560 states and 998 transitions. Word has length 11 [2018-10-01 00:25:51,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:51,534 INFO L480 AbstractCegarLoop]: Abstraction has 560 states and 998 transitions. [2018-10-01 00:25:51,534 INFO L481 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-10-01 00:25:51,534 INFO L276 IsEmpty]: Start isEmpty. Operand 560 states and 998 transitions. [2018-10-01 00:25:51,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:51,535 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:51,535 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:51,535 INFO L423 AbstractCegarLoop]: === Iteration 23 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:51,535 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:51,535 INFO L82 PathProgramCache]: Analyzing trace with hash -772910566, now seen corresponding path program 1 times [2018-10-01 00:25:51,535 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:51,536 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:51,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:51,536 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:51,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:51,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:51,620 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:51,620 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:51,620 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:51,629 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:51,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:51,635 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:51,727 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:51,748 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:51,748 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 9] total 12 [2018-10-01 00:25:51,748 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-01 00:25:51,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-01 00:25:51,748 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:51,749 INFO L87 Difference]: Start difference. First operand 560 states and 998 transitions. Second operand 13 states. [2018-10-01 00:25:54,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:54,637 INFO L93 Difference]: Finished difference Result 783 states and 1364 transitions. [2018-10-01 00:25:54,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-01 00:25:54,637 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 11 [2018-10-01 00:25:54,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:54,640 INFO L225 Difference]: With dead ends: 783 [2018-10-01 00:25:54,640 INFO L226 Difference]: Without dead ends: 781 [2018-10-01 00:25:54,641 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s Time [2018-10-01 00:25:54,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 781 states. [2018-10-01 00:25:54,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 781 to 608. [2018-10-01 00:25:54,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 608 states. [2018-10-01 00:25:54,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 608 states to 608 states and 1084 transitions. [2018-10-01 00:25:54,784 INFO L78 Accepts]: Start accepts. Automaton has 608 states and 1084 transitions. Word has length 11 [2018-10-01 00:25:54,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:54,785 INFO L480 AbstractCegarLoop]: Abstraction has 608 states and 1084 transitions. [2018-10-01 00:25:54,785 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-01 00:25:54,785 INFO L276 IsEmpty]: Start isEmpty. Operand 608 states and 1084 transitions. [2018-10-01 00:25:54,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:54,785 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:54,785 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:54,786 INFO L423 AbstractCegarLoop]: === Iteration 24 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:54,786 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:54,786 INFO L82 PathProgramCache]: Analyzing trace with hash 1674153000, now seen corresponding path program 2 times [2018-10-01 00:25:54,786 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:54,786 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:54,787 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:54,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:54,787 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:54,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:54,867 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:54,868 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:54,868 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:54,875 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:25:54,882 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:25:54,883 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:25:54,884 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:54,911 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:54,930 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:54,931 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-10-01 00:25:54,931 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:25:54,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:25:54,931 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:54,931 INFO L87 Difference]: Start difference. First operand 608 states and 1084 transitions. Second operand 7 states. [2018-10-01 00:25:56,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:56,155 INFO L93 Difference]: Finished difference Result 752 states and 1322 transitions. [2018-10-01 00:25:56,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-01 00:25:56,156 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 11 [2018-10-01 00:25:56,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:56,159 INFO L225 Difference]: With dead ends: 752 [2018-10-01 00:25:56,159 INFO L226 Difference]: Without dead ends: 750 [2018-10-01 00:25:56,159 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:25:56,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 750 states. [2018-10-01 00:25:56,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 750 to 605. [2018-10-01 00:25:56,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 605 states. [2018-10-01 00:25:56,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 605 states to 605 states and 1079 transitions. [2018-10-01 00:25:56,294 INFO L78 Accepts]: Start accepts. Automaton has 605 states and 1079 transitions. Word has length 11 [2018-10-01 00:25:56,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:56,294 INFO L480 AbstractCegarLoop]: Abstraction has 605 states and 1079 transitions. [2018-10-01 00:25:56,294 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:25:56,294 INFO L276 IsEmpty]: Start isEmpty. Operand 605 states and 1079 transitions. [2018-10-01 00:25:56,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:56,295 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:56,295 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:56,295 INFO L423 AbstractCegarLoop]: === Iteration 25 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:56,295 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:56,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1682742259, now seen corresponding path program 1 times [2018-10-01 00:25:56,296 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:56,296 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:56,296 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:56,296 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:25:56,297 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:56,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:56,449 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:56,449 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:56,450 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:56,465 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:56,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:56,471 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:56,485 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:56,506 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:56,506 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-10-01 00:25:56,506 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:25:56,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:25:56,507 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:56,507 INFO L87 Difference]: Start difference. First operand 605 states and 1079 transitions. Second operand 7 states. [2018-10-01 00:25:57,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:57,938 INFO L93 Difference]: Finished difference Result 770 states and 1359 transitions. [2018-10-01 00:25:57,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-10-01 00:25:57,939 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 11 [2018-10-01 00:25:57,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:57,941 INFO L225 Difference]: With dead ends: 770 [2018-10-01 00:25:57,941 INFO L226 Difference]: Without dead ends: 768 [2018-10-01 00:25:57,942 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time [2018-10-01 00:25:57,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 768 states. [2018-10-01 00:25:58,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 768 to 636. [2018-10-01 00:25:58,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 636 states. [2018-10-01 00:25:58,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 636 states to 636 states and 1134 transitions. [2018-10-01 00:25:58,091 INFO L78 Accepts]: Start accepts. Automaton has 636 states and 1134 transitions. Word has length 11 [2018-10-01 00:25:58,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:58,091 INFO L480 AbstractCegarLoop]: Abstraction has 636 states and 1134 transitions. [2018-10-01 00:25:58,092 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:25:58,092 INFO L276 IsEmpty]: Start isEmpty. Operand 636 states and 1134 transitions. [2018-10-01 00:25:58,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:58,092 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:58,093 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:58,093 INFO L423 AbstractCegarLoop]: === Iteration 26 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:58,093 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:58,093 INFO L82 PathProgramCache]: Analyzing trace with hash -1927251354, now seen corresponding path program 1 times [2018-10-01 00:25:58,093 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:58,093 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:58,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:58,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:58,094 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:58,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:58,162 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:58,162 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:58,162 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:58,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:58,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:58,189 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:58,402 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:58,424 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:58,424 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-10-01 00:25:58,424 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:25:58,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:25:58,424 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:58,425 INFO L87 Difference]: Start difference. First operand 636 states and 1134 transitions. Second operand 7 states. [2018-10-01 00:25:59,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:25:59,522 INFO L93 Difference]: Finished difference Result 711 states and 1251 transitions. [2018-10-01 00:25:59,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-10-01 00:25:59,522 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 11 [2018-10-01 00:25:59,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:25:59,525 INFO L225 Difference]: With dead ends: 711 [2018-10-01 00:25:59,525 INFO L226 Difference]: Without dead ends: 709 [2018-10-01 00:25:59,525 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s Time [2018-10-01 00:25:59,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 709 states. [2018-10-01 00:25:59,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 709 to 648. [2018-10-01 00:25:59,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 648 states. [2018-10-01 00:25:59,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 648 states to 648 states and 1150 transitions. [2018-10-01 00:25:59,685 INFO L78 Accepts]: Start accepts. Automaton has 648 states and 1150 transitions. Word has length 11 [2018-10-01 00:25:59,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:25:59,686 INFO L480 AbstractCegarLoop]: Abstraction has 648 states and 1150 transitions. [2018-10-01 00:25:59,686 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:25:59,686 INFO L276 IsEmpty]: Start isEmpty. Operand 648 states and 1150 transitions. [2018-10-01 00:25:59,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:25:59,686 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:25:59,686 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:25:59,687 INFO L423 AbstractCegarLoop]: === Iteration 27 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:25:59,687 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:25:59,687 INFO L82 PathProgramCache]: Analyzing trace with hash -1918662095, now seen corresponding path program 1 times [2018-10-01 00:25:59,687 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:25:59,687 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:25:59,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:59,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:25:59,688 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:25:59,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:59,812 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:59,812 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:25:59,812 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-10-01 00:25:59,825 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:25:59,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:25:59,845 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:25:59,872 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:25:59,894 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:25:59,895 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-10-01 00:25:59,895 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:25:59,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:25:59,895 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:25:59,895 INFO L87 Difference]: Start difference. First operand 648 states and 1150 transitions. Second operand 7 states. [2018-10-01 00:26:01,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:01,181 INFO L93 Difference]: Finished difference Result 745 states and 1308 transitions. [2018-10-01 00:26:01,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-10-01 00:26:01,182 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 11 [2018-10-01 00:26:01,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:01,185 INFO L225 Difference]: With dead ends: 745 [2018-10-01 00:26:01,185 INFO L226 Difference]: Without dead ends: 743 [2018-10-01 00:26:01,185 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:26:01,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 743 states. [2018-10-01 00:26:01,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 743 to 630. [2018-10-01 00:26:01,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 630 states. [2018-10-01 00:26:01,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 630 states to 630 states and 1116 transitions. [2018-10-01 00:26:01,329 INFO L78 Accepts]: Start accepts. Automaton has 630 states and 1116 transitions. Word has length 11 [2018-10-01 00:26:01,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:01,329 INFO L480 AbstractCegarLoop]: Abstraction has 630 states and 1116 transitions. [2018-10-01 00:26:01,329 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:26:01,329 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 1116 transitions. [2018-10-01 00:26:01,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-10-01 00:26:01,330 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:01,330 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:01,330 INFO L423 AbstractCegarLoop]: === Iteration 28 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:01,331 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:01,331 INFO L82 PathProgramCache]: Analyzing trace with hash -1878520164, now seen corresponding path program 1 times [2018-10-01 00:26:01,331 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:01,331 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:01,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:01,332 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:01,332 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:01,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:01,434 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:01,435 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:01,435 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:01,443 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:01,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:01,450 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:01,469 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:01,491 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:01,491 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-10-01 00:26:01,491 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:26:01,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:26:01,492 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:01,492 INFO L87 Difference]: Start difference. First operand 630 states and 1116 transitions. Second operand 7 states. [2018-10-01 00:26:02,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:02,619 INFO L93 Difference]: Finished difference Result 711 states and 1249 transitions. [2018-10-01 00:26:02,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-01 00:26:02,619 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 11 [2018-10-01 00:26:02,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:02,622 INFO L225 Difference]: With dead ends: 711 [2018-10-01 00:26:02,622 INFO L226 Difference]: Without dead ends: 709 [2018-10-01 00:26:02,622 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:26:02,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 709 states. [2018-10-01 00:26:02,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 709 to 621. [2018-10-01 00:26:02,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 621 states. [2018-10-01 00:26:02,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 621 states to 621 states and 1094 transitions. [2018-10-01 00:26:02,764 INFO L78 Accepts]: Start accepts. Automaton has 621 states and 1094 transitions. Word has length 11 [2018-10-01 00:26:02,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:02,764 INFO L480 AbstractCegarLoop]: Abstraction has 621 states and 1094 transitions. [2018-10-01 00:26:02,764 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:26:02,764 INFO L276 IsEmpty]: Start isEmpty. Operand 621 states and 1094 transitions. [2018-10-01 00:26:02,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-01 00:26:02,765 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:02,765 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:02,765 INFO L423 AbstractCegarLoop]: === Iteration 29 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:02,765 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:02,765 INFO L82 PathProgramCache]: Analyzing trace with hash 1730496441, now seen corresponding path program 1 times [2018-10-01 00:26:02,766 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:02,766 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:02,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:02,766 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:02,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:02,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:02,931 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:02,932 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:02,932 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:02,941 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:02,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:02,949 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:03,022 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:03,044 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:03,044 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 11 [2018-10-01 00:26:03,044 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-01 00:26:03,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-01 00:26:03,044 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:03,045 INFO L87 Difference]: Start difference. First operand 621 states and 1094 transitions. Second operand 11 states. [2018-10-01 00:26:04,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:04,817 INFO L93 Difference]: Finished difference Result 1305 states and 2267 transitions. [2018-10-01 00:26:04,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-10-01 00:26:04,817 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 12 [2018-10-01 00:26:04,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:04,820 INFO L225 Difference]: With dead ends: 1305 [2018-10-01 00:26:04,820 INFO L226 Difference]: Without dead ends: 715 [2018-10-01 00:26:04,821 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s Time [2018-10-01 00:26:04,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 715 states. [2018-10-01 00:26:04,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 715 to 603. [2018-10-01 00:26:04,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 603 states. [2018-10-01 00:26:04,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 603 states to 603 states and 1053 transitions. [2018-10-01 00:26:04,968 INFO L78 Accepts]: Start accepts. Automaton has 603 states and 1053 transitions. Word has length 12 [2018-10-01 00:26:04,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:04,968 INFO L480 AbstractCegarLoop]: Abstraction has 603 states and 1053 transitions. [2018-10-01 00:26:04,968 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-01 00:26:04,968 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 1053 transitions. [2018-10-01 00:26:04,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-01 00:26:04,969 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:04,969 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:04,969 INFO L423 AbstractCegarLoop]: === Iteration 30 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:04,969 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:04,970 INFO L82 PathProgramCache]: Analyzing trace with hash 1730497723, now seen corresponding path program 1 times [2018-10-01 00:26:04,970 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:04,970 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:04,970 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:04,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:04,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:04,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:05,092 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:05,092 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:05,092 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:05,101 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:05,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:05,107 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:05,211 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:05,232 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:05,232 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 12 [2018-10-01 00:26:05,232 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-01 00:26:05,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-01 00:26:05,232 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:05,233 INFO L87 Difference]: Start difference. First operand 603 states and 1053 transitions. Second operand 14 states. [2018-10-01 00:26:07,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:07,714 INFO L93 Difference]: Finished difference Result 835 states and 1450 transitions. [2018-10-01 00:26:07,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-10-01 00:26:07,715 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 12 [2018-10-01 00:26:07,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:07,718 INFO L225 Difference]: With dead ends: 835 [2018-10-01 00:26:07,718 INFO L226 Difference]: Without dead ends: 833 [2018-10-01 00:26:07,718 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s Time [2018-10-01 00:26:07,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 833 states. [2018-10-01 00:26:07,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 833 to 646. [2018-10-01 00:26:07,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 646 states. [2018-10-01 00:26:07,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 646 states to 646 states and 1132 transitions. [2018-10-01 00:26:07,869 INFO L78 Accepts]: Start accepts. Automaton has 646 states and 1132 transitions. Word has length 12 [2018-10-01 00:26:07,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:07,869 INFO L480 AbstractCegarLoop]: Abstraction has 646 states and 1132 transitions. [2018-10-01 00:26:07,869 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-01 00:26:07,869 INFO L276 IsEmpty]: Start isEmpty. Operand 646 states and 1132 transitions. [2018-10-01 00:26:07,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-10-01 00:26:07,870 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:07,870 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:07,870 INFO L423 AbstractCegarLoop]: === Iteration 31 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:07,870 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:07,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1895489947, now seen corresponding path program 1 times [2018-10-01 00:26:07,871 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:07,871 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:07,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:07,871 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:07,871 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:07,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:08,068 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:08,068 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:08,068 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:08,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:08,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:08,083 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:08,158 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:08,179 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:08,179 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 12 [2018-10-01 00:26:08,180 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-10-01 00:26:08,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-10-01 00:26:08,180 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:08,180 INFO L87 Difference]: Start difference. First operand 646 states and 1132 transitions. Second operand 13 states. [2018-10-01 00:26:11,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:11,903 INFO L93 Difference]: Finished difference Result 1390 states and 2446 transitions. [2018-10-01 00:26:11,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-10-01 00:26:11,903 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 12 [2018-10-01 00:26:11,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:11,908 INFO L225 Difference]: With dead ends: 1390 [2018-10-01 00:26:11,908 INFO L226 Difference]: Without dead ends: 1388 [2018-10-01 00:26:11,909 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s Time [2018-10-01 00:26:11,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1388 states. [2018-10-01 00:26:12,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1388 to 1013. [2018-10-01 00:26:12,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1013 states. [2018-10-01 00:26:12,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1013 states to 1013 states and 1780 transitions. [2018-10-01 00:26:12,168 INFO L78 Accepts]: Start accepts. Automaton has 1013 states and 1780 transitions. Word has length 12 [2018-10-01 00:26:12,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:12,169 INFO L480 AbstractCegarLoop]: Abstraction has 1013 states and 1780 transitions. [2018-10-01 00:26:12,169 INFO L481 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-10-01 00:26:12,169 INFO L276 IsEmpty]: Start isEmpty. Operand 1013 states and 1780 transitions. [2018-10-01 00:26:12,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-10-01 00:26:12,170 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:12,170 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:12,170 INFO L423 AbstractCegarLoop]: === Iteration 32 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:12,170 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:12,170 INFO L82 PathProgramCache]: Analyzing trace with hash -397030605, now seen corresponding path program 1 times [2018-10-01 00:26:12,171 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:12,171 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:12,171 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:12,171 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:12,172 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:12,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:12,299 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:12,300 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:12,300 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:12,308 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:12,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:12,318 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:12,353 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:12,375 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:12,375 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 10 [2018-10-01 00:26:12,375 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-01 00:26:12,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-01 00:26:12,375 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:12,375 INFO L87 Difference]: Start difference. First operand 1013 states and 1780 transitions. Second operand 11 states. [2018-10-01 00:26:15,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:15,043 INFO L93 Difference]: Finished difference Result 1151 states and 1992 transitions. [2018-10-01 00:26:15,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-01 00:26:15,043 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 14 [2018-10-01 00:26:15,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:15,048 INFO L225 Difference]: With dead ends: 1151 [2018-10-01 00:26:15,048 INFO L226 Difference]: Without dead ends: 1149 [2018-10-01 00:26:15,048 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time [2018-10-01 00:26:15,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1149 states. [2018-10-01 00:26:15,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1149 to 1017. [2018-10-01 00:26:15,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1017 states. [2018-10-01 00:26:15,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1017 states to 1017 states and 1785 transitions. [2018-10-01 00:26:15,291 INFO L78 Accepts]: Start accepts. Automaton has 1017 states and 1785 transitions. Word has length 14 [2018-10-01 00:26:15,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:15,292 INFO L480 AbstractCegarLoop]: Abstraction has 1017 states and 1785 transitions. [2018-10-01 00:26:15,292 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-01 00:26:15,292 INFO L276 IsEmpty]: Start isEmpty. Operand 1017 states and 1785 transitions. [2018-10-01 00:26:15,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-10-01 00:26:15,293 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:15,293 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:15,293 INFO L423 AbstractCegarLoop]: === Iteration 33 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:15,293 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:15,294 INFO L82 PathProgramCache]: Analyzing trace with hash -213121378, now seen corresponding path program 1 times [2018-10-01 00:26:15,294 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:15,294 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:15,294 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:15,295 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:15,295 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:15,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:15,401 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:15,402 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:15,402 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:15,410 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:15,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:15,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:15,542 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:15,564 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:15,564 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9] total 13 [2018-10-01 00:26:15,564 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-01 00:26:15,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-01 00:26:15,565 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:15,565 INFO L87 Difference]: Start difference. First operand 1017 states and 1785 transitions. Second operand 14 states. [2018-10-01 00:26:19,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:19,491 INFO L93 Difference]: Finished difference Result 1165 states and 2018 transitions. [2018-10-01 00:26:19,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-10-01 00:26:19,492 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 14 [2018-10-01 00:26:19,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:19,497 INFO L225 Difference]: With dead ends: 1165 [2018-10-01 00:26:19,497 INFO L226 Difference]: Without dead ends: 1163 [2018-10-01 00:26:19,497 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s Time [2018-10-01 00:26:19,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1163 states. [2018-10-01 00:26:19,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1163 to 1015. [2018-10-01 00:26:19,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1015 states. [2018-10-01 00:26:19,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1015 states to 1015 states and 1782 transitions. [2018-10-01 00:26:19,798 INFO L78 Accepts]: Start accepts. Automaton has 1015 states and 1782 transitions. Word has length 14 [2018-10-01 00:26:19,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:19,798 INFO L480 AbstractCegarLoop]: Abstraction has 1015 states and 1782 transitions. [2018-10-01 00:26:19,798 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-01 00:26:19,798 INFO L276 IsEmpty]: Start isEmpty. Operand 1015 states and 1782 transitions. [2018-10-01 00:26:19,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-10-01 00:26:19,799 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:19,799 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:19,800 INFO L423 AbstractCegarLoop]: === Iteration 34 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:19,800 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:19,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1838595071, now seen corresponding path program 1 times [2018-10-01 00:26:19,800 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:19,800 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:19,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:19,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:19,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:19,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:20,563 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:20,563 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:20,563 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:20,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:20,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:20,580 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:20,617 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:20,639 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:20,639 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 11 [2018-10-01 00:26:20,639 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-01 00:26:20,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-01 00:26:20,640 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:20,640 INFO L87 Difference]: Start difference. First operand 1015 states and 1782 transitions. Second operand 12 states. [2018-10-01 00:26:22,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:22,763 INFO L93 Difference]: Finished difference Result 1144 states and 1986 transitions. [2018-10-01 00:26:22,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-10-01 00:26:22,763 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 14 [2018-10-01 00:26:22,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:22,768 INFO L225 Difference]: With dead ends: 1144 [2018-10-01 00:26:22,768 INFO L226 Difference]: Without dead ends: 1142 [2018-10-01 00:26:22,768 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s Time [2018-10-01 00:26:22,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1142 states. [2018-10-01 00:26:23,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1142 to 1003. [2018-10-01 00:26:23,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1003 states. [2018-10-01 00:26:23,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1003 states to 1003 states and 1759 transitions. [2018-10-01 00:26:23,039 INFO L78 Accepts]: Start accepts. Automaton has 1003 states and 1759 transitions. Word has length 14 [2018-10-01 00:26:23,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:23,040 INFO L480 AbstractCegarLoop]: Abstraction has 1003 states and 1759 transitions. [2018-10-01 00:26:23,040 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-01 00:26:23,040 INFO L276 IsEmpty]: Start isEmpty. Operand 1003 states and 1759 transitions. [2018-10-01 00:26:23,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-10-01 00:26:23,040 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:23,041 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:23,041 INFO L423 AbstractCegarLoop]: === Iteration 35 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:23,041 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:23,041 INFO L82 PathProgramCache]: Analyzing trace with hash -47479579, now seen corresponding path program 1 times [2018-10-01 00:26:23,041 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:23,041 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:23,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:23,042 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:23,042 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:23,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:23,112 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:23,113 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:23,113 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:23,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:23,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:23,129 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:23,180 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:23,209 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:23,209 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 10 [2018-10-01 00:26:23,210 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-01 00:26:23,210 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-01 00:26:23,210 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:23,210 INFO L87 Difference]: Start difference. First operand 1003 states and 1759 transitions. Second operand 11 states. [2018-10-01 00:26:25,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:25,175 INFO L93 Difference]: Finished difference Result 1065 states and 1842 transitions. [2018-10-01 00:26:25,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-01 00:26:25,176 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 14 [2018-10-01 00:26:25,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:25,179 INFO L225 Difference]: With dead ends: 1065 [2018-10-01 00:26:25,179 INFO L226 Difference]: Without dead ends: 1063 [2018-10-01 00:26:25,180 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:26:25,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1063 states. [2018-10-01 00:26:25,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1063 to 991. [2018-10-01 00:26:25,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 991 states. [2018-10-01 00:26:25,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 991 states to 991 states and 1740 transitions. [2018-10-01 00:26:25,474 INFO L78 Accepts]: Start accepts. Automaton has 991 states and 1740 transitions. Word has length 14 [2018-10-01 00:26:25,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:25,474 INFO L480 AbstractCegarLoop]: Abstraction has 991 states and 1740 transitions. [2018-10-01 00:26:25,474 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-01 00:26:25,474 INFO L276 IsEmpty]: Start isEmpty. Operand 991 states and 1740 transitions. [2018-10-01 00:26:25,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:26:25,475 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:25,475 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:26:25,476 INFO L423 AbstractCegarLoop]: === Iteration 36 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:25,476 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:25,476 INFO L82 PathProgramCache]: Analyzing trace with hash 2027388784, now seen corresponding path program 2 times [2018-10-01 00:26:25,476 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:25,476 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:25,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:25,477 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:25,477 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:25,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:25,598 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:25,598 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:25,598 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:25,610 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:26:25,617 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:26:25,617 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:26:25,618 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:25,731 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:25,752 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:25,752 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2018-10-01 00:26:25,753 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-01 00:26:25,753 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-01 00:26:25,753 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:25,753 INFO L87 Difference]: Start difference. First operand 991 states and 1740 transitions. Second operand 18 states. [2018-10-01 00:26:30,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:30,390 INFO L93 Difference]: Finished difference Result 1165 states and 2035 transitions. [2018-10-01 00:26:30,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-10-01 00:26:30,390 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 15 [2018-10-01 00:26:30,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:30,394 INFO L225 Difference]: With dead ends: 1165 [2018-10-01 00:26:30,394 INFO L226 Difference]: Without dead ends: 1163 [2018-10-01 00:26:30,394 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s Time [2018-10-01 00:26:30,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1163 states. [2018-10-01 00:26:30,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1163 to 1059. [2018-10-01 00:26:30,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1059 states. [2018-10-01 00:26:30,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1059 states to 1059 states and 1855 transitions. [2018-10-01 00:26:30,667 INFO L78 Accepts]: Start accepts. Automaton has 1059 states and 1855 transitions. Word has length 15 [2018-10-01 00:26:30,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:30,668 INFO L480 AbstractCegarLoop]: Abstraction has 1059 states and 1855 transitions. [2018-10-01 00:26:30,668 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-01 00:26:30,668 INFO L276 IsEmpty]: Start isEmpty. Operand 1059 states and 1855 transitions. [2018-10-01 00:26:30,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:26:30,668 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:30,669 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:30,669 INFO L423 AbstractCegarLoop]: === Iteration 37 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:30,669 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:30,669 INFO L82 PathProgramCache]: Analyzing trace with hash 1863286224, now seen corresponding path program 1 times [2018-10-01 00:26:30,669 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:30,669 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:30,670 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:30,670 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:26:30,670 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:30,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:30,769 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:30,770 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:30,770 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:30,779 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:30,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:30,790 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:30,873 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:30,895 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:30,895 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7] total 15 [2018-10-01 00:26:30,895 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-01 00:26:30,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-01 00:26:30,895 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:30,896 INFO L87 Difference]: Start difference. First operand 1059 states and 1855 transitions. Second operand 15 states. [2018-10-01 00:26:36,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:36,609 INFO L93 Difference]: Finished difference Result 2324 states and 4040 transitions. [2018-10-01 00:26:36,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-10-01 00:26:36,613 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 15 [2018-10-01 00:26:36,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:36,618 INFO L225 Difference]: With dead ends: 2324 [2018-10-01 00:26:36,619 INFO L226 Difference]: Without dead ends: 1296 [2018-10-01 00:26:36,620 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s Time [2018-10-01 00:26:36,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1296 states. [2018-10-01 00:26:36,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1296 to 1199. [2018-10-01 00:26:36,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1199 states. [2018-10-01 00:26:36,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1199 states to 1199 states and 2060 transitions. [2018-10-01 00:26:36,974 INFO L78 Accepts]: Start accepts. Automaton has 1199 states and 2060 transitions. Word has length 15 [2018-10-01 00:26:36,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:36,974 INFO L480 AbstractCegarLoop]: Abstraction has 1199 states and 2060 transitions. [2018-10-01 00:26:36,974 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-01 00:26:36,974 INFO L276 IsEmpty]: Start isEmpty. Operand 1199 states and 2060 transitions. [2018-10-01 00:26:36,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:26:36,976 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:36,976 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:36,976 INFO L423 AbstractCegarLoop]: === Iteration 38 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:36,976 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:36,977 INFO L82 PathProgramCache]: Analyzing trace with hash 1810259450, now seen corresponding path program 1 times [2018-10-01 00:26:36,977 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:36,977 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:36,977 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:36,978 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:36,978 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:36,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:37,083 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:37,083 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:37,083 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:37,092 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:37,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:37,100 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:37,177 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:37,197 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:37,198 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 15 [2018-10-01 00:26:37,198 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-01 00:26:37,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-01 00:26:37,198 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:37,198 INFO L87 Difference]: Start difference. First operand 1199 states and 2060 transitions. Second operand 15 states. [2018-10-01 00:26:44,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:44,246 INFO L93 Difference]: Finished difference Result 3554 states and 6005 transitions. [2018-10-01 00:26:44,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 79 states. [2018-10-01 00:26:44,247 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 15 [2018-10-01 00:26:44,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:44,256 INFO L225 Difference]: With dead ends: 3554 [2018-10-01 00:26:44,256 INFO L226 Difference]: Without dead ends: 2262 [2018-10-01 00:26:44,258 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.9s Time [2018-10-01 00:26:44,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2262 states. [2018-10-01 00:26:44,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2262 to 1715. [2018-10-01 00:26:44,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1715 states. [2018-10-01 00:26:44,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1715 states to 1715 states and 2949 transitions. [2018-10-01 00:26:44,754 INFO L78 Accepts]: Start accepts. Automaton has 1715 states and 2949 transitions. Word has length 15 [2018-10-01 00:26:44,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:44,754 INFO L480 AbstractCegarLoop]: Abstraction has 1715 states and 2949 transitions. [2018-10-01 00:26:44,754 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-01 00:26:44,754 INFO L276 IsEmpty]: Start isEmpty. Operand 1715 states and 2949 transitions. [2018-10-01 00:26:44,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:26:44,755 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:44,755 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:26:44,756 INFO L423 AbstractCegarLoop]: === Iteration 39 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:44,756 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:44,756 INFO L82 PathProgramCache]: Analyzing trace with hash -1088358421, now seen corresponding path program 2 times [2018-10-01 00:26:44,756 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:44,756 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:44,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:44,757 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:44,757 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:44,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:44,847 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:44,848 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:44,848 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:44,856 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:26:44,862 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:26:44,863 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:26:44,864 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:45,065 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:45,086 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:45,086 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7] total 16 [2018-10-01 00:26:45,087 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-01 00:26:45,087 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-01 00:26:45,087 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:45,087 INFO L87 Difference]: Start difference. First operand 1715 states and 2949 transitions. Second operand 17 states. [2018-10-01 00:26:50,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:50,884 INFO L93 Difference]: Finished difference Result 1939 states and 3325 transitions. [2018-10-01 00:26:50,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-10-01 00:26:50,884 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 15 [2018-10-01 00:26:50,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:50,888 INFO L225 Difference]: With dead ends: 1939 [2018-10-01 00:26:50,888 INFO L226 Difference]: Without dead ends: 1937 [2018-10-01 00:26:50,889 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.1s Time [2018-10-01 00:26:50,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1937 states. [2018-10-01 00:26:51,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1937 to 1726. [2018-10-01 00:26:51,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1726 states. [2018-10-01 00:26:51,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1726 states to 1726 states and 2952 transitions. [2018-10-01 00:26:51,368 INFO L78 Accepts]: Start accepts. Automaton has 1726 states and 2952 transitions. Word has length 15 [2018-10-01 00:26:51,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:51,369 INFO L480 AbstractCegarLoop]: Abstraction has 1726 states and 2952 transitions. [2018-10-01 00:26:51,369 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-01 00:26:51,369 INFO L276 IsEmpty]: Start isEmpty. Operand 1726 states and 2952 transitions. [2018-10-01 00:26:51,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:26:51,370 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:51,370 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:26:51,370 INFO L423 AbstractCegarLoop]: === Iteration 40 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:51,370 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:51,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1622542677, now seen corresponding path program 1 times [2018-10-01 00:26:51,370 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:51,371 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:51,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:51,371 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:26:51,371 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:51,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:51,885 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:26:51,885 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:26:51,886 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-01 00:26:51,886 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-10-01 00:26:51,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-10-01 00:26:51,886 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:51,886 INFO L87 Difference]: Start difference. First operand 1726 states and 2952 transitions. Second operand 8 states. [2018-10-01 00:26:53,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:26:53,404 INFO L93 Difference]: Finished difference Result 1771 states and 3005 transitions. [2018-10-01 00:26:53,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-10-01 00:26:53,405 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 15 [2018-10-01 00:26:53,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:26:53,408 INFO L225 Difference]: With dead ends: 1771 [2018-10-01 00:26:53,408 INFO L226 Difference]: Without dead ends: 1769 [2018-10-01 00:26:53,409 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s Time [2018-10-01 00:26:53,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1769 states. [2018-10-01 00:26:53,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1769 to 1724. [2018-10-01 00:26:53,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1724 states. [2018-10-01 00:26:53,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1724 states to 1724 states and 2942 transitions. [2018-10-01 00:26:53,888 INFO L78 Accepts]: Start accepts. Automaton has 1724 states and 2942 transitions. Word has length 15 [2018-10-01 00:26:53,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:26:53,888 INFO L480 AbstractCegarLoop]: Abstraction has 1724 states and 2942 transitions. [2018-10-01 00:26:53,888 INFO L481 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-10-01 00:26:53,888 INFO L276 IsEmpty]: Start isEmpty. Operand 1724 states and 2942 transitions. [2018-10-01 00:26:53,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:26:53,889 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:26:53,889 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:26:53,889 INFO L423 AbstractCegarLoop]: === Iteration 41 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:26:53,889 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:26:53,890 INFO L82 PathProgramCache]: Analyzing trace with hash 1161913671, now seen corresponding path program 1 times [2018-10-01 00:26:53,890 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:26:53,890 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:26:53,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:53,890 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:53,890 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:26:53,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:54,020 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:54,021 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:26:54,021 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:26:54,030 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:26:54,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:26:54,037 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:26:54,110 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 3 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:26:54,132 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:26:54,132 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7] total 15 [2018-10-01 00:26:54,132 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-01 00:26:54,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-01 00:26:54,133 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:26:54,133 INFO L87 Difference]: Start difference. First operand 1724 states and 2942 transitions. Second operand 15 states. [2018-10-01 00:27:00,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:00,270 INFO L93 Difference]: Finished difference Result 4338 states and 7260 transitions. [2018-10-01 00:27:00,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-10-01 00:27:00,270 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 15 [2018-10-01 00:27:00,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:00,275 INFO L225 Difference]: With dead ends: 4338 [2018-10-01 00:27:00,275 INFO L226 Difference]: Without dead ends: 2612 [2018-10-01 00:27:00,278 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s Time [2018-10-01 00:27:00,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2612 states. [2018-10-01 00:27:00,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2612 to 1846. [2018-10-01 00:27:00,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1846 states. [2018-10-01 00:27:00,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1846 states to 1846 states and 3077 transitions. [2018-10-01 00:27:00,969 INFO L78 Accepts]: Start accepts. Automaton has 1846 states and 3077 transitions. Word has length 15 [2018-10-01 00:27:00,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:00,969 INFO L480 AbstractCegarLoop]: Abstraction has 1846 states and 3077 transitions. [2018-10-01 00:27:00,969 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-01 00:27:00,969 INFO L276 IsEmpty]: Start isEmpty. Operand 1846 states and 3077 transitions. [2018-10-01 00:27:00,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:00,970 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:00,970 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:27:00,970 INFO L423 AbstractCegarLoop]: === Iteration 42 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:00,971 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:00,971 INFO L82 PathProgramCache]: Analyzing trace with hash 712923771, now seen corresponding path program 1 times [2018-10-01 00:27:00,971 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:00,971 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:00,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:00,971 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:00,971 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:00,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:01,224 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:27:01,224 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:27:01,225 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:27:01,233 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:01,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:01,241 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:27:01,309 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:27:01,329 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:27:01,329 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 14 [2018-10-01 00:27:01,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-01 00:27:01,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-01 00:27:01,330 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:01,330 INFO L87 Difference]: Start difference. First operand 1846 states and 3077 transitions. Second operand 15 states. [2018-10-01 00:27:05,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:05,489 INFO L93 Difference]: Finished difference Result 2444 states and 4042 transitions. [2018-10-01 00:27:05,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-01 00:27:05,489 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 15 [2018-10-01 00:27:05,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:05,493 INFO L225 Difference]: With dead ends: 2444 [2018-10-01 00:27:05,494 INFO L226 Difference]: Without dead ends: 2442 [2018-10-01 00:27:05,494 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s Time [2018-10-01 00:27:05,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2442 states. [2018-10-01 00:27:06,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2442 to 1867. [2018-10-01 00:27:06,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1867 states. [2018-10-01 00:27:06,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1867 states to 1867 states and 3111 transitions. [2018-10-01 00:27:06,238 INFO L78 Accepts]: Start accepts. Automaton has 1867 states and 3111 transitions. Word has length 15 [2018-10-01 00:27:06,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:06,239 INFO L480 AbstractCegarLoop]: Abstraction has 1867 states and 3111 transitions. [2018-10-01 00:27:06,239 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-01 00:27:06,239 INFO L276 IsEmpty]: Start isEmpty. Operand 1867 states and 3111 transitions. [2018-10-01 00:27:06,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:06,240 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:06,240 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:27:06,240 INFO L423 AbstractCegarLoop]: === Iteration 43 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:06,240 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:06,240 INFO L82 PathProgramCache]: Analyzing trace with hash -312855879, now seen corresponding path program 1 times [2018-10-01 00:27:06,240 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:06,240 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:06,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:06,241 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:06,241 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:06,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:06,309 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:27:06,309 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:27:06,309 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:27:06,317 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:06,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:06,325 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:27:06,384 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:27:06,406 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:27:06,406 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 11 [2018-10-01 00:27:06,406 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-01 00:27:06,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-01 00:27:06,406 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:06,407 INFO L87 Difference]: Start difference. First operand 1867 states and 3111 transitions. Second operand 11 states. [2018-10-01 00:27:08,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:08,513 INFO L93 Difference]: Finished difference Result 3270 states and 5447 transitions. [2018-10-01 00:27:08,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-01 00:27:08,513 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 15 [2018-10-01 00:27:08,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:08,517 INFO L225 Difference]: With dead ends: 3270 [2018-10-01 00:27:08,517 INFO L226 Difference]: Without dead ends: 2325 [2018-10-01 00:27:08,519 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time [2018-10-01 00:27:08,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2325 states. [2018-10-01 00:27:09,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2325 to 1945. [2018-10-01 00:27:09,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1945 states. [2018-10-01 00:27:09,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1945 states to 1945 states and 3245 transitions. [2018-10-01 00:27:09,302 INFO L78 Accepts]: Start accepts. Automaton has 1945 states and 3245 transitions. Word has length 15 [2018-10-01 00:27:09,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:09,303 INFO L480 AbstractCegarLoop]: Abstraction has 1945 states and 3245 transitions. [2018-10-01 00:27:09,303 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-01 00:27:09,303 INFO L276 IsEmpty]: Start isEmpty. Operand 1945 states and 3245 transitions. [2018-10-01 00:27:09,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:09,303 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:09,304 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:27:09,304 INFO L423 AbstractCegarLoop]: === Iteration 44 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:09,304 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:09,304 INFO L82 PathProgramCache]: Analyzing trace with hash -497943192, now seen corresponding path program 1 times [2018-10-01 00:27:09,304 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:09,304 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:09,305 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:09,305 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:09,305 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:09,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:09,403 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:27:09,403 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:27:09,403 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:27:09,411 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:09,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:09,418 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:27:09,542 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:27:09,564 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:27:09,564 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 15 [2018-10-01 00:27:09,565 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-01 00:27:09,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-01 00:27:09,565 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:09,565 INFO L87 Difference]: Start difference. First operand 1945 states and 3245 transitions. Second operand 15 states. [2018-10-01 00:27:17,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:17,782 INFO L93 Difference]: Finished difference Result 3334 states and 5555 transitions. [2018-10-01 00:27:17,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-10-01 00:27:17,783 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 15 [2018-10-01 00:27:17,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:17,786 INFO L225 Difference]: With dead ends: 3334 [2018-10-01 00:27:17,786 INFO L226 Difference]: Without dead ends: 3074 [2018-10-01 00:27:17,787 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s Time [2018-10-01 00:27:17,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3074 states. [2018-10-01 00:27:18,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3074 to 2258. [2018-10-01 00:27:18,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2258 states. [2018-10-01 00:27:18,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2258 states to 2258 states and 3786 transitions. [2018-10-01 00:27:18,819 INFO L78 Accepts]: Start accepts. Automaton has 2258 states and 3786 transitions. Word has length 15 [2018-10-01 00:27:18,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:18,819 INFO L480 AbstractCegarLoop]: Abstraction has 2258 states and 3786 transitions. [2018-10-01 00:27:18,819 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-01 00:27:18,819 INFO L276 IsEmpty]: Start isEmpty. Operand 2258 states and 3786 transitions. [2018-10-01 00:27:18,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:18,820 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:18,820 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:27:18,820 INFO L423 AbstractCegarLoop]: === Iteration 45 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:18,820 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:18,820 INFO L82 PathProgramCache]: Analyzing trace with hash 1957708543, now seen corresponding path program 1 times [2018-10-01 00:27:18,820 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:18,821 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:18,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:18,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:18,821 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:18,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:19,140 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:27:19,141 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:27:19,141 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:27:19,150 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:19,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:19,157 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:27:19,252 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:27:19,283 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:27:19,283 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 16 [2018-10-01 00:27:19,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-01 00:27:19,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-01 00:27:19,283 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:19,284 INFO L87 Difference]: Start difference. First operand 2258 states and 3786 transitions. Second operand 16 states. [2018-10-01 00:27:26,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:26,883 INFO L93 Difference]: Finished difference Result 4220 states and 7044 transitions. [2018-10-01 00:27:26,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-10-01 00:27:26,883 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 15 [2018-10-01 00:27:26,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:26,886 INFO L225 Difference]: With dead ends: 4220 [2018-10-01 00:27:26,886 INFO L226 Difference]: Without dead ends: 2713 [2018-10-01 00:27:26,888 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.3s Time [2018-10-01 00:27:26,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2713 states. [2018-10-01 00:27:27,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2713 to 2243. [2018-10-01 00:27:27,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2243 states. [2018-10-01 00:27:27,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2243 states to 2243 states and 3741 transitions. [2018-10-01 00:27:27,890 INFO L78 Accepts]: Start accepts. Automaton has 2243 states and 3741 transitions. Word has length 15 [2018-10-01 00:27:27,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:27,890 INFO L480 AbstractCegarLoop]: Abstraction has 2243 states and 3741 transitions. [2018-10-01 00:27:27,890 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-01 00:27:27,890 INFO L276 IsEmpty]: Start isEmpty. Operand 2243 states and 3741 transitions. [2018-10-01 00:27:27,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:27,891 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:27,891 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:27:27,891 INFO L423 AbstractCegarLoop]: === Iteration 46 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:27,891 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:27,891 INFO L82 PathProgramCache]: Analyzing trace with hash -1643695811, now seen corresponding path program 1 times [2018-10-01 00:27:27,891 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:27,891 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:27,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:27,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:27,892 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:27,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:27,975 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:27:27,975 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:27:27,975 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:27:27,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:27,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:27,991 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:27:28,102 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:27:28,122 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:27:28,123 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 16 [2018-10-01 00:27:28,123 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-01 00:27:28,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-01 00:27:28,123 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:28,123 INFO L87 Difference]: Start difference. First operand 2243 states and 3741 transitions. Second operand 16 states. [2018-10-01 00:27:34,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:34,646 INFO L93 Difference]: Finished difference Result 2722 states and 4476 transitions. [2018-10-01 00:27:34,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-10-01 00:27:34,646 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 15 [2018-10-01 00:27:34,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:34,648 INFO L225 Difference]: With dead ends: 2722 [2018-10-01 00:27:34,649 INFO L226 Difference]: Without dead ends: 2609 [2018-10-01 00:27:34,649 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.4s Time [2018-10-01 00:27:34,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2609 states. [2018-10-01 00:27:35,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2609 to 2244. [2018-10-01 00:27:35,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2244 states. [2018-10-01 00:27:35,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2244 states to 2244 states and 3736 transitions. [2018-10-01 00:27:35,593 INFO L78 Accepts]: Start accepts. Automaton has 2244 states and 3736 transitions. Word has length 15 [2018-10-01 00:27:35,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:35,593 INFO L480 AbstractCegarLoop]: Abstraction has 2244 states and 3736 transitions. [2018-10-01 00:27:35,593 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-01 00:27:35,594 INFO L276 IsEmpty]: Start isEmpty. Operand 2244 states and 3736 transitions. [2018-10-01 00:27:35,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:35,595 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:35,595 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:27:35,595 INFO L423 AbstractCegarLoop]: === Iteration 47 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:35,595 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:35,595 INFO L82 PathProgramCache]: Analyzing trace with hash 1426431952, now seen corresponding path program 1 times [2018-10-01 00:27:35,595 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:35,595 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:35,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:35,596 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:35,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:35,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:35,802 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:27:35,802 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:27:35,802 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:27:35,810 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:35,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:35,818 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:27:35,903 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:27:35,925 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:27:35,925 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 15 [2018-10-01 00:27:35,925 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-01 00:27:35,926 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-01 00:27:35,926 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:35,926 INFO L87 Difference]: Start difference. First operand 2244 states and 3736 transitions. Second operand 15 states. [2018-10-01 00:27:42,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:42,949 INFO L93 Difference]: Finished difference Result 3553 states and 5897 transitions. [2018-10-01 00:27:42,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-10-01 00:27:42,949 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 15 [2018-10-01 00:27:42,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:42,952 INFO L225 Difference]: With dead ends: 3553 [2018-10-01 00:27:42,952 INFO L226 Difference]: Without dead ends: 2828 [2018-10-01 00:27:42,953 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s Time [2018-10-01 00:27:42,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2828 states. [2018-10-01 00:27:43,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2828 to 2605. [2018-10-01 00:27:43,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2605 states. [2018-10-01 00:27:43,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2605 states to 2605 states and 4312 transitions. [2018-10-01 00:27:43,979 INFO L78 Accepts]: Start accepts. Automaton has 2605 states and 4312 transitions. Word has length 15 [2018-10-01 00:27:43,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:43,979 INFO L480 AbstractCegarLoop]: Abstraction has 2605 states and 4312 transitions. [2018-10-01 00:27:43,980 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-01 00:27:43,980 INFO L276 IsEmpty]: Start isEmpty. Operand 2605 states and 4312 transitions. [2018-10-01 00:27:43,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:43,980 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:43,980 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:27:43,981 INFO L423 AbstractCegarLoop]: === Iteration 48 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:43,981 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:43,981 INFO L82 PathProgramCache]: Analyzing trace with hash -815773655, now seen corresponding path program 1 times [2018-10-01 00:27:43,981 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:43,981 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:43,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:43,982 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:43,982 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:43,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:44,038 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:27:44,038 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:27:44,039 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-01 00:27:44,039 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:27:44,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:27:44,039 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:44,039 INFO L87 Difference]: Start difference. First operand 2605 states and 4312 transitions. Second operand 7 states. [2018-10-01 00:27:46,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:46,227 INFO L93 Difference]: Finished difference Result 5552 states and 9149 transitions. [2018-10-01 00:27:46,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-10-01 00:27:46,228 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-10-01 00:27:46,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:46,230 INFO L225 Difference]: With dead ends: 5552 [2018-10-01 00:27:46,230 INFO L226 Difference]: Without dead ends: 3060 [2018-10-01 00:27:46,232 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:27:46,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3060 states. [2018-10-01 00:27:47,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3060 to 2778. [2018-10-01 00:27:47,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2778 states. [2018-10-01 00:27:47,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2778 states to 2778 states and 4589 transitions. [2018-10-01 00:27:47,344 INFO L78 Accepts]: Start accepts. Automaton has 2778 states and 4589 transitions. Word has length 15 [2018-10-01 00:27:47,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:47,344 INFO L480 AbstractCegarLoop]: Abstraction has 2778 states and 4589 transitions. [2018-10-01 00:27:47,344 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:27:47,345 INFO L276 IsEmpty]: Start isEmpty. Operand 2778 states and 4589 transitions. [2018-10-01 00:27:47,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:47,345 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:47,345 INFO L375 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:27:47,346 INFO L423 AbstractCegarLoop]: === Iteration 49 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:47,346 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:47,346 INFO L82 PathProgramCache]: Analyzing trace with hash -1698888354, now seen corresponding path program 1 times [2018-10-01 00:27:47,346 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:47,346 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:47,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:47,347 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:47,347 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:47,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:47,422 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:27:47,422 INFO L313 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-01 00:27:47,422 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-10-01 00:27:47,423 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-10-01 00:27:47,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-10-01 00:27:47,423 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:47,423 INFO L87 Difference]: Start difference. First operand 2778 states and 4589 transitions. Second operand 7 states. [2018-10-01 00:27:49,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:49,695 INFO L93 Difference]: Finished difference Result 6531 states and 10698 transitions. [2018-10-01 00:27:49,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-10-01 00:27:49,696 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-10-01 00:27:49,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:49,699 INFO L225 Difference]: With dead ends: 6531 [2018-10-01 00:27:49,699 INFO L226 Difference]: Without dead ends: 3709 [2018-10-01 00:27:49,702 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time [2018-10-01 00:27:49,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3709 states. [2018-10-01 00:27:50,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3709 to 2911. [2018-10-01 00:27:50,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2911 states. [2018-10-01 00:27:50,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2911 states to 2911 states and 4795 transitions. [2018-10-01 00:27:50,898 INFO L78 Accepts]: Start accepts. Automaton has 2911 states and 4795 transitions. Word has length 15 [2018-10-01 00:27:50,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:27:50,898 INFO L480 AbstractCegarLoop]: Abstraction has 2911 states and 4795 transitions. [2018-10-01 00:27:50,898 INFO L481 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-10-01 00:27:50,898 INFO L276 IsEmpty]: Start isEmpty. Operand 2911 states and 4795 transitions. [2018-10-01 00:27:50,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-10-01 00:27:50,900 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:27:50,900 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:27:50,900 INFO L423 AbstractCegarLoop]: === Iteration 50 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:27:50,900 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:27:50,900 INFO L82 PathProgramCache]: Analyzing trace with hash -38293542, now seen corresponding path program 1 times [2018-10-01 00:27:50,900 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:27:50,901 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:27:50,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:50,901 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:50,901 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:27:50,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:51,019 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:27:51,019 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:27:51,020 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:27:51,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:27:51,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:27:51,039 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:27:51,117 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:27:51,139 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:27:51,139 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7] total 15 [2018-10-01 00:27:51,139 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-01 00:27:51,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-01 00:27:51,140 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:27:51,140 INFO L87 Difference]: Start difference. First operand 2911 states and 4795 transitions. Second operand 15 states. [2018-10-01 00:27:58,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:27:58,981 INFO L93 Difference]: Finished difference Result 4682 states and 7599 transitions. [2018-10-01 00:27:58,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-10-01 00:27:58,981 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 15 [2018-10-01 00:27:58,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:27:58,984 INFO L225 Difference]: With dead ends: 4682 [2018-10-01 00:27:58,985 INFO L226 Difference]: Without dead ends: 3796 [2018-10-01 00:27:58,986 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s Time [2018-10-01 00:27:58,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3796 states. [2018-10-01 00:28:00,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3796 to 2895. [2018-10-01 00:28:00,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2895 states. [2018-10-01 00:28:00,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2895 states to 2895 states and 4687 transitions. [2018-10-01 00:28:00,177 INFO L78 Accepts]: Start accepts. Automaton has 2895 states and 4687 transitions. Word has length 15 [2018-10-01 00:28:00,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:28:00,177 INFO L480 AbstractCegarLoop]: Abstraction has 2895 states and 4687 transitions. [2018-10-01 00:28:00,177 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-01 00:28:00,177 INFO L276 IsEmpty]: Start isEmpty. Operand 2895 states and 4687 transitions. [2018-10-01 00:28:00,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-10-01 00:28:00,178 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:28:00,178 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:28:00,178 INFO L423 AbstractCegarLoop]: === Iteration 51 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:28:00,178 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:28:00,178 INFO L82 PathProgramCache]: Analyzing trace with hash -1379463247, now seen corresponding path program 2 times [2018-10-01 00:28:00,179 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:28:00,179 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:28:00,179 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:00,179 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:00,179 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:00,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:00,252 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 5 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:00,252 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:28:00,252 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:28:00,262 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:28:00,269 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:28:00,269 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:28:00,270 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:28:00,447 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 3 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:00,467 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:28:00,468 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 16 [2018-10-01 00:28:00,468 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-01 00:28:00,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-01 00:28:00,468 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:28:00,468 INFO L87 Difference]: Start difference. First operand 2895 states and 4687 transitions. Second operand 17 states. [2018-10-01 00:28:08,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:28:08,886 INFO L93 Difference]: Finished difference Result 3400 states and 5492 transitions. [2018-10-01 00:28:08,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-10-01 00:28:08,886 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 17 [2018-10-01 00:28:08,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:28:08,889 INFO L225 Difference]: With dead ends: 3400 [2018-10-01 00:28:08,890 INFO L226 Difference]: Without dead ends: 3398 [2018-10-01 00:28:08,891 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s Time [2018-10-01 00:28:08,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3398 states. [2018-10-01 00:28:10,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3398 to 2880. [2018-10-01 00:28:10,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2880 states. [2018-10-01 00:28:10,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2880 states to 2880 states and 4659 transitions. [2018-10-01 00:28:10,072 INFO L78 Accepts]: Start accepts. Automaton has 2880 states and 4659 transitions. Word has length 17 [2018-10-01 00:28:10,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:28:10,072 INFO L480 AbstractCegarLoop]: Abstraction has 2880 states and 4659 transitions. [2018-10-01 00:28:10,072 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-01 00:28:10,072 INFO L276 IsEmpty]: Start isEmpty. Operand 2880 states and 4659 transitions. [2018-10-01 00:28:10,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-01 00:28:10,074 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:28:10,074 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:28:10,074 INFO L423 AbstractCegarLoop]: === Iteration 52 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:28:10,074 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:28:10,074 INFO L82 PathProgramCache]: Analyzing trace with hash 1882250372, now seen corresponding path program 1 times [2018-10-01 00:28:10,074 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:28:10,075 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:28:10,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:10,075 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:28:10,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:10,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:10,169 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 1 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:10,169 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:28:10,169 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:28:10,177 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:10,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:10,185 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:28:10,296 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:28:10,317 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:28:10,318 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 15 [2018-10-01 00:28:10,318 INFO L459 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-10-01 00:28:10,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-10-01 00:28:10,318 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:28:10,318 INFO L87 Difference]: Start difference. First operand 2880 states and 4659 transitions. Second operand 16 states. [2018-10-01 00:28:17,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:28:17,503 INFO L93 Difference]: Finished difference Result 3174 states and 5111 transitions. [2018-10-01 00:28:17,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-10-01 00:28:17,503 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 18 [2018-10-01 00:28:17,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:28:17,506 INFO L225 Difference]: With dead ends: 3174 [2018-10-01 00:28:17,506 INFO L226 Difference]: Without dead ends: 3172 [2018-10-01 00:28:17,507 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s Time [2018-10-01 00:28:17,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3172 states. [2018-10-01 00:28:18,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3172 to 2919. [2018-10-01 00:28:18,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2919 states. [2018-10-01 00:28:18,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2919 states to 2919 states and 4721 transitions. [2018-10-01 00:28:18,808 INFO L78 Accepts]: Start accepts. Automaton has 2919 states and 4721 transitions. Word has length 18 [2018-10-01 00:28:18,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:28:18,808 INFO L480 AbstractCegarLoop]: Abstraction has 2919 states and 4721 transitions. [2018-10-01 00:28:18,808 INFO L481 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-10-01 00:28:18,808 INFO L276 IsEmpty]: Start isEmpty. Operand 2919 states and 4721 transitions. [2018-10-01 00:28:18,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-01 00:28:18,810 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:28:18,810 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:28:18,810 INFO L423 AbstractCegarLoop]: === Iteration 53 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:28:18,810 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:28:18,810 INFO L82 PathProgramCache]: Analyzing trace with hash 1890837259, now seen corresponding path program 1 times [2018-10-01 00:28:18,810 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:28:18,810 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:28:18,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:18,811 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:18,811 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:18,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:18,906 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:18,906 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:28:18,907 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:28:18,955 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:18,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:18,966 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:28:19,068 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:28:19,096 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:28:19,096 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 14 [2018-10-01 00:28:19,096 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-10-01 00:28:19,097 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-10-01 00:28:19,097 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:28:19,097 INFO L87 Difference]: Start difference. First operand 2919 states and 4721 transitions. Second operand 15 states. [2018-10-01 00:28:25,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:28:25,443 INFO L93 Difference]: Finished difference Result 3348 states and 5378 transitions. [2018-10-01 00:28:25,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-10-01 00:28:25,443 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 18 [2018-10-01 00:28:25,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:28:25,446 INFO L225 Difference]: With dead ends: 3348 [2018-10-01 00:28:25,447 INFO L226 Difference]: Without dead ends: 3346 [2018-10-01 00:28:25,447 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s Time [2018-10-01 00:28:25,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3346 states. [2018-10-01 00:28:26,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3346 to 2913. [2018-10-01 00:28:26,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2913 states. [2018-10-01 00:28:26,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2913 states to 2913 states and 4707 transitions. [2018-10-01 00:28:26,694 INFO L78 Accepts]: Start accepts. Automaton has 2913 states and 4707 transitions. Word has length 18 [2018-10-01 00:28:26,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:28:26,694 INFO L480 AbstractCegarLoop]: Abstraction has 2913 states and 4707 transitions. [2018-10-01 00:28:26,694 INFO L481 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-10-01 00:28:26,694 INFO L276 IsEmpty]: Start isEmpty. Operand 2913 states and 4707 transitions. [2018-10-01 00:28:26,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-01 00:28:26,695 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:28:26,695 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-10-01 00:28:26,696 INFO L423 AbstractCegarLoop]: === Iteration 54 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:28:26,696 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:28:26,696 INFO L82 PathProgramCache]: Analyzing trace with hash -1714933202, now seen corresponding path program 2 times [2018-10-01 00:28:26,696 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:28:26,696 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:28:26,696 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:26,696 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:26,697 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:26,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:26,771 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-10-01 00:28:26,771 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:28:26,772 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:28:26,780 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:28:26,787 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:28:26,787 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:28:26,788 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:28:26,865 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:26,887 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:28:26,887 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 13 [2018-10-01 00:28:26,888 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-01 00:28:26,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-01 00:28:26,888 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:28:26,888 INFO L87 Difference]: Start difference. First operand 2913 states and 4707 transitions. Second operand 14 states. [2018-10-01 00:28:31,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:28:31,584 INFO L93 Difference]: Finished difference Result 3147 states and 5001 transitions. [2018-10-01 00:28:31,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-10-01 00:28:31,584 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 18 [2018-10-01 00:28:31,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:28:31,587 INFO L225 Difference]: With dead ends: 3147 [2018-10-01 00:28:31,587 INFO L226 Difference]: Without dead ends: 3146 [2018-10-01 00:28:31,587 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s Time [2018-10-01 00:28:31,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3146 states. [2018-10-01 00:28:32,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3146 to 2754. [2018-10-01 00:28:32,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2754 states. [2018-10-01 00:28:32,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2754 states to 2754 states and 4430 transitions. [2018-10-01 00:28:32,749 INFO L78 Accepts]: Start accepts. Automaton has 2754 states and 4430 transitions. Word has length 18 [2018-10-01 00:28:32,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:28:32,750 INFO L480 AbstractCegarLoop]: Abstraction has 2754 states and 4430 transitions. [2018-10-01 00:28:32,750 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-01 00:28:32,750 INFO L276 IsEmpty]: Start isEmpty. Operand 2754 states and 4430 transitions. [2018-10-01 00:28:32,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-01 00:28:32,751 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:28:32,751 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:28:32,751 INFO L423 AbstractCegarLoop]: === Iteration 55 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:28:32,751 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:28:32,751 INFO L82 PathProgramCache]: Analyzing trace with hash -1582871485, now seen corresponding path program 1 times [2018-10-01 00:28:32,751 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:28:32,751 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:28:32,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:32,752 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:28:32,752 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:32,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:32,827 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:28:32,827 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:28:32,827 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:28:32,835 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:32,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:32,844 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:28:32,925 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:28:32,947 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:28:32,947 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 11 [2018-10-01 00:28:32,947 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-10-01 00:28:32,947 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-10-01 00:28:32,948 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:28:32,948 INFO L87 Difference]: Start difference. First operand 2754 states and 4430 transitions. Second operand 11 states. [2018-10-01 00:28:35,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:28:35,649 INFO L93 Difference]: Finished difference Result 5147 states and 8283 transitions. [2018-10-01 00:28:35,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-10-01 00:28:35,650 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 18 [2018-10-01 00:28:35,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:28:35,653 INFO L225 Difference]: With dead ends: 5147 [2018-10-01 00:28:35,653 INFO L226 Difference]: Without dead ends: 3227 [2018-10-01 00:28:35,656 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time [2018-10-01 00:28:35,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3227 states. [2018-10-01 00:28:36,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3227 to 2898. [2018-10-01 00:28:36,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2898 states. [2018-10-01 00:28:36,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2898 states to 2898 states and 4655 transitions. [2018-10-01 00:28:36,871 INFO L78 Accepts]: Start accepts. Automaton has 2898 states and 4655 transitions. Word has length 18 [2018-10-01 00:28:36,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:28:36,871 INFO L480 AbstractCegarLoop]: Abstraction has 2898 states and 4655 transitions. [2018-10-01 00:28:36,871 INFO L481 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-10-01 00:28:36,872 INFO L276 IsEmpty]: Start isEmpty. Operand 2898 states and 4655 transitions. [2018-10-01 00:28:36,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-01 00:28:36,873 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:28:36,873 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:28:36,873 INFO L423 AbstractCegarLoop]: === Iteration 56 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:28:36,873 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:28:36,873 INFO L82 PathProgramCache]: Analyzing trace with hash 1434281659, now seen corresponding path program 1 times [2018-10-01 00:28:36,873 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:28:36,873 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:28:36,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:36,874 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:36,874 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:36,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:36,985 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 1 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:36,985 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:28:36,986 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:28:36,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:37,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:37,003 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:28:37,170 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:37,191 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:28:37,191 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-10-01 00:28:37,191 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-01 00:28:37,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-01 00:28:37,191 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:28:37,191 INFO L87 Difference]: Start difference. First operand 2898 states and 4655 transitions. Second operand 18 states. [2018-10-01 00:28:45,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:28:45,643 INFO L93 Difference]: Finished difference Result 3724 states and 5934 transitions. [2018-10-01 00:28:45,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-10-01 00:28:45,643 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 18 [2018-10-01 00:28:45,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:28:45,647 INFO L225 Difference]: With dead ends: 3724 [2018-10-01 00:28:45,647 INFO L226 Difference]: Without dead ends: 3722 [2018-10-01 00:28:45,647 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s Time [2018-10-01 00:28:45,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3722 states. [2018-10-01 00:28:46,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3722 to 2958. [2018-10-01 00:28:46,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2958 states. [2018-10-01 00:28:46,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2958 states to 2958 states and 4758 transitions. [2018-10-01 00:28:46,918 INFO L78 Accepts]: Start accepts. Automaton has 2958 states and 4758 transitions. Word has length 18 [2018-10-01 00:28:46,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:28:46,918 INFO L480 AbstractCegarLoop]: Abstraction has 2958 states and 4758 transitions. [2018-10-01 00:28:46,918 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-01 00:28:46,919 INFO L276 IsEmpty]: Start isEmpty. Operand 2958 states and 4758 transitions. [2018-10-01 00:28:46,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-10-01 00:28:46,920 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:28:46,920 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 1, 1, 1] [2018-10-01 00:28:46,920 INFO L423 AbstractCegarLoop]: === Iteration 57 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:28:46,920 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:28:46,920 INFO L82 PathProgramCache]: Analyzing trace with hash -386796724, now seen corresponding path program 2 times [2018-10-01 00:28:46,920 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:28:46,920 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:28:46,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:46,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:46,921 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:46,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:47,010 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:47,010 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:28:47,010 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:28:47,019 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:28:47,027 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:28:47,027 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:28:47,028 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:28:47,158 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 10 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:28:47,180 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:28:47,180 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2018-10-01 00:28:47,180 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-01 00:28:47,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-01 00:28:47,181 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:28:47,181 INFO L87 Difference]: Start difference. First operand 2958 states and 4758 transitions. Second operand 17 states. [2018-10-01 00:28:55,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:28:55,405 INFO L93 Difference]: Finished difference Result 5923 states and 9475 transitions. [2018-10-01 00:28:55,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-10-01 00:28:55,405 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 18 [2018-10-01 00:28:55,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:28:55,409 INFO L225 Difference]: With dead ends: 5923 [2018-10-01 00:28:55,409 INFO L226 Difference]: Without dead ends: 3681 [2018-10-01 00:28:55,411 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.3s Time [2018-10-01 00:28:55,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3681 states. [2018-10-01 00:28:56,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3681 to 2634. [2018-10-01 00:28:56,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2634 states. [2018-10-01 00:28:56,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2634 states to 2634 states and 4224 transitions. [2018-10-01 00:28:56,675 INFO L78 Accepts]: Start accepts. Automaton has 2634 states and 4224 transitions. Word has length 18 [2018-10-01 00:28:56,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:28:56,675 INFO L480 AbstractCegarLoop]: Abstraction has 2634 states and 4224 transitions. [2018-10-01 00:28:56,675 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-01 00:28:56,675 INFO L276 IsEmpty]: Start isEmpty. Operand 2634 states and 4224 transitions. [2018-10-01 00:28:56,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-01 00:28:56,677 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:28:56,677 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:28:56,677 INFO L423 AbstractCegarLoop]: === Iteration 58 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:28:56,677 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:28:56,677 INFO L82 PathProgramCache]: Analyzing trace with hash -1665373557, now seen corresponding path program 1 times [2018-10-01 00:28:56,677 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:28:56,677 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:28:56,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:56,678 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:28:56,678 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:28:56,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:56,825 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:28:56,826 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:28:56,826 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:28:56,834 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:28:56,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:28:56,844 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:28:57,468 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:28:57,488 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:28:57,488 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 20 [2018-10-01 00:28:57,489 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-10-01 00:28:57,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-10-01 00:28:57,489 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:28:57,489 INFO L87 Difference]: Start difference. First operand 2634 states and 4224 transitions. Second operand 21 states. [2018-10-01 00:29:08,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:29:08,238 INFO L93 Difference]: Finished difference Result 3566 states and 5773 transitions. [2018-10-01 00:29:08,238 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-10-01 00:29:08,239 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 19 [2018-10-01 00:29:08,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:29:08,242 INFO L225 Difference]: With dead ends: 3566 [2018-10-01 00:29:08,242 INFO L226 Difference]: Without dead ends: 3501 [2018-10-01 00:29:08,243 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.0s Time [2018-10-01 00:29:08,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3501 states. [2018-10-01 00:29:09,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3501 to 3055. [2018-10-01 00:29:09,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3055 states. [2018-10-01 00:29:09,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3055 states to 3055 states and 4911 transitions. [2018-10-01 00:29:09,701 INFO L78 Accepts]: Start accepts. Automaton has 3055 states and 4911 transitions. Word has length 19 [2018-10-01 00:29:09,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:29:09,701 INFO L480 AbstractCegarLoop]: Abstraction has 3055 states and 4911 transitions. [2018-10-01 00:29:09,701 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-10-01 00:29:09,701 INFO L276 IsEmpty]: Start isEmpty. Operand 3055 states and 4911 transitions. [2018-10-01 00:29:09,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-01 00:29:09,702 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:29:09,703 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:29:09,703 INFO L423 AbstractCegarLoop]: === Iteration 59 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:29:09,703 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:29:09,703 INFO L82 PathProgramCache]: Analyzing trace with hash -443883967, now seen corresponding path program 1 times [2018-10-01 00:29:09,703 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:29:09,703 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:29:09,703 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:09,704 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:09,704 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:09,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:09,775 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:29:09,775 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:29:09,776 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:29:09,784 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:09,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:09,793 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:29:09,852 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:29:09,873 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:29:09,873 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 12 [2018-10-01 00:29:09,873 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-10-01 00:29:09,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-10-01 00:29:09,873 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:29:09,873 INFO L87 Difference]: Start difference. First operand 3055 states and 4911 transitions. Second operand 12 states. [2018-10-01 00:29:13,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:29:13,258 INFO L93 Difference]: Finished difference Result 5459 states and 8741 transitions. [2018-10-01 00:29:13,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-10-01 00:29:13,259 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 19 [2018-10-01 00:29:13,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:29:13,261 INFO L225 Difference]: With dead ends: 5459 [2018-10-01 00:29:13,261 INFO L226 Difference]: Without dead ends: 3473 [2018-10-01 00:29:13,263 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 16 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s Time [2018-10-01 00:29:13,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3473 states. [2018-10-01 00:29:14,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3473 to 2932. [2018-10-01 00:29:14,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2932 states. [2018-10-01 00:29:14,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2932 states to 2932 states and 4711 transitions. [2018-10-01 00:29:14,678 INFO L78 Accepts]: Start accepts. Automaton has 2932 states and 4711 transitions. Word has length 19 [2018-10-01 00:29:14,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:29:14,678 INFO L480 AbstractCegarLoop]: Abstraction has 2932 states and 4711 transitions. [2018-10-01 00:29:14,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-10-01 00:29:14,678 INFO L276 IsEmpty]: Start isEmpty. Operand 2932 states and 4711 transitions. [2018-10-01 00:29:14,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-01 00:29:14,679 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:29:14,679 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:29:14,679 INFO L423 AbstractCegarLoop]: === Iteration 60 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:29:14,679 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:29:14,680 INFO L82 PathProgramCache]: Analyzing trace with hash 626061337, now seen corresponding path program 1 times [2018-10-01 00:29:14,680 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:29:14,680 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:29:14,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:14,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:14,680 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:14,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:14,810 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:29:14,811 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:29:14,811 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:29:14,818 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:14,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:14,828 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:29:15,006 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:29:15,029 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:29:15,029 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 20 [2018-10-01 00:29:15,029 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-10-01 00:29:15,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-10-01 00:29:15,030 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:29:15,030 INFO L87 Difference]: Start difference. First operand 2932 states and 4711 transitions. Second operand 21 states. [2018-10-01 00:29:24,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:29:24,917 INFO L93 Difference]: Finished difference Result 3428 states and 5478 transitions. [2018-10-01 00:29:24,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-10-01 00:29:24,918 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 19 [2018-10-01 00:29:24,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:29:24,922 INFO L225 Difference]: With dead ends: 3428 [2018-10-01 00:29:24,922 INFO L226 Difference]: Without dead ends: 3426 [2018-10-01 00:29:24,923 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.7s Time [2018-10-01 00:29:24,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3426 states. [2018-10-01 00:29:26,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3426 to 2989. [2018-10-01 00:29:26,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2989 states. [2018-10-01 00:29:26,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2989 states to 2989 states and 4801 transitions. [2018-10-01 00:29:26,324 INFO L78 Accepts]: Start accepts. Automaton has 2989 states and 4801 transitions. Word has length 19 [2018-10-01 00:29:26,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:29:26,324 INFO L480 AbstractCegarLoop]: Abstraction has 2989 states and 4801 transitions. [2018-10-01 00:29:26,324 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-10-01 00:29:26,324 INFO L276 IsEmpty]: Start isEmpty. Operand 2989 states and 4801 transitions. [2018-10-01 00:29:26,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-01 00:29:26,325 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:29:26,325 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-10-01 00:29:26,325 INFO L423 AbstractCegarLoop]: === Iteration 61 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:29:26,325 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:29:26,326 INFO L82 PathProgramCache]: Analyzing trace with hash -1230197572, now seen corresponding path program 1 times [2018-10-01 00:29:26,326 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:29:26,326 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:29:26,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:26,326 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:26,326 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:26,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:26,478 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:29:26,479 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:29:26,479 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:29:26,488 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:26,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:26,497 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:29:26,676 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:29:26,698 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:29:26,698 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 19 [2018-10-01 00:29:26,698 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-01 00:29:26,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-01 00:29:26,699 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:29:26,699 INFO L87 Difference]: Start difference. First operand 2989 states and 4801 transitions. Second operand 20 states. [2018-10-01 00:29:36,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:29:36,548 INFO L93 Difference]: Finished difference Result 3528 states and 5617 transitions. [2018-10-01 00:29:36,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-10-01 00:29:36,548 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 19 [2018-10-01 00:29:36,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:29:36,552 INFO L225 Difference]: With dead ends: 3528 [2018-10-01 00:29:36,552 INFO L226 Difference]: Without dead ends: 3500 [2018-10-01 00:29:36,552 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s Time [2018-10-01 00:29:36,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3500 states. [2018-10-01 00:29:37,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3500 to 2925. [2018-10-01 00:29:37,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2925 states. [2018-10-01 00:29:37,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2925 states to 2925 states and 4701 transitions. [2018-10-01 00:29:37,977 INFO L78 Accepts]: Start accepts. Automaton has 2925 states and 4701 transitions. Word has length 19 [2018-10-01 00:29:37,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:29:37,977 INFO L480 AbstractCegarLoop]: Abstraction has 2925 states and 4701 transitions. [2018-10-01 00:29:37,977 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-01 00:29:37,977 INFO L276 IsEmpty]: Start isEmpty. Operand 2925 states and 4701 transitions. [2018-10-01 00:29:37,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-01 00:29:37,978 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:29:37,978 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-10-01 00:29:37,978 INFO L423 AbstractCegarLoop]: === Iteration 62 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:29:37,978 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:29:37,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1271169050, now seen corresponding path program 1 times [2018-10-01 00:29:37,979 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:29:37,979 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:29:37,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:37,979 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:37,979 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:37,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:38,109 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 2 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:29:38,109 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:29:38,109 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:29:38,118 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:38,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:38,128 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:29:38,305 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:29:38,326 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:29:38,326 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 21 [2018-10-01 00:29:38,327 INFO L459 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-10-01 00:29:38,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-10-01 00:29:38,327 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:29:38,327 INFO L87 Difference]: Start difference. First operand 2925 states and 4701 transitions. Second operand 22 states. [2018-10-01 00:29:47,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:29:47,282 INFO L93 Difference]: Finished difference Result 4540 states and 7332 transitions. [2018-10-01 00:29:47,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-10-01 00:29:47,282 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 19 [2018-10-01 00:29:47,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:29:47,287 INFO L225 Difference]: With dead ends: 4540 [2018-10-01 00:29:47,287 INFO L226 Difference]: Without dead ends: 4539 [2018-10-01 00:29:47,288 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s Time [2018-10-01 00:29:47,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4539 states. [2018-10-01 00:29:49,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4539 to 3842. [2018-10-01 00:29:49,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3842 states. [2018-10-01 00:29:49,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3842 states to 3842 states and 6243 transitions. [2018-10-01 00:29:49,120 INFO L78 Accepts]: Start accepts. Automaton has 3842 states and 6243 transitions. Word has length 19 [2018-10-01 00:29:49,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:29:49,120 INFO L480 AbstractCegarLoop]: Abstraction has 3842 states and 6243 transitions. [2018-10-01 00:29:49,120 INFO L481 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-10-01 00:29:49,120 INFO L276 IsEmpty]: Start isEmpty. Operand 3842 states and 6243 transitions. [2018-10-01 00:29:49,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-10-01 00:29:49,121 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:29:49,121 INFO L375 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:29:49,122 INFO L423 AbstractCegarLoop]: === Iteration 63 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:29:49,122 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:29:49,122 INFO L82 PathProgramCache]: Analyzing trace with hash -1231183154, now seen corresponding path program 1 times [2018-10-01 00:29:49,122 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:29:49,122 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:29:49,122 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:49,123 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:49,123 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:49,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:49,536 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:29:49,536 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:29:49,536 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:29:49,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:49,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:49,555 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:29:49,720 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 1 proven. 10 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:29:49,742 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:29:49,742 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 20 [2018-10-01 00:29:49,742 INFO L459 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-10-01 00:29:49,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-10-01 00:29:49,743 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:29:49,743 INFO L87 Difference]: Start difference. First operand 3842 states and 6243 transitions. Second operand 21 states. [2018-10-01 00:29:57,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:29:57,818 INFO L93 Difference]: Finished difference Result 4653 states and 7549 transitions. [2018-10-01 00:29:57,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-01 00:29:57,818 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 19 [2018-10-01 00:29:57,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:29:57,822 INFO L225 Difference]: With dead ends: 4653 [2018-10-01 00:29:57,822 INFO L226 Difference]: Without dead ends: 4652 [2018-10-01 00:29:57,823 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s Time [2018-10-01 00:29:57,825 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4652 states. [2018-10-01 00:29:59,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4652 to 3095. [2018-10-01 00:29:59,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3095 states. [2018-10-01 00:29:59,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3095 states to 3095 states and 4965 transitions. [2018-10-01 00:29:59,496 INFO L78 Accepts]: Start accepts. Automaton has 3095 states and 4965 transitions. Word has length 19 [2018-10-01 00:29:59,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:29:59,496 INFO L480 AbstractCegarLoop]: Abstraction has 3095 states and 4965 transitions. [2018-10-01 00:29:59,496 INFO L481 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-10-01 00:29:59,496 INFO L276 IsEmpty]: Start isEmpty. Operand 3095 states and 4965 transitions. [2018-10-01 00:29:59,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:29:59,497 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:29:59,497 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:29:59,498 INFO L423 AbstractCegarLoop]: === Iteration 64 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:29:59,498 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:29:59,498 INFO L82 PathProgramCache]: Analyzing trace with hash 277164812, now seen corresponding path program 1 times [2018-10-01 00:29:59,498 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:29:59,498 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:29:59,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:59,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:59,499 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:29:59,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:59,708 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 2 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:29:59,709 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:29:59,709 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:29:59,717 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:29:59,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:29:59,726 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:29:59,838 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:29:59,858 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:29:59,859 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 16 [2018-10-01 00:29:59,859 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-01 00:29:59,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-01 00:29:59,859 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:29:59,859 INFO L87 Difference]: Start difference. First operand 3095 states and 4965 transitions. Second operand 17 states. [2018-10-01 00:30:05,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:30:05,567 INFO L93 Difference]: Finished difference Result 3514 states and 5593 transitions. [2018-10-01 00:30:05,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-10-01 00:30:05,568 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 21 [2018-10-01 00:30:05,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:30:05,571 INFO L225 Difference]: With dead ends: 3514 [2018-10-01 00:30:05,571 INFO L226 Difference]: Without dead ends: 3512 [2018-10-01 00:30:05,572 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s Time [2018-10-01 00:30:05,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3512 states. [2018-10-01 00:30:07,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3512 to 3172. [2018-10-01 00:30:07,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3172 states. [2018-10-01 00:30:07,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3172 states to 3172 states and 5094 transitions. [2018-10-01 00:30:07,251 INFO L78 Accepts]: Start accepts. Automaton has 3172 states and 5094 transitions. Word has length 21 [2018-10-01 00:30:07,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:30:07,251 INFO L480 AbstractCegarLoop]: Abstraction has 3172 states and 5094 transitions. [2018-10-01 00:30:07,251 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-01 00:30:07,251 INFO L276 IsEmpty]: Start isEmpty. Operand 3172 states and 5094 transitions. [2018-10-01 00:30:07,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:30:07,253 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:30:07,253 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2018-10-01 00:30:07,253 INFO L423 AbstractCegarLoop]: === Iteration 65 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:30:07,254 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:30:07,254 INFO L82 PathProgramCache]: Analyzing trace with hash -99247760, now seen corresponding path program 1 times [2018-10-01 00:30:07,254 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:30:07,254 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:30:07,254 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:07,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:07,255 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:07,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:07,389 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 8 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:30:07,390 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:30:07,390 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:30:07,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:07,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:07,409 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:30:07,485 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-10-01 00:30:07,505 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:30:07,505 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 7] total 18 [2018-10-01 00:30:07,505 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-01 00:30:07,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-01 00:30:07,506 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:30:07,506 INFO L87 Difference]: Start difference. First operand 3172 states and 5094 transitions. Second operand 18 states. [2018-10-01 00:30:16,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:30:16,902 INFO L93 Difference]: Finished difference Result 4249 states and 6702 transitions. [2018-10-01 00:30:16,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-10-01 00:30:16,902 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 21 [2018-10-01 00:30:16,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:30:16,906 INFO L225 Difference]: With dead ends: 4249 [2018-10-01 00:30:16,906 INFO L226 Difference]: Without dead ends: 3991 [2018-10-01 00:30:16,907 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s Time [2018-10-01 00:30:16,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3991 states. [2018-10-01 00:30:18,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3991 to 3256. [2018-10-01 00:30:18,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3256 states. [2018-10-01 00:30:18,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3256 states to 3256 states and 5198 transitions. [2018-10-01 00:30:18,558 INFO L78 Accepts]: Start accepts. Automaton has 3256 states and 5198 transitions. Word has length 21 [2018-10-01 00:30:18,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:30:18,558 INFO L480 AbstractCegarLoop]: Abstraction has 3256 states and 5198 transitions. [2018-10-01 00:30:18,558 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-01 00:30:18,558 INFO L276 IsEmpty]: Start isEmpty. Operand 3256 states and 5198 transitions. [2018-10-01 00:30:18,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:30:18,560 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:30:18,560 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:30:18,560 INFO L423 AbstractCegarLoop]: === Iteration 66 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:30:18,560 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:30:18,560 INFO L82 PathProgramCache]: Analyzing trace with hash -1547437348, now seen corresponding path program 1 times [2018-10-01 00:30:18,560 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:30:18,560 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:30:18,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:18,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:18,561 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:18,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:19,909 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 1 proven. 20 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:30:19,909 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:30:19,909 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:30:19,917 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:19,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:19,926 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:30:20,052 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 15 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:30:20,072 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:30:20,072 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 20 [2018-10-01 00:30:20,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-01 00:30:20,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-01 00:30:20,073 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:30:20,073 INFO L87 Difference]: Start difference. First operand 3256 states and 5198 transitions. Second operand 20 states. [2018-10-01 00:30:28,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:30:28,545 INFO L93 Difference]: Finished difference Result 6396 states and 10131 transitions. [2018-10-01 00:30:28,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-10-01 00:30:28,545 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 21 [2018-10-01 00:30:28,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:30:28,548 INFO L225 Difference]: With dead ends: 6396 [2018-10-01 00:30:28,548 INFO L226 Difference]: Without dead ends: 3806 [2018-10-01 00:30:28,550 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1s Time [2018-10-01 00:30:28,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3806 states. [2018-10-01 00:30:30,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3806 to 3454. [2018-10-01 00:30:30,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3454 states. [2018-10-01 00:30:30,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3454 states to 3454 states and 5479 transitions. [2018-10-01 00:30:30,226 INFO L78 Accepts]: Start accepts. Automaton has 3454 states and 5479 transitions. Word has length 21 [2018-10-01 00:30:30,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:30:30,227 INFO L480 AbstractCegarLoop]: Abstraction has 3454 states and 5479 transitions. [2018-10-01 00:30:30,227 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-01 00:30:30,227 INFO L276 IsEmpty]: Start isEmpty. Operand 3454 states and 5479 transitions. [2018-10-01 00:30:30,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:30:30,228 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:30:30,228 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:30:30,228 INFO L423 AbstractCegarLoop]: === Iteration 67 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:30:30,228 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:30:30,228 INFO L82 PathProgramCache]: Analyzing trace with hash 1125074231, now seen corresponding path program 1 times [2018-10-01 00:30:30,229 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:30:30,229 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:30:30,229 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:30,229 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:30,229 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:30,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:30,550 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 3 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:30:30,550 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:30:30,550 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:30:30,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:30,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:30,567 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:30:30,703 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:30:30,725 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:30:30,725 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 16 [2018-10-01 00:30:30,726 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-01 00:30:30,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-01 00:30:30,726 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:30:30,726 INFO L87 Difference]: Start difference. First operand 3454 states and 5479 transitions. Second operand 17 states. [2018-10-01 00:30:38,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:30:38,951 INFO L93 Difference]: Finished difference Result 3706 states and 5868 transitions. [2018-10-01 00:30:38,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-10-01 00:30:38,951 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 21 [2018-10-01 00:30:38,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:30:38,955 INFO L225 Difference]: With dead ends: 3706 [2018-10-01 00:30:38,955 INFO L226 Difference]: Without dead ends: 3704 [2018-10-01 00:30:38,955 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s Time [2018-10-01 00:30:38,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3704 states. [2018-10-01 00:30:40,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3704 to 3433. [2018-10-01 00:30:40,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3433 states. [2018-10-01 00:30:40,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3433 states to 3433 states and 5440 transitions. [2018-10-01 00:30:40,788 INFO L78 Accepts]: Start accepts. Automaton has 3433 states and 5440 transitions. Word has length 21 [2018-10-01 00:30:40,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:30:40,789 INFO L480 AbstractCegarLoop]: Abstraction has 3433 states and 5440 transitions. [2018-10-01 00:30:40,789 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-01 00:30:40,789 INFO L276 IsEmpty]: Start isEmpty. Operand 3433 states and 5440 transitions. [2018-10-01 00:30:40,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:30:40,790 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:30:40,790 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:30:40,790 INFO L423 AbstractCegarLoop]: === Iteration 68 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:30:40,790 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:30:40,791 INFO L82 PathProgramCache]: Analyzing trace with hash -1369008906, now seen corresponding path program 1 times [2018-10-01 00:30:40,791 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:30:40,791 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:30:40,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:40,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:40,791 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:40,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:40,857 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 18 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-10-01 00:30:40,857 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:30:40,857 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:30:40,865 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:40,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:40,875 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:30:41,028 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 3 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:30:41,049 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:30:41,050 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10] total 13 [2018-10-01 00:30:41,050 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-10-01 00:30:41,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-10-01 00:30:41,050 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:30:41,050 INFO L87 Difference]: Start difference. First operand 3433 states and 5440 transitions. Second operand 14 states. [2018-10-01 00:30:48,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:30:48,753 INFO L93 Difference]: Finished difference Result 4656 states and 7345 transitions. [2018-10-01 00:30:48,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-10-01 00:30:48,753 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-10-01 00:30:48,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:30:48,758 INFO L225 Difference]: With dead ends: 4656 [2018-10-01 00:30:48,758 INFO L226 Difference]: Without dead ends: 4554 [2018-10-01 00:30:48,759 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s Time [2018-10-01 00:30:48,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4554 states. [2018-10-01 00:30:50,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4554 to 3481. [2018-10-01 00:30:50,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3481 states. [2018-10-01 00:30:50,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3481 states to 3481 states and 5508 transitions. [2018-10-01 00:30:50,582 INFO L78 Accepts]: Start accepts. Automaton has 3481 states and 5508 transitions. Word has length 21 [2018-10-01 00:30:50,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:30:50,582 INFO L480 AbstractCegarLoop]: Abstraction has 3481 states and 5508 transitions. [2018-10-01 00:30:50,582 INFO L481 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-10-01 00:30:50,582 INFO L276 IsEmpty]: Start isEmpty. Operand 3481 states and 5508 transitions. [2018-10-01 00:30:50,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:30:50,584 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:30:50,584 INFO L375 BasicCegarLoop]: trace histogram [4, 4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:30:50,584 INFO L423 AbstractCegarLoop]: === Iteration 69 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:30:50,584 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:30:50,584 INFO L82 PathProgramCache]: Analyzing trace with hash -1953233810, now seen corresponding path program 2 times [2018-10-01 00:30:50,584 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:30:50,584 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:30:50,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:50,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:30:50,585 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:30:50,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:30:50,688 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 2 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:30:50,688 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:30:50,688 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:30:50,698 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:30:50,706 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:30:50,706 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:30:50,708 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:30:50,862 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 1 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:30:50,882 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:30:50,882 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 16 [2018-10-01 00:30:50,883 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-01 00:30:50,883 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-01 00:30:50,883 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:30:50,883 INFO L87 Difference]: Start difference. First operand 3481 states and 5508 transitions. Second operand 17 states. [2018-10-01 00:31:00,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:31:00,678 INFO L93 Difference]: Finished difference Result 5131 states and 8159 transitions. [2018-10-01 00:31:00,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-10-01 00:31:00,678 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 21 [2018-10-01 00:31:00,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:31:00,682 INFO L225 Difference]: With dead ends: 5131 [2018-10-01 00:31:00,682 INFO L226 Difference]: Without dead ends: 5121 [2018-10-01 00:31:00,682 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s Time [2018-10-01 00:31:00,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5121 states. [2018-10-01 00:31:02,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5121 to 3689. [2018-10-01 00:31:02,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3689 states. [2018-10-01 00:31:02,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3689 states to 3689 states and 5850 transitions. [2018-10-01 00:31:02,441 INFO L78 Accepts]: Start accepts. Automaton has 3689 states and 5850 transitions. Word has length 21 [2018-10-01 00:31:02,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:31:02,442 INFO L480 AbstractCegarLoop]: Abstraction has 3689 states and 5850 transitions. [2018-10-01 00:31:02,442 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-01 00:31:02,442 INFO L276 IsEmpty]: Start isEmpty. Operand 3689 states and 5850 transitions. [2018-10-01 00:31:02,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:31:02,444 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:31:02,444 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:31:02,444 INFO L423 AbstractCegarLoop]: === Iteration 70 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:31:02,444 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:31:02,445 INFO L82 PathProgramCache]: Analyzing trace with hash -1944645353, now seen corresponding path program 1 times [2018-10-01 00:31:02,445 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:31:02,445 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:31:02,445 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:31:02,446 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:31:02,446 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:31:02,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:31:02,553 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:31:02,554 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:31:02,554 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:31:02,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:31:02,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:31:02,570 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:31:02,736 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 13 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:31:02,758 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:31:02,758 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 20 [2018-10-01 00:31:02,759 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-01 00:31:02,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-01 00:31:02,759 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:31:02,759 INFO L87 Difference]: Start difference. First operand 3689 states and 5850 transitions. Second operand 20 states. [2018-10-01 00:31:18,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:31:18,136 INFO L93 Difference]: Finished difference Result 8108 states and 12700 transitions. [2018-10-01 00:31:18,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2018-10-01 00:31:18,137 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 21 [2018-10-01 00:31:18,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:31:18,141 INFO L225 Difference]: With dead ends: 8108 [2018-10-01 00:31:18,141 INFO L226 Difference]: Without dead ends: 5141 [2018-10-01 00:31:18,145 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 3.7s Time [2018-10-01 00:31:18,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5141 states. [2018-10-01 00:31:20,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5141 to 3868. [2018-10-01 00:31:20,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3868 states. [2018-10-01 00:31:20,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3868 states to 3868 states and 6108 transitions. [2018-10-01 00:31:20,069 INFO L78 Accepts]: Start accepts. Automaton has 3868 states and 6108 transitions. Word has length 21 [2018-10-01 00:31:20,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:31:20,070 INFO L480 AbstractCegarLoop]: Abstraction has 3868 states and 6108 transitions. [2018-10-01 00:31:20,070 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-01 00:31:20,070 INFO L276 IsEmpty]: Start isEmpty. Operand 3868 states and 6108 transitions. [2018-10-01 00:31:20,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:31:20,072 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:31:20,072 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:31:20,072 INFO L423 AbstractCegarLoop]: === Iteration 71 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:31:20,072 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:31:20,073 INFO L82 PathProgramCache]: Analyzing trace with hash 534864297, now seen corresponding path program 1 times [2018-10-01 00:31:20,073 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:31:20,073 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:31:20,073 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:31:20,073 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:31:20,074 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:31:20,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:31:20,174 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 2 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:31:20,175 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:31:20,175 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:31:20,184 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:31:20,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:31:20,191 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:31:20,310 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:31:20,331 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:31:20,331 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 16 [2018-10-01 00:31:20,331 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-10-01 00:31:20,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-10-01 00:31:20,331 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:31:20,331 INFO L87 Difference]: Start difference. First operand 3868 states and 6108 transitions. Second operand 17 states. [2018-10-01 00:31:30,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:31:30,769 INFO L93 Difference]: Finished difference Result 5092 states and 8078 transitions. [2018-10-01 00:31:30,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-10-01 00:31:30,770 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 21 [2018-10-01 00:31:30,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:31:30,774 INFO L225 Difference]: With dead ends: 5092 [2018-10-01 00:31:30,774 INFO L226 Difference]: Without dead ends: 5090 [2018-10-01 00:31:30,775 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.1s Time [2018-10-01 00:31:30,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5090 states. [2018-10-01 00:31:32,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5090 to 4074. [2018-10-01 00:31:32,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4074 states. [2018-10-01 00:31:32,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4074 states to 4074 states and 6461 transitions. [2018-10-01 00:31:32,904 INFO L78 Accepts]: Start accepts. Automaton has 4074 states and 6461 transitions. Word has length 21 [2018-10-01 00:31:32,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:31:32,904 INFO L480 AbstractCegarLoop]: Abstraction has 4074 states and 6461 transitions. [2018-10-01 00:31:32,904 INFO L481 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-10-01 00:31:32,904 INFO L276 IsEmpty]: Start isEmpty. Operand 4074 states and 6461 transitions. [2018-10-01 00:31:32,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:31:32,906 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:31:32,906 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:31:32,906 INFO L423 AbstractCegarLoop]: === Iteration 72 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:31:32,906 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:31:32,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1892744866, now seen corresponding path program 1 times [2018-10-01 00:31:32,906 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:31:32,906 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:31:32,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:31:32,907 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:31:32,907 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:31:32,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:31:33,092 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:31:33,092 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:31:33,092 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:31:33,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:31:33,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:31:33,112 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:31:33,284 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:31:33,306 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:31:33,306 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 17 [2018-10-01 00:31:33,306 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-10-01 00:31:33,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-10-01 00:31:33,306 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:31:33,307 INFO L87 Difference]: Start difference. First operand 4074 states and 6461 transitions. Second operand 18 states. [2018-10-01 00:31:42,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:31:42,677 INFO L93 Difference]: Finished difference Result 4699 states and 7417 transitions. [2018-10-01 00:31:42,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-10-01 00:31:42,678 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 21 [2018-10-01 00:31:42,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:31:42,682 INFO L225 Difference]: With dead ends: 4699 [2018-10-01 00:31:42,682 INFO L226 Difference]: Without dead ends: 4697 [2018-10-01 00:31:42,683 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s Time [2018-10-01 00:31:42,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4697 states. [2018-10-01 00:31:44,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4697 to 4170. [2018-10-01 00:31:44,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4170 states. [2018-10-01 00:31:44,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4170 states to 4170 states and 6610 transitions. [2018-10-01 00:31:44,912 INFO L78 Accepts]: Start accepts. Automaton has 4170 states and 6610 transitions. Word has length 21 [2018-10-01 00:31:44,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:31:44,912 INFO L480 AbstractCegarLoop]: Abstraction has 4170 states and 6610 transitions. [2018-10-01 00:31:44,912 INFO L481 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-10-01 00:31:44,912 INFO L276 IsEmpty]: Start isEmpty. Operand 4170 states and 6610 transitions. [2018-10-01 00:31:44,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:31:44,914 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:31:44,914 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2018-10-01 00:31:44,914 INFO L423 AbstractCegarLoop]: === Iteration 73 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:31:44,914 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:31:44,914 INFO L82 PathProgramCache]: Analyzing trace with hash -549793185, now seen corresponding path program 1 times [2018-10-01 00:31:44,914 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:31:44,914 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:31:44,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:31:44,915 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:31:44,915 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:31:44,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:31:45,018 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:31:45,018 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:31:45,018 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:31:45,035 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:31:45,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:31:45,044 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:31:45,235 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 15 proven. 10 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:31:45,255 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:31:45,255 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 20 [2018-10-01 00:31:45,256 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-01 00:31:45,256 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-01 00:31:45,256 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:31:45,256 INFO L87 Difference]: Start difference. First operand 4170 states and 6610 transitions. Second operand 20 states. [2018-10-01 00:31:59,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:31:59,803 INFO L93 Difference]: Finished difference Result 8604 states and 13594 transitions. [2018-10-01 00:31:59,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2018-10-01 00:31:59,803 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 21 [2018-10-01 00:31:59,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:31:59,807 INFO L225 Difference]: With dead ends: 8604 [2018-10-01 00:31:59,807 INFO L226 Difference]: Without dead ends: 5154 [2018-10-01 00:31:59,810 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.7s Time [2018-10-01 00:31:59,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5154 states. [2018-10-01 00:32:01,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5154 to 3988. [2018-10-01 00:32:01,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3988 states. [2018-10-01 00:32:02,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3988 states to 3988 states and 6323 transitions. [2018-10-01 00:32:02,000 INFO L78 Accepts]: Start accepts. Automaton has 3988 states and 6323 transitions. Word has length 21 [2018-10-01 00:32:02,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:32:02,000 INFO L480 AbstractCegarLoop]: Abstraction has 3988 states and 6323 transitions. [2018-10-01 00:32:02,000 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-01 00:32:02,001 INFO L276 IsEmpty]: Start isEmpty. Operand 3988 states and 6323 transitions. [2018-10-01 00:32:02,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:32:02,002 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:32:02,002 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:32:02,002 INFO L423 AbstractCegarLoop]: === Iteration 74 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:32:02,002 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:32:02,002 INFO L82 PathProgramCache]: Analyzing trace with hash 1350011320, now seen corresponding path program 1 times [2018-10-01 00:32:02,002 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:32:02,003 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:32:02,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:32:02,003 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:32:02,003 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:32:02,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:32:02,130 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:32:02,130 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:32:02,130 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:32:02,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:32:02,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:32:02,152 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:32:02,320 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:32:02,340 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:32:02,341 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 18 [2018-10-01 00:32:02,341 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-01 00:32:02,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-01 00:32:02,341 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:32:02,341 INFO L87 Difference]: Start difference. First operand 3988 states and 6323 transitions. Second operand 19 states. [2018-10-01 00:32:12,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:32:12,056 INFO L93 Difference]: Finished difference Result 5075 states and 8078 transitions. [2018-10-01 00:32:12,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-10-01 00:32:12,056 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 21 [2018-10-01 00:32:12,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:32:12,060 INFO L225 Difference]: With dead ends: 5075 [2018-10-01 00:32:12,060 INFO L226 Difference]: Without dead ends: 5073 [2018-10-01 00:32:12,061 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s Time [2018-10-01 00:32:12,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5073 states. [2018-10-01 00:32:14,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5073 to 3961. [2018-10-01 00:32:14,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3961 states. [2018-10-01 00:32:14,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3961 states to 3961 states and 6281 transitions. [2018-10-01 00:32:14,335 INFO L78 Accepts]: Start accepts. Automaton has 3961 states and 6281 transitions. Word has length 21 [2018-10-01 00:32:14,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:32:14,335 INFO L480 AbstractCegarLoop]: Abstraction has 3961 states and 6281 transitions. [2018-10-01 00:32:14,335 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-01 00:32:14,335 INFO L276 IsEmpty]: Start isEmpty. Operand 3961 states and 6281 transitions. [2018-10-01 00:32:14,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:32:14,336 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:32:14,336 INFO L375 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:32:14,337 INFO L423 AbstractCegarLoop]: === Iteration 75 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:32:14,337 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:32:14,337 INFO L82 PathProgramCache]: Analyzing trace with hash 152359304, now seen corresponding path program 1 times [2018-10-01 00:32:14,337 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:32:14,337 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:32:14,337 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:32:14,338 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:32:14,338 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:32:14,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:32:14,555 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:32:14,555 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:32:14,555 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:32:14,563 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:32:14,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:32:14,572 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:32:14,734 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:32:14,756 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:32:14,756 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 20 [2018-10-01 00:32:14,756 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-01 00:32:14,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-01 00:32:14,756 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:32:14,757 INFO L87 Difference]: Start difference. First operand 3961 states and 6281 transitions. Second operand 20 states. [2018-10-01 00:32:28,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:32:28,863 INFO L93 Difference]: Finished difference Result 8472 states and 13444 transitions. [2018-10-01 00:32:28,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2018-10-01 00:32:28,863 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 21 [2018-10-01 00:32:28,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:32:28,868 INFO L225 Difference]: With dead ends: 8472 [2018-10-01 00:32:28,868 INFO L226 Difference]: Without dead ends: 5270 [2018-10-01 00:32:28,871 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 4.4s Time [2018-10-01 00:32:28,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5270 states. [2018-10-01 00:32:31,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5270 to 4308. [2018-10-01 00:32:31,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4308 states. [2018-10-01 00:32:31,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4308 states to 4308 states and 6865 transitions. [2018-10-01 00:32:31,246 INFO L78 Accepts]: Start accepts. Automaton has 4308 states and 6865 transitions. Word has length 21 [2018-10-01 00:32:31,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:32:31,246 INFO L480 AbstractCegarLoop]: Abstraction has 4308 states and 6865 transitions. [2018-10-01 00:32:31,246 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-01 00:32:31,246 INFO L276 IsEmpty]: Start isEmpty. Operand 4308 states and 6865 transitions. [2018-10-01 00:32:31,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:32:31,248 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:32:31,248 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1] [2018-10-01 00:32:31,248 INFO L423 AbstractCegarLoop]: === Iteration 76 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:32:31,248 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:32:31,248 INFO L82 PathProgramCache]: Analyzing trace with hash 2122062335, now seen corresponding path program 2 times [2018-10-01 00:32:31,248 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:32:31,248 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:32:31,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:32:31,249 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:32:31,249 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:32:31,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:32:31,589 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:32:31,589 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:32:31,589 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:32:31,598 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:32:31,610 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:32:31,611 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:32:31,612 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:32:31,922 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-10-01 00:32:31,943 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:32:31,943 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 18 [2018-10-01 00:32:31,944 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-01 00:32:31,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-01 00:32:31,944 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:32:31,944 INFO L87 Difference]: Start difference. First operand 4308 states and 6865 transitions. Second operand 19 states. [2018-10-01 00:32:44,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:32:44,257 INFO L93 Difference]: Finished difference Result 6023 states and 9591 transitions. [2018-10-01 00:32:44,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-10-01 00:32:44,257 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 21 [2018-10-01 00:32:44,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:32:44,261 INFO L225 Difference]: With dead ends: 6023 [2018-10-01 00:32:44,262 INFO L226 Difference]: Without dead ends: 6022 [2018-10-01 00:32:44,262 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.1s Time [2018-10-01 00:32:44,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6022 states. [2018-10-01 00:32:46,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6022 to 4348. [2018-10-01 00:32:46,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4348 states. [2018-10-01 00:32:46,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4348 states to 4348 states and 6932 transitions. [2018-10-01 00:32:46,776 INFO L78 Accepts]: Start accepts. Automaton has 4348 states and 6932 transitions. Word has length 21 [2018-10-01 00:32:46,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:32:46,776 INFO L480 AbstractCegarLoop]: Abstraction has 4348 states and 6932 transitions. [2018-10-01 00:32:46,776 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-01 00:32:46,776 INFO L276 IsEmpty]: Start isEmpty. Operand 4348 states and 6932 transitions. [2018-10-01 00:32:46,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:32:46,778 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:32:46,778 INFO L375 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:32:46,778 INFO L423 AbstractCegarLoop]: === Iteration 77 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:32:46,778 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:32:46,778 INFO L82 PathProgramCache]: Analyzing trace with hash 282746774, now seen corresponding path program 2 times [2018-10-01 00:32:46,778 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:32:46,778 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:32:46,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:32:46,779 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:32:46,779 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:32:46,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:32:46,934 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 1 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:32:46,934 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:32:46,935 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:32:46,942 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:32:46,951 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:32:46,951 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:32:46,952 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:32:47,148 INFO L134 CoverageAnalysis]: Checked inductivity of 26 backedges. 15 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-10-01 00:32:47,169 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:32:47,169 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 19 [2018-10-01 00:32:47,170 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-01 00:32:47,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-01 00:32:47,170 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:32:47,170 INFO L87 Difference]: Start difference. First operand 4348 states and 6932 transitions. Second operand 19 states. [2018-10-01 00:33:04,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:33:04,187 INFO L93 Difference]: Finished difference Result 9977 states and 15848 transitions. [2018-10-01 00:33:04,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 115 states. [2018-10-01 00:33:04,188 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 21 [2018-10-01 00:33:04,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:33:04,194 INFO L225 Difference]: With dead ends: 9977 [2018-10-01 00:33:04,195 INFO L226 Difference]: Without dead ends: 6372 [2018-10-01 00:33:04,198 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 5.4s Time [2018-10-01 00:33:04,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6372 states. [2018-10-01 00:33:06,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6372 to 4427. [2018-10-01 00:33:06,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4427 states. [2018-10-01 00:33:06,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4427 states to 4427 states and 7059 transitions. [2018-10-01 00:33:06,878 INFO L78 Accepts]: Start accepts. Automaton has 4427 states and 7059 transitions. Word has length 21 [2018-10-01 00:33:06,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:33:06,878 INFO L480 AbstractCegarLoop]: Abstraction has 4427 states and 7059 transitions. [2018-10-01 00:33:06,878 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-01 00:33:06,878 INFO L276 IsEmpty]: Start isEmpty. Operand 4427 states and 7059 transitions. [2018-10-01 00:33:06,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:33:06,880 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:33:06,880 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2018-10-01 00:33:06,880 INFO L423 AbstractCegarLoop]: === Iteration 78 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:33:06,880 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:33:06,880 INFO L82 PathProgramCache]: Analyzing trace with hash 1384653123, now seen corresponding path program 3 times [2018-10-01 00:33:06,880 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:33:06,880 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:33:06,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:33:06,881 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:33:06,881 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:33:06,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:33:07,006 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 1 proven. 26 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:33:07,007 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:33:07,007 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:33:07,015 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-10-01 00:33:07,024 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-10-01 00:33:07,024 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:33:07,025 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:33:07,166 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 18 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:33:07,186 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:33:07,186 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 19 [2018-10-01 00:33:07,186 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-01 00:33:07,186 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-01 00:33:07,186 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:33:07,186 INFO L87 Difference]: Start difference. First operand 4427 states and 7059 transitions. Second operand 19 states. [2018-10-01 00:33:22,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:33:22,757 INFO L93 Difference]: Finished difference Result 10542 states and 16723 transitions. [2018-10-01 00:33:22,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-10-01 00:33:22,757 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 21 [2018-10-01 00:33:22,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:33:22,762 INFO L225 Difference]: With dead ends: 10542 [2018-10-01 00:33:22,763 INFO L226 Difference]: Without dead ends: 6194 [2018-10-01 00:33:22,766 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.8s Time [2018-10-01 00:33:22,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6194 states. [2018-10-01 00:33:25,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6194 to 5063. [2018-10-01 00:33:25,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5063 states. [2018-10-01 00:33:25,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5063 states to 5063 states and 7938 transitions. [2018-10-01 00:33:25,533 INFO L78 Accepts]: Start accepts. Automaton has 5063 states and 7938 transitions. Word has length 21 [2018-10-01 00:33:25,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:33:25,533 INFO L480 AbstractCegarLoop]: Abstraction has 5063 states and 7938 transitions. [2018-10-01 00:33:25,533 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-01 00:33:25,533 INFO L276 IsEmpty]: Start isEmpty. Operand 5063 states and 7938 transitions. [2018-10-01 00:33:25,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:33:25,535 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:33:25,535 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1] [2018-10-01 00:33:25,535 INFO L423 AbstractCegarLoop]: === Iteration 79 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:33:25,535 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:33:25,535 INFO L82 PathProgramCache]: Analyzing trace with hash -585696791, now seen corresponding path program 1 times [2018-10-01 00:33:25,535 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:33:25,535 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:33:25,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:33:25,536 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:33:25,536 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:33:25,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:33:25,656 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 1 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:33:25,656 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:33:25,657 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:33:25,664 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:33:25,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:33:25,672 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:33:25,858 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 14 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:33:25,879 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:33:25,879 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10] total 20 [2018-10-01 00:33:25,879 INFO L459 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-10-01 00:33:25,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-10-01 00:33:25,879 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:33:25,879 INFO L87 Difference]: Start difference. First operand 5063 states and 7938 transitions. Second operand 20 states. [2018-10-01 00:33:44,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:33:44,458 INFO L93 Difference]: Finished difference Result 9806 states and 15374 transitions. [2018-10-01 00:33:44,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2018-10-01 00:33:44,459 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 21 [2018-10-01 00:33:44,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:33:44,464 INFO L225 Difference]: With dead ends: 9806 [2018-10-01 00:33:44,464 INFO L226 Difference]: Without dead ends: 7257 [2018-10-01 00:33:44,466 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 2.9s Time [2018-10-01 00:33:44,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7257 states. [2018-10-01 00:33:47,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7257 to 5575. [2018-10-01 00:33:47,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5575 states. [2018-10-01 00:33:47,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5575 states to 5575 states and 8807 transitions. [2018-10-01 00:33:47,615 INFO L78 Accepts]: Start accepts. Automaton has 5575 states and 8807 transitions. Word has length 21 [2018-10-01 00:33:47,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:33:47,616 INFO L480 AbstractCegarLoop]: Abstraction has 5575 states and 8807 transitions. [2018-10-01 00:33:47,616 INFO L481 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-10-01 00:33:47,616 INFO L276 IsEmpty]: Start isEmpty. Operand 5575 states and 8807 transitions. [2018-10-01 00:33:47,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-10-01 00:33:47,617 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:33:47,617 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:33:47,617 INFO L423 AbstractCegarLoop]: === Iteration 80 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:33:47,618 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:33:47,618 INFO L82 PathProgramCache]: Analyzing trace with hash -168764927, now seen corresponding path program 1 times [2018-10-01 00:33:47,618 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:33:47,618 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:33:47,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:33:47,618 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:33:47,618 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:33:47,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:33:47,800 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 1 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:33:47,801 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:33:47,801 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:33:47,810 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:33:47,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:33:47,819 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:33:47,944 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 15 proven. 5 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-10-01 00:33:47,966 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:33:47,966 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9] total 19 [2018-10-01 00:33:47,966 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-01 00:33:47,967 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-01 00:33:47,967 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:33:47,967 INFO L87 Difference]: Start difference. First operand 5575 states and 8807 transitions. Second operand 19 states. [2018-10-01 00:34:04,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:34:04,544 INFO L93 Difference]: Finished difference Result 11014 states and 17078 transitions. [2018-10-01 00:34:04,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-10-01 00:34:04,544 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 21 [2018-10-01 00:34:04,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:34:04,550 INFO L225 Difference]: With dead ends: 11014 [2018-10-01 00:34:04,550 INFO L226 Difference]: Without dead ends: 7298 [2018-10-01 00:34:04,554 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.5s Time [2018-10-01 00:34:04,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7298 states. [2018-10-01 00:34:07,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7298 to 5649. [2018-10-01 00:34:07,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5649 states. [2018-10-01 00:34:07,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5649 states to 5649 states and 8931 transitions. [2018-10-01 00:34:07,792 INFO L78 Accepts]: Start accepts. Automaton has 5649 states and 8931 transitions. Word has length 21 [2018-10-01 00:34:07,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:34:07,792 INFO L480 AbstractCegarLoop]: Abstraction has 5649 states and 8931 transitions. [2018-10-01 00:34:07,792 INFO L481 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-10-01 00:34:07,792 INFO L276 IsEmpty]: Start isEmpty. Operand 5649 states and 8931 transitions. [2018-10-01 00:34:07,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-10-01 00:34:07,794 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:34:07,794 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1] [2018-10-01 00:34:07,794 INFO L423 AbstractCegarLoop]: === Iteration 81 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:34:07,795 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:34:07,795 INFO L82 PathProgramCache]: Analyzing trace with hash -670449373, now seen corresponding path program 2 times [2018-10-01 00:34:07,795 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:34:07,795 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:34:07,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:34:07,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:34:07,795 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:34:07,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:34:07,917 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 3 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:34:07,918 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:34:07,918 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:34:07,925 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-10-01 00:34:07,934 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-10-01 00:34:07,934 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-10-01 00:34:07,936 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:34:08,120 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 4 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:34:08,140 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:34:08,140 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11] total 22 [2018-10-01 00:34:08,140 INFO L459 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-10-01 00:34:08,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-10-01 00:34:08,141 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:34:08,141 INFO L87 Difference]: Start difference. First operand 5649 states and 8931 transitions. Second operand 23 states. [2018-10-01 00:34:21,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:34:21,165 INFO L93 Difference]: Finished difference Result 7383 states and 11710 transitions. [2018-10-01 00:34:21,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-10-01 00:34:21,165 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 22 [2018-10-01 00:34:21,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:34:21,171 INFO L225 Difference]: With dead ends: 7383 [2018-10-01 00:34:21,171 INFO L226 Difference]: Without dead ends: 7382 [2018-10-01 00:34:21,172 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.1s Time [2018-10-01 00:34:21,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7382 states. [2018-10-01 00:34:25,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7382 to 6560. [2018-10-01 00:34:25,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6560 states. [2018-10-01 00:34:25,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6560 states to 6560 states and 10430 transitions. [2018-10-01 00:34:25,037 INFO L78 Accepts]: Start accepts. Automaton has 6560 states and 10430 transitions. Word has length 22 [2018-10-01 00:34:25,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-01 00:34:25,038 INFO L480 AbstractCegarLoop]: Abstraction has 6560 states and 10430 transitions. [2018-10-01 00:34:25,038 INFO L481 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-10-01 00:34:25,038 INFO L276 IsEmpty]: Start isEmpty. Operand 6560 states and 10430 transitions. [2018-10-01 00:34:25,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-10-01 00:34:25,040 INFO L367 BasicCegarLoop]: Found error trace [2018-10-01 00:34:25,040 INFO L375 BasicCegarLoop]: trace histogram [4, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-10-01 00:34:25,040 INFO L423 AbstractCegarLoop]: === Iteration 82 === [productErr2ASSERT_VIOLATIONASSERT, productErr3ASSERT_VIOLATIONASSERT, productErr0ASSERT_VIOLATIONASSERT, productErr1ASSERT_VIOLATIONASSERT]=== [2018-10-01 00:34:25,040 INFO L99 BPredicateUnifier]: Initialized predicate-trie based predicate unifier [2018-10-01 00:34:25,040 INFO L82 PathProgramCache]: Analyzing trace with hash -818779381, now seen corresponding path program 1 times [2018-10-01 00:34:25,040 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-01 00:34:25,040 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-01 00:34:25,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:34:25,041 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-10-01 00:34:25,041 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-01 00:34:25,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:34:25,161 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:34:25,161 INFO L301 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-10-01 00:34:25,161 INFO L227 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-10-01 00:34:25,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-01 00:34:25,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-01 00:34:25,180 INFO L273 TraceCheckSpWp]: Computing forward predicates... [2018-10-01 00:34:25,501 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 2 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-01 00:34:25,523 INFO L313 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-10-01 00:34:25,524 INFO L328 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 18 [2018-10-01 00:34:25,524 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-10-01 00:34:25,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-10-01 00:34:25,524 INFO L146 InterpolantAutomaton]: No coverage relation statistics for PredicateCoverageChecker [2018-10-01 00:34:25,524 INFO L87 Difference]: Start difference. First operand 6560 states and 10430 transitions. Second operand 19 states. [2018-10-01 00:34:36,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-01 00:34:36,838 INFO L93 Difference]: Finished difference Result 8118 states and 12927 transitions. [2018-10-01 00:34:36,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-10-01 00:34:36,838 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 22 [2018-10-01 00:34:36,838 INFO L84 Accepts]: Finished accepts. each prefix is rejected. [2018-10-01 00:34:36,838 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 22 [2018-10-01 00:34:36,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-01 00:34:36,839 FATAL L834 BasicCegarLoop]: -- [2018-10-01 00:34:36,839 FATAL L835 BasicCegarLoop]: enhanced interpolant automaton broken: counterexample not accepted [2018-10-01 00:34:36,839 FATAL L836 BasicCegarLoop]: word: [2018-10-01 00:34:36,839 FATAL L838 BasicCegarLoop]: havoc next;assume next >= 0;havoc workload;assume workload > 0;working0 := -1;working1 := -1; [2018-10-01 00:34:36,842 FATAL L838 BasicCegarLoop]: begin1 := next;next := next + workload;end1 := next; [2018-10-01 00:34:36,842 FATAL L838 BasicCegarLoop]: begin0 := next;next := next + workload;end0 := next; [2018-10-01 00:34:36,842 FATAL L838 BasicCegarLoop]: working0 := begin0; [2018-10-01 00:34:36,842 FATAL L838 BasicCegarLoop]: assume working0 != working1;begin0 := begin0 + 1; [2018-10-01 00:34:36,842 FATAL L838 BasicCegarLoop]: assume begin0 < end0; [2018-10-01 00:34:36,842 FATAL L838 BasicCegarLoop]: working1 := begin1; [2018-10-01 00:34:36,843 FATAL L838 BasicCegarLoop]: assume working0 != working1;begin1 := begin1 + 1; [2018-10-01 00:34:36,843 FATAL L838 BasicCegarLoop]: assume begin1 < end1; [2018-10-01 00:34:36,843 FATAL L838 BasicCegarLoop]: working0 := begin0; [2018-10-01 00:34:36,843 FATAL L838 BasicCegarLoop]: assume working0 != working1;begin0 := begin0 + 1; [2018-10-01 00:34:36,843 FATAL L838 BasicCegarLoop]: assume !(begin0 < end0); [2018-10-01 00:34:36,843 FATAL L838 BasicCegarLoop]: working1 := begin1; [2018-10-01 00:34:36,844 FATAL L838 BasicCegarLoop]: assume working0 != working1;begin1 := begin1 + 1; [2018-10-01 00:34:36,844 FATAL L838 BasicCegarLoop]: assume !(begin1 < end1); [2018-10-01 00:34:36,844 FATAL L838 BasicCegarLoop]: begin0 := next;next := next + workload;end0 := next; [2018-10-01 00:34:36,844 FATAL L838 BasicCegarLoop]: begin1 := next;next := next + workload;end1 := next; [2018-10-01 00:34:36,844 FATAL L838 BasicCegarLoop]: working0 := begin0; [2018-10-01 00:34:36,844 FATAL L838 BasicCegarLoop]: assume working0 != working1;begin0 := begin0 + 1; [2018-10-01 00:34:36,844 FATAL L838 BasicCegarLoop]: assume begin0 < end0; [2018-10-01 00:34:36,845 FATAL L838 BasicCegarLoop]: working0 := begin0; [2018-10-01 00:34:36,845 FATAL L838 BasicCegarLoop]: assume !(working0 != working1); [2018-10-01 00:34:36,845 FATAL L840 BasicCegarLoop]: original automaton: [2018-10-01 00:34:36,845 FATAL L841 BasicCegarLoop]: FiniteAutomaton nwa = ( alphabet = {"havoc next;assume next >= 0;havoc workload;assume workload > 0;working0 := -1;working1 := -1;" "begin0 := next;next := next + workload;end0 := next;" "begin1 := next;next := next + workload;end1 := next;" "working0 := begin0;" "assume !(working0 != working1);" "assume working0 != working1;begin0 := begin0 + 1;" "assume begin0 < end0;" "assume !(begin0 < end0);" "begin1 := next;next := next + workload;end1 := next;" "begin0 := next;next := next + workload;end0 := next;" "working1 := begin1;" "assume !(working0 != working1);" "assume working0 != working1;begin1 := begin1 + 1;" "assume begin1 < end1;" "assume !(begin1 < end1);" "working0 := begin0;" "assume !(working0 != working1);" "assume working0 != working1;begin0 := begin0 + 1;" "assume begin0 < end0;" "assume !(begin0 < end0);" "working1 := begin1;" "assume !(working0 != working1);" "assume working0 != working1;begin1 := begin1 + 1;" "assume begin1 < end1;" "assume !(begin1 < end1);" }, states = {"578571#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))))" "578567#(<= (+ product_workload product_begin1) product_next)" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "578553#(and (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "578554#(and (<= (+ product_begin1 3) product_end0) (= product_end0 product_next))" "578555#(<= (+ product_begin1 3) product_next)" "578556#(<= (+ product_working1 3) product_next)" "578557#(<= (+ product_working1 3) product_begin0)" "578558#(<= (+ product_working1 4) product_begin0)" "578559#(<= (+ product_working1 4) product_working0)" "578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "578623#(exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 2) product_begin0) (<= (+ product_working1 1) v_product_next_170)))" "578547#true" "578579#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))))" "578611#(exists ((v_product_next_170 Int)) (and (<= (+ product_working1 product_next) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "578548#false" "578550#(<= product_end1 product_next)" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "578583#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next)))" }, initialStates = {"578547#true" }, finalStates = {"578548#false" }, transitions = { ("578571#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))))" "working0 := begin0;" "578571#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))))") ("578571#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))))" "assume working0 != working1;begin0 := begin0 + 1;" "578579#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))))") ("578567#(<= (+ product_workload product_begin1) product_next)" "begin0 := next;next := next + workload;end0 := next;" "578571#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume begin0 < end0;" "578553#(and (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578553#(and (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin1 < end1;" "578554#(and (<= (+ product_begin1 3) product_end0) (= product_end0 product_next))") ("578553#(and (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "578553#(and (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578553#(and (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578553#(and (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578554#(and (<= (+ product_begin1 3) product_end0) (= product_end0 product_next))" "working0 := begin0;" "578554#(and (<= (+ product_begin1 3) product_end0) (= product_end0 product_next))") ("578554#(and (<= (+ product_begin1 3) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578554#(and (<= (+ product_begin1 3) product_end0) (= product_end0 product_next))") ("578554#(and (<= (+ product_begin1 3) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "578555#(<= (+ product_begin1 3) product_next)") ("578555#(<= (+ product_begin1 3) product_next)" "working1 := begin1;" "578556#(<= (+ product_working1 3) product_next)") ("578556#(<= (+ product_working1 3) product_next)" "assume !(begin1 < end1);" "578556#(<= (+ product_working1 3) product_next)") ("578556#(<= (+ product_working1 3) product_next)" "begin0 := next;next := next + workload;end0 := next;" "578557#(<= (+ product_working1 3) product_begin0)") ("578556#(<= (+ product_working1 3) product_next)" "assume working0 != working1;begin1 := begin1 + 1;" "578556#(<= (+ product_working1 3) product_next)") ("578557#(<= (+ product_working1 3) product_begin0)" "begin1 := next;next := next + workload;end1 := next;" "578557#(<= (+ product_working1 3) product_begin0)") ("578557#(<= (+ product_working1 3) product_begin0)" "working0 := begin0;" "578557#(<= (+ product_working1 3) product_begin0)") ("578557#(<= (+ product_working1 3) product_begin0)" "assume working0 != working1;begin0 := begin0 + 1;" "578558#(<= (+ product_working1 4) product_begin0)") ("578558#(<= (+ product_working1 4) product_begin0)" "working0 := begin0;" "578559#(<= (+ product_working1 4) product_working0)") ("578558#(<= (+ product_working1 4) product_begin0)" "assume begin0 < end0;" "578558#(<= (+ product_working1 4) product_begin0)") ("578559#(<= (+ product_working1 4) product_working0)" "assume !(working0 != working1);" "578548#false") ("578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "assume begin1 < end1;" "578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))") ("578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "working0 := begin0;" "578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))") ("578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "assume working0 != working1;begin0 := begin0 + 1;" "578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))") ("578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "working1 := begin1;" "578611#(exists ((v_product_next_170 Int)) (and (<= (+ product_working1 product_next) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))") ("578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "assume !(begin0 < end0);" "578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))") ("578623#(exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 2) product_begin0) (<= (+ product_working1 1) v_product_next_170)))" "begin1 := next;next := next + workload;end1 := next;" "578557#(<= (+ product_working1 3) product_begin0)") ("578547#true" "havoc next;assume next >= 0;havoc workload;assume workload > 0;working0 := -1;working1 := -1;" "578547#true") ("578547#true" "begin1 := next;next := next + workload;end1 := next;" "578550#(<= product_end1 product_next)") ("578547#true" "begin1 := next;next := next + workload;end1 := next;" "578567#(<= (+ product_workload product_begin1) product_next)") ("578579#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))))" "assume begin0 < end0;" "578583#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next)))") ("578611#(exists ((v_product_next_170 Int)) (and (<= (+ product_working1 product_next) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "assume !(begin1 < end1);" "578611#(exists ((v_product_next_170 Int)) (and (<= (+ product_working1 product_next) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))") ("578611#(exists ((v_product_next_170 Int)) (and (<= (+ product_working1 product_next) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "begin0 := next;next := next + workload;end0 := next;" "578623#(exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 2) product_begin0) (<= (+ product_working1 1) v_product_next_170)))") ("578611#(exists ((v_product_next_170 Int)) (and (<= (+ product_working1 product_next) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))" "assume working0 != working1;begin1 := begin1 + 1;" "578611#(exists ((v_product_next_170 Int)) (and (<= (+ product_working1 product_next) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))") ("578550#(<= product_end1 product_next)" "begin0 := next;next := next + workload;end0 := next;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "working0 := begin0;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578583#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next)))" "working1 := begin1;" "578583#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next)))") ("578583#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next)))" "assume working0 != working1;begin1 := begin1 + 1;" "578591#(exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (+ (* 2 v_product_next_170) 1)) (<= (+ v_product_next_170 2) product_next)))") } ); [2018-10-01 00:34:37,297 FATAL L842 BasicCegarLoop]: enhanced automaton: [2018-10-01 00:34:37,297 FATAL L843 BasicCegarLoop]: FiniteAutomaton nwa = ( alphabet = {"havoc next;assume next >= 0;havoc workload;assume workload > 0;working0 := -1;working1 := -1;" "begin0 := next;next := next + workload;end0 := next;" "begin1 := next;next := next + workload;end1 := next;" "working0 := begin0;" "assume !(working0 != working1);" "assume working0 != working1;begin0 := begin0 + 1;" "assume begin0 < end0;" "assume !(begin0 < end0);" "begin1 := next;next := next + workload;end1 := next;" "begin0 := next;next := next + workload;end0 := next;" "working1 := begin1;" "assume !(working0 != working1);" "assume working0 != working1;begin1 := begin1 + 1;" "assume begin1 < end1;" "assume !(begin1 < end1);" "working0 := begin0;" "assume !(working0 != working1);" "assume working0 != working1;begin0 := begin0 + 1;" "assume begin0 < end0;" "assume !(begin0 < end0);" "working1 := begin1;" "assume !(working0 != working1);" "assume working0 != working1;begin1 := begin1 + 1;" "assume begin1 < end1;" "assume !(begin1 < end1);" }, states = {"578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "579021#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "578753#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "579588#(and (<= (+ product_working1 3) product_begin0) (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "578718#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))" "578911#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "579986#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next) (<= (+ product_working1 4) product_working0))" "578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "579129#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "578547#true" "578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "578548#false" "578550#(<= product_end1 product_next)" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" }, initialStates = {"578547#true" }, finalStates = {"578548#false" }, transitions = { ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin1 < end1);" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin0 < end0;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin0 < end0;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin1 < end1;" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin1 < end1);" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin1 < end1;" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579021#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579021#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "579129#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578753#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))" "working0 := begin0;" "578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))") ("578753#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))" "begin0 := next;next := next + workload;end0 := next;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578753#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))" "working1 := begin1;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578753#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))" "working1 := begin1;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working0 := begin0;" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working0 := begin0;" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working1 := begin1;" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin0 < end0;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin0 < end0;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "580226#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin0 < end0;" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578947#(and (<= (+ product_begin1 3) product_end0) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579588#(and (<= (+ product_working1 3) product_begin0) (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "working0 := begin0;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("579588#(and (<= (+ product_working1 3) product_begin0) (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "working1 := begin1;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "579588#(and (<= (+ product_working1 3) product_begin0) (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working0 := begin0;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume begin0 < end0;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working0 := begin0;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working1 := begin1;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume begin0 < end0;" "579395#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "working0 := begin0;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "assume !(working0 != working1);" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "begin0 := next;next := next + workload;end0 := next;" "578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "working1 := begin1;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "assume begin0 < end0;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "assume !(working0 != working1);" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578550#(<= product_end1 product_next)") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "assume !(begin0 < end0);" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "working1 := begin1;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "assume !(working0 != working1);" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578550#(<= product_end1 product_next)") ("578718#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))" "assume begin0 < end0;" "578753#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))") ("578718#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))" "assume !(begin0 < end0);" "578753#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))") ("578911#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "working0 := begin0;" "578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))") ("578911#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "working1 := begin1;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579986#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next) (<= (+ product_working1 4) product_working0))" "working0 := begin0;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579986#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next) (<= (+ product_working1 4) product_working0))" "working1 := begin1;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))" "working0 := begin0;" "578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))") ("578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))" "assume !(working0 != working1);" "578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))") ("578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))" "working1 := begin1;" "578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))") ("578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))" "assume !(working0 != working1);" "578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))") ("578657#(and (<= product_end0 product_next) (<= product_end1 product_begin0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin1 < end1;" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin1 < end1);" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin0 < end0;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "579021#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578855#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin0 < end0;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working0 := begin0;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume begin0 < end0;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working0 := begin0;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "working1 := begin1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume begin0 < end0;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume begin1 < end1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "579588#(and (<= (+ product_working1 3) product_begin0) (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(begin1 < end1);" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin1 < end1);" "578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin1 < end1;" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578763#(and (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579129#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin1 < end1);" "579129#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("579129#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("579129#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("579129#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin1 < end1;" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "579014#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(working0 != working1);" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578718#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working0 := begin0;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "working1 := begin1;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578721#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume begin0 < end0;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume !(begin0 < end0);" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "579588#(and (<= (+ product_working1 3) product_begin0) (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578809#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= v_product_next_170 product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "begin0 := next;next := next + workload;end0 := next;" "578547#true") ("578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume begin0 < end0;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume !(begin0 < end0);" "578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578672#(and (<= product_end0 product_next) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))" "assume begin0 < end0;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578547#true" "havoc next;assume next >= 0;havoc workload;assume workload > 0;working0 := -1;working1 := -1;" "578547#true") ("578547#true" "begin0 := next;next := next + workload;end0 := next;" "578547#true") ("578547#true" "working0 := begin0;" "578547#true") ("578547#true" "assume !(working0 != working1);" "578547#true") ("578547#true" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578547#true" "assume working0 != working1;begin0 := begin0 + 1;" "578547#true") ("578547#true" "working0 := begin0;" "578547#true") ("578547#true" "assume !(begin0 < end0);" "578547#true") ("578547#true" "assume working0 != working1;begin0 := begin0 + 1;" "578547#true") ("578547#true" "assume begin0 < end0;" "578547#true") ("578547#true" "assume !(begin0 < end0);" "578547#true") ("578547#true" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578547#true" "begin0 := next;next := next + workload;end0 := next;" "578547#true") ("578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "assume !(working0 != working1);" "578548#false") ("578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "assume working0 != working1;begin0 := begin0 + 1;" "578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))") ("578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "begin0 := next;next := next + workload;end0 := next;" "579986#(and (<= (+ product_workload product_begin1) product_next) (<= (+ product_end1 1) product_begin0) (= product_end0 product_next) (<= (+ product_working1 4) product_working0))") ("578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "assume begin0 < end0;" "578911#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))") ("578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "working1 := begin1;" "578685#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next))") ("578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))" "assume !(begin0 < end0);" "578803#(and (<= product_end0 product_next) (<= (+ product_begin1 3) product_end0) (exists ((v_product_next_170 Int)) (and (<= (+ product_next product_begin1) (* 2 v_product_next_170)) (<= (+ v_product_next_170 2) product_next))) (exists ((v_product_next_170 Int)) (and (<= (+ v_product_next_170 1) product_begin0) (<= (+ product_next product_begin1) (* 2 v_product_next_170)))) (<= (+ product_end1 1) product_begin0) (<= (+ product_end1 2) product_end0) (= product_end0 product_next) (<= (+ product_working1 4) product_begin0) (<= (+ product_working1 4) product_working0))") ("578550#(<= product_end1 product_next)" "assume !(begin1 < end1);" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "working0 := begin0;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "begin0 := next;next := next + workload;end0 := next;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578550#(<= product_end1 product_next)" "assume working0 != working1;begin0 := begin0 + 1;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578550#(<= product_end1 product_next)" "assume begin0 < end0;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "working0 := begin0;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume !(begin0 < end0);" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume working0 != working1;begin0 := begin0 + 1;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "working1 := begin1;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume !(working0 != working1);" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume working0 != working1;begin1 := begin1 + 1;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume !(begin0 < end0);" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume begin1 < end1;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578550#(<= product_end1 product_next)" "assume !(begin1 < end1);" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "begin0 := next;next := next + workload;end0 := next;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578550#(<= product_end1 product_next)" "working1 := begin1;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume !(working0 != working1);" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume working0 != working1;begin1 := begin1 + 1;" "578550#(<= product_end1 product_next)") ("578550#(<= product_end1 product_next)" "assume begin1 < end1;" "578550#(<= product_end1 product_next)") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "assume begin1 < end1;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "begin1 := next;next := next + workload;end1 := next;" "578650#(and (<= (+ product_workload product_begin1) product_next) (<= product_end1 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "working0 := begin0;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "assume !(begin1 < end1);" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "working0 := begin0;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin0 := begin0 + 1;" "578552#(and (<= (+ product_end1 1) product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "working1 := begin1;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "assume !(working0 != working1);" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") ("578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))" "assume working0 != working1;begin1 := begin1 + 1;" "578551#(and (<= product_end1 product_begin0) (= product_end0 product_next))") } ); [2018-10-01 00:34:37,306 FATAL L844 BasicCegarLoop]: -- [2018-10-01 00:34:37,308 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: enhanced interpolant automaton in iteration 82 broken: counterexample of length 23 not accepted (original is ok) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.checkEnhancement(BasicCegarLoop.java:819) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.computeAutomataDifference(BasicCegarLoop.java:719) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.refineAbstraction(BasicCegarLoop.java:602) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:472) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:375) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:313) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:155) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:124) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:123) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:316) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-10-01 00:34:37,311 INFO L168 Benchmark]: Toolchain (without parser) took 578342.74 ms. Allocated memory was 1.5 GB in the beginning and 3.5 GB in the end (delta: 1.9 GB). Free memory was 1.5 GB in the beginning and 3.4 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.2 GB. Max. memory is 7.1 GB. [2018-10-01 00:34:37,313 INFO L168 Benchmark]: Boogie PL CUP Parser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-01 00:34:37,314 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.92 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-01 00:34:37,314 INFO L168 Benchmark]: Boogie Preprocessor took 22.04 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-01 00:34:37,315 INFO L168 Benchmark]: RCFGBuilder took 538.07 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 7.1 GB. [2018-10-01 00:34:37,316 INFO L168 Benchmark]: TraceAbstraction took 577734.34 ms. Allocated memory was 1.5 GB in the beginning and 3.5 GB in the end (delta: 1.9 GB). Free memory was 1.5 GB in the beginning and 3.4 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.2 GB. Max. memory is 7.1 GB. [2018-10-01 00:34:37,319 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.21 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 41.92 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 22.04 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 538.07 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.5 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 577734.34 ms. Allocated memory was 1.5 GB in the beginning and 3.5 GB in the end (delta: 1.9 GB). Free memory was 1.5 GB in the beginning and 3.4 GB in the end (delta: -1.9 GB). Peak memory consumption was 1.2 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: enhanced interpolant automaton in iteration 82 broken: counterexample of length 23 not accepted (original is ok) de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: enhanced interpolant automaton in iteration 82 broken: counterexample of length 23 not accepted (original is ok): de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.checkEnhancement(BasicCegarLoop.java:819) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/threadpooling_product_WithoutIf.bpl_svcomp-Reach-32bit-Automizer_Default_PUPT.epf_AutomizerBplInline.xml/Csv-Benchmark-0-2018-10-01_00-34-37-340.csv Received shutdown request...