java -Xmx8000000000 -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data --generate-csv --csv-dir csv -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/pu-bench/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/programs/real-life/GuiTestExample.bpl -------------------------------------------------------------------------------- This is Ultimate 0.1.23-9f4048f [2018-10-04 12:13:44,118 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-10-04 12:13:44,120 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-10-04 12:13:44,132 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-10-04 12:13:44,132 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-10-04 12:13:44,133 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-10-04 12:13:44,135 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-10-04 12:13:44,136 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-10-04 12:13:44,138 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-10-04 12:13:44,139 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-10-04 12:13:44,140 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-10-04 12:13:44,140 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-10-04 12:13:44,141 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-10-04 12:13:44,142 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-10-04 12:13:44,143 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-10-04 12:13:44,144 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-10-04 12:13:44,145 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-10-04 12:13:44,147 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-10-04 12:13:44,149 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-10-04 12:13:44,150 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-10-04 12:13:44,151 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-10-04 12:13:44,153 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-10-04 12:13:44,155 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-10-04 12:13:44,155 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-10-04 12:13:44,156 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-10-04 12:13:44,157 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-10-04 12:13:44,158 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-10-04 12:13:44,159 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-10-04 12:13:44,160 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-10-04 12:13:44,161 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-10-04 12:13:44,162 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-10-04 12:13:44,162 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-10-04 12:13:44,163 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-10-04 12:13:44,163 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-10-04 12:13:44,164 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-10-04 12:13:44,165 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-10-04 12:13:44,165 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/pu-bench/svcomp-Reach-32bit-Automizer_Default.epf [2018-10-04 12:13:44,180 INFO L110 SettingsManager]: Loading preferences was successful [2018-10-04 12:13:44,180 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-10-04 12:13:44,181 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-10-04 12:13:44,181 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-10-04 12:13:44,182 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-10-04 12:13:44,182 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-10-04 12:13:44,182 INFO L133 SettingsManager]: * Use SBE=true [2018-10-04 12:13:44,183 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-10-04 12:13:44,183 INFO L133 SettingsManager]: * sizeof long=4 [2018-10-04 12:13:44,183 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-10-04 12:13:44,183 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-10-04 12:13:44,183 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-10-04 12:13:44,184 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-10-04 12:13:44,184 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-10-04 12:13:44,184 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-10-04 12:13:44,184 INFO L133 SettingsManager]: * sizeof long double=12 [2018-10-04 12:13:44,184 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-10-04 12:13:44,185 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-10-04 12:13:44,185 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-10-04 12:13:44,185 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-10-04 12:13:44,185 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-10-04 12:13:44,185 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-10-04 12:13:44,186 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-04 12:13:44,186 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-10-04 12:13:44,186 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-10-04 12:13:44,186 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-10-04 12:13:44,186 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-10-04 12:13:44,187 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-10-04 12:13:44,187 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-10-04 12:13:44,187 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-10-04 12:13:44,238 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-10-04 12:13:44,251 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-10-04 12:13:44,255 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-10-04 12:13:44,256 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2018-10-04 12:13:44,257 INFO L276 PluginConnector]: Boogie PL CUP Parser initialized [2018-10-04 12:13:44,258 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl [2018-10-04 12:13:44,258 INFO L111 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl' [2018-10-04 12:13:44,344 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-10-04 12:13:44,345 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-10-04 12:13:44,346 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-10-04 12:13:44,346 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-10-04 12:13:44,347 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-10-04 12:13:44,372 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,397 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,405 WARN L165 Inliner]: Program contained no entry procedure! [2018-10-04 12:13:44,406 WARN L168 Inliner]: Missing entry procedures: [ULTIMATE.start] [2018-10-04 12:13:44,406 WARN L175 Inliner]: Fallback enabled. All procedures will be processed. [2018-10-04 12:13:44,429 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-10-04 12:13:44,430 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-10-04 12:13:44,431 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-10-04 12:13:44,431 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-10-04 12:13:44,443 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,443 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,450 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,451 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,461 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,464 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,468 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... [2018-10-04 12:13:44,479 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-10-04 12:13:44,480 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-10-04 12:13:44,480 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-10-04 12:13:44,480 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-10-04 12:13:44,482 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-10-04 12:13:44,559 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration [2018-10-04 12:13:44,560 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2018-10-04 12:13:44,560 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2018-10-04 12:13:44,561 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration [2018-10-04 12:13:44,561 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2018-10-04 12:13:44,561 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2018-10-04 12:13:44,561 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration [2018-10-04 12:13:44,562 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2018-10-04 12:13:44,562 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2018-10-04 12:13:44,562 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration [2018-10-04 12:13:44,562 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2018-10-04 12:13:44,562 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2018-10-04 12:13:44,563 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration [2018-10-04 12:13:44,563 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2018-10-04 12:13:44,563 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2018-10-04 12:13:44,563 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940 [2018-10-04 12:13:44,563 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827 [2018-10-04 12:13:44,566 INFO L124 BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration [2018-10-04 12:13:44,567 INFO L130 BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2018-10-04 12:13:44,567 INFO L138 BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2018-10-04 12:13:44,567 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration [2018-10-04 12:13:44,567 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2018-10-04 12:13:44,568 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2018-10-04 12:13:44,568 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858 [2018-10-04 12:13:44,568 INFO L124 BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration [2018-10-04 12:13:44,568 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2018-10-04 12:13:44,568 INFO L138 BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2018-10-04 12:13:44,573 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration [2018-10-04 12:13:44,573 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2018-10-04 12:13:44,573 INFO L138 BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2018-10-04 12:13:44,573 INFO L124 BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration [2018-10-04 12:13:44,575 INFO L130 BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808 [2018-10-04 12:13:44,576 INFO L138 BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808 [2018-10-04 12:13:44,576 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816 [2018-10-04 12:13:44,576 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123 [2018-10-04 12:13:44,576 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration [2018-10-04 12:13:44,577 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2018-10-04 12:13:44,577 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2018-10-04 12:13:44,577 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913 [2018-10-04 12:13:44,577 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131 [2018-10-04 12:13:44,578 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration [2018-10-04 12:13:44,578 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2018-10-04 12:13:44,578 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2018-10-04 12:13:44,578 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918 [2018-10-04 12:13:44,578 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305 [2018-10-04 12:13:44,579 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909 [2018-10-04 12:13:44,579 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255 [2018-10-04 12:13:44,579 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852 [2018-10-04 12:13:44,580 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304 [2018-10-04 12:13:44,580 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration [2018-10-04 12:13:44,580 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807 [2018-10-04 12:13:44,580 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807 [2018-10-04 12:13:44,580 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889 [2018-10-04 12:13:44,581 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration [2018-10-04 12:13:44,581 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803 [2018-10-04 12:13:44,582 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803 [2018-10-04 12:13:44,582 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration [2018-10-04 12:13:44,582 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804 [2018-10-04 12:13:44,582 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804 [2018-10-04 12:13:44,583 INFO L124 BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration [2018-10-04 12:13:44,583 INFO L130 BoogieDeclarations]: Found specification of procedure $EFG_Procedure [2018-10-04 12:13:44,583 INFO L138 BoogieDeclarations]: Found implementation of procedure $EFG_Procedure [2018-10-04 12:13:44,583 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558 [2018-10-04 12:13:44,584 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38 [2018-10-04 12:13:44,584 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075 [2018-10-04 12:13:44,942 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,029 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,063 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,092 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,341 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,390 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,470 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,509 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,575 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,611 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:45,628 WARN L632 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-10-04 12:13:46,108 INFO L338 CfgBuilder]: Using library mode [2018-10-04 12:13:46,109 INFO L202 PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.10 12:13:46 BoogieIcfgContainer [2018-10-04 12:13:46,109 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-10-04 12:13:46,110 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-10-04 12:13:46,110 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-10-04 12:13:46,120 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-10-04 12:13:46,121 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 12:13:44" (1/2) ... [2018-10-04 12:13:46,122 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e4cbb9b and model type GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.10 12:13:46, skipping insertion in model container [2018-10-04 12:13:46,123 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.10 12:13:46" (2/2) ... [2018-10-04 12:13:46,125 INFO L112 eAbstractionObserver]: Analyzing ICFG GuiTestExample.bpl [2018-10-04 12:13:46,136 INFO L136 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-10-04 12:13:46,149 INFO L148 ceAbstractionStarter]: Appying trace abstraction to program that has 78 error locations. [2018-10-04 12:13:46,204 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2018-10-04 12:13:46,205 INFO L381 AbstractCegarLoop]: Interprodecural is true [2018-10-04 12:13:46,205 INFO L382 AbstractCegarLoop]: Hoare is true [2018-10-04 12:13:46,205 INFO L383 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-10-04 12:13:46,206 INFO L384 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-10-04 12:13:46,206 INFO L385 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-10-04 12:13:46,206 INFO L386 AbstractCegarLoop]: Difference is false [2018-10-04 12:13:46,206 INFO L387 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-10-04 12:13:46,206 INFO L392 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-10-04 12:13:46,245 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states. [2018-10-04 12:13:46,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2018-10-04 12:13:46,258 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:46,259 INFO L375 BasicCegarLoop]: trace histogram [1, 1] [2018-10-04 12:13:46,268 INFO L423 AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:46,278 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:46,278 INFO L82 PathProgramCache]: Analyzing trace with hash 10786, now seen corresponding path program 1 times [2018-10-04 12:13:46,280 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:46,280 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:46,335 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:46,335 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:46,336 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:46,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:46,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:46,428 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:46,429 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2018-10-04 12:13:46,433 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-04 12:13:46,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-04 12:13:46,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-04 12:13:46,453 INFO L87 Difference]: Start difference. First operand 374 states. Second operand 3 states. [2018-10-04 12:13:46,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:46,544 INFO L93 Difference]: Finished difference Result 374 states and 395 transitions. [2018-10-04 12:13:46,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-04 12:13:46,546 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 2 [2018-10-04 12:13:46,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:46,573 INFO L225 Difference]: With dead ends: 374 [2018-10-04 12:13:46,574 INFO L226 Difference]: Without dead ends: 333 [2018-10-04 12:13:46,579 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-04 12:13:46,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-10-04 12:13:46,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 333. [2018-10-04 12:13:46,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2018-10-04 12:13:46,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 352 transitions. [2018-10-04 12:13:46,681 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 352 transitions. Word has length 2 [2018-10-04 12:13:46,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:46,682 INFO L480 AbstractCegarLoop]: Abstraction has 333 states and 352 transitions. [2018-10-04 12:13:46,682 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-04 12:13:46,682 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 352 transitions. [2018-10-04 12:13:46,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-10-04 12:13:46,683 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:46,683 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-10-04 12:13:46,686 INFO L423 AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:46,687 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:46,687 INFO L82 PathProgramCache]: Analyzing trace with hash 334707, now seen corresponding path program 1 times [2018-10-04 12:13:46,687 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:46,687 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:46,689 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:46,689 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:46,690 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:46,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:46,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:46,836 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:46,836 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-04 12:13:46,838 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-04 12:13:46,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-04 12:13:46,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-04 12:13:46,839 INFO L87 Difference]: Start difference. First operand 333 states and 352 transitions. Second operand 4 states. [2018-10-04 12:13:47,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:47,025 INFO L93 Difference]: Finished difference Result 333 states and 352 transitions. [2018-10-04 12:13:47,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-04 12:13:47,027 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-10-04 12:13:47,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:47,032 INFO L225 Difference]: With dead ends: 333 [2018-10-04 12:13:47,032 INFO L226 Difference]: Without dead ends: 332 [2018-10-04 12:13:47,034 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-04 12:13:47,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 332 states. [2018-10-04 12:13:47,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 332 to 332. [2018-10-04 12:13:47,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2018-10-04 12:13:47,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 351 transitions. [2018-10-04 12:13:47,068 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 351 transitions. Word has length 3 [2018-10-04 12:13:47,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:47,068 INFO L480 AbstractCegarLoop]: Abstraction has 332 states and 351 transitions. [2018-10-04 12:13:47,068 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-04 12:13:47,069 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 351 transitions. [2018-10-04 12:13:47,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-10-04 12:13:47,069 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:47,070 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-10-04 12:13:47,072 INFO L423 AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:47,073 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:47,073 INFO L82 PathProgramCache]: Analyzing trace with hash 186718, now seen corresponding path program 1 times [2018-10-04 12:13:47,073 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:47,073 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:47,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:47,075 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:47,075 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:47,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:47,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:47,129 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:47,129 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-04 12:13:47,129 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-04 12:13:47,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-04 12:13:47,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-04 12:13:47,130 INFO L87 Difference]: Start difference. First operand 332 states and 351 transitions. Second operand 4 states. [2018-10-04 12:13:47,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:47,302 INFO L93 Difference]: Finished difference Result 332 states and 351 transitions. [2018-10-04 12:13:47,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-04 12:13:47,303 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-10-04 12:13:47,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:47,306 INFO L225 Difference]: With dead ends: 332 [2018-10-04 12:13:47,306 INFO L226 Difference]: Without dead ends: 331 [2018-10-04 12:13:47,307 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-04 12:13:47,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-10-04 12:13:47,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 331. [2018-10-04 12:13:47,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2018-10-04 12:13:47,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 350 transitions. [2018-10-04 12:13:47,328 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 350 transitions. Word has length 3 [2018-10-04 12:13:47,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:47,328 INFO L480 AbstractCegarLoop]: Abstraction has 331 states and 350 transitions. [2018-10-04 12:13:47,328 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-04 12:13:47,328 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 350 transitions. [2018-10-04 12:13:47,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-10-04 12:13:47,329 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:47,329 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-10-04 12:13:47,332 INFO L423 AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:47,332 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:47,332 INFO L82 PathProgramCache]: Analyzing trace with hash 172816, now seen corresponding path program 1 times [2018-10-04 12:13:47,333 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:47,333 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:47,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:47,334 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:47,334 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:47,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:47,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:47,469 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:47,470 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-04 12:13:47,470 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-04 12:13:47,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-04 12:13:47,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-04 12:13:47,471 INFO L87 Difference]: Start difference. First operand 331 states and 350 transitions. Second operand 4 states. [2018-10-04 12:13:47,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:47,677 INFO L93 Difference]: Finished difference Result 331 states and 350 transitions. [2018-10-04 12:13:47,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-04 12:13:47,684 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-10-04 12:13:47,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:47,686 INFO L225 Difference]: With dead ends: 331 [2018-10-04 12:13:47,686 INFO L226 Difference]: Without dead ends: 330 [2018-10-04 12:13:47,687 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-04 12:13:47,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-10-04 12:13:47,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 330. [2018-10-04 12:13:47,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 330 states. [2018-10-04 12:13:47,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 330 states to 330 states and 349 transitions. [2018-10-04 12:13:47,704 INFO L78 Accepts]: Start accepts. Automaton has 330 states and 349 transitions. Word has length 3 [2018-10-04 12:13:47,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:47,705 INFO L480 AbstractCegarLoop]: Abstraction has 330 states and 349 transitions. [2018-10-04 12:13:47,705 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-04 12:13:47,705 INFO L276 IsEmpty]: Start isEmpty. Operand 330 states and 349 transitions. [2018-10-04 12:13:47,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-10-04 12:13:47,706 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:47,706 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-10-04 12:13:47,709 INFO L423 AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:47,709 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:47,710 INFO L82 PathProgramCache]: Analyzing trace with hash 164872, now seen corresponding path program 1 times [2018-10-04 12:13:47,710 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:47,710 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:47,711 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:47,712 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:47,712 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:47,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:47,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:47,777 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:47,777 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-04 12:13:47,778 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-04 12:13:47,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-04 12:13:47,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-04 12:13:47,779 INFO L87 Difference]: Start difference. First operand 330 states and 349 transitions. Second operand 4 states. [2018-10-04 12:13:47,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:47,902 INFO L93 Difference]: Finished difference Result 330 states and 349 transitions. [2018-10-04 12:13:47,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-04 12:13:47,902 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-10-04 12:13:47,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:47,904 INFO L225 Difference]: With dead ends: 330 [2018-10-04 12:13:47,904 INFO L226 Difference]: Without dead ends: 326 [2018-10-04 12:13:47,905 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-04 12:13:47,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-10-04 12:13:47,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 326. [2018-10-04 12:13:47,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-10-04 12:13:47,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 346 transitions. [2018-10-04 12:13:47,919 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 346 transitions. Word has length 3 [2018-10-04 12:13:47,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:47,919 INFO L480 AbstractCegarLoop]: Abstraction has 326 states and 346 transitions. [2018-10-04 12:13:47,919 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-04 12:13:47,920 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 346 transitions. [2018-10-04 12:13:47,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-10-04 12:13:47,920 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:47,920 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-10-04 12:13:47,923 INFO L423 AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:47,923 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:47,923 INFO L82 PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times [2018-10-04 12:13:47,923 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:47,924 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:47,925 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:47,926 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:47,926 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:47,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:47,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:47,961 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:47,961 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-04 12:13:47,962 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-04 12:13:47,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-04 12:13:47,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-04 12:13:47,962 INFO L87 Difference]: Start difference. First operand 326 states and 346 transitions. Second operand 4 states. [2018-10-04 12:13:48,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:48,232 INFO L93 Difference]: Finished difference Result 326 states and 346 transitions. [2018-10-04 12:13:48,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-04 12:13:48,233 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-10-04 12:13:48,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:48,235 INFO L225 Difference]: With dead ends: 326 [2018-10-04 12:13:48,236 INFO L226 Difference]: Without dead ends: 325 [2018-10-04 12:13:48,237 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-04 12:13:48,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-10-04 12:13:48,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 325. [2018-10-04 12:13:48,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325 states. [2018-10-04 12:13:48,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 345 transitions. [2018-10-04 12:13:48,249 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 345 transitions. Word has length 3 [2018-10-04 12:13:48,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:48,250 INFO L480 AbstractCegarLoop]: Abstraction has 325 states and 345 transitions. [2018-10-04 12:13:48,250 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-04 12:13:48,250 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 345 transitions. [2018-10-04 12:13:48,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-10-04 12:13:48,251 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:48,251 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-10-04 12:13:48,254 INFO L423 AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:48,254 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:48,254 INFO L82 PathProgramCache]: Analyzing trace with hash 1632611, now seen corresponding path program 1 times [2018-10-04 12:13:48,254 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:48,255 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:48,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:48,259 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:48,259 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:48,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:48,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:48,391 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:48,392 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-04 12:13:48,392 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-04 12:13:48,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-04 12:13:48,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-04 12:13:48,393 INFO L87 Difference]: Start difference. First operand 325 states and 345 transitions. Second operand 4 states. [2018-10-04 12:13:48,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:48,727 INFO L93 Difference]: Finished difference Result 325 states and 345 transitions. [2018-10-04 12:13:48,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-04 12:13:48,728 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 4 [2018-10-04 12:13:48,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:48,731 INFO L225 Difference]: With dead ends: 325 [2018-10-04 12:13:48,731 INFO L226 Difference]: Without dead ends: 301 [2018-10-04 12:13:48,732 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-04 12:13:48,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-10-04 12:13:48,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 301. [2018-10-04 12:13:48,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301 states. [2018-10-04 12:13:48,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301 states to 301 states and 320 transitions. [2018-10-04 12:13:48,756 INFO L78 Accepts]: Start accepts. Automaton has 301 states and 320 transitions. Word has length 4 [2018-10-04 12:13:48,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:48,757 INFO L480 AbstractCegarLoop]: Abstraction has 301 states and 320 transitions. [2018-10-04 12:13:48,757 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-04 12:13:48,757 INFO L276 IsEmpty]: Start isEmpty. Operand 301 states and 320 transitions. [2018-10-04 12:13:48,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-10-04 12:13:48,758 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:48,758 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-10-04 12:13:48,763 INFO L423 AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:48,763 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:48,763 INFO L82 PathProgramCache]: Analyzing trace with hash 6250211, now seen corresponding path program 1 times [2018-10-04 12:13:48,763 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:48,765 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:48,766 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:48,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:48,767 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:48,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:48,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:48,843 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:48,843 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-10-04 12:13:48,843 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-10-04 12:13:48,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-10-04 12:13:48,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-04 12:13:48,845 INFO L87 Difference]: Start difference. First operand 301 states and 320 transitions. Second operand 3 states. [2018-10-04 12:13:48,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:48,882 INFO L93 Difference]: Finished difference Result 301 states and 320 transitions. [2018-10-04 12:13:48,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-10-04 12:13:48,882 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-10-04 12:13:48,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:48,884 INFO L225 Difference]: With dead ends: 301 [2018-10-04 12:13:48,884 INFO L226 Difference]: Without dead ends: 300 [2018-10-04 12:13:48,885 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-10-04 12:13:48,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-10-04 12:13:48,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 300. [2018-10-04 12:13:48,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2018-10-04 12:13:48,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 319 transitions. [2018-10-04 12:13:48,899 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 319 transitions. Word has length 4 [2018-10-04 12:13:48,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:48,899 INFO L480 AbstractCegarLoop]: Abstraction has 300 states and 319 transitions. [2018-10-04 12:13:48,899 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-10-04 12:13:48,899 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 319 transitions. [2018-10-04 12:13:48,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-10-04 12:13:48,900 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:48,900 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-10-04 12:13:48,902 INFO L423 AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:48,902 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:48,903 INFO L82 PathProgramCache]: Analyzing trace with hash 321664405, now seen corresponding path program 1 times [2018-10-04 12:13:48,903 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:48,903 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:48,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:48,905 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:48,905 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:48,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:48,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:48,977 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:48,977 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-04 12:13:48,977 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-10-04 12:13:48,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-10-04 12:13:48,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-10-04 12:13:48,978 INFO L87 Difference]: Start difference. First operand 300 states and 319 transitions. Second operand 5 states. [2018-10-04 12:13:49,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:49,050 INFO L93 Difference]: Finished difference Result 300 states and 319 transitions. [2018-10-04 12:13:49,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-10-04 12:13:49,050 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2018-10-04 12:13:49,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:49,052 INFO L225 Difference]: With dead ends: 300 [2018-10-04 12:13:49,052 INFO L226 Difference]: Without dead ends: 294 [2018-10-04 12:13:49,053 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-10-04 12:13:49,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-10-04 12:13:49,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 294. [2018-10-04 12:13:49,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-10-04 12:13:49,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 314 transitions. [2018-10-04 12:13:49,067 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 314 transitions. Word has length 5 [2018-10-04 12:13:49,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:49,067 INFO L480 AbstractCegarLoop]: Abstraction has 294 states and 314 transitions. [2018-10-04 12:13:49,067 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-10-04 12:13:49,067 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 314 transitions. [2018-10-04 12:13:49,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-10-04 12:13:49,068 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:49,068 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-10-04 12:13:49,070 INFO L423 AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:49,070 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:49,071 INFO L82 PathProgramCache]: Analyzing trace with hash 193756751, now seen corresponding path program 1 times [2018-10-04 12:13:49,071 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:49,071 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:49,072 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:49,072 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:49,072 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:49,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-10-04 12:13:49,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-10-04 12:13:49,109 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-10-04 12:13:49,109 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-10-04 12:13:49,109 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-10-04 12:13:49,109 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-10-04 12:13:49,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-10-04 12:13:49,110 INFO L87 Difference]: Start difference. First operand 294 states and 314 transitions. Second operand 4 states. [2018-10-04 12:13:49,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-10-04 12:13:49,264 INFO L93 Difference]: Finished difference Result 294 states and 314 transitions. [2018-10-04 12:13:49,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-10-04 12:13:49,265 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 5 [2018-10-04 12:13:49,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-10-04 12:13:49,268 INFO L225 Difference]: With dead ends: 294 [2018-10-04 12:13:49,268 INFO L226 Difference]: Without dead ends: 293 [2018-10-04 12:13:49,269 INFO L605 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-10-04 12:13:49,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-10-04 12:13:49,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 293. [2018-10-04 12:13:49,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 293 states. [2018-10-04 12:13:49,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 313 transitions. [2018-10-04 12:13:49,284 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 313 transitions. Word has length 5 [2018-10-04 12:13:49,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-10-04 12:13:49,284 INFO L480 AbstractCegarLoop]: Abstraction has 293 states and 313 transitions. [2018-10-04 12:13:49,284 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-10-04 12:13:49,284 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 313 transitions. [2018-10-04 12:13:49,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-10-04 12:13:49,285 INFO L367 BasicCegarLoop]: Found error trace [2018-10-04 12:13:49,285 INFO L375 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-10-04 12:13:49,286 INFO L423 AbstractCegarLoop]: === Iteration 11 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err4REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err24REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err14REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26REQUIRES_VIOLATIONPRE_CONDITION, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr4REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr2REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr1REQUIRES_VIOLATIONPRE_CONDITION, $EFG_ProcedureErr5ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0REQUIRES_VIOLATIONPRE_CONDITION]=== [2018-10-04 12:13:49,286 INFO L141 PredicateUnifier]: Initialized classic predicate unifier [2018-10-04 12:13:49,287 INFO L82 PathProgramCache]: Analyzing trace with hash 2105946501, now seen corresponding path program 1 times [2018-10-04 12:13:49,287 INFO L227 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-10-04 12:13:49,287 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-10-04 12:13:49,288 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:49,288 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-10-04 12:13:49,288 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-10-04 12:13:49,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-04 12:13:49,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-10-04 12:13:49,305 INFO L442 BasicCegarLoop]: Counterexample might be feasible [2018-10-04 12:13:49,325 INFO L202 PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.10 12:13:49 BoogieIcfgContainer [2018-10-04 12:13:49,325 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-10-04 12:13:49,326 INFO L168 Benchmark]: Toolchain (without parser) took 4981.94 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.3 GB in the end (delta: 211.4 MB). Peak memory consumption was 211.4 MB. Max. memory is 7.1 GB. [2018-10-04 12:13:49,329 INFO L168 Benchmark]: Boogie PL CUP Parser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-04 12:13:49,329 INFO L168 Benchmark]: Boogie Procedure Inliner took 83.61 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-04 12:13:49,330 INFO L168 Benchmark]: Boogie Preprocessor took 48.77 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-10-04 12:13:49,330 INFO L168 Benchmark]: RCFGBuilder took 1629.43 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 74.0 MB). Peak memory consumption was 74.0 MB. Max. memory is 7.1 GB. [2018-10-04 12:13:49,331 INFO L168 Benchmark]: TraceAbstraction took 3215.04 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 137.4 MB). Peak memory consumption was 137.4 MB. Max. memory is 7.1 GB. [2018-10-04 12:13:49,335 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.20 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 83.61 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 48.77 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 1629.43 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 74.0 MB). Peak memory consumption was 74.0 MB. Max. memory is 7.1 GB. * TraceAbstraction took 3215.04 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 137.4 MB). Peak memory consumption was 137.4 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 658]: assertion can be violated assertion can be violated We found a FailurePath: [L642] requires void$SimpleFrame2Cons$4$actionPerformed$4888$__this != $null; [L651] r0125 := void$SimpleFrame2Cons$4$actionPerformed$4888$__this; [L653] r1126 := void$SimpleFrame2Cons$4$actionPerformed$4888$param_0; [L655] $r2129 := SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763; [L657] CALL call $r3130 := javax.swing.JButton$SimpleFrame2Cons$access$0$1806($r2129); [L390] r083 := $param_0; [L392] $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227; [L394] __ret := $r185; [L657] RET call $r3130 := javax.swing.JButton$SimpleFrame2Cons$access$0$1806($r2129); [L658] assert $r3130 != $null; - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 374 locations, 78 error locations. UNSAFE Result, 3.1s OverallTime, 11 OverallIterations, 1 TraceHistogramMax, 1.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3373 SDtfs, 494 SDslu, 5870 SDs, 0 SdLazy, 71 SolverSat, 32 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=374occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 10 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 42 NumberOfCodeBlocks, 42 NumberOfCodeBlocksAsserted, 11 NumberOfCheckSat, 25 ConstructedInterpolants, 0 QuantifiedInterpolants, 242 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 10 InterpolantComputations, 10 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/GuiTestExample.bpl_svcomp-Reach-32bit-Automizer_Default.epf_AutomizerBplInline.xml/Csv-Benchmark-0-2018-10-04_12-13-49-347.csv Written .csv to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/csv/GuiTestExample.bpl_svcomp-Reach-32bit-Automizer_Default.epf_AutomizerBplInline.xml/Csv-TraceAbstractionBenchmarks-0-2018-10-04_12-13-49-347.csv Received shutdown request...