/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf -i ../../../trunk/examples/svcomp/loops-crafted-1/in-de52.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-6c470ae [2022-02-14 21:16:01,400 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-02-14 21:16:01,401 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-02-14 21:16:01,450 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-02-14 21:16:01,459 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-02-14 21:16:01,467 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-02-14 21:16:01,469 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-02-14 21:16:01,471 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-02-14 21:16:01,471 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-02-14 21:16:01,475 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-02-14 21:16:01,476 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-02-14 21:16:01,478 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-02-14 21:16:01,479 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-02-14 21:16:01,484 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-02-14 21:16:01,484 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-02-14 21:16:01,485 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-02-14 21:16:01,489 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-02-14 21:16:01,494 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-02-14 21:16:01,495 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-02-14 21:16:01,495 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-02-14 21:16:01,502 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/LoopAccelerationJordanC.epf [2022-02-14 21:16:01,514 INFO L113 SettingsManager]: Loading preferences was successful [2022-02-14 21:16:01,514 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-02-14 21:16:01,516 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-02-14 21:16:01,516 INFO L138 SettingsManager]: * sizeof long=4 [2022-02-14 21:16:01,516 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-02-14 21:16:01,516 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-02-14 21:16:01,516 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-02-14 21:16:01,516 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-02-14 21:16:01,516 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-02-14 21:16:01,516 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-02-14 21:16:01,517 INFO L138 SettingsManager]: * sizeof long double=12 [2022-02-14 21:16:01,517 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-02-14 21:16:01,517 INFO L138 SettingsManager]: * Use constant arrays=true [2022-02-14 21:16:01,517 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-02-14 21:16:01,518 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-02-14 21:16:01,518 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-02-14 21:16:01,518 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-02-14 21:16:01,518 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-02-14 21:16:01,518 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-14 21:16:01,518 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-02-14 21:16:01,518 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-02-14 21:16:01,519 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-02-14 21:16:01,519 INFO L138 SettingsManager]: * TransformationType=LOOP_ACCELERATION_JORDAN WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-02-14 21:16:01,749 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-02-14 21:16:01,766 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-02-14 21:16:01,768 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-02-14 21:16:01,768 INFO L271 PluginConnector]: Initializing CDTParser... [2022-02-14 21:16:01,771 INFO L275 PluginConnector]: CDTParser initialized [2022-02-14 21:16:01,772 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loops-crafted-1/in-de52.c [2022-02-14 21:16:01,823 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db54282da/f7b5e28bc8c2496db52cb91328100121/FLAG95315b1a3 [2022-02-14 21:16:02,159 INFO L306 CDTParser]: Found 1 translation units. [2022-02-14 21:16:02,160 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c [2022-02-14 21:16:02,166 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db54282da/f7b5e28bc8c2496db52cb91328100121/FLAG95315b1a3 [2022-02-14 21:16:02,581 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db54282da/f7b5e28bc8c2496db52cb91328100121 [2022-02-14 21:16:02,583 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-02-14 21:16:02,584 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-02-14 21:16:02,586 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-02-14 21:16:02,587 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-02-14 21:16:02,589 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-02-14 21:16:02,589 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,590 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c455dde and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02, skipping insertion in model container [2022-02-14 21:16:02,590 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,596 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-02-14 21:16:02,609 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-02-14 21:16:02,723 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c[368,381] [2022-02-14 21:16:02,759 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-14 21:16:02,766 INFO L203 MainTranslator]: Completed pre-run [2022-02-14 21:16:02,776 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/loops-crafted-1/in-de52.c[368,381] [2022-02-14 21:16:02,785 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-02-14 21:16:02,798 INFO L208 MainTranslator]: Completed translation [2022-02-14 21:16:02,799 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02 WrapperNode [2022-02-14 21:16:02,799 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-02-14 21:16:02,800 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-02-14 21:16:02,800 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-02-14 21:16:02,800 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-02-14 21:16:02,811 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,811 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,819 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,819 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,824 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,833 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,834 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,837 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-02-14 21:16:02,838 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-02-14 21:16:02,838 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-02-14 21:16:02,838 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-02-14 21:16:02,839 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (1/1) ... [2022-02-14 21:16:02,844 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-02-14 21:16:02,853 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:16:02,862 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-02-14 21:16:02,864 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-02-14 21:16:02,892 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-02-14 21:16:02,892 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-02-14 21:16:02,892 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-02-14 21:16:02,893 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2022-02-14 21:16:02,893 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-02-14 21:16:02,893 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-02-14 21:16:02,894 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-02-14 21:16:02,894 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-02-14 21:16:02,894 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-02-14 21:16:02,894 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_uint [2022-02-14 21:16:02,895 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2022-02-14 21:16:02,895 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-02-14 21:16:02,895 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-02-14 21:16:02,896 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-02-14 21:16:02,896 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-02-14 21:16:02,896 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-02-14 21:16:02,896 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-02-14 21:16:02,896 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-02-14 21:16:02,961 INFO L234 CfgBuilder]: Building ICFG [2022-02-14 21:16:02,962 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-02-14 21:16:03,098 INFO L275 CfgBuilder]: Performing block encoding [2022-02-14 21:16:03,103 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-02-14 21:16:03,103 INFO L299 CfgBuilder]: Removed 5 assume(true) statements. [2022-02-14 21:16:03,105 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.02 09:16:03 BoogieIcfgContainer [2022-02-14 21:16:03,105 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-02-14 21:16:03,105 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-02-14 21:16:03,105 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-02-14 21:16:03,108 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-02-14 21:16:03,111 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.02 09:16:03" (1/1) ... [2022-02-14 21:16:03,320 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-02-14 21:16:03,321 INFO L91 elerationTransformer]: Accelerated Formula: (and (= (+ v_main_~x~0_3 1) v_main_~x~0_4) (= v_main_~y~0_5 (+ v_main_~y~0_6 1)) (< 0 (mod v_main_~x~0_4 4294967296))) InVars {main_~x~0=v_main_~x~0_4, main_~y~0=v_main_~y~0_6} OutVars{main_~x~0=v_main_~x~0_3, main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] to Formula: (let ((.cse0 (mod v_main_~x~0_4 4294967296))) (or (and (= |v_main_#t~post5_3| |v_main_#t~post5_1|) (= v_main_~x~0_4 v_main_~x~0_3) (= |v_main_#t~post6_3| |v_main_#t~post6_1|) (<= .cse0 0) (= v_main_~y~0_6 v_main_~y~0_5)) (and (forall ((v_it_1 Int)) (or (< 0 (mod (+ v_main_~x~0_4 (* v_it_1 4294967295)) 4294967296)) (not (<= 1 v_it_1)) (not (<= (+ v_main_~y~0_6 v_it_1 1) v_main_~y~0_5)))) (< v_main_~y~0_6 v_main_~y~0_5) (< 0 .cse0) (= v_main_~x~0_3 (+ v_main_~x~0_4 v_main_~y~0_6 (* (- 1) v_main_~y~0_5)))))) InVars {main_~y~0=v_main_~y~0_6, main_#t~post5=|v_main_#t~post5_3|, main_~x~0=v_main_~x~0_4, main_#t~post6=|v_main_#t~post6_3|} OutVars{main_~y~0=v_main_~y~0_5, main_#t~post5=|v_main_#t~post5_1|, main_~x~0=v_main_~x~0_3, main_#t~post6=|v_main_#t~post6_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post5, main_#t~post6] [2022-02-14 21:16:03,501 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-02-14 21:16:03,501 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_8 (+ v_main_~x~0_9 1)) (= v_main_~z~0_8 (+ v_main_~z~0_7 1)) (< 0 (mod v_main_~z~0_8 4294967296))) InVars {main_~x~0=v_main_~x~0_9, main_~z~0=v_main_~z~0_8} OutVars{main_~x~0=v_main_~x~0_8, main_~z~0=v_main_~z~0_7, main_#t~post8=|v_main_#t~post8_1|, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] to Formula: (let ((.cse0 (mod v_main_~z~0_8 4294967296))) (or (and (= v_main_~x~0_9 v_main_~x~0_8) (<= .cse0 0) (= v_main_~z~0_8 v_main_~z~0_7) (= |v_main_#t~post7_3| |v_main_#t~post7_1|) (= |v_main_#t~post8_3| |v_main_#t~post8_1|)) (and (forall ((v_it_2 Int)) (or (< 0 (mod (+ v_main_~z~0_8 (* v_it_2 4294967295)) 4294967296)) (not (<= (+ v_main_~z~0_7 v_it_2 1) v_main_~z~0_8)) (not (<= 1 v_it_2)))) (= (+ v_main_~x~0_9 v_main_~z~0_8 (* (- 1) v_main_~z~0_7)) v_main_~x~0_8) (< 0 .cse0) (< v_main_~z~0_7 v_main_~z~0_8)))) InVars {main_~x~0=v_main_~x~0_9, main_#t~post8=|v_main_#t~post8_3|, main_~z~0=v_main_~z~0_8, main_#t~post7=|v_main_#t~post7_3|} OutVars{main_~x~0=v_main_~x~0_8, main_#t~post8=|v_main_#t~post8_1|, main_~z~0=v_main_~z~0_7, main_#t~post7=|v_main_#t~post7_1|} AuxVars[] AssignedVars[main_~x~0, main_~z~0, main_#t~post8, main_#t~post7] [2022-02-14 21:16:03,569 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-02-14 21:16:03,569 INFO L91 elerationTransformer]: Accelerated Formula: (and (< 0 (mod v_main_~y~0_4 4294967296)) (= (+ v_main_~z~0_3 1) v_main_~z~0_2) (= v_main_~y~0_4 (+ v_main_~y~0_3 1))) InVars {main_~z~0=v_main_~z~0_3, main_~y~0=v_main_~y~0_4} OutVars{main_#t~post10=|v_main_#t~post10_1|, main_~z~0=v_main_~z~0_2, main_~y~0=v_main_~y~0_3, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] to Formula: (let ((.cse0 (mod v_main_~y~0_4 4294967296))) (or (and (= (+ (* (- 1) v_main_~y~0_3) v_main_~y~0_4 v_main_~z~0_3) v_main_~z~0_2) (< 0 .cse0) (forall ((v_it_3 Int)) (or (not (<= 1 v_it_3)) (< 0 (mod (+ v_main_~y~0_4 (* v_it_3 4294967295)) 4294967296)) (not (<= (+ v_main_~y~0_3 v_it_3 1) v_main_~y~0_4)))) (< v_main_~y~0_3 v_main_~y~0_4)) (and (= |v_main_#t~post10_3| |v_main_#t~post10_1|) (= v_main_~z~0_3 v_main_~z~0_2) (= v_main_~y~0_4 v_main_~y~0_3) (<= .cse0 0) (= |v_main_#t~post9_3| |v_main_#t~post9_1|)))) InVars {main_~y~0=v_main_~y~0_4, main_#t~post10=|v_main_#t~post10_3|, main_#t~post9=|v_main_#t~post9_3|, main_~z~0=v_main_~z~0_3} OutVars{main_~y~0=v_main_~y~0_3, main_#t~post10=|v_main_#t~post10_1|, main_#t~post9=|v_main_#t~post9_1|, main_~z~0=v_main_~z~0_2} AuxVars[] AssignedVars[main_#t~post10, main_~z~0, main_~y~0, main_#t~post9] [2022-02-14 21:16:05,688 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-02-14 21:16:05,688 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~x~0_7 (+ v_main_~x~0_6 1)) (< 0 (mod v_main_~x~0_7 4294967296)) (= (+ v_main_~y~0_8 1) v_main_~y~0_7)) InVars {main_~x~0=v_main_~x~0_7, main_~y~0=v_main_~y~0_8} OutVars{main_~x~0=v_main_~x~0_6, main_~y~0=v_main_~y~0_7, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] to Formula: (let ((.cse0 (mod v_main_~x~0_7 4294967296))) (or (and (forall ((v_it_4 Int)) (or (not (<= (+ v_main_~x~0_6 v_it_4 1) v_main_~x~0_7)) (< 0 (mod (+ (* v_it_4 4294967295) v_main_~x~0_7) 4294967296)) (not (<= 1 v_it_4)))) (< 0 .cse0) (< v_main_~x~0_6 v_main_~x~0_7) (= (+ (* (- 1) v_main_~x~0_6) v_main_~x~0_7 v_main_~y~0_8) v_main_~y~0_7)) (and (= |v_main_#t~post12_3| |v_main_#t~post12_1|) (= |v_main_#t~post11_3| |v_main_#t~post11_1|) (<= .cse0 0) (= v_main_~y~0_8 v_main_~y~0_7) (= v_main_~x~0_7 v_main_~x~0_6)))) InVars {main_~y~0=v_main_~y~0_8, main_~x~0=v_main_~x~0_7, main_#t~post11=|v_main_#t~post11_3|, main_#t~post12=|v_main_#t~post12_3|} OutVars{main_~y~0=v_main_~y~0_7, main_~x~0=v_main_~x~0_6, main_#t~post11=|v_main_#t~post11_1|, main_#t~post12=|v_main_#t~post12_1|} AuxVars[] AssignedVars[main_~x~0, main_~y~0, main_#t~post11, main_#t~post12] [2022-02-14 21:16:05,753 INFO L89 elerationTransformer]: Jordan loop acceleration statistics: 2 HavocedVariables, 2 AssignedVariables, 0 ReadonlyVariables, Eigenvalues: {1={1=1, 2=1}}, 1 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-02-14 21:16:05,753 INFO L91 elerationTransformer]: Accelerated Formula: (and (= v_main_~z~0_10 (+ v_main_~z~0_9 1)) (< 0 (mod v_main_~z~0_10 4294967296)) (= v_main_~y~0_11 (+ v_main_~y~0_10 1))) InVars {main_~z~0=v_main_~z~0_10, main_~y~0=v_main_~y~0_11} OutVars{main_~z~0=v_main_~z~0_9, main_~y~0=v_main_~y~0_10, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] to Formula: (let ((.cse0 (mod v_main_~z~0_10 4294967296))) (or (and (= v_main_~y~0_10 (+ v_main_~y~0_11 v_main_~z~0_9 (* (- 1) v_main_~z~0_10))) (< 0 .cse0) (forall ((v_it_5 Int)) (or (not (<= (+ v_main_~z~0_9 v_it_5 1) v_main_~z~0_10)) (< 0 (mod (+ v_main_~z~0_10 (* v_it_5 4294967295)) 4294967296)) (not (<= 1 v_it_5)))) (< v_main_~z~0_9 v_main_~z~0_10)) (and (<= .cse0 0) (= |v_main_#t~post14_3| |v_main_#t~post14_1|) (= v_main_~y~0_11 v_main_~y~0_10) (= v_main_~z~0_10 v_main_~z~0_9) (= |v_main_#t~post13_3| |v_main_#t~post13_1|)))) InVars {main_~y~0=v_main_~y~0_11, main_~z~0=v_main_~z~0_10, main_#t~post13=|v_main_#t~post13_3|, main_#t~post14=|v_main_#t~post14_3|} OutVars{main_~y~0=v_main_~y~0_10, main_~z~0=v_main_~z~0_9, main_#t~post13=|v_main_#t~post13_1|, main_#t~post14=|v_main_#t~post14_1|} AuxVars[] AssignedVars[main_~z~0, main_~y~0, main_#t~post13, main_#t~post14] [2022-02-14 21:16:05,757 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.02 09:16:05 BasicIcfg [2022-02-14 21:16:05,757 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-02-14 21:16:05,758 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-02-14 21:16:05,758 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-02-14 21:16:05,761 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-02-14 21:16:05,761 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 14.02 09:16:02" (1/4) ... [2022-02-14 21:16:05,762 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dfef3cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.02 09:16:05, skipping insertion in model container [2022-02-14 21:16:05,762 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 14.02 09:16:02" (2/4) ... [2022-02-14 21:16:05,762 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dfef3cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 14.02 09:16:05, skipping insertion in model container [2022-02-14 21:16:05,762 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 14.02 09:16:03" (3/4) ... [2022-02-14 21:16:05,763 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4dfef3cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 14.02 09:16:05, skipping insertion in model container [2022-02-14 21:16:05,763 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 14.02 09:16:05" (4/4) ... [2022-02-14 21:16:05,764 INFO L111 eAbstractionObserver]: Analyzing ICFG in-de52.cJordan [2022-02-14 21:16:05,768 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:ForwardPredicates Determinization: PREDICATE_ABSTRACTION [2022-02-14 21:16:05,768 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-02-14 21:16:05,798 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-02-14 21:16:05,803 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=ForwardPredicates, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=false, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-02-14 21:16:05,804 INFO L340 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-02-14 21:16:05,813 INFO L276 IsEmpty]: Start isEmpty. Operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2022-02-14 21:16:05,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-02-14 21:16:05,818 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:16:05,818 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:16:05,819 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:16:05,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:16:05,822 INFO L85 PathProgramCache]: Analyzing trace with hash 702671213, now seen corresponding path program 1 times [2022-02-14 21:16:05,828 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:16:05,828 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152604843] [2022-02-14 21:16:05,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:05,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:16:05,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:05,941 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:16:05,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:05,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:05,955 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:16:05,955 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [152604843] [2022-02-14 21:16:05,956 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [152604843] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-14 21:16:05,957 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-14 21:16:05,957 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-02-14 21:16:05,958 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1793937088] [2022-02-14 21:16:05,959 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-14 21:16:05,962 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-02-14 21:16:05,962 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:16:05,990 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-02-14 21:16:05,991 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-14 21:16:05,993 INFO L87 Difference]: Start difference. First operand has 24 states, 16 states have (on average 1.75) internal successors, (28), 17 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 3 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:06,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:16:06,022 INFO L93 Difference]: Finished difference Result 24 states and 28 transitions. [2022-02-14 21:16:06,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-02-14 21:16:06,029 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-02-14 21:16:06,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:16:06,034 INFO L225 Difference]: With dead ends: 24 [2022-02-14 21:16:06,034 INFO L226 Difference]: Without dead ends: 17 [2022-02-14 21:16:06,035 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-02-14 21:16:06,038 INFO L933 BasicCegarLoop]: 27 mSDtfsCounter, 19 mSDsluCounter, 3 mSDsCounter, 0 mSdLazyCounter, 3 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 30 SdHoareTripleChecker+Invalid, 5 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 3 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-14 21:16:06,039 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 30 Invalid, 5 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 3 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-02-14 21:16:06,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states. [2022-02-14 21:16:06,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2022-02-14 21:16:06,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:06,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 21 transitions. [2022-02-14 21:16:06,065 INFO L78 Accepts]: Start accepts. Automaton has 17 states and 21 transitions. Word has length 16 [2022-02-14 21:16:06,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:16:06,066 INFO L470 AbstractCegarLoop]: Abstraction has 17 states and 21 transitions. [2022-02-14 21:16:06,066 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:06,066 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2022-02-14 21:16:06,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-02-14 21:16:06,067 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:16:06,067 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:16:06,067 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-02-14 21:16:06,067 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:16:06,070 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:16:06,070 INFO L85 PathProgramCache]: Analyzing trace with hash -1128942900, now seen corresponding path program 1 times [2022-02-14 21:16:06,070 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:16:06,071 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326884016] [2022-02-14 21:16:06,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:06,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:16:06,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:06,204 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:16:06,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:06,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:06,220 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:16:06,220 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326884016] [2022-02-14 21:16:06,221 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326884016] provided 1 perfect and 0 imperfect interpolant sequences [2022-02-14 21:16:06,221 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-02-14 21:16:06,221 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-02-14 21:16:06,221 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1944293959] [2022-02-14 21:16:06,222 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-02-14 21:16:06,224 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-02-14 21:16:06,225 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:16:06,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-02-14 21:16:06,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-02-14 21:16:06,225 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:06,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:16:06,307 INFO L93 Difference]: Finished difference Result 28 states and 38 transitions. [2022-02-14 21:16:06,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-02-14 21:16:06,307 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 16 [2022-02-14 21:16:06,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:16:06,308 INFO L225 Difference]: With dead ends: 28 [2022-02-14 21:16:06,309 INFO L226 Difference]: Without dead ends: 25 [2022-02-14 21:16:06,309 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2022-02-14 21:16:06,310 INFO L933 BasicCegarLoop]: 14 mSDtfsCounter, 20 mSDsluCounter, 20 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 9 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-14 21:16:06,311 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 34 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 33 Invalid, 0 Unknown, 9 Unchecked, 0.0s Time] [2022-02-14 21:16:06,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2022-02-14 21:16:06,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 19. [2022-02-14 21:16:06,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 14 states have internal predecessors, (20), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:06,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 24 transitions. [2022-02-14 21:16:06,327 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 24 transitions. Word has length 16 [2022-02-14 21:16:06,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:16:06,328 INFO L470 AbstractCegarLoop]: Abstraction has 19 states and 24 transitions. [2022-02-14 21:16:06,328 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 2.0) internal successors, (12), 4 states have internal predecessors, (12), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:06,328 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 24 transitions. [2022-02-14 21:16:06,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-02-14 21:16:06,329 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:16:06,329 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:16:06,329 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-02-14 21:16:06,330 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:16:06,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:16:06,330 INFO L85 PathProgramCache]: Analyzing trace with hash -610770875, now seen corresponding path program 1 times [2022-02-14 21:16:06,330 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:16:06,330 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876599179] [2022-02-14 21:16:06,330 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:06,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:16:06,361 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:16:06,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:06,383 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:16:06,448 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:16:06,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:06,454 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:06,454 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:16:06,454 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876599179] [2022-02-14 21:16:06,454 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1876599179] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:16:06,454 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1298617118] [2022-02-14 21:16:06,455 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:06,455 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:16:06,455 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:16:06,459 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:16:06,481 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-02-14 21:16:06,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:06,525 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 6 conjunts are in the unsatisfiable core [2022-02-14 21:16:06,529 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:16:06,757 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:06,757 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:16:09,830 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:09,831 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1298617118] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:16:09,831 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:16:09,831 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-02-14 21:16:09,831 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1731796046] [2022-02-14 21:16:09,832 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:16:09,832 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-02-14 21:16:09,832 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:16:09,833 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-02-14 21:16:09,833 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=142, Unknown=1, NotChecked=0, Total=182 [2022-02-14 21:16:09,833 INFO L87 Difference]: Start difference. First operand 19 states and 24 transitions. Second operand has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:10,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:16:10,038 INFO L93 Difference]: Finished difference Result 36 states and 50 transitions. [2022-02-14 21:16:10,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-02-14 21:16:10,039 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-02-14 21:16:10,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:16:10,041 INFO L225 Difference]: With dead ends: 36 [2022-02-14 21:16:10,041 INFO L226 Difference]: Without dead ends: 32 [2022-02-14 21:16:10,042 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=102, Invalid=359, Unknown=1, NotChecked=0, Total=462 [2022-02-14 21:16:10,043 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 29 mSDsluCounter, 50 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 109 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 18 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:16:10,043 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 63 Invalid, 109 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 72 Invalid, 0 Unknown, 18 Unchecked, 0.1s Time] [2022-02-14 21:16:10,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-02-14 21:16:10,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 22. [2022-02-14 21:16:10,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 17 states have internal predecessors, (25), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:10,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 29 transitions. [2022-02-14 21:16:10,047 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 29 transitions. Word has length 17 [2022-02-14 21:16:10,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:16:10,048 INFO L470 AbstractCegarLoop]: Abstraction has 22 states and 29 transitions. [2022-02-14 21:16:10,048 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 11 states have internal predecessors, (27), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:10,048 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 29 transitions. [2022-02-14 21:16:10,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-02-14 21:16:10,049 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:16:10,049 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:16:10,074 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-02-14 21:16:10,271 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:16:10,272 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:16:10,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:16:10,272 INFO L85 PathProgramCache]: Analyzing trace with hash 162216202, now seen corresponding path program 1 times [2022-02-14 21:16:10,272 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:16:10,273 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578004384] [2022-02-14 21:16:10,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:10,273 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:16:10,280 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:16:10,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:10,306 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:16:10,373 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:16:10,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:10,378 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:10,378 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:16:10,378 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578004384] [2022-02-14 21:16:10,378 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1578004384] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:16:10,378 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [220246810] [2022-02-14 21:16:10,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:10,379 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:16:10,379 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:16:10,380 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:16:10,381 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-02-14 21:16:10,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:10,411 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 6 conjunts are in the unsatisfiable core [2022-02-14 21:16:10,412 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:16:10,512 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:10,513 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:16:17,217 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:17,217 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [220246810] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:16:17,218 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:16:17,218 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-02-14 21:16:17,218 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1626704300] [2022-02-14 21:16:17,218 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:16:17,218 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-02-14 21:16:17,218 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:16:17,219 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-02-14 21:16:17,219 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=140, Unknown=3, NotChecked=0, Total=182 [2022-02-14 21:16:17,219 INFO L87 Difference]: Start difference. First operand 22 states and 29 transitions. Second operand has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:17,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:16:17,393 INFO L93 Difference]: Finished difference Result 42 states and 60 transitions. [2022-02-14 21:16:17,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-02-14 21:16:17,393 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 17 [2022-02-14 21:16:17,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:16:17,394 INFO L225 Difference]: With dead ends: 42 [2022-02-14 21:16:17,395 INFO L226 Difference]: Without dead ends: 38 [2022-02-14 21:16:17,395 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=102, Invalid=357, Unknown=3, NotChecked=0, Total=462 [2022-02-14 21:16:17,396 INFO L933 BasicCegarLoop]: 12 mSDtfsCounter, 32 mSDsluCounter, 52 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 64 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 17 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:16:17,396 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [32 Valid, 64 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 72 Invalid, 0 Unknown, 17 Unchecked, 0.1s Time] [2022-02-14 21:16:17,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2022-02-14 21:16:17,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 25. [2022-02-14 21:16:17,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 20 states have (on average 1.55) internal successors, (31), 20 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:17,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 35 transitions. [2022-02-14 21:16:17,403 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 35 transitions. Word has length 17 [2022-02-14 21:16:17,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:16:17,403 INFO L470 AbstractCegarLoop]: Abstraction has 25 states and 35 transitions. [2022-02-14 21:16:17,403 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 11 states have internal predecessors, (26), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:17,403 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 35 transitions. [2022-02-14 21:16:17,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-14 21:16:17,404 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:16:17,404 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:16:17,433 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-02-14 21:16:17,604 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-02-14 21:16:17,605 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:16:17,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:16:17,605 INFO L85 PathProgramCache]: Analyzing trace with hash -1727307284, now seen corresponding path program 2 times [2022-02-14 21:16:17,606 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:16:17,606 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134004589] [2022-02-14 21:16:17,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:17,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:16:17,612 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:16:17,613 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_11 .cse0 (* (- 4294967296) (div (+ main_~z~0_11 .cse0) 4294967296)))) 0)) [2022-02-14 21:16:17,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:17,654 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:16:17,662 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_11 .cse0 (* (- 4294967296) (div (+ main_~z~0_11 .cse0) 4294967296)))) 0)) [2022-02-14 21:16:17,750 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:16:17,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:17,767 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:16:17,767 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:16:17,767 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134004589] [2022-02-14 21:16:17,767 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2134004589] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:16:17,767 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1633322032] [2022-02-14 21:16:17,767 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-02-14 21:16:17,768 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:16:17,768 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:16:17,769 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:16:17,770 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-02-14 21:16:17,803 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-02-14 21:16:17,804 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-02-14 21:16:17,804 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-02-14 21:16:17,806 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:16:17,926 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:16:17,927 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:16:56,479 WARN L228 SmtUtils]: Spent 6.08s on a formula simplification that was a NOOP. DAG size: 73 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:16:56,490 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:56,490 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1633322032] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:16:56,490 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:16:56,491 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 16 [2022-02-14 21:16:56,491 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [223821370] [2022-02-14 21:16:56,491 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:16:56,492 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-02-14 21:16:56,492 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:16:56,493 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-02-14 21:16:56,493 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=181, Unknown=11, NotChecked=0, Total=240 [2022-02-14 21:16:56,493 INFO L87 Difference]: Start difference. First operand 25 states and 35 transitions. Second operand has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:58,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:16:58,906 INFO L93 Difference]: Finished difference Result 42 states and 59 transitions. [2022-02-14 21:16:58,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-02-14 21:16:58,906 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-02-14 21:16:58,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:16:58,907 INFO L225 Difference]: With dead ends: 42 [2022-02-14 21:16:58,907 INFO L226 Difference]: Without dead ends: 32 [2022-02-14 21:16:58,908 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 30 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 32.6s TimeCoverageRelationStatistics Valid=104, Invalid=390, Unknown=12, NotChecked=0, Total=506 [2022-02-14 21:16:58,909 INFO L933 BasicCegarLoop]: 12 mSDtfsCounter, 45 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 55 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 40 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-02-14 21:16:58,909 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [45 Valid, 55 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 47 Invalid, 0 Unknown, 40 Unchecked, 0.0s Time] [2022-02-14 21:16:58,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2022-02-14 21:16:58,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 24. [2022-02-14 21:16:58,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 19 states have internal predecessors, (28), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:58,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2022-02-14 21:16:58,913 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 32 transitions. Word has length 18 [2022-02-14 21:16:58,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:16:58,913 INFO L470 AbstractCegarLoop]: Abstraction has 24 states and 32 transitions. [2022-02-14 21:16:58,913 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 1.9375) internal successors, (31), 13 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:16:58,913 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 32 transitions. [2022-02-14 21:16:58,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-14 21:16:58,914 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:16:58,914 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:16:58,931 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-02-14 21:16:59,119 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:16:59,120 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:16:59,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:16:59,120 INFO L85 PathProgramCache]: Analyzing trace with hash 760455623, now seen corresponding path program 1 times [2022-02-14 21:16:59,120 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:16:59,120 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [632884222] [2022-02-14 21:16:59,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:59,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:16:59,126 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:16:59,127 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:16:59,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:59,137 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.2))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:16:59,139 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:16:59,223 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:16:59,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:59,230 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:59,230 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:16:59,231 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [632884222] [2022-02-14 21:16:59,231 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [632884222] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:16:59,231 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [890534165] [2022-02-14 21:16:59,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:16:59,231 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:16:59,231 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:16:59,233 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:16:59,234 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-02-14 21:16:59,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:16:59,263 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 8 conjunts are in the unsatisfiable core [2022-02-14 21:16:59,265 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:16:59,401 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:16:59,402 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:17:39,923 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:17:39,923 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [890534165] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:17:39,923 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:17:39,923 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 9] total 20 [2022-02-14 21:17:39,923 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [770624816] [2022-02-14 21:17:39,923 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:17:39,924 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-02-14 21:17:39,924 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:17:39,924 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-02-14 21:17:39,924 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=296, Unknown=10, NotChecked=0, Total=380 [2022-02-14 21:17:39,924 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. Second operand has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:17:40,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:17:40,573 INFO L93 Difference]: Finished difference Result 41 states and 56 transitions. [2022-02-14 21:17:40,573 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-02-14 21:17:40,573 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-02-14 21:17:40,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:17:40,574 INFO L225 Difference]: With dead ends: 41 [2022-02-14 21:17:40,574 INFO L226 Difference]: Without dead ends: 37 [2022-02-14 21:17:40,574 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 252 ImplicationChecksByTransitivity, 37.1s TimeCoverageRelationStatistics Valid=175, Invalid=745, Unknown=10, NotChecked=0, Total=930 [2022-02-14 21:17:40,575 INFO L933 BasicCegarLoop]: 15 mSDtfsCounter, 34 mSDsluCounter, 59 mSDsCounter, 0 mSdLazyCounter, 73 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 74 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 73 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 58 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:17:40,575 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [34 Valid, 74 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 73 Invalid, 0 Unknown, 58 Unchecked, 0.1s Time] [2022-02-14 21:17:40,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2022-02-14 21:17:40,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 26. [2022-02-14 21:17:40,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 21 states have (on average 1.4761904761904763) internal successors, (31), 21 states have internal predecessors, (31), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:17:40,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2022-02-14 21:17:40,578 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 35 transitions. Word has length 18 [2022-02-14 21:17:40,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:17:40,579 INFO L470 AbstractCegarLoop]: Abstraction has 26 states and 35 transitions. [2022-02-14 21:17:40,579 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 1.55) internal successors, (31), 17 states have internal predecessors, (31), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:17:40,579 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 35 transitions. [2022-02-14 21:17:40,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-14 21:17:40,579 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:17:40,579 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:17:40,606 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-02-14 21:17:40,788 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:17:40,788 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:17:40,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:17:40,789 INFO L85 PathProgramCache]: Analyzing trace with hash 1533442700, now seen corresponding path program 2 times [2022-02-14 21:17:40,789 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:17:40,789 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51323849] [2022-02-14 21:17:40,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:17:40,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:17:40,794 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:17:40,795 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_10 (* (- 4294967296) (div (+ .cse0 main_~x~0_10) 4294967296)))) 0)) [2022-02-14 21:17:40,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:17:40,811 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.2))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:17:40,814 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_10 (* (- 4294967296) (div (+ .cse0 main_~x~0_10) 4294967296)))) 0)) [2022-02-14 21:17:40,874 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:17:40,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:17:40,892 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:17:40,892 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:17:40,892 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51323849] [2022-02-14 21:17:40,892 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [51323849] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:17:40,892 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [400580593] [2022-02-14 21:17:40,892 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-02-14 21:17:40,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:17:40,893 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:17:40,894 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:17:40,901 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-02-14 21:17:40,953 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-02-14 21:17:40,953 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-02-14 21:17:40,954 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 7 conjunts are in the unsatisfiable core [2022-02-14 21:17:40,956 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:17:41,063 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:17:41,064 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:18:32,686 WARN L228 SmtUtils]: Spent 10.06s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:18:37,104 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:18:37,104 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [400580593] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:18:37,104 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:18:37,105 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 16 [2022-02-14 21:18:37,105 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1950154612] [2022-02-14 21:18:37,105 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:18:37,105 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-02-14 21:18:37,105 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:18:37,106 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-02-14 21:18:37,106 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=178, Unknown=14, NotChecked=0, Total=240 [2022-02-14 21:18:37,106 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. Second operand has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:18:47,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:18:47,434 INFO L93 Difference]: Finished difference Result 44 states and 61 transitions. [2022-02-14 21:18:47,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-02-14 21:18:47,435 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-02-14 21:18:47,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:18:47,435 INFO L225 Difference]: With dead ends: 44 [2022-02-14 21:18:47,435 INFO L226 Difference]: Without dead ends: 40 [2022-02-14 21:18:47,436 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 55.0s TimeCoverageRelationStatistics Valid=104, Invalid=383, Unknown=19, NotChecked=0, Total=506 [2022-02-14 21:18:47,437 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 39 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 99 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 89 SdHoareTripleChecker+Invalid, 160 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 99 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 46 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:18:47,437 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [39 Valid, 89 Invalid, 160 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 99 Invalid, 0 Unknown, 46 Unchecked, 0.1s Time] [2022-02-14 21:18:47,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2022-02-14 21:18:47,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 27. [2022-02-14 21:18:47,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:18:47,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 37 transitions. [2022-02-14 21:18:47,440 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 37 transitions. Word has length 18 [2022-02-14 21:18:47,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:18:47,441 INFO L470 AbstractCegarLoop]: Abstraction has 27 states and 37 transitions. [2022-02-14 21:18:47,441 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.0) internal successors, (32), 13 states have internal predecessors, (32), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:18:47,441 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 37 transitions. [2022-02-14 21:18:47,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-14 21:18:47,441 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:18:47,441 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:18:47,458 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-02-14 21:18:47,647 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:18:47,647 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:18:47,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:18:47,648 INFO L85 PathProgramCache]: Analyzing trace with hash 571694412, now seen corresponding path program 1 times [2022-02-14 21:18:47,648 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:18:47,648 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1748732293] [2022-02-14 21:18:47,648 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:18:47,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:18:47,653 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:18:47,655 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-02-14 21:18:47,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:18:47,669 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:18:47,673 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.3))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-02-14 21:18:47,735 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:18:47,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:18:47,744 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:18:47,744 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:18:47,744 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1748732293] [2022-02-14 21:18:47,744 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1748732293] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:18:47,744 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1964683360] [2022-02-14 21:18:47,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:18:47,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:18:47,745 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:18:47,752 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:18:47,753 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-02-14 21:18:47,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:18:47,782 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 10 conjunts are in the unsatisfiable core [2022-02-14 21:18:47,783 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:18:47,835 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:18:47,835 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:18:53,620 WARN L860 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_32_31 Int)) (or (= aux_mod_v_main_~y~0_32_31 0) (let ((.cse0 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (not .cse0) (and (forall ((aux_div_v_main_~y~0_32_31 Int) (aux_mod_v_main_~z~0_25_31 Int) (aux_div_v_main_~z~0_25_31 Int)) (let ((.cse1 (* 4294967296 aux_div_v_main_~z~0_25_31))) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_25_31) aux_mod_v_main_~z~0_25_31)) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (<= 4294967296 aux_mod_v_main_~z~0_25_31) (<= (+ .cse1 aux_mod_v_main_~z~0_25_31) c_main_~z~0) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ (* 4294967296 aux_div_v_main_~z~0_25_31) aux_mod_v_main_~z~0_25_31 v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) (+ c_main_~y~0 c_main_~z~0)) (not (< 0 (mod (+ aux_mod_v_main_~z~0_25_31 (* v_it_5 4294967295)) 4294967296))))) (<= (+ c_main_~y~0 c_main_~z~0) (+ .cse1 aux_mod_v_main_~z~0_25_31 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31)) (<= aux_mod_v_main_~z~0_25_31 0)))) (or (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) c_main_~y~0)) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) c_main_~y~0) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))))) (< 0 (mod (+ (* 4294967295 aux_mod_v_main_~y~0_32_31) c_main_~y~0 c_main_~z~0) 4294967296))))) (or .cse0 (not (< 0 (mod c_main_~z~0 4294967296))) (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) c_main_~y~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) c_main_~y~0) (<= 1 v_it_5)))))))) (>= aux_mod_v_main_~y~0_32_31 4294967296) (> 0 aux_mod_v_main_~y~0_32_31))) is different from true [2022-02-14 21:18:56,321 WARN L860 $PredicateComparison]: unable to prove that (or (forall ((aux_mod_v_main_~y~0_32_31 Int)) (or (= aux_mod_v_main_~y~0_32_31 0) (and (forall ((aux_div_v_main_~y~0_32_31 Int) (aux_mod_v_main_~z~0_25_31 Int) (aux_div_v_main_~z~0_25_31 Int)) (let ((.cse0 (* 4294967296 aux_div_v_main_~z~0_25_31))) (or (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ (* 4294967296 aux_div_v_main_~z~0_25_31) aux_mod_v_main_~z~0_25_31)) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (<= 4294967296 aux_mod_v_main_~z~0_25_31) (<= (+ .cse0 aux_mod_v_main_~z~0_25_31) c_main_~z~0) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (<= (+ (* 4294967296 aux_div_v_main_~z~0_25_31) aux_mod_v_main_~z~0_25_31 v_it_5 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) (+ c_main_~y~0 c_main_~z~0)) (not (< 0 (mod (+ aux_mod_v_main_~z~0_25_31 (* v_it_5 4294967295)) 4294967296))))) (<= (+ c_main_~y~0 c_main_~z~0) (+ .cse0 aux_mod_v_main_~z~0_25_31 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31)) (<= aux_mod_v_main_~z~0_25_31 0)))) (or (forall ((aux_div_v_main_~y~0_32_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31) c_main_~y~0)) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 (* aux_div_v_main_~y~0_32_31 4294967296) aux_mod_v_main_~y~0_32_31 1) c_main_~y~0) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))))) (< 0 (mod (+ (* 4294967295 aux_mod_v_main_~y~0_32_31) c_main_~y~0 c_main_~z~0) 4294967296)))) (>= aux_mod_v_main_~y~0_32_31 4294967296) (> 0 aux_mod_v_main_~y~0_32_31))) (not (< 0 (mod c_main_~y~0 4294967296))) (< 0 (mod c_main_~z~0 4294967296))) is different from true [2022-02-14 21:18:56,337 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-02-14 21:18:56,337 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1964683360] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:18:56,337 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:18:56,337 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 8] total 14 [2022-02-14 21:18:56,337 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [919537287] [2022-02-14 21:18:56,337 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:18:56,338 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-02-14 21:18:56,338 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:18:56,338 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-02-14 21:18:56,338 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=103, Unknown=3, NotChecked=42, Total=182 [2022-02-14 21:18:56,339 INFO L87 Difference]: Start difference. First operand 27 states and 37 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:19:07,386 WARN L228 SmtUtils]: Spent 8.39s on a formula simplification that was a NOOP. DAG size: 76 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:19:24,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:19:24,624 INFO L93 Difference]: Finished difference Result 45 states and 63 transitions. [2022-02-14 21:19:24,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-02-14 21:19:24,624 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-02-14 21:19:24,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:19:24,625 INFO L225 Difference]: With dead ends: 45 [2022-02-14 21:19:24,625 INFO L226 Difference]: Without dead ends: 41 [2022-02-14 21:19:24,625 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 32 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 34.4s TimeCoverageRelationStatistics Valid=87, Invalid=290, Unknown=11, NotChecked=74, Total=462 [2022-02-14 21:19:24,626 INFO L933 BasicCegarLoop]: 14 mSDtfsCounter, 24 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 69 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 63 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 69 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 92 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:19:24,626 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 63 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 69 Invalid, 0 Unknown, 92 Unchecked, 0.1s Time] [2022-02-14 21:19:24,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2022-02-14 21:19:24,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 34. [2022-02-14 21:19:24,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 29 states have (on average 1.5862068965517242) internal successors, (46), 29 states have internal predecessors, (46), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:19:24,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 50 transitions. [2022-02-14 21:19:24,629 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 50 transitions. Word has length 18 [2022-02-14 21:19:24,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:19:24,630 INFO L470 AbstractCegarLoop]: Abstraction has 34 states and 50 transitions. [2022-02-14 21:19:24,630 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:19:24,630 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 50 transitions. [2022-02-14 21:19:24,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-14 21:19:24,630 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:19:24,630 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:19:24,650 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-02-14 21:19:24,835 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:19:24,835 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:19:24,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:19:24,836 INFO L85 PathProgramCache]: Analyzing trace with hash 1344681489, now seen corresponding path program 1 times [2022-02-14 21:19:24,836 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:19:24,836 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609611096] [2022-02-14 21:19:24,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:19:24,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:19:24,841 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:19:24,844 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:19:24,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:19:24,851 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.2))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:19:24,853 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:19:24,920 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:19:24,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:19:24,925 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:19:24,925 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:19:24,925 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1609611096] [2022-02-14 21:19:24,925 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1609611096] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:19:24,925 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [372080958] [2022-02-14 21:19:24,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:19:24,925 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:19:24,925 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:19:24,926 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:19:24,927 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-02-14 21:19:24,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:19:24,954 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 6 conjunts are in the unsatisfiable core [2022-02-14 21:19:24,955 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:19:25,051 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:19:25,052 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:19:27,668 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:19:27,669 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [372080958] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:19:27,669 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:19:27,669 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 14 [2022-02-14 21:19:27,669 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61687262] [2022-02-14 21:19:27,669 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:19:27,669 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-02-14 21:19:27,669 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:19:27,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-02-14 21:19:27,670 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=142, Unknown=1, NotChecked=0, Total=182 [2022-02-14 21:19:27,670 INFO L87 Difference]: Start difference. First operand 34 states and 50 transitions. Second operand has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:19:27,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:19:27,838 INFO L93 Difference]: Finished difference Result 53 states and 77 transitions. [2022-02-14 21:19:27,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-02-14 21:19:27,839 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-02-14 21:19:27,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:19:27,839 INFO L225 Difference]: With dead ends: 53 [2022-02-14 21:19:27,839 INFO L226 Difference]: Without dead ends: 49 [2022-02-14 21:19:27,840 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 30 SyntacticMatches, 6 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=102, Invalid=359, Unknown=1, NotChecked=0, Total=462 [2022-02-14 21:19:27,840 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 45 mSDsluCounter, 45 mSDsCounter, 0 mSdLazyCounter, 53 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 58 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 53 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 21 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:19:27,841 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [45 Valid, 58 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 53 Invalid, 0 Unknown, 21 Unchecked, 0.1s Time] [2022-02-14 21:19:27,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-02-14 21:19:27,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 36. [2022-02-14 21:19:27,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 31 states have (on average 1.6129032258064515) internal successors, (50), 31 states have internal predecessors, (50), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:19:27,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 54 transitions. [2022-02-14 21:19:27,844 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 54 transitions. Word has length 18 [2022-02-14 21:19:27,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:19:27,844 INFO L470 AbstractCegarLoop]: Abstraction has 36 states and 54 transitions. [2022-02-14 21:19:27,844 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 2.0) internal successors, (28), 11 states have internal predecessors, (28), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:19:27,845 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 54 transitions. [2022-02-14 21:19:27,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-02-14 21:19:27,845 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:19:27,845 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:19:27,861 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2022-02-14 21:19:28,047 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:19:28,048 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:19:28,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:19:28,048 INFO L85 PathProgramCache]: Analyzing trace with hash -211948756, now seen corresponding path program 1 times [2022-02-14 21:19:28,048 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:19:28,048 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742049034] [2022-02-14 21:19:28,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:19:28,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:19:28,052 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:19:28,054 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-02-14 21:19:28,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:19:28,067 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:19:28,072 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-02-14 21:19:28,180 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:19:28,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:19:28,185 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:19:28,185 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:19:28,185 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742049034] [2022-02-14 21:19:28,185 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [742049034] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:19:28,185 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [320396620] [2022-02-14 21:19:28,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:19:28,185 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:19:28,185 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:19:28,192 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:19:28,193 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-02-14 21:19:28,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:19:28,222 INFO L263 TraceCheckSpWp]: Trace formula consists of 63 conjuncts, 11 conjunts are in the unsatisfiable core [2022-02-14 21:19:28,224 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:19:28,326 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:19:28,326 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:19:37,224 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-02-14 21:19:37,224 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [320396620] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:19:37,224 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:19:37,224 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 8] total 15 [2022-02-14 21:19:37,224 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189422217] [2022-02-14 21:19:37,225 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:19:37,225 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-02-14 21:19:37,225 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:19:37,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-02-14 21:19:37,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=162, Unknown=3, NotChecked=0, Total=210 [2022-02-14 21:19:37,225 INFO L87 Difference]: Start difference. First operand 36 states and 54 transitions. Second operand has 15 states, 15 states have (on average 2.1333333333333333) internal successors, (32), 12 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:20:05,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:20:05,965 INFO L93 Difference]: Finished difference Result 58 states and 86 transitions. [2022-02-14 21:20:05,965 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-02-14 21:20:05,965 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.1333333333333333) internal successors, (32), 12 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 18 [2022-02-14 21:20:05,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:20:05,966 INFO L225 Difference]: With dead ends: 58 [2022-02-14 21:20:05,966 INFO L226 Difference]: Without dead ends: 54 [2022-02-14 21:20:05,966 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 29 SyntacticMatches, 6 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 36.3s TimeCoverageRelationStatistics Valid=123, Invalid=464, Unknown=13, NotChecked=0, Total=600 [2022-02-14 21:20:05,967 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 35 mSDsluCounter, 54 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 67 SdHoareTripleChecker+Invalid, 117 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 52 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:20:05,967 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 67 Invalid, 117 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 52 Invalid, 0 Unknown, 52 Unchecked, 0.1s Time] [2022-02-14 21:20:05,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2022-02-14 21:20:05,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 40. [2022-02-14 21:20:05,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.6285714285714286) internal successors, (57), 35 states have internal predecessors, (57), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:20:05,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 61 transitions. [2022-02-14 21:20:05,971 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 61 transitions. Word has length 18 [2022-02-14 21:20:05,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:20:05,971 INFO L470 AbstractCegarLoop]: Abstraction has 40 states and 61 transitions. [2022-02-14 21:20:05,971 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.1333333333333333) internal successors, (32), 12 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:20:05,971 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 61 transitions. [2022-02-14 21:20:05,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-02-14 21:20:05,972 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:20:05,972 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:20:05,992 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-02-14 21:20:06,187 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-02-14 21:20:06,188 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:20:06,188 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:20:06,188 INFO L85 PathProgramCache]: Analyzing trace with hash 2126008490, now seen corresponding path program 2 times [2022-02-14 21:20:06,188 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:20:06,188 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690963051] [2022-02-14 21:20:06,188 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:20:06,188 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:20:06,192 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:20:06,194 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:20:06,194 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_12 .cse0 (* (- 4294967296) (div (+ main_~z~0_12 .cse0) 4294967296)))) 0)) [2022-02-14 21:20:06,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:20:06,206 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:20:06,207 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:20:06,209 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.5))) (+ main_~z~0_12 .cse0 (* (- 4294967296) (div (+ main_~z~0_12 .cse0) 4294967296)))) 0)) [2022-02-14 21:20:06,324 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:20:06,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:20:06,328 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:20:06,328 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:20:06,328 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690963051] [2022-02-14 21:20:06,328 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1690963051] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:20:06,328 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2104738561] [2022-02-14 21:20:06,328 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-02-14 21:20:06,328 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:20:06,329 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:20:06,332 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:20:06,336 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-02-14 21:20:06,368 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-02-14 21:20:06,368 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-02-14 21:20:06,368 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-02-14 21:20:06,369 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:20:06,525 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:20:06,525 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:20:15,214 WARN L838 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_42_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_42_31) (<= aux_mod_v_main_~y~0_42_31 0) (let ((.cse0 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (not .cse0) (and (or (< 0 (mod (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_42_31 c_main_~z~0) 4294967296)) (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31) c_main_~y~0)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 1) c_main_~y~0) (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5)))))) (forall ((aux_mod_v_main_~y~0_43_70 Int) (aux_div_v_main_~y~0_43_70 Int) (aux_div_v_main_~y~0_42_31 Int)) (let ((.cse1 (+ aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296)))) (or (<= 4294967296 aux_mod_v_main_~y~0_43_70) (<= aux_mod_v_main_~y~0_43_70 0) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* 4294967295 c_main_~y~0) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 c_main_~z~0 1) (+ aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_43_70 (* v_it_5 4294967295)) 4294967296))))) (<= .cse1 (+ (* 4294967295 c_main_~y~0) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 c_main_~z~0)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296) 1) (+ (* 4294967296 c_main_~y~0) c_main_~z~0)) (<= 1 v_it_5))) (<= (+ (* 4294967296 c_main_~y~0) c_main_~z~0) .cse1)))))) (or .cse0 (forall ((aux_div_v_main_~y~0_42_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31) c_main_~y~0)))))))) is different from false [2022-02-14 21:20:36,466 WARN L838 $PredicateComparison]: unable to prove that (forall ((v_main_~y~0_44 Int) (aux_mod_v_main_~y~0_42_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_42_31) (<= aux_mod_v_main_~y~0_42_31 0) (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_44) (<= 1 v_it_4))) (not .cse0) (not (< c_main_~y~0 v_main_~y~0_44))) (or .cse0 (not (= v_main_~y~0_44 c_main_~y~0))))) (let ((.cse1 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (not (= v_main_~y~0_44 (+ (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31)))) .cse1) (or (not .cse1) (and (forall ((aux_mod_v_main_~y~0_43_70 Int) (aux_div_v_main_~y~0_43_70 Int) (aux_div_v_main_~y~0_42_31 Int)) (let ((.cse2 (+ aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296)))) (or (<= 4294967296 aux_mod_v_main_~y~0_43_70) (<= .cse2 (+ (* v_main_~y~0_44 4294967295) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 c_main_~z~0)) (<= aux_mod_v_main_~y~0_43_70 0) (<= (+ (* v_main_~y~0_44 4294967296) c_main_~z~0) .cse2) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296) 1) (+ (* v_main_~y~0_44 4294967296) c_main_~z~0)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_43_70 (* v_it_5 4294967295)) 4294967296))) (<= (+ v_it_5 (* v_main_~y~0_44 4294967295) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 c_main_~z~0 1) (+ aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296)))))))) (or (< 0 (mod (+ (* v_main_~y~0_44 4294967295) aux_mod_v_main_~y~0_42_31 c_main_~z~0) 4294967296)) (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31) v_main_~y~0_44)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 1) v_main_~y~0_44) (<= 1 v_it_5)))))))))))) is different from false [2022-02-14 21:20:56,340 WARN L838 $PredicateComparison]: unable to prove that (forall ((v_main_~y~0_44 Int) (aux_mod_main_~y~0_26 Int) (aux_mod_v_main_~y~0_42_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_42_31) (< aux_mod_main_~y~0_26 0) (<= aux_mod_v_main_~y~0_42_31 0) (< 0 aux_mod_main_~y~0_26) (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not .cse0) (forall ((aux_div_main_~y~0_26 Int)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_main_~y~0_26 v_it_4 (* 4294967296 aux_div_main_~y~0_26) 1) v_main_~y~0_44))) (not (< (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) v_main_~y~0_44))))) (or .cse0 (forall ((aux_div_main_~y~0_26 Int)) (not (= v_main_~y~0_44 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (let ((.cse1 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (not (= v_main_~y~0_44 (+ (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31)))) .cse1) (or (not .cse1) (and (forall ((aux_mod_v_main_~y~0_43_70 Int) (aux_div_v_main_~y~0_43_70 Int) (aux_div_v_main_~y~0_42_31 Int)) (let ((.cse2 (+ aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296)))) (or (<= 4294967296 aux_mod_v_main_~y~0_43_70) (<= .cse2 (+ (* v_main_~y~0_44 4294967295) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 c_main_~z~0)) (<= aux_mod_v_main_~y~0_43_70 0) (<= (+ (* v_main_~y~0_44 4294967296) c_main_~z~0) .cse2) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296) 1) (+ (* v_main_~y~0_44 4294967296) c_main_~z~0)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_43_70 (* v_it_5 4294967295)) 4294967296))) (<= (+ v_it_5 (* v_main_~y~0_44 4294967295) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 c_main_~z~0 1) (+ aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296)))))))) (or (< 0 (mod (+ (* v_main_~y~0_44 4294967295) aux_mod_v_main_~y~0_42_31 c_main_~z~0) 4294967296)) (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31) v_main_~y~0_44)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 1) v_main_~y~0_44) (<= 1 v_it_5)))))))))))) is different from false [2022-02-14 21:20:58,358 WARN L860 $PredicateComparison]: unable to prove that (forall ((v_main_~y~0_44 Int) (aux_mod_main_~y~0_26 Int) (aux_mod_v_main_~y~0_42_31 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_42_31) (< aux_mod_main_~y~0_26 0) (<= aux_mod_v_main_~y~0_42_31 0) (< 0 aux_mod_main_~y~0_26) (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not .cse0) (forall ((aux_div_main_~y~0_26 Int)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ aux_mod_main_~y~0_26 v_it_4 (* 4294967296 aux_div_main_~y~0_26) 1) v_main_~y~0_44))) (not (< (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)) v_main_~y~0_44))))) (or .cse0 (forall ((aux_div_main_~y~0_26 Int)) (not (= v_main_~y~0_44 (+ aux_mod_main_~y~0_26 (* 4294967296 aux_div_main_~y~0_26)))))))) (let ((.cse1 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_42_31 Int)) (not (= v_main_~y~0_44 (+ (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31)))) .cse1) (or (not .cse1) (and (forall ((aux_mod_v_main_~y~0_43_70 Int) (aux_div_v_main_~y~0_43_70 Int) (aux_div_v_main_~y~0_42_31 Int)) (let ((.cse2 (+ aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296)))) (or (<= 4294967296 aux_mod_v_main_~y~0_43_70) (<= .cse2 (+ (* v_main_~y~0_44 4294967295) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 c_main_~z~0)) (<= aux_mod_v_main_~y~0_43_70 0) (<= (+ (* v_main_~y~0_44 4294967296) c_main_~z~0) .cse2) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296) 1) (+ (* v_main_~y~0_44 4294967296) c_main_~z~0)))) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_43_70 (* v_it_5 4294967295)) 4294967296))) (<= (+ v_it_5 (* v_main_~y~0_44 4294967295) (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 c_main_~z~0 1) (+ aux_mod_v_main_~y~0_43_70 (* aux_div_v_main_~y~0_43_70 4294967296)))))))) (or (< 0 (mod (+ (* v_main_~y~0_44 4294967295) aux_mod_v_main_~y~0_42_31 c_main_~z~0) 4294967296)) (forall ((aux_div_v_main_~y~0_42_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31) v_main_~y~0_44)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 (* aux_div_v_main_~y~0_42_31 4294967296) aux_mod_v_main_~y~0_42_31 1) v_main_~y~0_44) (<= 1 v_it_5)))))))))))) is different from true [2022-02-14 21:20:58,701 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-02-14 21:20:58,701 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2104738561] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:20:58,701 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:20:58,701 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10] total 21 [2022-02-14 21:20:58,701 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203196601] [2022-02-14 21:20:58,701 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:20:58,702 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-02-14 21:20:58,702 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:20:58,702 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-02-14 21:20:58,702 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=240, Unknown=7, NotChecked=102, Total=420 [2022-02-14 21:20:58,703 INFO L87 Difference]: Start difference. First operand 40 states and 61 transitions. Second operand has 21 states, 21 states have (on average 1.619047619047619) internal successors, (34), 18 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:20:59,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:20:59,135 INFO L93 Difference]: Finished difference Result 57 states and 82 transitions. [2022-02-14 21:20:59,135 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-02-14 21:20:59,135 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 1.619047619047619) internal successors, (34), 18 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-02-14 21:20:59,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:20:59,136 INFO L225 Difference]: With dead ends: 57 [2022-02-14 21:20:59,136 INFO L226 Difference]: Without dead ends: 47 [2022-02-14 21:20:59,136 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 28 SyntacticMatches, 10 SemanticMatches, 31 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 284 ImplicationChecksByTransitivity, 13.6s TimeCoverageRelationStatistics Valid=180, Invalid=695, Unknown=7, NotChecked=174, Total=1056 [2022-02-14 21:20:59,137 INFO L933 BasicCegarLoop]: 14 mSDtfsCounter, 38 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 94 SdHoareTripleChecker+Invalid, 221 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 79 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:20:59,137 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [38 Valid, 94 Invalid, 221 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 120 Invalid, 0 Unknown, 79 Unchecked, 0.1s Time] [2022-02-14 21:20:59,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-02-14 21:20:59,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 40. [2022-02-14 21:20:59,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.6) internal successors, (56), 35 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:20:59,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 60 transitions. [2022-02-14 21:20:59,140 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 60 transitions. Word has length 19 [2022-02-14 21:20:59,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:20:59,141 INFO L470 AbstractCegarLoop]: Abstraction has 40 states and 60 transitions. [2022-02-14 21:20:59,141 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 1.619047619047619) internal successors, (34), 18 states have internal predecessors, (34), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:20:59,141 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 60 transitions. [2022-02-14 21:20:59,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-02-14 21:20:59,141 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:20:59,141 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:20:59,164 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-02-14 21:20:59,355 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:20:59,355 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:20:59,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:20:59,356 INFO L85 PathProgramCache]: Analyzing trace with hash 318804101, now seen corresponding path program 3 times [2022-02-14 21:20:59,356 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:20:59,356 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1906050992] [2022-02-14 21:20:59,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:20:59,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:20:59,359 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.0))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:20:59,360 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_10 (* (- 4294967296) (div (+ .cse0 main_~x~0_10) 4294967296)))) 0)) [2022-02-14 21:20:59,361 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:20:59,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:20:59,374 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.3))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:20:59,376 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.4))) (+ .cse0 main_~x~0_10 (* (- 4294967296) (div (+ .cse0 main_~x~0_10) 4294967296)))) 0)) [2022-02-14 21:20:59,377 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.5))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:20:59,481 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:20:59,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:20:59,496 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:20:59,496 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:20:59,496 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1906050992] [2022-02-14 21:20:59,496 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1906050992] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:20:59,496 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [642820611] [2022-02-14 21:20:59,496 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-02-14 21:20:59,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:20:59,497 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:20:59,498 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:20:59,532 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-02-14 21:20:59,541 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-02-14 21:20:59,541 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-02-14 21:20:59,541 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 9 conjunts are in the unsatisfiable core [2022-02-14 21:20:59,543 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:20:59,722 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:20:59,722 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:21:07,467 WARN L838 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_48_31 Int) (v_main_~y~0_49 Int)) (or (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (let ((.cse0 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (not .cse0) (forall ((aux_div_v_main_~y~0_48_31 Int)) (or (not (< (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) v_main_~y~0_49)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296) 1) v_main_~y~0_49) (<= 1 v_it_5)))))) (or (forall ((aux_div_v_main_~y~0_48_31 Int)) (not (= v_main_~y~0_49 (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) .cse0))) (let ((.cse1 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not .cse1) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4) (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_49))) (not (< c_main_~y~0 v_main_~y~0_49))) (or .cse1 (not (= v_main_~y~0_49 c_main_~y~0))))))) is different from false [2022-02-14 21:22:11,075 WARN L838 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_48_31 Int) (v_main_~y~0_49 Int)) (or (let ((.cse1 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (forall ((aux_div_main_~y~0_26 Int)) (let ((.cse0 (* 4294967296 aux_div_main_~y~0_26))) (or (< .cse0 v_main_~y~0_49) (< v_main_~y~0_49 .cse0)))) .cse1) (or (and (forall ((aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int)) (let ((.cse2 (* aux_div_aux_mod_main_~y~0_26_81 4294967296))) (let ((.cse4 (+ .cse2 aux_mod_aux_mod_main_~y~0_26_81)) (.cse3 (+ (* v_main_~y~0_49 4294967295) c_main_~x~0))) (or (< 0 aux_mod_aux_mod_main_~y~0_26_81) (<= (+ (* v_main_~y~0_49 4294967296) c_main_~x~0) (+ .cse2 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_49 4294967296) c_main_~x~0)) (<= 1 v_it_4))) (< .cse3 .cse4) (< aux_mod_aux_mod_main_~y~0_26_81 0) (< .cse4 .cse3))))) (forall ((v_main_~y~0_50 Int) (aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int)) (let ((.cse5 (* aux_div_aux_mod_main_~y~0_26_81 4294967296))) (let ((.cse7 (+ (* v_main_~y~0_50 4294967295) c_main_~x~0)) (.cse6 (+ .cse5 aux_mod_aux_mod_main_~y~0_26_81))) (or (<= (+ (* v_main_~y~0_50 4294967296) c_main_~x~0) (+ .cse5 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (<= v_main_~y~0_49 v_main_~y~0_50) (< .cse6 .cse7) (<= 4294967296 aux_mod_aux_mod_main_~y~0_26_81) (< .cse7 .cse6) (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_50 v_it_4 1) v_main_~y~0_49) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_aux_mod_main_~y~0_26_81) 4294967296))))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_50 4294967296) c_main_~x~0)) (<= 1 v_it_4))) (<= aux_mod_aux_mod_main_~y~0_26_81 0)))))) (not .cse1)))) (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (let ((.cse8 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (not .cse8) (forall ((aux_div_v_main_~y~0_48_31 Int)) (or (not (< (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) v_main_~y~0_49)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296) 1) v_main_~y~0_49) (<= 1 v_it_5)))))) (or (forall ((aux_div_v_main_~y~0_48_31 Int)) (not (= v_main_~y~0_49 (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) .cse8))))) is different from false [2022-02-14 21:22:13,097 WARN L860 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_48_31 Int) (v_main_~y~0_49 Int)) (or (let ((.cse1 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (forall ((aux_div_main_~y~0_26 Int)) (let ((.cse0 (* 4294967296 aux_div_main_~y~0_26))) (or (< .cse0 v_main_~y~0_49) (< v_main_~y~0_49 .cse0)))) .cse1) (or (and (forall ((aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int)) (let ((.cse2 (* aux_div_aux_mod_main_~y~0_26_81 4294967296))) (let ((.cse4 (+ .cse2 aux_mod_aux_mod_main_~y~0_26_81)) (.cse3 (+ (* v_main_~y~0_49 4294967295) c_main_~x~0))) (or (< 0 aux_mod_aux_mod_main_~y~0_26_81) (<= (+ (* v_main_~y~0_49 4294967296) c_main_~x~0) (+ .cse2 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_49 4294967296) c_main_~x~0)) (<= 1 v_it_4))) (< .cse3 .cse4) (< aux_mod_aux_mod_main_~y~0_26_81 0) (< .cse4 .cse3))))) (forall ((v_main_~y~0_50 Int) (aux_div_main_~y~0_26 Int) (aux_mod_aux_mod_main_~y~0_26_81 Int) (aux_div_aux_mod_main_~y~0_26_81 Int)) (let ((.cse5 (* aux_div_aux_mod_main_~y~0_26_81 4294967296))) (let ((.cse7 (+ (* v_main_~y~0_50 4294967295) c_main_~x~0)) (.cse6 (+ .cse5 aux_mod_aux_mod_main_~y~0_26_81))) (or (<= (+ (* v_main_~y~0_50 4294967296) c_main_~x~0) (+ .cse5 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26))) (<= v_main_~y~0_49 v_main_~y~0_50) (< .cse6 .cse7) (<= 4294967296 aux_mod_aux_mod_main_~y~0_26_81) (< .cse7 .cse6) (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_50 v_it_4 1) v_main_~y~0_49) (<= 1 v_it_4) (not (< 0 (mod (+ (* v_it_4 4294967295) aux_mod_aux_mod_main_~y~0_26_81) 4294967296))))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ (* aux_div_aux_mod_main_~y~0_26_81 4294967296) v_it_4 aux_mod_aux_mod_main_~y~0_26_81 (* 4294967296 aux_div_main_~y~0_26) 1) (+ (* v_main_~y~0_50 4294967296) c_main_~x~0)) (<= 1 v_it_4))) (<= aux_mod_aux_mod_main_~y~0_26_81 0)))))) (not .cse1)))) (<= 4294967296 aux_mod_v_main_~y~0_48_31) (<= aux_mod_v_main_~y~0_48_31 0) (let ((.cse8 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (not .cse8) (forall ((aux_div_v_main_~y~0_48_31 Int)) (or (not (< (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296)) v_main_~y~0_49)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296) 1) v_main_~y~0_49) (<= 1 v_it_5)))))) (or (forall ((aux_div_v_main_~y~0_48_31 Int)) (not (= v_main_~y~0_49 (+ aux_mod_v_main_~y~0_48_31 (* aux_div_v_main_~y~0_48_31 4294967296))))) .cse8))))) is different from true [2022-02-14 21:22:45,494 WARN L228 SmtUtils]: Spent 6.09s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:22:45,504 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 1 times theorem prover too weak. 0 trivial. 2 not checked. [2022-02-14 21:22:45,505 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [642820611] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:22:45,505 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:22:45,505 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 11] total 23 [2022-02-14 21:22:45,505 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [727776891] [2022-02-14 21:22:45,505 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:22:45,505 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-02-14 21:22:45,505 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:22:45,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-02-14 21:22:45,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=315, Unknown=25, NotChecked=78, Total=506 [2022-02-14 21:22:45,506 INFO L87 Difference]: Start difference. First operand 40 states and 60 transitions. Second operand has 23 states, 23 states have (on average 1.565217391304348) internal successors, (36), 20 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:22:54,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:22:54,736 INFO L93 Difference]: Finished difference Result 52 states and 75 transitions. [2022-02-14 21:22:54,736 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-02-14 21:22:54,737 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 1.565217391304348) internal successors, (36), 20 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-02-14 21:22:54,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:22:54,737 INFO L225 Difference]: With dead ends: 52 [2022-02-14 21:22:54,737 INFO L226 Difference]: Without dead ends: 48 [2022-02-14 21:22:54,738 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 26 SyntacticMatches, 9 SemanticMatches, 31 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 274 ImplicationChecksByTransitivity, 73.2s TimeCoverageRelationStatistics Valid=186, Invalid=726, Unknown=26, NotChecked=118, Total=1056 [2022-02-14 21:22:54,738 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 37 mSDsluCounter, 63 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 198 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 106 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:22:54,738 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 76 Invalid, 198 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 80 Invalid, 0 Unknown, 106 Unchecked, 0.1s Time] [2022-02-14 21:22:54,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-02-14 21:22:54,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 40. [2022-02-14 21:22:54,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 35 states have (on average 1.6) internal successors, (56), 35 states have internal predecessors, (56), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:22:54,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 60 transitions. [2022-02-14 21:22:54,743 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 60 transitions. Word has length 19 [2022-02-14 21:22:54,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:22:54,743 INFO L470 AbstractCegarLoop]: Abstraction has 40 states and 60 transitions. [2022-02-14 21:22:54,743 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 1.565217391304348) internal successors, (36), 20 states have internal predecessors, (36), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:22:54,743 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 60 transitions. [2022-02-14 21:22:54,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-02-14 21:22:54,744 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:22:54,744 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:22:54,760 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-02-14 21:22:54,947 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-02-14 21:22:54,948 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:22:54,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:22:54,948 INFO L85 PathProgramCache]: Analyzing trace with hash 569378245, now seen corresponding path program 2 times [2022-02-14 21:22:54,948 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:22:54,948 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128746233] [2022-02-14 21:22:54,948 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:22:54,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:22:54,952 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:22:54,953 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.1))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-02-14 21:22:54,953 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_12 .cse0 (* (- 4294967296) (div (+ main_~z~0_12 .cse0) 4294967296)))) 0)) [2022-02-14 21:22:54,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:22:54,965 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:22:54,968 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.4))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-02-14 21:22:54,970 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.5))) (+ main_~z~0_12 .cse0 (* (- 4294967296) (div (+ main_~z~0_12 .cse0) 4294967296)))) 0)) [2022-02-14 21:22:55,076 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:22:55,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:22:55,083 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-02-14 21:22:55,084 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:22:55,084 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128746233] [2022-02-14 21:22:55,084 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1128746233] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:22:55,084 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1082366702] [2022-02-14 21:22:55,084 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-02-14 21:22:55,084 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:22:55,084 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:22:55,085 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:22:55,086 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-02-14 21:22:55,114 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-02-14 21:22:55,114 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-02-14 21:22:55,114 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 11 conjunts are in the unsatisfiable core [2022-02-14 21:22:55,120 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:22:55,185 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-02-14 21:22:55,185 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:24:11,005 WARN L838 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_54_31 Int)) (or (= aux_mod_v_main_~y~0_54_31 0) (> 0 aux_mod_v_main_~y~0_54_31) (>= aux_mod_v_main_~y~0_54_31 4294967296) (let ((.cse1 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (and (or (< 0 (mod (+ (* 4294967295 aux_mod_v_main_~y~0_54_31) c_main_~y~0 c_main_~z~0) 4294967296)) (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3) (<= (+ v_it_3 aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1) c_main_~y~0))) (not (< (+ aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296)) c_main_~y~0))))) (forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_v_main_~z~0_45_31 Int)) (or (<= 4294967296 aux_mod_v_main_~z~0_45_31) (<= aux_mod_v_main_~z~0_45_31 0) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (<= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) c_main_~z~0) (and (or (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~z~0_45_31 (* v_it_5 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~z~0_45_31 v_it_5 aux_mod_v_main_~y~0_54_31 (* 4294967296 aux_div_v_main_~z~0_45_31) (* aux_div_v_main_~y~0_54_31 4294967296) 1) (+ c_main_~y~0 c_main_~z~0)) (<= 1 v_it_5))) (not (< (+ aux_mod_v_main_~z~0_45_31 aux_mod_v_main_~y~0_54_31 (* 4294967296 aux_div_v_main_~z~0_45_31) (* aux_div_v_main_~y~0_54_31 4294967296)) (+ c_main_~y~0 c_main_~z~0))))) (< 0 (mod (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_mod_v_main_~z~0_45_31 2) (* 4294967295 c_main_~z~0)) 4294967296))) (forall ((aux_div_v_main_~y~0_55_70 Int) (aux_mod_v_main_~y~0_55_70 Int) (aux_div_v_main_~y~0_54_31 Int)) (let ((.cse0 (* aux_div_v_main_~y~0_55_70 4294967296))) (or (<= aux_mod_v_main_~y~0_55_70 0) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1 (* 4294967295 c_main_~z~0)) (+ (* aux_div_v_main_~y~0_55_70 4294967296) (* 18446744065119617024 aux_div_v_main_~z~0_45_31) aux_mod_v_main_~y~0_55_70 (* aux_mod_v_main_~z~0_45_31 4294967294))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_55_70 (* v_it_5 4294967295)) 4294967296))))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~z~0_45_31 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_55_70 4294967296) v_it_5 (* 18446744069414584320 aux_div_v_main_~z~0_45_31) (* aux_mod_v_main_~z~0_45_31 4294967295) aux_mod_v_main_~y~0_55_70 1) (+ (* 4294967296 c_main_~z~0) (* 4294967296 c_main_~y~0))))) (<= (+ (* 4294967296 c_main_~z~0) (* 4294967296 c_main_~y~0)) (+ .cse0 (* 18446744069414584320 aux_div_v_main_~z~0_45_31) (* aux_mod_v_main_~z~0_45_31 4294967295) aux_mod_v_main_~y~0_55_70)) (<= 4294967296 aux_mod_v_main_~y~0_55_70) (<= (+ .cse0 (* 18446744065119617024 aux_div_v_main_~z~0_45_31) aux_mod_v_main_~y~0_55_70 (* aux_mod_v_main_~z~0_45_31 4294967294)) (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) (* 4294967295 c_main_~z~0)))))))))) (not .cse1)) (or .cse1 (not (< 0 (mod c_main_~z~0 4294967296))) (and (forall ((aux_div_v_main_~y~0_55_70 Int) (aux_mod_v_main_~y~0_55_70 Int) (aux_div_v_main_~y~0_54_31 Int)) (let ((.cse2 (+ (* aux_div_v_main_~y~0_55_70 4294967296) aux_mod_v_main_~y~0_55_70))) (or (<= (+ (* 4294967296 c_main_~y~0) c_main_~z~0) .cse2) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 c_main_~z~0 (* aux_div_v_main_~y~0_54_31 4294967296) 1) (+ (* aux_div_v_main_~y~0_55_70 4294967296) aux_mod_v_main_~y~0_55_70)) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_55_70 (* v_it_5 4294967295)) 4294967296))))) (exists ((v_it_5 Int)) (and (<= (+ (* aux_div_v_main_~y~0_55_70 4294967296) v_it_5 aux_mod_v_main_~y~0_55_70 1) (+ (* 4294967296 c_main_~y~0) c_main_~z~0)) (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5))) (<= .cse2 (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 c_main_~z~0 (* aux_div_v_main_~y~0_54_31 4294967296))) (<= aux_mod_v_main_~y~0_55_70 0) (<= 4294967296 aux_mod_v_main_~y~0_55_70)))) (or (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1) c_main_~y~0) (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5))) (not (< (+ aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296)) c_main_~y~0)))) (< 0 (mod (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 c_main_~z~0) 4294967296))))))))) is different from false [2022-02-14 21:24:43,355 WARN L860 $PredicateComparison]: unable to prove that (or (not (< 0 (mod c_main_~y~0 4294967296))) (< 0 (mod c_main_~z~0 4294967296)) (forall ((aux_mod_v_main_~y~0_54_31 Int)) (or (and (or (< 0 (mod (+ (* 4294967295 aux_mod_v_main_~y~0_54_31) c_main_~y~0 c_main_~z~0) 4294967296)) (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3) (<= (+ v_it_3 aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1) c_main_~y~0))) (not (< (+ aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296)) c_main_~y~0))))) (forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_v_main_~z~0_45_31 Int)) (or (<= 4294967296 aux_mod_v_main_~z~0_45_31) (<= aux_mod_v_main_~z~0_45_31 0) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (<= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) c_main_~z~0) (and (or (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~z~0_45_31 (* v_it_5 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~z~0_45_31 v_it_5 aux_mod_v_main_~y~0_54_31 (* 4294967296 aux_div_v_main_~z~0_45_31) (* aux_div_v_main_~y~0_54_31 4294967296) 1) (+ c_main_~y~0 c_main_~z~0)) (<= 1 v_it_5))) (not (< (+ aux_mod_v_main_~z~0_45_31 aux_mod_v_main_~y~0_54_31 (* 4294967296 aux_div_v_main_~z~0_45_31) (* aux_div_v_main_~y~0_54_31 4294967296)) (+ c_main_~y~0 c_main_~z~0))))) (< 0 (mod (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_mod_v_main_~z~0_45_31 2) (* 4294967295 c_main_~z~0)) 4294967296))) (forall ((aux_div_v_main_~y~0_55_70 Int) (aux_mod_v_main_~y~0_55_70 Int) (aux_div_v_main_~y~0_54_31 Int)) (let ((.cse0 (* aux_div_v_main_~y~0_55_70 4294967296))) (or (<= aux_mod_v_main_~y~0_55_70 0) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1 (* 4294967295 c_main_~z~0)) (+ (* aux_div_v_main_~y~0_55_70 4294967296) (* 18446744065119617024 aux_div_v_main_~z~0_45_31) aux_mod_v_main_~y~0_55_70 (* aux_mod_v_main_~z~0_45_31 4294967294))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_55_70 (* v_it_5 4294967295)) 4294967296))))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~z~0_45_31 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_55_70 4294967296) v_it_5 (* 18446744069414584320 aux_div_v_main_~z~0_45_31) (* aux_mod_v_main_~z~0_45_31 4294967295) aux_mod_v_main_~y~0_55_70 1) (+ (* 4294967296 c_main_~z~0) (* 4294967296 c_main_~y~0))))) (<= (+ (* 4294967296 c_main_~z~0) (* 4294967296 c_main_~y~0)) (+ .cse0 (* 18446744069414584320 aux_div_v_main_~z~0_45_31) (* aux_mod_v_main_~z~0_45_31 4294967295) aux_mod_v_main_~y~0_55_70)) (<= 4294967296 aux_mod_v_main_~y~0_55_70) (<= (+ .cse0 (* 18446744065119617024 aux_div_v_main_~z~0_45_31) aux_mod_v_main_~y~0_55_70 (* aux_mod_v_main_~z~0_45_31 4294967294)) (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) (* 4294967295 c_main_~z~0)))))))))) (= aux_mod_v_main_~y~0_54_31 0) (> 0 aux_mod_v_main_~y~0_54_31) (>= aux_mod_v_main_~y~0_54_31 4294967296)))) is different from true [2022-02-14 21:24:43,370 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 1 times theorem prover too weak. 0 trivial. 1 not checked. [2022-02-14 21:24:43,370 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1082366702] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:24:43,370 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:24:43,370 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 9] total 15 [2022-02-14 21:24:43,370 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508700683] [2022-02-14 21:24:43,370 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:24:43,370 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-02-14 21:24:43,371 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:24:43,371 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-02-14 21:24:43,371 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=118, Unknown=9, NotChecked=46, Total=210 [2022-02-14 21:24:43,371 INFO L87 Difference]: Start difference. First operand 40 states and 60 transitions. Second operand has 15 states, 15 states have (on average 2.0) internal successors, (30), 12 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:25:06,187 WARN L228 SmtUtils]: Spent 14.20s on a formula simplification that was a NOOP. DAG size: 122 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:25:08,208 WARN L838 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (forall ((aux_mod_v_main_~y~0_54_31 Int)) (or (= aux_mod_v_main_~y~0_54_31 0) (> 0 aux_mod_v_main_~y~0_54_31) (>= aux_mod_v_main_~y~0_54_31 4294967296) (let ((.cse1 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (and (or (< 0 (mod (+ (* 4294967295 aux_mod_v_main_~y~0_54_31) c_main_~y~0 c_main_~z~0) 4294967296)) (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3) (<= (+ v_it_3 aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1) c_main_~y~0))) (not (< (+ aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296)) c_main_~y~0))))) (forall ((aux_mod_v_main_~z~0_45_31 Int) (aux_div_v_main_~z~0_45_31 Int)) (or (<= 4294967296 aux_mod_v_main_~z~0_45_31) (<= aux_mod_v_main_~z~0_45_31 0) (exists ((v_it_3 Int)) (and (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31))) (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= 1 v_it_3))) (<= (+ aux_mod_v_main_~z~0_45_31 (* 4294967296 aux_div_v_main_~z~0_45_31)) c_main_~z~0) (and (or (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~z~0_45_31 (* v_it_5 4294967295)) 4294967296))) (<= (+ aux_mod_v_main_~z~0_45_31 v_it_5 aux_mod_v_main_~y~0_54_31 (* 4294967296 aux_div_v_main_~z~0_45_31) (* aux_div_v_main_~y~0_54_31 4294967296) 1) (+ c_main_~y~0 c_main_~z~0)) (<= 1 v_it_5))) (not (< (+ aux_mod_v_main_~z~0_45_31 aux_mod_v_main_~y~0_54_31 (* 4294967296 aux_div_v_main_~z~0_45_31) (* aux_div_v_main_~y~0_54_31 4294967296)) (+ c_main_~y~0 c_main_~z~0))))) (< 0 (mod (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_mod_v_main_~z~0_45_31 2) (* 4294967295 c_main_~z~0)) 4294967296))) (forall ((aux_div_v_main_~y~0_55_70 Int) (aux_mod_v_main_~y~0_55_70 Int) (aux_div_v_main_~y~0_54_31 Int)) (let ((.cse0 (* aux_div_v_main_~y~0_55_70 4294967296))) (or (<= aux_mod_v_main_~y~0_55_70 0) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1 (* 4294967295 c_main_~z~0)) (+ (* aux_div_v_main_~y~0_55_70 4294967296) (* 18446744065119617024 aux_div_v_main_~z~0_45_31) aux_mod_v_main_~y~0_55_70 (* aux_mod_v_main_~z~0_45_31 4294967294))) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_55_70 (* v_it_5 4294967295)) 4294967296))))) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ aux_mod_v_main_~z~0_45_31 (* v_it_5 4294967295)) 4294967296))) (<= 1 v_it_5) (<= (+ (* aux_div_v_main_~y~0_55_70 4294967296) v_it_5 (* 18446744069414584320 aux_div_v_main_~z~0_45_31) (* aux_mod_v_main_~z~0_45_31 4294967295) aux_mod_v_main_~y~0_55_70 1) (+ (* 4294967296 c_main_~z~0) (* 4294967296 c_main_~y~0))))) (<= (+ (* 4294967296 c_main_~z~0) (* 4294967296 c_main_~y~0)) (+ .cse0 (* 18446744069414584320 aux_div_v_main_~z~0_45_31) (* aux_mod_v_main_~z~0_45_31 4294967295) aux_mod_v_main_~y~0_55_70)) (<= 4294967296 aux_mod_v_main_~y~0_55_70) (<= (+ .cse0 (* 18446744065119617024 aux_div_v_main_~z~0_45_31) aux_mod_v_main_~y~0_55_70 (* aux_mod_v_main_~z~0_45_31 4294967294)) (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) (* 4294967295 c_main_~z~0)))))))))) (not .cse1)) (or .cse1 (not (< 0 (mod c_main_~z~0 4294967296))) (and (forall ((aux_div_v_main_~y~0_55_70 Int) (aux_mod_v_main_~y~0_55_70 Int) (aux_div_v_main_~y~0_54_31 Int)) (let ((.cse2 (+ (* aux_div_v_main_~y~0_55_70 4294967296) aux_mod_v_main_~y~0_55_70))) (or (<= (+ (* 4294967296 c_main_~y~0) c_main_~z~0) .cse2) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 c_main_~z~0 (* aux_div_v_main_~y~0_54_31 4294967296) 1) (+ (* aux_div_v_main_~y~0_55_70 4294967296) aux_mod_v_main_~y~0_55_70)) (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~y~0_55_70 (* v_it_5 4294967295)) 4294967296))))) (exists ((v_it_5 Int)) (and (<= (+ (* aux_div_v_main_~y~0_55_70 4294967296) v_it_5 aux_mod_v_main_~y~0_55_70 1) (+ (* 4294967296 c_main_~y~0) c_main_~z~0)) (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5))) (<= .cse2 (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 c_main_~z~0 (* aux_div_v_main_~y~0_54_31 4294967296))) (<= aux_mod_v_main_~y~0_55_70 0) (<= 4294967296 aux_mod_v_main_~y~0_55_70)))) (or (forall ((aux_div_v_main_~y~0_54_31 Int)) (or (exists ((v_it_5 Int)) (and (<= (+ v_it_5 aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296) 1) c_main_~y~0) (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5))) (not (< (+ aux_mod_v_main_~y~0_54_31 (* aux_div_v_main_~y~0_54_31 4294967296)) c_main_~y~0)))) (< 0 (mod (+ (* 4294967295 c_main_~y~0) aux_mod_v_main_~y~0_54_31 c_main_~z~0) 4294967296))))))))) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-02-14 21:25:37,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:25:37,674 INFO L93 Difference]: Finished difference Result 54 states and 77 transitions. [2022-02-14 21:25:37,674 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-02-14 21:25:37,674 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 2.0) internal successors, (30), 12 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-02-14 21:25:37,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:25:37,675 INFO L225 Difference]: With dead ends: 54 [2022-02-14 21:25:37,675 INFO L226 Difference]: Without dead ends: 47 [2022-02-14 21:25:37,675 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 32 SyntacticMatches, 5 SemanticMatches, 21 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 80.4s TimeCoverageRelationStatistics Valid=85, Invalid=283, Unknown=24, NotChecked=114, Total=506 [2022-02-14 21:25:37,675 INFO L933 BasicCegarLoop]: 12 mSDtfsCounter, 31 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 46 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 54 SdHoareTripleChecker+Invalid, 130 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 46 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 74 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-02-14 21:25:37,676 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 54 Invalid, 130 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 46 Invalid, 0 Unknown, 74 Unchecked, 0.1s Time] [2022-02-14 21:25:37,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-02-14 21:25:37,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 41. [2022-02-14 21:25:37,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 36 states have (on average 1.5833333333333333) internal successors, (57), 36 states have internal predecessors, (57), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:25:37,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 61 transitions. [2022-02-14 21:25:37,678 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 61 transitions. Word has length 19 [2022-02-14 21:25:37,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:25:37,679 INFO L470 AbstractCegarLoop]: Abstraction has 41 states and 61 transitions. [2022-02-14 21:25:37,679 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 2.0) internal successors, (30), 12 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:25:37,679 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 61 transitions. [2022-02-14 21:25:37,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-02-14 21:25:37,679 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:25:37,679 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:25:37,697 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-02-14 21:25:37,887 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-02-14 21:25:37,888 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:25:37,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:25:37,888 INFO L85 PathProgramCache]: Analyzing trace with hash -1237826144, now seen corresponding path program 1 times [2022-02-14 21:25:37,888 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:25:37,888 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [752368258] [2022-02-14 21:25:37,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:25:37,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:25:37,892 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:25:37,893 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:25:37,893 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-02-14 21:25:37,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:25:37,904 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:25:37,907 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.4))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:25:37,909 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.5))) (+ main_~z~0_9 .cse0 (* (- 4294967296) (div (+ main_~z~0_9 .cse0) 4294967296)))) 0)) [2022-02-14 21:25:38,215 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:25:38,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:25:38,219 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:25:38,219 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:25:38,219 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [752368258] [2022-02-14 21:25:38,219 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [752368258] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:25:38,219 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1764417052] [2022-02-14 21:25:38,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:25:38,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:25:38,219 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:25:38,220 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:25:38,221 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-02-14 21:25:38,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:25:38,256 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 12 conjunts are in the unsatisfiable core [2022-02-14 21:25:38,257 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:25:38,585 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:25:38,585 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:25:40,968 WARN L838 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_60_31 Int)) (or (= aux_mod_v_main_~y~0_60_31 0) (let ((.cse0 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (not .cse0) (forall ((aux_div_v_main_~y~0_60_31 Int)) (or (not (< (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31) c_main_~y~0)) (exists ((v_it_5 Int)) (and (<= (+ v_it_5 (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31 1) c_main_~y~0) (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5)))))) (or .cse0 (forall ((aux_div_v_main_~y~0_60_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31) c_main_~y~0)))))) (>= aux_mod_v_main_~y~0_60_31 4294967296) (> 0 aux_mod_v_main_~y~0_60_31))) is different from false [2022-02-14 21:26:39,172 WARN L860 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_60_31 Int)) (or (= aux_mod_v_main_~y~0_60_31 0) (let ((.cse0 (< 0 (mod c_main_~y~0 4294967296)))) (and (or .cse0 (forall ((v_main_~y~0_61 Int)) (or (let ((.cse1 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_60_31 Int)) (not (= v_main_~y~0_61 (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)))) .cse1) (or (not .cse1) (forall ((aux_div_v_main_~y~0_60_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31 1) v_main_~y~0_61))) (not (< (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31) v_main_~y~0_61))))))) (let ((.cse2 (< 0 (mod c_main_~x~0 4294967296)))) (and (or .cse2 (not (= v_main_~y~0_61 c_main_~y~0))) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_61) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< c_main_~y~0 v_main_~y~0_61)) (not .cse2))))))) (or (and (forall ((v_main_~y~0_61 Int) (aux_div_v_main_~y~0_60_31 Int) (aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (let ((.cse6 (* 4294967296 aux_div_v_main_~z~0_50_31))) (or (<= 4294967296 aux_mod_v_main_~z~0_50_31) (let ((.cse5 (< 0 (mod c_main_~x~0 4294967296))) (.cse4 (+ c_main_~y~0 c_main_~z~0)) (.cse3 (+ v_main_~y~0_61 aux_mod_v_main_~z~0_50_31 .cse6))) (and (or (not (= .cse3 .cse4)) .cse5) (or (not .cse5) (not (< .cse4 .cse3)) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 c_main_~y~0 c_main_~z~0 1) (+ v_main_~y~0_61 aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (<= aux_mod_v_main_~z~0_50_31 0) (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_3))) (<= v_main_~y~0_61 (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)) (<= (+ aux_mod_v_main_~z~0_50_31 .cse6) c_main_~z~0) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_50_31 (* v_it_5 4294967295)) 4294967296))) (<= (+ v_it_5 (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31 1) v_main_~y~0_61)))))) (forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_3))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~z~0) (< aux_mod_v_main_~z~0_50_31 0) (< 0 aux_mod_v_main_~z~0_50_31) (let ((.cse7 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not .cse7) (forall ((aux_div_v_main_~y~0_60_31 Int)) (or (not (< (+ c_main_~y~0 c_main_~z~0) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~y~0_60_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31) (+ c_main_~y~0 c_main_~z~0)))) .cse7)))))) (not .cse0)))) (>= aux_mod_v_main_~y~0_60_31 4294967296) (> 0 aux_mod_v_main_~y~0_60_31))) is different from true [2022-02-14 21:27:15,696 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2022-02-14 21:27:15,696 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1764417052] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:27:15,696 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:27:15,696 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 10] total 18 [2022-02-14 21:27:15,697 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1743260710] [2022-02-14 21:27:15,697 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:27:15,697 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-02-14 21:27:15,697 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:27:15,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-02-14 21:27:15,697 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=184, Unknown=10, NotChecked=58, Total=306 [2022-02-14 21:27:15,697 INFO L87 Difference]: Start difference. First operand 41 states and 61 transitions. Second operand has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:27:32,773 WARN L228 SmtUtils]: Spent 10.21s on a formula simplification that was a NOOP. DAG size: 117 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:27:34,820 WARN L838 $PredicateComparison]: unable to prove that (and (= |c_#NULL.base| |c_old(#NULL.base)|) (or (< 0 (mod c_main_~y~0 4294967296)) (<= (mod c_main_~x~0 4294967296) 0)) (or (forall ((aux_mod_v_main_~y~0_60_31 Int)) (or (= aux_mod_v_main_~y~0_60_31 0) (>= aux_mod_v_main_~y~0_60_31 4294967296) (> 0 aux_mod_v_main_~y~0_60_31) (let ((.cse5 (< 0 (mod c_main_~y~0 4294967296)))) (and (or (and (forall ((v_main_~y~0_61 Int) (aux_div_v_main_~y~0_60_31 Int) (aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (let ((.cse3 (* 4294967296 aux_div_v_main_~z~0_50_31))) (or (<= 4294967296 aux_mod_v_main_~z~0_50_31) (let ((.cse2 (< 0 (mod c_main_~x~0 4294967296))) (.cse1 (+ c_main_~y~0 c_main_~z~0)) (.cse0 (+ v_main_~y~0_61 aux_mod_v_main_~z~0_50_31 .cse3))) (and (or (not (= .cse0 .cse1)) .cse2) (or (not .cse2) (not (< .cse1 .cse0)) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 c_main_~y~0 c_main_~z~0 1) (+ v_main_~y~0_61 aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (<= aux_mod_v_main_~z~0_50_31 0) (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_3))) (<= v_main_~y~0_61 (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)) (<= (+ aux_mod_v_main_~z~0_50_31 .cse3) c_main_~z~0) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_50_31 (* v_it_5 4294967295)) 4294967296))) (<= (+ v_it_5 (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31 1) v_main_~y~0_61)))))) (forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_3))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~z~0) (< aux_mod_v_main_~z~0_50_31 0) (< 0 aux_mod_v_main_~z~0_50_31) (let ((.cse4 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not .cse4) (forall ((aux_div_v_main_~y~0_60_31 Int)) (or (not (< (+ c_main_~y~0 c_main_~z~0) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~y~0_60_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31) (+ c_main_~y~0 c_main_~z~0)))) .cse4)))))) (not .cse5)) (or .cse5 (not (< 0 (mod c_main_~x~0 4294967296))) (forall ((aux_div_v_main_~y~0_60_31 Int)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)) (<= 1 v_it_4))) (not (< c_main_~y~0 (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)))))))))) (< 0 (mod c_main_~z~0 4294967296))) (forall ((aux_mod_v_main_~y~0_60_31 Int)) (or (= aux_mod_v_main_~y~0_60_31 0) (let ((.cse6 (< 0 (mod c_main_~y~0 4294967296)))) (and (or .cse6 (forall ((v_main_~y~0_61 Int)) (or (let ((.cse7 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_60_31 Int)) (not (= v_main_~y~0_61 (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)))) .cse7) (or (not .cse7) (forall ((aux_div_v_main_~y~0_60_31 Int)) (or (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= 1 v_it_5) (<= (+ v_it_5 (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31 1) v_main_~y~0_61))) (not (< (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31) v_main_~y~0_61))))))) (let ((.cse8 (< 0 (mod c_main_~x~0 4294967296)))) (and (or .cse8 (not (= v_main_~y~0_61 c_main_~y~0))) (or (exists ((v_it_4 Int)) (and (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_61) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4))) (not (< c_main_~y~0 v_main_~y~0_61)) (not .cse8))))))) (or (and (forall ((v_main_~y~0_61 Int) (aux_div_v_main_~y~0_60_31 Int) (aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (let ((.cse12 (* 4294967296 aux_div_v_main_~z~0_50_31))) (or (<= 4294967296 aux_mod_v_main_~z~0_50_31) (let ((.cse11 (< 0 (mod c_main_~x~0 4294967296))) (.cse10 (+ c_main_~y~0 c_main_~z~0)) (.cse9 (+ v_main_~y~0_61 aux_mod_v_main_~z~0_50_31 .cse12))) (and (or (not (= .cse9 .cse10)) .cse11) (or (not .cse11) (not (< .cse10 .cse9)) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 c_main_~y~0 c_main_~z~0 1) (+ v_main_~y~0_61 aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (<= aux_mod_v_main_~z~0_50_31 0) (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_3))) (<= v_main_~y~0_61 (+ (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)) (<= (+ aux_mod_v_main_~z~0_50_31 .cse12) c_main_~z~0) (exists ((v_it_5 Int)) (and (<= 1 v_it_5) (not (< 0 (mod (+ aux_mod_v_main_~z~0_50_31 (* v_it_5 4294967295)) 4294967296))) (<= (+ v_it_5 (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31 1) v_main_~y~0_61)))))) (forall ((aux_mod_v_main_~z~0_50_31 Int) (aux_div_v_main_~z~0_50_31 Int)) (or (exists ((v_it_3 Int)) (and (not (< 0 (mod (+ (* v_it_3 4294967295) c_main_~y~0) 4294967296))) (<= (+ v_it_3 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31))) (<= 1 v_it_3))) (<= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31)) c_main_~z~0) (< aux_mod_v_main_~z~0_50_31 0) (< 0 aux_mod_v_main_~z~0_50_31) (let ((.cse13 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (not .cse13) (forall ((aux_div_v_main_~y~0_60_31 Int)) (or (not (< (+ c_main_~y~0 c_main_~z~0) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31))) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 c_main_~z~0 1) (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31)) (<= 1 v_it_4)))))) (or (forall ((aux_div_v_main_~y~0_60_31 Int)) (not (= (+ aux_mod_v_main_~z~0_50_31 (* 4294967296 aux_div_v_main_~z~0_50_31) (* aux_div_v_main_~y~0_60_31 4294967296) aux_mod_v_main_~y~0_60_31) (+ c_main_~y~0 c_main_~z~0)))) .cse13)))))) (not .cse6)))) (>= aux_mod_v_main_~y~0_60_31 4294967296) (> 0 aux_mod_v_main_~y~0_60_31))) (= |c_#NULL.offset| |c_old(#NULL.offset)|)) is different from false [2022-02-14 21:28:01,138 WARN L228 SmtUtils]: Spent 6.41s on a formula simplification that was a NOOP. DAG size: 71 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:28:12,395 WARN L228 SmtUtils]: Spent 6.96s on a formula simplification. DAG size of input: 147 DAG size of output: 72 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:28:30,098 WARN L228 SmtUtils]: Spent 8.68s on a formula simplification that was a NOOP. DAG size: 52 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:28:30,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:28:30,388 INFO L93 Difference]: Finished difference Result 60 states and 85 transitions. [2022-02-14 21:28:30,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-02-14 21:28:30,389 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-02-14 21:28:30,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:28:30,389 INFO L225 Difference]: With dead ends: 60 [2022-02-14 21:28:30,389 INFO L226 Difference]: Without dead ends: 56 [2022-02-14 21:28:30,390 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 29 SyntacticMatches, 9 SemanticMatches, 29 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 199 ImplicationChecksByTransitivity, 103.9s TimeCoverageRelationStatistics Valid=159, Invalid=580, Unknown=29, NotChecked=162, Total=930 [2022-02-14 21:28:30,390 INFO L933 BasicCegarLoop]: 16 mSDtfsCounter, 29 mSDsluCounter, 80 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 234 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 128 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-14 21:28:30,390 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 96 Invalid, 234 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 87 Invalid, 0 Unknown, 128 Unchecked, 0.2s Time] [2022-02-14 21:28:30,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2022-02-14 21:28:30,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 43. [2022-02-14 21:28:30,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.5789473684210527) internal successors, (60), 38 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:28:30,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 64 transitions. [2022-02-14 21:28:30,393 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 64 transitions. Word has length 19 [2022-02-14 21:28:30,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:28:30,393 INFO L470 AbstractCegarLoop]: Abstraction has 43 states and 64 transitions. [2022-02-14 21:28:30,393 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 1.6666666666666667) internal successors, (30), 15 states have internal predecessors, (30), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:28:30,393 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 64 transitions. [2022-02-14 21:28:30,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-02-14 21:28:30,394 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:28:30,394 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:28:30,412 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-02-14 21:28:30,603 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-02-14 21:28:30,603 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:28:30,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:28:30,604 INFO L85 PathProgramCache]: Analyzing trace with hash -464839067, now seen corresponding path program 2 times [2022-02-14 21:28:30,604 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:28:30,604 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794493753] [2022-02-14 21:28:30,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:28:30,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:28:30,607 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.0))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:28:30,608 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:28:30,609 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.2))) (+ .cse0 main_~x~0_11 (* (- 4294967296) (div (+ .cse0 main_~x~0_11) 4294967296)))) 0)) [2022-02-14 21:28:30,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:28:30,618 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_3.3))) (+ main_~y~0_5 .cse0 (* (- 4294967296) (div (+ main_~y~0_5 .cse0) 4294967296)))) 0)) [2022-02-14 21:28:30,620 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.4))) (+ .cse0 main_~x~0_5 (* (- 4294967296) (div (+ .cse0 main_~x~0_5) 4294967296)))) 0)) [2022-02-14 21:28:30,622 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.5))) (+ .cse0 main_~x~0_11 (* (- 4294967296) (div (+ .cse0 main_~x~0_11) 4294967296)))) 0)) [2022-02-14 21:28:30,858 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:28:30,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:28:30,868 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-02-14 21:28:30,868 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:28:30,868 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [794493753] [2022-02-14 21:28:30,869 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [794493753] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:28:30,869 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2101209456] [2022-02-14 21:28:30,869 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-02-14 21:28:30,869 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:28:30,869 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:28:30,872 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:28:30,879 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-02-14 21:28:30,903 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-02-14 21:28:30,903 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-02-14 21:28:30,903 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 7 conjunts are in the unsatisfiable core [2022-02-14 21:28:30,904 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:28:31,219 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-02-14 21:28:31,219 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:28:33,625 WARN L838 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_65_31 Int)) (or (<= aux_mod_v_main_~y~0_65_31 0) (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_65_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_65_31 4294967296) aux_mod_v_main_~y~0_65_31) c_main_~y~0))) .cse0) (or (not .cse0) (forall ((aux_div_v_main_~y~0_65_31 Int)) (or (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) (+ (* aux_div_v_main_~y~0_65_31 4294967296) aux_mod_v_main_~y~0_65_31)) (<= 1 v_it_4))) (not (< c_main_~y~0 (+ (* aux_div_v_main_~y~0_65_31 4294967296) aux_mod_v_main_~y~0_65_31)))))))) (<= 4294967296 aux_mod_v_main_~y~0_65_31))) is different from false [2022-02-14 21:28:37,918 WARN L838 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_65_31 Int)) (or (<= aux_mod_v_main_~y~0_65_31 0) (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_65_31 Int)) (not (= (+ (* aux_div_v_main_~y~0_65_31 4294967296) aux_mod_v_main_~y~0_65_31) c_main_~y~0))) .cse0) (or (forall ((v_main_~y~0_66 Int)) (or (let ((.cse1 (< 0 (mod (+ c_main_~x~0 c_main_~y~0 (* v_main_~y~0_66 4294967295)) 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_65_31 Int)) (or (exists ((v_it_4 Int)) (and (<= (+ v_main_~y~0_66 v_it_4 1) (+ (* aux_div_v_main_~y~0_65_31 4294967296) aux_mod_v_main_~y~0_65_31)) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0 c_main_~y~0 (* v_main_~y~0_66 4294967295)) 4294967296))) (<= 1 v_it_4))) (not (< v_main_~y~0_66 (+ (* aux_div_v_main_~y~0_65_31 4294967296) aux_mod_v_main_~y~0_65_31))))) (not .cse1)) (or .cse1 (forall ((aux_div_v_main_~y~0_65_31 Int)) (not (= v_main_~y~0_66 (+ (* aux_div_v_main_~y~0_65_31 4294967296) aux_mod_v_main_~y~0_65_31))))))) (not (< c_main_~y~0 v_main_~y~0_66)) (exists ((v_it_4 Int)) (and (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_66) (<= 1 v_it_4))))) (not .cse0)))) (<= 4294967296 aux_mod_v_main_~y~0_65_31))) is different from false [2022-02-14 21:29:02,318 WARN L228 SmtUtils]: Spent 8.13s on a formula simplification that was a NOOP. DAG size: 77 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:29:16,536 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 3 not checked. [2022-02-14 21:29:16,537 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2101209456] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:29:16,537 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:29:16,537 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 16 [2022-02-14 21:29:16,537 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [390992968] [2022-02-14 21:29:16,537 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:29:16,537 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-02-14 21:29:16,537 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:29:16,538 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-02-14 21:29:16,538 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=143, Unknown=3, NotChecked=50, Total=240 [2022-02-14 21:29:16,538 INFO L87 Difference]: Start difference. First operand 43 states and 64 transitions. Second operand has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:29:35,169 WARN L228 SmtUtils]: Spent 16.23s on a formula simplification. DAG size of input: 72 DAG size of output: 69 (called from [L 360] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2022-02-14 21:29:35,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-02-14 21:29:35,517 INFO L93 Difference]: Finished difference Result 63 states and 92 transitions. [2022-02-14 21:29:35,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-02-14 21:29:35,518 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 19 [2022-02-14 21:29:35,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-02-14 21:29:35,518 INFO L225 Difference]: With dead ends: 63 [2022-02-14 21:29:35,519 INFO L226 Difference]: Without dead ends: 59 [2022-02-14 21:29:35,519 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 29 SyntacticMatches, 8 SemanticMatches, 22 ConstructedPredicates, 2 IntricatePredicates, 1 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 33.8s TimeCoverageRelationStatistics Valid=108, Invalid=359, Unknown=3, NotChecked=82, Total=552 [2022-02-14 21:29:35,519 INFO L933 BasicCegarLoop]: 13 mSDtfsCounter, 36 mSDsluCounter, 62 mSDsCounter, 0 mSdLazyCounter, 89 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 163 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 89 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 57 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-02-14 21:29:35,520 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [36 Valid, 75 Invalid, 163 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 89 Invalid, 0 Unknown, 57 Unchecked, 0.2s Time] [2022-02-14 21:29:35,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-02-14 21:29:35,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 43. [2022-02-14 21:29:35,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 38 states have (on average 1.5789473684210527) internal successors, (60), 38 states have internal predecessors, (60), 3 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:29:35,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 64 transitions. [2022-02-14 21:29:35,522 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 64 transitions. Word has length 19 [2022-02-14 21:29:35,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-02-14 21:29:35,523 INFO L470 AbstractCegarLoop]: Abstraction has 43 states and 64 transitions. [2022-02-14 21:29:35,523 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 2.1875) internal successors, (35), 13 states have internal predecessors, (35), 3 states have call successors, (5), 4 states have call predecessors, (5), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2022-02-14 21:29:35,523 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 64 transitions. [2022-02-14 21:29:35,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-02-14 21:29:35,525 INFO L506 BasicCegarLoop]: Found error trace [2022-02-14 21:29:35,525 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-02-14 21:29:35,541 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-02-14 21:29:35,725 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-02-14 21:29:35,726 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-02-14 21:29:35,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-02-14 21:29:35,726 INFO L85 PathProgramCache]: Analyzing trace with hash 2046243813, now seen corresponding path program 1 times [2022-02-14 21:29:35,726 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-02-14 21:29:35,726 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [427436022] [2022-02-14 21:29:35,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:29:35,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-02-14 21:29:35,729 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.0))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:29:35,730 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.1))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-02-14 21:29:35,731 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.2))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-02-14 21:29:35,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:29:35,743 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_2.3))) (+ main_~z~0_7 .cse0 (* (- 4294967296) (div (+ main_~z~0_7 .cse0) 4294967296)))) 0)) [2022-02-14 21:29:35,747 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_4.4))) (+ .cse0 main_~x~0_8 (* (- 4294967296) (div (+ .cse0 main_~x~0_8) 4294967296)))) 0)) [2022-02-14 21:29:35,749 WARN L250 erpolLogProxyWrapper]: Quant: Clause contains literal that is not almost uninterpreted: (not (<= (let ((.cse0 (* 4294967295 .v_it_5.5))) (+ main_~z~0_8 .cse0 (* (- 4294967296) (div (+ main_~z~0_8 .cse0) 4294967296)))) 0)) [2022-02-14 21:29:36,207 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-02-14 21:29:36,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:29:36,211 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:29:36,211 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-02-14 21:29:36,211 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [427436022] [2022-02-14 21:29:36,211 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [427436022] provided 0 perfect and 1 imperfect interpolant sequences [2022-02-14 21:29:36,211 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2119471116] [2022-02-14 21:29:36,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-02-14 21:29:36,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-02-14 21:29:36,211 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-02-14 21:29:36,212 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-02-14 21:29:36,213 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-02-14 21:29:36,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-02-14 21:29:36,247 INFO L263 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 13 conjunts are in the unsatisfiable core [2022-02-14 21:29:36,248 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-02-14 21:29:36,566 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-02-14 21:29:36,566 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-02-14 21:29:51,484 WARN L838 $PredicateComparison]: unable to prove that (forall ((aux_mod_v_main_~y~0_70_31 Int) (v_main_~y~0_71 Int)) (or (> 0 aux_mod_v_main_~y~0_70_31) (= aux_mod_v_main_~y~0_70_31 0) (let ((.cse0 (< 0 (mod c_main_~x~0 4294967296)))) (and (or .cse0 (not (= v_main_~y~0_71 c_main_~y~0))) (or (not (< c_main_~y~0 v_main_~y~0_71)) (not .cse0) (exists ((v_it_4 Int)) (and (<= (+ v_it_4 c_main_~y~0 1) v_main_~y~0_71) (not (< 0 (mod (+ (* v_it_4 4294967295) c_main_~x~0) 4294967296))) (<= 1 v_it_4)))))) (let ((.cse1 (< 0 (mod c_main_~z~0 4294967296)))) (and (or (forall ((aux_div_v_main_~y~0_70_31 Int)) (not (= v_main_~y~0_71 (+ aux_mod_v_main_~y~0_70_31 (* aux_div_v_main_~y~0_70_31 4294967296))))) .cse1) (or (not .cse1) (forall ((aux_div_v_main_~y~0_70_31 Int)) (or (not (< (+ aux_mod_v_main_~y~0_70_31 (* aux_div_v_main_~y~0_70_31 4294967296)) v_main_~y~0_71)) (exists ((v_it_5 Int)) (and (not (< 0 (mod (+ (* v_it_5 4294967295) c_main_~z~0) 4294967296))) (<= (+ v_it_5 aux_mod_v_main_~y~0_70_31 (* aux_div_v_main_~y~0_70_31 4294967296) 1) v_main_~y~0_71) (<= 1 v_it_5)))))))) (>= aux_mod_v_main_~y~0_70_31 4294967296))) is different from false [2022-02-14 21:30:08,922 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 1 not checked. [2022-02-14 21:30:08,922 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2119471116] provided 0 perfect and 2 imperfect interpolant sequences [2022-02-14 21:30:08,922 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-02-14 21:30:08,922 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 11] total 20 [2022-02-14 21:30:08,922 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310438787] [2022-02-14 21:30:08,922 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2022-02-14 21:30:08,922 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-02-14 21:30:08,923 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-02-14 21:30:08,923 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-02-14 21:30:08,923 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=267, Unknown=9, NotChecked=34, Total=380 [2022-02-14 21:30:08,923 INFO L87 Difference]: Start difference. First operand 43 states and 64 transitions. Second operand has 20 states, 20 states have (on average 1.6) internal successors, (32), 17 states have internal predecessors, (32), 4 states have call successors, (6), 4 states have call predecessors, (6), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1)