/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf -i ../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-08 08:31:31,157 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-08 08:31:31,160 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-08 08:31:31,203 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-08 08:31:31,203 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-08 08:31:31,205 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-08 08:31:31,207 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-08 08:31:31,210 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-08 08:31:31,213 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-08 08:31:31,217 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-08 08:31:31,218 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-08 08:31:31,219 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-08 08:31:31,220 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-08 08:31:31,222 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-08 08:31:31,222 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-08 08:31:31,226 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-08 08:31:31,227 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-08 08:31:31,228 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-08 08:31:31,231 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-08 08:31:31,236 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-08 08:31:31,237 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-08 08:31:31,238 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-08 08:31:31,239 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-08 08:31:31,239 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-08 08:31:31,240 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-08 08:31:31,242 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-08 08:31:31,242 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-08 08:31:31,242 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-08 08:31:31,243 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-08 08:31:31,243 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-08 08:31:31,244 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-04-08 08:31:31,244 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-04-08 08:31:31,245 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-04-08 08:31:31,245 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-04-08 08:31:31,246 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-04-08 08:31:31,246 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-04-08 08:31:31,246 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-04-08 08:31:31,247 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-04-08 08:31:31,247 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-04-08 08:31:31,247 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-08 08:31:31,248 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-08 08:31:31,248 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-08 08:31:31,249 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationJordan_32.epf [2022-04-08 08:31:31,256 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-08 08:31:31,256 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-08 08:31:31,257 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-08 08:31:31,257 INFO L138 SettingsManager]: * sizeof long=4 [2022-04-08 08:31:31,257 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-08 08:31:31,257 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-04-08 08:31:31,257 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-08 08:31:31,258 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-08 08:31:31,258 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-08 08:31:31,258 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-08 08:31:31,258 INFO L138 SettingsManager]: * sizeof long double=12 [2022-04-08 08:31:31,258 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-08 08:31:31,258 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-08 08:31:31,258 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-08 08:31:31,258 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-08 08:31:31,259 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-08 08:31:31,259 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-08 08:31:31,259 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-08 08:31:31,259 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-08 08:31:31,259 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-08 08:31:31,259 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-08 08:31:31,259 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-08 08:31:31,259 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-08 08:31:31,260 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-08 08:31:31,260 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=JORDAN [2022-04-08 08:31:31,260 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-08 08:31:31,486 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-08 08:31:31,511 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-08 08:31:31,513 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-08 08:31:31,514 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-08 08:31:31,515 INFO L275 PluginConnector]: CDTParser initialized [2022-04-08 08:31:31,516 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-08 08:31:31,566 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f728ac8ea/9e2f095292c24bfe965349901efdea56/FLAG398c4baad [2022-04-08 08:31:32,234 INFO L306 CDTParser]: Found 1 translation units. [2022-04-08 08:31:32,235 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-08 08:31:32,280 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f728ac8ea/9e2f095292c24bfe965349901efdea56/FLAG398c4baad [2022-04-08 08:31:32,319 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f728ac8ea/9e2f095292c24bfe965349901efdea56 [2022-04-08 08:31:32,321 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-08 08:31:32,322 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-08 08:31:32,323 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-08 08:31:32,323 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-08 08:31:32,331 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-08 08:31:32,332 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.04 08:31:32" (1/1) ... [2022-04-08 08:31:32,332 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@cc5c2e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:32, skipping insertion in model container [2022-04-08 08:31:32,333 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.04 08:31:32" (1/1) ... [2022-04-08 08:31:32,343 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-08 08:31:32,444 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-08 08:31:33,134 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-08 08:31:33,843 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-08 08:31:33,859 INFO L203 MainTranslator]: Completed pre-run [2022-04-08 08:31:33,905 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-08 08:31:34,183 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-08 08:31:34,249 INFO L208 MainTranslator]: Completed translation [2022-04-08 08:31:34,250 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34 WrapperNode [2022-04-08 08:31:34,250 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-08 08:31:34,251 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-08 08:31:34,251 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-08 08:31:34,251 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-08 08:31:34,262 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (1/1) ... [2022-04-08 08:31:34,262 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (1/1) ... [2022-04-08 08:31:34,362 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (1/1) ... [2022-04-08 08:31:34,363 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (1/1) ... [2022-04-08 08:31:34,520 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (1/1) ... [2022-04-08 08:31:34,555 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (1/1) ... [2022-04-08 08:31:34,583 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (1/1) ... [2022-04-08 08:31:34,618 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-08 08:31:34,619 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-08 08:31:34,619 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-08 08:31:34,619 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-08 08:31:34,620 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (1/1) ... [2022-04-08 08:31:34,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-08 08:31:34,634 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:31:34,648 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-08 08:31:34,695 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-08 08:31:34,734 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-08 08:31:34,734 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-08 08:31:34,734 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-08 08:31:34,734 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-08 08:31:34,734 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~TO~VOID [2022-04-08 08:31:34,734 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-08 08:31:34,734 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-08 08:31:34,734 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_guard [2022-04-08 08:31:34,735 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlIntegerToUnicodeString [2022-04-08 08:31:34,735 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlUnicodeStringToInteger [2022-04-08 08:31:34,735 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareUnicodeString [2022-04-08 08:31:34,736 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAppendUnicodeStringToString [2022-04-08 08:31:34,736 INFO L138 BoogieDeclarations]: Found implementation of procedure READ_PORT_UCHAR [2022-04-08 08:31:34,736 INFO L138 BoogieDeclarations]: Found implementation of procedure WRITE_PORT_UCHAR [2022-04-08 08:31:34,736 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedIncrement [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedDecrement [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedExchange [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeDpc [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInsertQueueDpc [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSynchronizeExecution [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTimeIncrement [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireCancelSpinLock [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateErrorLogEntry [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure IoConnectInterrupt [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReportResourceUsage [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure IoInitializeRemoveLockEx [2022-04-08 08:31:34,737 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockEx [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockAndWaitEx [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWriteErrorLogEntry [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWMIRegistrationControl [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure IoOpenDeviceRegistryKey [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure KeStallExecutionProcessor [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure PoRequestPowerIrp [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure PoSetPowerState [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfReferenceObject [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwQueryValueKey [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwSetValueKey [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiCompleteRequest [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure errorFn [2022-04-08 08:31:34,738 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCleanup [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpPnpIrpInfo [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLock [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLock [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLockAndWait [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceList [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceRequirementsList [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLogError [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure DriverEntry [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptUnload [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCleanRemovalRelationsList [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAddPptRemovalRelation [2022-04-08 08:31:34,739 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRemovePptRemovalRelation [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpRemovalRelationsList [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpPptRemovalRelationsStruct [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchInternalDeviceControl [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsNecR98Machine [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCreate [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchClose [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitiate1284_3 [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectDevice [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectDevice [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure Ppt1284_3AssignAddress [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfNon1284_3Present [2022-04-08 08:31:34,740 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStl1284_3 [2022-04-08 08:31:34,741 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStlProductId [2022-04-08 08:31:34,741 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSend1284_3Command [2022-04-08 08:31:34,741 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectChipFilter [2022-04-08 08:31:34,741 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortType [2022-04-08 08:31:34,741 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortCapabilities [2022-04-08 08:31:34,741 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEcpPort [2022-04-08 08:31:34,742 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-08 08:31:34,742 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfUserRequested [2022-04-08 08:31:34,742 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPort [2022-04-08 08:31:34,742 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectBytePort [2022-04-08 08:31:34,742 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoDepth [2022-04-08 08:31:34,742 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoWidth [2022-04-08 08:31:34,742 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetChipMode [2022-04-08 08:31:34,742 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearChipMode [2022-04-08 08:31:34,743 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrSetMode [2022-04-08 08:31:34,743 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetByteMode [2022-04-08 08:31:34,743 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearByteMode [2022-04-08 08:31:34,743 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckByteMode [2022-04-08 08:31:34,743 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrClearMode [2022-04-08 08:31:34,743 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFindNatChip [2022-04-08 08:31:34,744 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildResourceList [2022-04-08 08:31:34,744 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBuildRemovalRelations [2022-04-08 08:31:34,744 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanPciCardCmResourceList [2022-04-08 08:31:34,744 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsPci [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCompleteRequest [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpInitDispatchFunctionTable [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpAddDevice [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPnp [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartDevice [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanCmResourceList [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartValidateResources [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterResourceRequirements [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-08 08:31:34,745 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryDeviceRelations [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryStopDevice [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelStopDevice [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStopDevice [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryRemoveDevice [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelRemoveDevice [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpRemoveDevice [2022-04-08 08:31:34,746 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpSurpriseRemoval [2022-04-08 08:31:34,747 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-08 08:31:34,747 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBounceAndCatchPnpIrp [2022-04-08 08:31:34,747 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-08 08:31:34,747 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpUnhandledIrp [2022-04-08 08:31:34,748 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPowerComplete [2022-04-08 08:31:34,748 INFO L138 BoogieDeclarations]: Found implementation of procedure InitNEC_98 [2022-04-08 08:31:34,748 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPower [2022-04-08 08:31:34,748 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockDiskModeByte [2022-04-08 08:31:34,748 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockPrtModeByte [2022-04-08 08:31:34,748 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipSetDiskMode [2022-04-08 08:31:34,748 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipCheckDevice [2022-04-08 08:31:34,749 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectLegacyZip [2022-04-08 08:31:34,749 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectLegacyZip [2022-04-08 08:31:34,749 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegInitDriverSettings [2022-04-08 08:31:34,749 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegGetDeviceParameterDword [2022-04-08 08:31:34,749 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegSetDeviceParameterDword [2022-04-08 08:31:34,749 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFailRequest [2022-04-08 08:31:34,749 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLockOrFailIrp [2022-04-08 08:31:34,749 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPreProcessIrp [2022-04-08 08:31:34,750 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPostProcessIrp [2022-04-08 08:31:34,750 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchCompletionRoutine [2022-04-08 08:31:34,750 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-08 08:31:34,750 INFO L138 BoogieDeclarations]: Found implementation of procedure PptConnectInterrupt [2022-04-08 08:31:34,750 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDisconnectInterrupt [2022-04-08 08:31:34,750 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedIncrement [2022-04-08 08:31:34,750 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDecrement [2022-04-08 08:31:34,751 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedRead [2022-04-08 08:31:34,752 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedQueue [2022-04-08 08:31:34,752 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDisconnect [2022-04-08 08:31:34,754 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCancelRoutine [2022-04-08 08:31:34,754 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortDpc [2022-04-08 08:31:34,759 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePortAtInterruptLevel [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortFromInterruptLevel [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInterruptService [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePort [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTraversePortCheckList [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePort [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptQueryNumWaiters [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetCancelRoutine [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTickCount [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure CheckPort [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildParallelPortDeviceName [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitializeDeviceExtension [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNumberFromLptName [2022-04-08 08:31:34,760 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildDeviceObject [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiInitWmi [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchSystemControl [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiRegInfo [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiDataBlock [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure _BLAST_init [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure stub_driver_init [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAcquireFastMutex [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ExReleaseFastMutex [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAllocatePoolWithTag [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ExFreePool [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertHeadList [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertTailList [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedRemoveHeadList [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateMdl [2022-04-08 08:31:34,761 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAttachDeviceToDeviceStack [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildAsynchronousFsdRequest [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildDeviceIoControlRequest [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateDevice [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateSymbolicLink [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteDevice [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteSymbolicLink [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDetachDevice [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeIrp [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeMdl [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoGetConfigurationInformation [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoQueryDeviceDescription [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoRegisterDeviceInterface [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseCancelSpinLock [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetDeviceInterfaceState [2022-04-08 08:31:34,762 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetHardErrorOrVerifyDevice [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure stubMoreProcessingRequired [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCallDriver [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCompleteRequest [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KeAcquireSpinLockRaiseToDpc [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KeDelayExecutionThread [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeEvent [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSemaphore [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSpinLock [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KeReleaseSemaphore [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KfReleaseSpinLock [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSetEvent [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure KeWaitForSingleObject [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure MmAllocateContiguousMemory [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure MmFreeContiguousMemory [2022-04-08 08:31:34,763 INFO L138 BoogieDeclarations]: Found implementation of procedure MmMapLockedPagesSpecifyCache [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure MmPageEntireDriver [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure MmResetDriverPaging [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure MmUnlockPages [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure ObReferenceObjectByHandle [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfDereferenceObject [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure PoCallDriver [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure PoStartNextPowerIrp [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure PsCreateSystemThread [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure PsTerminateSystemThread [2022-04-08 08:31:34,764 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAnsiStringToUnicodeString [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareMemory [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCopyUnicodeString [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlDeleteRegistryValue [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlFreeUnicodeString [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitString [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitUnicodeString [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlQueryRegistryValues [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwClose [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiSystemControl [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireRemoveLockEx [2022-04-08 08:31:34,765 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-08 08:31:34,766 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-04-08 08:31:34,766 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memmove [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_short [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_long [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_guard [2022-04-08 08:31:34,766 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure memmove [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlQueryRegistryValues [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlDeleteRegistryValue [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlIntegerToUnicodeString [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlUnicodeStringToInteger [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitString [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitUnicodeString [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAnsiStringToUnicodeString [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareUnicodeString [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCopyUnicodeString [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAppendUnicodeStringToString [2022-04-08 08:31:34,767 INFO L130 BoogieDeclarations]: Found specification of procedure RtlFreeUnicodeString [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareMemory [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure READ_PORT_UCHAR [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure WRITE_PORT_UCHAR [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedIncrement [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedDecrement [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedExchange [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeDpc [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure KeInsertQueueDpc [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure KeSynchronizeExecution [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeEvent [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure KeSetEvent [2022-04-08 08:31:34,768 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSemaphore [2022-04-08 08:31:34,769 INFO L130 BoogieDeclarations]: Found specification of procedure KeReleaseSemaphore [2022-04-08 08:31:34,772 INFO L130 BoogieDeclarations]: Found specification of procedure KeDelayExecutionThread [2022-04-08 08:31:34,772 INFO L130 BoogieDeclarations]: Found specification of procedure KeWaitForSingleObject [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSpinLock [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure KfReleaseSpinLock [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTimeIncrement [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure ExAllocatePoolWithTag [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure ExFreePool [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure ExAcquireFastMutex [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure ExReleaseFastMutex [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertHeadList [2022-04-08 08:31:34,773 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertTailList [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedRemoveHeadList [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure MmUnlockPages [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure MmMapLockedPagesSpecifyCache [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure MmAllocateContiguousMemory [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure MmFreeContiguousMemory [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure MmResetDriverPaging [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure MmPageEntireDriver [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure PsCreateSystemThread [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure PsTerminateSystemThread [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireCancelSpinLock [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateErrorLogEntry [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateMdl [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure IoAttachDeviceToDeviceStack [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildAsynchronousFsdRequest [2022-04-08 08:31:34,774 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildDeviceIoControlRequest [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IofCallDriver [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IofCompleteRequest [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoConnectInterrupt [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateDevice [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateSymbolicLink [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteDevice [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteSymbolicLink [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoDetachDevice [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeIrp [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeMdl [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoGetConfigurationInformation [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoQueryDeviceDescription [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseCancelSpinLock [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoReportResourceUsage [2022-04-08 08:31:34,775 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetHardErrorOrVerifyDevice [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoInitializeRemoveLockEx [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireRemoveLockEx [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockEx [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockAndWaitEx [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoWriteErrorLogEntry [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoWMIRegistrationControl [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoOpenDeviceRegistryKey [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoRegisterDeviceInterface [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetDeviceInterfaceState [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure KeStallExecutionProcessor [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure PoRequestPowerIrp [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure PoSetPowerState [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure PoCallDriver [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure PoStartNextPowerIrp [2022-04-08 08:31:34,776 INFO L130 BoogieDeclarations]: Found specification of procedure ObReferenceObjectByHandle [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure ObfReferenceObject [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure ObfDereferenceObject [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure ZwClose [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure ZwQueryValueKey [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure ZwSetValueKey [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure WmiCompleteRequest [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure WmiSystemControl [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptCompleteRequest [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure errorFn [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiInitWmi [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchSystemControl [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpInitDispatchFunctionTable [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpAddDevice [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPnp [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptFailRequest [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPreProcessIrp [2022-04-08 08:31:34,777 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPostProcessIrp [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure DriverEntry [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptUnload [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchCompletionRoutine [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptLogError [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptConnectInterrupt [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptDisconnectInterrupt [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCreate [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchClose [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedIncrement [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDecrement [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedRead [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedQueue [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDisconnect [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptCancelRoutine [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortDpc [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePortAtInterruptLevel [2022-04-08 08:31:34,778 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortFromInterruptLevel [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptInterruptService [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePort [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptTraversePortCheckList [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePort [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptQueryNumWaiters [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchInternalDeviceControl [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCleanup [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsNecR98Machine [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPower [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegInitDriverSettings [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetCancelRoutine [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLockOrFailIrp [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpPnpIrpInfo [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLock [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLock [2022-04-08 08:31:34,779 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLockAndWait [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceList [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceRequirementsList [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectChipFilter [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortType [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetChipMode [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearChipMode [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitiate1284_3 [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectDevice [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectDevice [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure Ppt1284_3AssignAddress [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptSend1284_3Command [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectLegacyZip [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectLegacyZip [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpRemovalRelationsList [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegGetDeviceParameterDword [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegSetDeviceParameterDword [2022-04-08 08:31:34,780 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildParallelPortDeviceName [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitializeDeviceExtension [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNumberFromLptName [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildDeviceObject [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPort [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptCleanRemovalRelationsList [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure CheckPort [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memmove [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptAddPptRemovalRelation [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptRemovePptRemovalRelation [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpPptRemovalRelationsStruct [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStl1284_3 [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfNon1284_3Present [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStlProductId [2022-04-08 08:31:34,781 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortCapabilities [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEcpPort [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfUserRequested [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectBytePort [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoDepth [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoWidth [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrSetMode [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrClearMode [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptFindNatChip [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildResourceList [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetByteMode [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearByteMode [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckByteMode [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-08 08:31:34,782 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterResourceRequirements [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryDeviceRelations [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryStopDevice [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelStopDevice [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStopDevice [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryRemoveDevice [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelRemoveDevice [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpRemoveDevice [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpSurpriseRemoval [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpUnhandledIrp [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartDevice [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartValidateResources [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanCmResourceList [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-08 08:31:34,783 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBounceAndCatchPnpIrp [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBuildRemovalRelations [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanPciCardCmResourceList [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsPci [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptPowerComplete [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure InitNEC_98 [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockDiskModeByte [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockPrtModeByte [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipSetDiskMode [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipCheckDevice [2022-04-08 08:31:34,784 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~TO~VOID [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTickCount [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiRegInfo [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiDataBlock [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure _BLAST_init [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure stub_driver_init [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure stubMoreProcessingRequired [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure KeAcquireSpinLockRaiseToDpc [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-04-08 08:31:34,785 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-04-08 08:31:35,641 INFO L234 CfgBuilder]: Building ICFG [2022-04-08 08:31:35,645 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-08 08:31:35,682 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:35,742 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:35,742 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:36,063 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:36,210 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##8: assume !false; [2022-04-08 08:31:36,210 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##7: assume false; [2022-04-08 08:31:36,238 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:36,285 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-08 08:31:36,285 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-08 08:31:36,286 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:36,301 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:36,301 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:36,483 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:36,524 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##9: assume false; [2022-04-08 08:31:36,524 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##10: assume !false; [2022-04-08 08:31:36,524 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:36,534 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:36,534 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:36,792 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:36,816 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:36,816 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:36,945 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:36,972 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-08 08:31:36,973 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-08 08:31:37,033 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:37,096 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-08 08:31:37,096 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-08 08:31:37,096 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:37,111 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-08 08:31:37,114 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-08 08:31:37,142 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:37,148 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:37,148 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:37,402 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:41,002 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##39: assume !false; [2022-04-08 08:31:41,003 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##38: assume false; [2022-04-08 08:31:43,144 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:43,150 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:43,150 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:43,271 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:43,271 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:43,795 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume !false; [2022-04-08 08:31:43,795 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume !false; [2022-04-08 08:31:43,795 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##25: assume false; [2022-04-08 08:31:43,795 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##19: assume false; [2022-04-08 08:31:44,116 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,122 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,122 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,320 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,332 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,332 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,627 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,632 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,632 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,633 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,643 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,643 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,671 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,678 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,678 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,678 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,688 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,688 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,688 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,699 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,699 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,864 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,870 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,870 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,878 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,883 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,883 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,971 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:44,978 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:44,978 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:44,998 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:45,004 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:45,004 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:45,525 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:45,530 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:45,530 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:45,541 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:45,585 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##6: assume !false; [2022-04-08 08:31:45,585 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##5: assume false; [2022-04-08 08:31:45,591 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:45,785 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##31: assume !false; [2022-04-08 08:31:45,785 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##30: assume false; [2022-04-08 08:31:46,119 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:46,125 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:46,125 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:46,382 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:46,434 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##21: assume !false; [2022-04-08 08:31:46,434 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume false; [2022-04-08 08:31:46,520 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:49,077 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-08 08:31:49,078 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-08 08:31:49,146 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:49,175 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-08 08:31:49,175 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-08 08:31:49,176 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:49,196 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-08 08:31:49,196 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-08 08:31:49,242 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:49,252 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-08 08:31:49,253 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-08 08:31:49,401 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:49,406 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 08:31:49,406 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 08:31:49,652 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 08:31:49,679 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##12: assume !false; [2022-04-08 08:31:49,680 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##11: assume false; [2022-04-08 08:31:49,765 INFO L275 CfgBuilder]: Performing block encoding [2022-04-08 08:31:49,798 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-08 08:31:49,798 INFO L299 CfgBuilder]: Removed 38 assume(true) statements. [2022-04-08 08:31:49,802 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.04 08:31:49 BoogieIcfgContainer [2022-04-08 08:31:49,802 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-08 08:31:49,803 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-08 08:31:49,803 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-08 08:31:49,807 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-08 08:31:49,807 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.04 08:31:32" (1/3) ... [2022-04-08 08:31:49,808 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@210031d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.04 08:31:49, skipping insertion in model container [2022-04-08 08:31:49,808 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 08:31:34" (2/3) ... [2022-04-08 08:31:49,808 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@210031d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.04 08:31:49, skipping insertion in model container [2022-04-08 08:31:49,808 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.04 08:31:49" (3/3) ... [2022-04-08 08:31:49,809 INFO L111 eAbstractionObserver]: Analyzing ICFG parport.i.cil-2.c [2022-04-08 08:31:49,812 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-08 08:31:49,812 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-08 08:31:49,845 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-08 08:31:49,851 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-08 08:31:49,851 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-08 08:31:49,958 INFO L276 IsEmpty]: Start isEmpty. Operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) [2022-04-08 08:31:49,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-08 08:31:49,965 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:31:49,965 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:31:49,966 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:31:49,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:31:49,971 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 1 times [2022-04-08 08:31:49,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:31:49,977 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [252745022] [2022-04-08 08:31:49,985 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-08 08:31:49,986 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 2 times [2022-04-08 08:31:49,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:31:49,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871234577] [2022-04-08 08:31:49,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:31:49,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:31:50,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:31:50,705 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:31:50,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:31:50,746 INFO L290 TraceCheckUtils]: 0: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-08 08:31:50,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-08 08:31:50,747 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-08 08:31:50,780 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-08 08:31:50,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:31:50,797 INFO L290 TraceCheckUtils]: 0: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-08 08:31:50,798 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-08 08:31:50,798 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-08 08:31:50,803 INFO L272 TraceCheckUtils]: 0: Hoare triple {2253#true} call ULTIMATE.init(); {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:31:50,803 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-08 08:31:50,803 INFO L290 TraceCheckUtils]: 2: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-08 08:31:50,804 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-08 08:31:50,804 INFO L272 TraceCheckUtils]: 4: Hoare triple {2253#true} call #t~ret1155 := main(); {2253#true} is VALID [2022-04-08 08:31:50,805 INFO L290 TraceCheckUtils]: 5: Hoare triple {2253#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {2258#(= main_~i~24 0)} is VALID [2022-04-08 08:31:50,805 INFO L290 TraceCheckUtils]: 6: Hoare triple {2258#(= main_~i~24 0)} assume !(~i~24 < 4); {2254#false} is VALID [2022-04-08 08:31:50,805 INFO L290 TraceCheckUtils]: 7: Hoare triple {2254#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {2254#false} is VALID [2022-04-08 08:31:50,806 INFO L272 TraceCheckUtils]: 8: Hoare triple {2254#false} call _BLAST_init(); {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:31:50,806 INFO L290 TraceCheckUtils]: 9: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-08 08:31:50,806 INFO L290 TraceCheckUtils]: 10: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-08 08:31:50,806 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-08 08:31:50,807 INFO L290 TraceCheckUtils]: 12: Hoare triple {2254#false} assume !(~status~31 >= 0); {2254#false} is VALID [2022-04-08 08:31:50,807 INFO L290 TraceCheckUtils]: 13: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-08 08:31:50,807 INFO L290 TraceCheckUtils]: 14: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-08 08:31:50,807 INFO L290 TraceCheckUtils]: 15: Hoare triple {2254#false} assume !(~s~0 == ~UNLOADED~0); {2254#false} is VALID [2022-04-08 08:31:50,807 INFO L290 TraceCheckUtils]: 16: Hoare triple {2254#false} assume !(-1 == ~status~31); {2254#false} is VALID [2022-04-08 08:31:50,808 INFO L290 TraceCheckUtils]: 17: Hoare triple {2254#false} assume !(~s~0 != ~SKIP2~0); {2254#false} is VALID [2022-04-08 08:31:50,808 INFO L290 TraceCheckUtils]: 18: Hoare triple {2254#false} assume 1 == ~pended~0; {2254#false} is VALID [2022-04-08 08:31:50,808 INFO L290 TraceCheckUtils]: 19: Hoare triple {2254#false} assume 259 != ~status~31; {2254#false} is VALID [2022-04-08 08:31:50,808 INFO L272 TraceCheckUtils]: 20: Hoare triple {2254#false} call errorFn(); {2254#false} is VALID [2022-04-08 08:31:50,809 INFO L290 TraceCheckUtils]: 21: Hoare triple {2254#false} assume !false; {2254#false} is VALID [2022-04-08 08:31:50,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:31:50,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:31:50,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871234577] [2022-04-08 08:31:50,811 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [871234577] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:31:50,811 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:31:50,811 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 08:31:50,813 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:31:50,813 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [252745022] [2022-04-08 08:31:50,814 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [252745022] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:31:50,814 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:31:50,814 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 08:31:50,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [45365027] [2022-04-08 08:31:50,815 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:31:50,819 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-08 08:31:50,821 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:31:50,823 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 08:31:50,863 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:31:50,863 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 08:31:50,864 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:31:50,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 08:31:50,882 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-08 08:31:50,896 INFO L87 Difference]: Start difference. First operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 08:32:05,981 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-08 08:32:15,615 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-08 08:32:34,578 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-08 08:32:59,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:32:59,758 INFO L93 Difference]: Finished difference Result 4216 states and 6551 transitions. [2022-04-08 08:32:59,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 08:32:59,759 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-08 08:32:59,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:32:59,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 08:33:00,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-08 08:33:00,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 08:33:00,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-08 08:33:00,612 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 6551 transitions. [2022-04-08 08:33:13,050 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6551 edges. 6551 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:33:13,552 INFO L225 Difference]: With dead ends: 4216 [2022-04-08 08:33:13,552 INFO L226 Difference]: Without dead ends: 2226 [2022-04-08 08:33:13,569 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-08 08:33:13,575 INFO L913 BasicCegarLoop]: 2421 mSDtfsCounter, 3234 mSDsluCounter, 361 mSDsCounter, 0 mSdLazyCounter, 3763 mSolverCounterSat, 1561 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 27.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3637 SdHoareTripleChecker+Valid, 2782 SdHoareTripleChecker+Invalid, 5327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1561 IncrementalHoareTripleChecker+Valid, 3763 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 27.5s IncrementalHoareTripleChecker+Time [2022-04-08 08:33:13,580 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3637 Valid, 2782 Invalid, 5327 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1561 Valid, 3763 Invalid, 3 Unknown, 0 Unchecked, 27.5s Time] [2022-04-08 08:33:13,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2226 states. [2022-04-08 08:33:14,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2226 to 1985. [2022-04-08 08:33:14,097 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:33:14,112 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 08:33:14,124 INFO L74 IsIncluded]: Start isIncluded. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 08:33:14,130 INFO L87 Difference]: Start difference. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 08:33:14,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:33:14,403 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-08 08:33:14,403 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-08 08:33:14,427 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:33:14,427 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:33:14,434 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-08 08:33:14,439 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-08 08:33:14,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:33:14,714 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-08 08:33:14,714 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-08 08:33:14,725 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:33:14,725 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:33:14,726 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:33:14,726 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:33:14,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 08:33:15,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2849 transitions. [2022-04-08 08:33:15,101 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2849 transitions. Word has length 22 [2022-04-08 08:33:15,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:33:15,102 INFO L478 AbstractCegarLoop]: Abstraction has 1985 states and 2849 transitions. [2022-04-08 08:33:15,102 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 08:33:15,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 1985 states and 2849 transitions. [2022-04-08 08:33:23,003 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2849 edges. 2849 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:33:23,003 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2849 transitions. [2022-04-08 08:33:23,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-08 08:33:23,004 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:33:23,004 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:33:23,004 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-08 08:33:23,005 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:33:23,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:33:23,005 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 1 times [2022-04-08 08:33:23,005 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:33:23,006 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1834011873] [2022-04-08 08:33:23,028 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:33:23,029 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:33:23,029 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:33:23,029 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 2 times [2022-04-08 08:33:23,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:33:23,029 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1279501854] [2022-04-08 08:33:23,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:33:23,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:33:23,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:23,326 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:33:23,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:23,360 INFO L290 TraceCheckUtils]: 0: Hoare triple {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-08 08:33:23,361 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 08:33:23,361 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-08 08:33:23,390 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:33:23,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:23,406 INFO L290 TraceCheckUtils]: 0: Hoare triple {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19120#true} is VALID [2022-04-08 08:33:23,406 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 08:33:23,407 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19120#true} {19121#false} #6457#return; {19121#false} is VALID [2022-04-08 08:33:23,410 INFO L272 TraceCheckUtils]: 0: Hoare triple {19120#true} call ULTIMATE.init(); {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:33:23,410 INFO L290 TraceCheckUtils]: 1: Hoare triple {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-08 08:33:23,410 INFO L290 TraceCheckUtils]: 2: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 08:33:23,411 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-08 08:33:23,411 INFO L272 TraceCheckUtils]: 4: Hoare triple {19120#true} call #t~ret1155 := main(); {19120#true} is VALID [2022-04-08 08:33:23,411 INFO L290 TraceCheckUtils]: 5: Hoare triple {19120#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {19125#(= main_~i~24 0)} is VALID [2022-04-08 08:33:23,412 INFO L290 TraceCheckUtils]: 6: Hoare triple {19125#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {19125#(= main_~i~24 0)} is VALID [2022-04-08 08:33:23,412 INFO L290 TraceCheckUtils]: 7: Hoare triple {19125#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {19126#(<= main_~i~24 1)} is VALID [2022-04-08 08:33:23,413 INFO L290 TraceCheckUtils]: 8: Hoare triple {19126#(<= main_~i~24 1)} assume !(~i~24 < 4); {19121#false} is VALID [2022-04-08 08:33:23,413 INFO L290 TraceCheckUtils]: 9: Hoare triple {19121#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {19121#false} is VALID [2022-04-08 08:33:23,413 INFO L272 TraceCheckUtils]: 10: Hoare triple {19121#false} call _BLAST_init(); {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:33:23,413 INFO L290 TraceCheckUtils]: 11: Hoare triple {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19120#true} is VALID [2022-04-08 08:33:23,414 INFO L290 TraceCheckUtils]: 12: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 08:33:23,414 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {19120#true} {19121#false} #6457#return; {19121#false} is VALID [2022-04-08 08:33:23,414 INFO L290 TraceCheckUtils]: 14: Hoare triple {19121#false} assume !(~status~31 >= 0); {19121#false} is VALID [2022-04-08 08:33:23,414 INFO L290 TraceCheckUtils]: 15: Hoare triple {19121#false} assume !(1 == ~pended~0); {19121#false} is VALID [2022-04-08 08:33:23,414 INFO L290 TraceCheckUtils]: 16: Hoare triple {19121#false} assume !(1 == ~pended~0); {19121#false} is VALID [2022-04-08 08:33:23,415 INFO L290 TraceCheckUtils]: 17: Hoare triple {19121#false} assume !(~s~0 == ~UNLOADED~0); {19121#false} is VALID [2022-04-08 08:33:23,415 INFO L290 TraceCheckUtils]: 18: Hoare triple {19121#false} assume !(-1 == ~status~31); {19121#false} is VALID [2022-04-08 08:33:23,415 INFO L290 TraceCheckUtils]: 19: Hoare triple {19121#false} assume !(~s~0 != ~SKIP2~0); {19121#false} is VALID [2022-04-08 08:33:23,415 INFO L290 TraceCheckUtils]: 20: Hoare triple {19121#false} assume 1 == ~pended~0; {19121#false} is VALID [2022-04-08 08:33:23,415 INFO L290 TraceCheckUtils]: 21: Hoare triple {19121#false} assume 259 != ~status~31; {19121#false} is VALID [2022-04-08 08:33:23,415 INFO L272 TraceCheckUtils]: 22: Hoare triple {19121#false} call errorFn(); {19121#false} is VALID [2022-04-08 08:33:23,416 INFO L290 TraceCheckUtils]: 23: Hoare triple {19121#false} assume !false; {19121#false} is VALID [2022-04-08 08:33:23,416 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:33:23,416 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:33:23,417 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1279501854] [2022-04-08 08:33:23,417 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1279501854] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:33:23,417 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1518982519] [2022-04-08 08:33:23,417 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:33:23,417 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:33:23,417 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:33:23,423 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:33:23,443 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-08 08:33:24,112 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:33:24,113 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:33:24,119 INFO L263 TraceCheckSpWp]: Trace formula consists of 1266 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-08 08:33:24,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:24,157 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:33:24,228 INFO L272 TraceCheckUtils]: 0: Hoare triple {19120#true} call ULTIMATE.init(); {19120#true} is VALID [2022-04-08 08:33:24,229 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-08 08:33:24,229 INFO L290 TraceCheckUtils]: 2: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 08:33:24,229 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-08 08:33:24,229 INFO L272 TraceCheckUtils]: 4: Hoare triple {19120#true} call #t~ret1155 := main(); {19120#true} is VALID [2022-04-08 08:33:24,229 INFO L290 TraceCheckUtils]: 5: Hoare triple {19120#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {19120#true} is VALID [2022-04-08 08:33:24,230 INFO L290 TraceCheckUtils]: 6: Hoare triple {19120#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {19120#true} is VALID [2022-04-08 08:33:24,230 INFO L290 TraceCheckUtils]: 7: Hoare triple {19120#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {19120#true} is VALID [2022-04-08 08:33:24,230 INFO L290 TraceCheckUtils]: 8: Hoare triple {19120#true} assume !(~i~24 < 4); {19120#true} is VALID [2022-04-08 08:33:24,230 INFO L290 TraceCheckUtils]: 9: Hoare triple {19120#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {19120#true} is VALID [2022-04-08 08:33:24,230 INFO L272 TraceCheckUtils]: 10: Hoare triple {19120#true} call _BLAST_init(); {19120#true} is VALID [2022-04-08 08:33:24,231 INFO L290 TraceCheckUtils]: 11: Hoare triple {19120#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 08:33:24,231 INFO L290 TraceCheckUtils]: 12: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume true; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 08:33:24,232 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {19168#(= ~s~0 ~UNLOADED~0)} {19120#true} #6457#return; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 08:33:24,232 INFO L290 TraceCheckUtils]: 14: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(~status~31 >= 0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 08:33:24,233 INFO L290 TraceCheckUtils]: 15: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 08:33:24,233 INFO L290 TraceCheckUtils]: 16: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 08:33:24,234 INFO L290 TraceCheckUtils]: 17: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(~s~0 == ~UNLOADED~0); {19121#false} is VALID [2022-04-08 08:33:24,234 INFO L290 TraceCheckUtils]: 18: Hoare triple {19121#false} assume !(-1 == ~status~31); {19121#false} is VALID [2022-04-08 08:33:24,234 INFO L290 TraceCheckUtils]: 19: Hoare triple {19121#false} assume !(~s~0 != ~SKIP2~0); {19121#false} is VALID [2022-04-08 08:33:24,234 INFO L290 TraceCheckUtils]: 20: Hoare triple {19121#false} assume 1 == ~pended~0; {19121#false} is VALID [2022-04-08 08:33:24,234 INFO L290 TraceCheckUtils]: 21: Hoare triple {19121#false} assume 259 != ~status~31; {19121#false} is VALID [2022-04-08 08:33:24,234 INFO L272 TraceCheckUtils]: 22: Hoare triple {19121#false} call errorFn(); {19121#false} is VALID [2022-04-08 08:33:24,235 INFO L290 TraceCheckUtils]: 23: Hoare triple {19121#false} assume !false; {19121#false} is VALID [2022-04-08 08:33:24,235 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:33:24,235 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:33:24,235 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1518982519] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:33:24,235 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:33:24,236 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-04-08 08:33:24,236 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:33:24,236 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1834011873] [2022-04-08 08:33:24,237 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1834011873] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:33:24,237 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:33:24,237 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 08:33:24,237 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781126852] [2022-04-08 08:33:24,237 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:33:24,238 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-08 08:33:24,238 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:33:24,238 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 08:33:24,269 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:33:24,269 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 08:33:24,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:33:24,270 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 08:33:24,270 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-08 08:33:24,270 INFO L87 Difference]: Start difference. First operand 1985 states and 2849 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 08:33:43,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:33:43,565 INFO L93 Difference]: Finished difference Result 2005 states and 2875 transitions. [2022-04-08 08:33:43,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 08:33:43,565 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-08 08:33:43,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:33:43,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 08:33:43,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-08 08:33:43,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 08:33:43,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-08 08:33:43,888 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2874 transitions. [2022-04-08 08:33:46,107 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2874 edges. 2874 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:33:46,405 INFO L225 Difference]: With dead ends: 2005 [2022-04-08 08:33:46,406 INFO L226 Difference]: Without dead ends: 1985 [2022-04-08 08:33:46,407 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-08 08:33:46,413 INFO L913 BasicCegarLoop]: 2846 mSDtfsCounter, 7 mSDsluCounter, 2787 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 5633 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-08 08:33:46,414 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [7 Valid, 5633 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-08 08:33:46,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1985 states. [2022-04-08 08:33:46,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1985 to 1985. [2022-04-08 08:33:46,861 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:33:46,867 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 08:33:46,873 INFO L74 IsIncluded]: Start isIncluded. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 08:33:46,879 INFO L87 Difference]: Start difference. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 08:33:47,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:33:47,091 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-08 08:33:47,091 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-08 08:33:47,099 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:33:47,099 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:33:47,112 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-08 08:33:47,117 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-08 08:33:47,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:33:47,277 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-08 08:33:47,277 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-08 08:33:47,285 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:33:47,286 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:33:47,286 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:33:47,286 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:33:47,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 08:33:47,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2848 transitions. [2022-04-08 08:33:47,622 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2848 transitions. Word has length 24 [2022-04-08 08:33:47,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:33:47,622 INFO L478 AbstractCegarLoop]: Abstraction has 1985 states and 2848 transitions. [2022-04-08 08:33:47,622 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 08:33:47,622 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 1985 states and 2848 transitions. [2022-04-08 08:33:55,555 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2848 edges. 2848 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:33:55,555 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-08 08:33:55,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-08 08:33:55,556 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:33:55,556 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:33:55,586 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-04-08 08:33:55,770 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:33:55,770 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:33:55,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:33:55,771 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 1 times [2022-04-08 08:33:55,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:33:55,771 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2131617354] [2022-04-08 08:33:55,778 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:33:55,779 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:33:55,779 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:33:55,779 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 2 times [2022-04-08 08:33:55,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:33:55,779 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935683105] [2022-04-08 08:33:55,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:33:55,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:33:55,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:56,082 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:33:56,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:56,122 INFO L290 TraceCheckUtils]: 0: Hoare triple {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-08 08:33:56,122 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 08:33:56,122 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-08 08:33:56,154 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:33:56,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:56,169 INFO L290 TraceCheckUtils]: 0: Hoare triple {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-08 08:33:56,170 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 08:33:56,170 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31155#false} #6457#return; {31155#false} is VALID [2022-04-08 08:33:56,187 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:33:56,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:56,205 INFO L290 TraceCheckUtils]: 0: Hoare triple {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31154#true} is VALID [2022-04-08 08:33:56,206 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 08:33:56,206 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31155#false} #6459#return; {31155#false} is VALID [2022-04-08 08:33:56,209 INFO L272 TraceCheckUtils]: 0: Hoare triple {31154#true} call ULTIMATE.init(); {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:33:56,209 INFO L290 TraceCheckUtils]: 1: Hoare triple {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-08 08:33:56,210 INFO L290 TraceCheckUtils]: 2: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 08:33:56,210 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-08 08:33:56,210 INFO L272 TraceCheckUtils]: 4: Hoare triple {31154#true} call #t~ret1155 := main(); {31154#true} is VALID [2022-04-08 08:33:56,210 INFO L290 TraceCheckUtils]: 5: Hoare triple {31154#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {31159#(= main_~i~24 0)} is VALID [2022-04-08 08:33:56,211 INFO L290 TraceCheckUtils]: 6: Hoare triple {31159#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {31159#(= main_~i~24 0)} is VALID [2022-04-08 08:33:56,211 INFO L290 TraceCheckUtils]: 7: Hoare triple {31159#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {31160#(<= main_~i~24 1)} is VALID [2022-04-08 08:33:56,212 INFO L290 TraceCheckUtils]: 8: Hoare triple {31160#(<= main_~i~24 1)} assume !(~i~24 < 4); {31155#false} is VALID [2022-04-08 08:33:56,212 INFO L290 TraceCheckUtils]: 9: Hoare triple {31155#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {31155#false} is VALID [2022-04-08 08:33:56,214 INFO L272 TraceCheckUtils]: 10: Hoare triple {31155#false} call _BLAST_init(); {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:33:56,214 INFO L290 TraceCheckUtils]: 11: Hoare triple {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-08 08:33:56,214 INFO L290 TraceCheckUtils]: 12: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 08:33:56,214 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {31154#true} {31155#false} #6457#return; {31155#false} is VALID [2022-04-08 08:33:56,214 INFO L290 TraceCheckUtils]: 14: Hoare triple {31155#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {31155#false} is VALID [2022-04-08 08:33:56,215 INFO L290 TraceCheckUtils]: 15: Hoare triple {31155#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {31155#false} is VALID [2022-04-08 08:33:56,215 INFO L272 TraceCheckUtils]: 16: Hoare triple {31155#false} call stub_driver_init(); {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:33:56,215 INFO L290 TraceCheckUtils]: 17: Hoare triple {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31154#true} is VALID [2022-04-08 08:33:56,215 INFO L290 TraceCheckUtils]: 18: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 08:33:56,215 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {31154#true} {31155#false} #6459#return; {31155#false} is VALID [2022-04-08 08:33:56,215 INFO L290 TraceCheckUtils]: 20: Hoare triple {31155#false} assume !!(~status~31 >= 0); {31155#false} is VALID [2022-04-08 08:33:56,216 INFO L290 TraceCheckUtils]: 21: Hoare triple {31155#false} assume !(0 == ~__BLAST_NONDET~3); {31155#false} is VALID [2022-04-08 08:33:56,216 INFO L290 TraceCheckUtils]: 22: Hoare triple {31155#false} assume 1 == ~__BLAST_NONDET~3; {31155#false} is VALID [2022-04-08 08:33:56,217 INFO L272 TraceCheckUtils]: 23: Hoare triple {31155#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {31155#false} is VALID [2022-04-08 08:33:56,217 INFO L290 TraceCheckUtils]: 24: Hoare triple {31155#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {31155#false} is VALID [2022-04-08 08:33:56,217 INFO L290 TraceCheckUtils]: 25: Hoare triple {31155#false} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {31155#false} is VALID [2022-04-08 08:33:56,218 INFO L272 TraceCheckUtils]: 26: Hoare triple {31155#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {31155#false} is VALID [2022-04-08 08:33:56,218 INFO L290 TraceCheckUtils]: 27: Hoare triple {31155#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31155#false} is VALID [2022-04-08 08:33:56,223 INFO L272 TraceCheckUtils]: 28: Hoare triple {31155#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {31155#false} is VALID [2022-04-08 08:33:56,223 INFO L290 TraceCheckUtils]: 29: Hoare triple {31155#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31155#false} is VALID [2022-04-08 08:33:56,224 INFO L290 TraceCheckUtils]: 30: Hoare triple {31155#false} assume !(~s~0 == ~NP~0); {31155#false} is VALID [2022-04-08 08:33:56,224 INFO L272 TraceCheckUtils]: 31: Hoare triple {31155#false} call errorFn(); {31155#false} is VALID [2022-04-08 08:33:56,224 INFO L290 TraceCheckUtils]: 32: Hoare triple {31155#false} assume !false; {31155#false} is VALID [2022-04-08 08:33:56,224 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:33:56,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:33:56,224 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1935683105] [2022-04-08 08:33:56,225 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1935683105] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:33:56,225 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [262983483] [2022-04-08 08:33:56,225 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:33:56,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:33:56,225 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:33:56,228 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:33:56,230 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-08 08:33:56,893 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:33:56,893 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:33:56,898 INFO L263 TraceCheckSpWp]: Trace formula consists of 1452 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-08 08:33:56,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:33:56,930 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:33:57,053 INFO L272 TraceCheckUtils]: 0: Hoare triple {31154#true} call ULTIMATE.init(); {31154#true} is VALID [2022-04-08 08:33:57,053 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-08 08:33:57,054 INFO L290 TraceCheckUtils]: 2: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 08:33:57,054 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-08 08:33:57,054 INFO L272 TraceCheckUtils]: 4: Hoare triple {31154#true} call #t~ret1155 := main(); {31154#true} is VALID [2022-04-08 08:33:57,054 INFO L290 TraceCheckUtils]: 5: Hoare triple {31154#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {31154#true} is VALID [2022-04-08 08:33:57,054 INFO L290 TraceCheckUtils]: 6: Hoare triple {31154#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {31154#true} is VALID [2022-04-08 08:33:57,054 INFO L290 TraceCheckUtils]: 7: Hoare triple {31154#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {31154#true} is VALID [2022-04-08 08:33:57,054 INFO L290 TraceCheckUtils]: 8: Hoare triple {31154#true} assume !(~i~24 < 4); {31154#true} is VALID [2022-04-08 08:33:57,054 INFO L290 TraceCheckUtils]: 9: Hoare triple {31154#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {31154#true} is VALID [2022-04-08 08:33:57,055 INFO L272 TraceCheckUtils]: 10: Hoare triple {31154#true} call _BLAST_init(); {31154#true} is VALID [2022-04-08 08:33:57,055 INFO L290 TraceCheckUtils]: 11: Hoare triple {31154#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-08 08:33:57,055 INFO L290 TraceCheckUtils]: 12: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 08:33:57,055 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {31154#true} {31154#true} #6457#return; {31154#true} is VALID [2022-04-08 08:33:57,055 INFO L290 TraceCheckUtils]: 14: Hoare triple {31154#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {31154#true} is VALID [2022-04-08 08:33:57,055 INFO L290 TraceCheckUtils]: 15: Hoare triple {31154#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {31154#true} is VALID [2022-04-08 08:33:57,056 INFO L272 TraceCheckUtils]: 16: Hoare triple {31154#true} call stub_driver_init(); {31154#true} is VALID [2022-04-08 08:33:57,062 INFO L290 TraceCheckUtils]: 17: Hoare triple {31154#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,063 INFO L290 TraceCheckUtils]: 18: Hoare triple {31224#(= ~s~0 ~NP~0)} assume true; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,063 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {31224#(= ~s~0 ~NP~0)} {31154#true} #6459#return; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,064 INFO L290 TraceCheckUtils]: 20: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !!(~status~31 >= 0); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,064 INFO L290 TraceCheckUtils]: 21: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !(0 == ~__BLAST_NONDET~3); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,064 INFO L290 TraceCheckUtils]: 22: Hoare triple {31224#(= ~s~0 ~NP~0)} assume 1 == ~__BLAST_NONDET~3; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,065 INFO L272 TraceCheckUtils]: 23: Hoare triple {31224#(= ~s~0 ~NP~0)} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,065 INFO L290 TraceCheckUtils]: 24: Hoare triple {31224#(= ~s~0 ~NP~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,066 INFO L290 TraceCheckUtils]: 25: Hoare triple {31224#(= ~s~0 ~NP~0)} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,066 INFO L272 TraceCheckUtils]: 26: Hoare triple {31224#(= ~s~0 ~NP~0)} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,067 INFO L290 TraceCheckUtils]: 27: Hoare triple {31224#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,067 INFO L272 TraceCheckUtils]: 28: Hoare triple {31224#(= ~s~0 ~NP~0)} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,068 INFO L290 TraceCheckUtils]: 29: Hoare triple {31224#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 08:33:57,068 INFO L290 TraceCheckUtils]: 30: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !(~s~0 == ~NP~0); {31155#false} is VALID [2022-04-08 08:33:57,068 INFO L272 TraceCheckUtils]: 31: Hoare triple {31155#false} call errorFn(); {31155#false} is VALID [2022-04-08 08:33:57,068 INFO L290 TraceCheckUtils]: 32: Hoare triple {31155#false} assume !false; {31155#false} is VALID [2022-04-08 08:33:57,068 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:33:57,069 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:33:57,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [262983483] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:33:57,069 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:33:57,069 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-08 08:33:57,069 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:33:57,069 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2131617354] [2022-04-08 08:33:57,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2131617354] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:33:57,069 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:33:57,070 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 08:33:57,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [233195960] [2022-04-08 08:33:57,070 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:33:57,070 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 33 [2022-04-08 08:33:57,070 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:33:57,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 08:33:57,119 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:33:57,119 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 08:33:57,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:33:57,120 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 08:33:57,120 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 08:33:57,120 INFO L87 Difference]: Start difference. First operand 1985 states and 2848 transitions. Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 08:34:18,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:34:18,522 INFO L93 Difference]: Finished difference Result 5045 states and 7333 transitions. [2022-04-08 08:34:18,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 08:34:18,522 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 33 [2022-04-08 08:34:18,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:34:18,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 08:34:18,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7332 transitions. [2022-04-08 08:34:18,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 08:34:19,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7332 transitions. [2022-04-08 08:34:19,238 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 7332 transitions. [2022-04-08 08:34:25,290 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 7332 edges. 7332 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:34:26,093 INFO L225 Difference]: With dead ends: 5045 [2022-04-08 08:34:26,093 INFO L226 Difference]: Without dead ends: 3732 [2022-04-08 08:34:26,099 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 08:34:26,100 INFO L913 BasicCegarLoop]: 3641 mSDtfsCounter, 2726 mSDsluCounter, 2556 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2726 SdHoareTripleChecker+Valid, 6197 SdHoareTripleChecker+Invalid, 147 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-08 08:34:26,100 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2726 Valid, 6197 Invalid, 147 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-08 08:34:26,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3732 states. [2022-04-08 08:34:26,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3732 to 3711. [2022-04-08 08:34:26,964 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:34:26,973 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-08 08:34:26,980 INFO L74 IsIncluded]: Start isIncluded. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-08 08:34:26,988 INFO L87 Difference]: Start difference. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-08 08:34:27,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:34:27,480 INFO L93 Difference]: Finished difference Result 3732 states and 5412 transitions. [2022-04-08 08:34:27,481 INFO L276 IsEmpty]: Start isEmpty. Operand 3732 states and 5412 transitions. [2022-04-08 08:34:27,495 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:34:27,496 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:34:27,504 INFO L74 IsIncluded]: Start isIncluded. First operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) Second operand 3732 states. [2022-04-08 08:34:27,513 INFO L87 Difference]: Start difference. First operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) Second operand 3732 states. [2022-04-08 08:34:28,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:34:28,047 INFO L93 Difference]: Finished difference Result 3732 states and 5412 transitions. [2022-04-08 08:34:28,047 INFO L276 IsEmpty]: Start isEmpty. Operand 3732 states and 5412 transitions. [2022-04-08 08:34:28,060 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:34:28,060 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:34:28,060 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:34:28,060 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:34:28,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-08 08:34:28,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3711 states to 3711 states and 5386 transitions. [2022-04-08 08:34:28,971 INFO L78 Accepts]: Start accepts. Automaton has 3711 states and 5386 transitions. Word has length 33 [2022-04-08 08:34:28,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:34:28,971 INFO L478 AbstractCegarLoop]: Abstraction has 3711 states and 5386 transitions. [2022-04-08 08:34:28,972 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 08:34:28,972 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3711 states and 5386 transitions. [2022-04-08 08:34:44,942 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5386 edges. 5386 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:34:44,943 INFO L276 IsEmpty]: Start isEmpty. Operand 3711 states and 5386 transitions. [2022-04-08 08:34:44,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-08 08:34:44,945 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:34:44,945 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:34:44,967 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-08 08:34:45,151 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-08 08:34:45,152 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:34:45,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:34:45,152 INFO L85 PathProgramCache]: Analyzing trace with hash -1905624997, now seen corresponding path program 1 times [2022-04-08 08:34:45,152 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:34:45,153 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1534447872] [2022-04-08 08:34:45,160 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:34:45,160 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:34:45,160 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:34:45,160 INFO L85 PathProgramCache]: Analyzing trace with hash -1905624997, now seen corresponding path program 2 times [2022-04-08 08:34:45,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:34:45,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379635451] [2022-04-08 08:34:45,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:34:45,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:34:45,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:34:45,504 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:34:45,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:34:45,534 INFO L290 TraceCheckUtils]: 0: Hoare triple {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-08 08:34:45,534 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,535 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-08 08:34:45,571 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:34:45,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:34:45,584 INFO L290 TraceCheckUtils]: 0: Hoare triple {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-08 08:34:45,584 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,584 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56246#false} #6457#return; {56246#false} is VALID [2022-04-08 08:34:45,602 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:34:45,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:34:45,624 INFO L290 TraceCheckUtils]: 0: Hoare triple {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-08 08:34:45,624 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,625 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56246#false} #6459#return; {56246#false} is VALID [2022-04-08 08:34:45,640 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-08 08:34:45,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:34:45,674 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-08 08:34:45,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:34:45,687 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:34:45,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:34:45,699 INFO L290 TraceCheckUtils]: 0: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:45,700 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 08:34:45,700 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,700 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 08:34:45,700 INFO L290 TraceCheckUtils]: 0: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:45,701 INFO L272 TraceCheckUtils]: 1: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:34:45,701 INFO L290 TraceCheckUtils]: 2: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:45,702 INFO L290 TraceCheckUtils]: 3: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 08:34:45,702 INFO L290 TraceCheckUtils]: 4: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,703 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 08:34:45,703 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,703 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-08 08:34:45,704 INFO L290 TraceCheckUtils]: 0: Hoare triple {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-08 08:34:45,704 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-08 08:34:45,705 INFO L272 TraceCheckUtils]: 2: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:34:45,705 INFO L290 TraceCheckUtils]: 3: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:45,706 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:34:45,706 INFO L290 TraceCheckUtils]: 5: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:45,709 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 08:34:45,709 INFO L290 TraceCheckUtils]: 7: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,710 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 08:34:45,710 INFO L290 TraceCheckUtils]: 9: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,710 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-08 08:34:45,710 INFO L290 TraceCheckUtils]: 11: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-08 08:34:45,710 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,710 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56246#false} #6463#return; {56246#false} is VALID [2022-04-08 08:34:45,714 INFO L272 TraceCheckUtils]: 0: Hoare triple {56245#true} call ULTIMATE.init(); {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:34:45,714 INFO L290 TraceCheckUtils]: 1: Hoare triple {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-08 08:34:45,714 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,715 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-08 08:34:45,715 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call #t~ret1155 := main(); {56245#true} is VALID [2022-04-08 08:34:45,718 INFO L290 TraceCheckUtils]: 5: Hoare triple {56245#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {56250#(= main_~i~24 0)} is VALID [2022-04-08 08:34:45,719 INFO L290 TraceCheckUtils]: 6: Hoare triple {56250#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {56250#(= main_~i~24 0)} is VALID [2022-04-08 08:34:45,719 INFO L290 TraceCheckUtils]: 7: Hoare triple {56250#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {56251#(<= main_~i~24 1)} is VALID [2022-04-08 08:34:45,720 INFO L290 TraceCheckUtils]: 8: Hoare triple {56251#(<= main_~i~24 1)} assume !(~i~24 < 4); {56246#false} is VALID [2022-04-08 08:34:45,720 INFO L290 TraceCheckUtils]: 9: Hoare triple {56246#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {56246#false} is VALID [2022-04-08 08:34:45,720 INFO L272 TraceCheckUtils]: 10: Hoare triple {56246#false} call _BLAST_init(); {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:34:45,720 INFO L290 TraceCheckUtils]: 11: Hoare triple {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-08 08:34:45,720 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,721 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56246#false} #6457#return; {56246#false} is VALID [2022-04-08 08:34:45,721 INFO L290 TraceCheckUtils]: 14: Hoare triple {56246#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {56246#false} is VALID [2022-04-08 08:34:45,721 INFO L290 TraceCheckUtils]: 15: Hoare triple {56246#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {56246#false} is VALID [2022-04-08 08:34:45,721 INFO L272 TraceCheckUtils]: 16: Hoare triple {56246#false} call stub_driver_init(); {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:34:45,721 INFO L290 TraceCheckUtils]: 17: Hoare triple {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-08 08:34:45,721 INFO L290 TraceCheckUtils]: 18: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,721 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {56245#true} {56246#false} #6459#return; {56246#false} is VALID [2022-04-08 08:34:45,721 INFO L290 TraceCheckUtils]: 20: Hoare triple {56246#false} assume !!(~status~31 >= 0); {56246#false} is VALID [2022-04-08 08:34:45,722 INFO L290 TraceCheckUtils]: 21: Hoare triple {56246#false} assume !(0 == ~__BLAST_NONDET~3); {56246#false} is VALID [2022-04-08 08:34:45,722 INFO L290 TraceCheckUtils]: 22: Hoare triple {56246#false} assume 1 == ~__BLAST_NONDET~3; {56246#false} is VALID [2022-04-08 08:34:45,722 INFO L272 TraceCheckUtils]: 23: Hoare triple {56246#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:34:45,722 INFO L290 TraceCheckUtils]: 24: Hoare triple {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-08 08:34:45,722 INFO L290 TraceCheckUtils]: 25: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-08 08:34:45,723 INFO L272 TraceCheckUtils]: 26: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:34:45,723 INFO L290 TraceCheckUtils]: 27: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:45,724 INFO L272 TraceCheckUtils]: 28: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:34:45,724 INFO L290 TraceCheckUtils]: 29: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:45,724 INFO L290 TraceCheckUtils]: 30: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 08:34:45,724 INFO L290 TraceCheckUtils]: 31: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,724 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 08:34:45,724 INFO L290 TraceCheckUtils]: 33: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,724 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-08 08:34:45,725 INFO L290 TraceCheckUtils]: 35: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-08 08:34:45,725 INFO L290 TraceCheckUtils]: 36: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:45,725 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {56245#true} {56246#false} #6463#return; {56246#false} is VALID [2022-04-08 08:34:45,725 INFO L290 TraceCheckUtils]: 38: Hoare triple {56246#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {56246#false} is VALID [2022-04-08 08:34:45,726 INFO L290 TraceCheckUtils]: 39: Hoare triple {56246#false} assume !(0 != ~we_should_unload~0); {56246#false} is VALID [2022-04-08 08:34:45,726 INFO L290 TraceCheckUtils]: 40: Hoare triple {56246#false} assume !(1 == ~pended~0); {56246#false} is VALID [2022-04-08 08:34:45,726 INFO L290 TraceCheckUtils]: 41: Hoare triple {56246#false} assume !(1 == ~pended~0); {56246#false} is VALID [2022-04-08 08:34:45,726 INFO L290 TraceCheckUtils]: 42: Hoare triple {56246#false} assume !(~s~0 == ~UNLOADED~0); {56246#false} is VALID [2022-04-08 08:34:45,726 INFO L290 TraceCheckUtils]: 43: Hoare triple {56246#false} assume !(-1 == ~status~31); {56246#false} is VALID [2022-04-08 08:34:45,727 INFO L290 TraceCheckUtils]: 44: Hoare triple {56246#false} assume !(~s~0 != ~SKIP2~0); {56246#false} is VALID [2022-04-08 08:34:45,727 INFO L290 TraceCheckUtils]: 45: Hoare triple {56246#false} assume 1 == ~pended~0; {56246#false} is VALID [2022-04-08 08:34:45,727 INFO L290 TraceCheckUtils]: 46: Hoare triple {56246#false} assume 259 != ~status~31; {56246#false} is VALID [2022-04-08 08:34:45,727 INFO L272 TraceCheckUtils]: 47: Hoare triple {56246#false} call errorFn(); {56246#false} is VALID [2022-04-08 08:34:45,727 INFO L290 TraceCheckUtils]: 48: Hoare triple {56246#false} assume !false; {56246#false} is VALID [2022-04-08 08:34:45,727 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:34:45,728 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:34:45,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1379635451] [2022-04-08 08:34:45,728 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1379635451] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:34:45,728 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1589666916] [2022-04-08 08:34:45,728 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:34:45,728 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:34:45,728 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:34:45,729 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:34:45,731 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-08 08:34:46,430 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:34:46,431 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:34:46,436 INFO L263 TraceCheckSpWp]: Trace formula consists of 1479 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-08 08:34:46,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:34:46,484 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:34:46,594 INFO L272 TraceCheckUtils]: 0: Hoare triple {56245#true} call ULTIMATE.init(); {56245#true} is VALID [2022-04-08 08:34:46,595 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-08 08:34:46,595 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:46,595 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-08 08:34:46,595 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call #t~ret1155 := main(); {56245#true} is VALID [2022-04-08 08:34:46,595 INFO L290 TraceCheckUtils]: 5: Hoare triple {56245#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {56245#true} is VALID [2022-04-08 08:34:46,595 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {56245#true} is VALID [2022-04-08 08:34:46,595 INFO L290 TraceCheckUtils]: 7: Hoare triple {56245#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {56245#true} is VALID [2022-04-08 08:34:46,596 INFO L290 TraceCheckUtils]: 8: Hoare triple {56245#true} assume !(~i~24 < 4); {56245#true} is VALID [2022-04-08 08:34:46,596 INFO L290 TraceCheckUtils]: 9: Hoare triple {56245#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {56245#true} is VALID [2022-04-08 08:34:46,596 INFO L272 TraceCheckUtils]: 10: Hoare triple {56245#true} call _BLAST_init(); {56245#true} is VALID [2022-04-08 08:34:46,596 INFO L290 TraceCheckUtils]: 11: Hoare triple {56245#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-08 08:34:46,596 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:46,597 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56245#true} #6457#return; {56245#true} is VALID [2022-04-08 08:34:46,597 INFO L290 TraceCheckUtils]: 14: Hoare triple {56245#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {56245#true} is VALID [2022-04-08 08:34:46,597 INFO L290 TraceCheckUtils]: 15: Hoare triple {56245#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {56245#true} is VALID [2022-04-08 08:34:46,597 INFO L272 TraceCheckUtils]: 16: Hoare triple {56245#true} call stub_driver_init(); {56245#true} is VALID [2022-04-08 08:34:46,597 INFO L290 TraceCheckUtils]: 17: Hoare triple {56245#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {56245#true} is VALID [2022-04-08 08:34:46,597 INFO L290 TraceCheckUtils]: 18: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:46,597 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {56245#true} {56245#true} #6459#return; {56245#true} is VALID [2022-04-08 08:34:46,598 INFO L290 TraceCheckUtils]: 20: Hoare triple {56245#true} assume !!(~status~31 >= 0); {56245#true} is VALID [2022-04-08 08:34:46,598 INFO L290 TraceCheckUtils]: 21: Hoare triple {56245#true} assume !(0 == ~__BLAST_NONDET~3); {56245#true} is VALID [2022-04-08 08:34:46,598 INFO L290 TraceCheckUtils]: 22: Hoare triple {56245#true} assume 1 == ~__BLAST_NONDET~3; {56245#true} is VALID [2022-04-08 08:34:46,598 INFO L272 TraceCheckUtils]: 23: Hoare triple {56245#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {56245#true} is VALID [2022-04-08 08:34:46,598 INFO L290 TraceCheckUtils]: 24: Hoare triple {56245#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {56245#true} is VALID [2022-04-08 08:34:46,598 INFO L290 TraceCheckUtils]: 25: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {56245#true} is VALID [2022-04-08 08:34:46,598 INFO L272 TraceCheckUtils]: 26: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56245#true} is VALID [2022-04-08 08:34:46,598 INFO L290 TraceCheckUtils]: 27: Hoare triple {56245#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:46,599 INFO L272 TraceCheckUtils]: 28: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56245#true} is VALID [2022-04-08 08:34:46,599 INFO L290 TraceCheckUtils]: 29: Hoare triple {56245#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 08:34:46,599 INFO L290 TraceCheckUtils]: 30: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 08:34:46,599 INFO L290 TraceCheckUtils]: 31: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:46,599 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 08:34:46,599 INFO L290 TraceCheckUtils]: 33: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:46,599 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-08 08:34:46,600 INFO L290 TraceCheckUtils]: 35: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-08 08:34:46,600 INFO L290 TraceCheckUtils]: 36: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 08:34:46,600 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {56245#true} {56245#true} #6463#return; {56245#true} is VALID [2022-04-08 08:34:46,600 INFO L290 TraceCheckUtils]: 38: Hoare triple {56245#true} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {56245#true} is VALID [2022-04-08 08:34:46,600 INFO L290 TraceCheckUtils]: 39: Hoare triple {56245#true} assume !(0 != ~we_should_unload~0); {56245#true} is VALID [2022-04-08 08:34:46,600 INFO L290 TraceCheckUtils]: 40: Hoare triple {56245#true} assume !(1 == ~pended~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 08:34:46,601 INFO L290 TraceCheckUtils]: 41: Hoare triple {56412#(not (= ~pended~0 1))} assume !(1 == ~pended~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 08:34:46,601 INFO L290 TraceCheckUtils]: 42: Hoare triple {56412#(not (= ~pended~0 1))} assume !(~s~0 == ~UNLOADED~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 08:34:46,601 INFO L290 TraceCheckUtils]: 43: Hoare triple {56412#(not (= ~pended~0 1))} assume !(-1 == ~status~31); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 08:34:46,602 INFO L290 TraceCheckUtils]: 44: Hoare triple {56412#(not (= ~pended~0 1))} assume !(~s~0 != ~SKIP2~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 08:34:46,602 INFO L290 TraceCheckUtils]: 45: Hoare triple {56412#(not (= ~pended~0 1))} assume 1 == ~pended~0; {56246#false} is VALID [2022-04-08 08:34:46,602 INFO L290 TraceCheckUtils]: 46: Hoare triple {56246#false} assume 259 != ~status~31; {56246#false} is VALID [2022-04-08 08:34:46,602 INFO L272 TraceCheckUtils]: 47: Hoare triple {56246#false} call errorFn(); {56246#false} is VALID [2022-04-08 08:34:46,602 INFO L290 TraceCheckUtils]: 48: Hoare triple {56246#false} assume !false; {56246#false} is VALID [2022-04-08 08:34:46,602 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:34:46,602 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:34:46,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1589666916] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:34:46,603 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:34:46,603 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2022-04-08 08:34:46,603 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:34:46,603 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1534447872] [2022-04-08 08:34:46,603 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1534447872] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:34:46,604 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:34:46,604 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 08:34:46,604 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1549242188] [2022-04-08 08:34:46,604 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:34:46,604 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-08 08:34:46,604 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:34:46,605 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:34:46,665 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:34:46,665 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 08:34:46,665 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:34:46,666 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 08:34:46,667 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-08 08:34:46,667 INFO L87 Difference]: Start difference. First operand 3711 states and 5386 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:34:59,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:34:59,095 INFO L93 Difference]: Finished difference Result 3829 states and 5529 transitions. [2022-04-08 08:34:59,095 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 08:34:59,095 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-08 08:34:59,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:34:59,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:34:59,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2934 transitions. [2022-04-08 08:34:59,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:34:59,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2934 transitions. [2022-04-08 08:34:59,281 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2934 transitions. [2022-04-08 08:35:01,724 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2934 edges. 2934 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:35:02,491 INFO L225 Difference]: With dead ends: 3829 [2022-04-08 08:35:02,491 INFO L226 Difference]: Without dead ends: 3810 [2022-04-08 08:35:02,493 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-08 08:35:02,495 INFO L913 BasicCegarLoop]: 2842 mSDtfsCounter, 2820 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2820 SdHoareTripleChecker+Valid, 2912 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-08 08:35:02,495 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2820 Valid, 2912 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-08 08:35:02,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3810 states. [2022-04-08 08:35:03,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3810 to 3804. [2022-04-08 08:35:03,303 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:35:03,311 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-08 08:35:03,319 INFO L74 IsIncluded]: Start isIncluded. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-08 08:35:03,327 INFO L87 Difference]: Start difference. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-08 08:35:04,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:35:04,010 INFO L93 Difference]: Finished difference Result 3810 states and 5502 transitions. [2022-04-08 08:35:04,010 INFO L276 IsEmpty]: Start isEmpty. Operand 3810 states and 5502 transitions. [2022-04-08 08:35:04,021 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:35:04,021 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:35:04,029 INFO L74 IsIncluded]: Start isIncluded. First operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) Second operand 3810 states. [2022-04-08 08:35:04,035 INFO L87 Difference]: Start difference. First operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) Second operand 3810 states. [2022-04-08 08:35:04,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:35:04,718 INFO L93 Difference]: Finished difference Result 3810 states and 5502 transitions. [2022-04-08 08:35:04,718 INFO L276 IsEmpty]: Start isEmpty. Operand 3810 states and 5502 transitions. [2022-04-08 08:35:04,729 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:35:04,730 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:35:04,730 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:35:04,730 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:35:04,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-08 08:35:05,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3804 states to 3804 states and 5497 transitions. [2022-04-08 08:35:05,638 INFO L78 Accepts]: Start accepts. Automaton has 3804 states and 5497 transitions. Word has length 49 [2022-04-08 08:35:05,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:35:05,638 INFO L478 AbstractCegarLoop]: Abstraction has 3804 states and 5497 transitions. [2022-04-08 08:35:05,638 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:35:05,638 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3804 states and 5497 transitions. [2022-04-08 08:35:21,916 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5497 edges. 5497 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:35:21,917 INFO L276 IsEmpty]: Start isEmpty. Operand 3804 states and 5497 transitions. [2022-04-08 08:35:21,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-08 08:35:21,918 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:35:21,918 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:35:21,946 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-08 08:35:22,131 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:35:22,132 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:35:22,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:35:22,132 INFO L85 PathProgramCache]: Analyzing trace with hash -1919969906, now seen corresponding path program 1 times [2022-04-08 08:35:22,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:35:22,132 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [776546401] [2022-04-08 08:35:22,140 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:35:22,140 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:35:22,140 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:35:22,140 INFO L85 PathProgramCache]: Analyzing trace with hash -1919969906, now seen corresponding path program 2 times [2022-04-08 08:35:22,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:35:22,141 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [223852754] [2022-04-08 08:35:22,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:35:22,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:35:22,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:35:22,455 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:35:22,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:35:22,482 INFO L290 TraceCheckUtils]: 0: Hoare triple {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-08 08:35:22,482 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,482 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-08 08:35:22,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:35:22,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:35:22,522 INFO L290 TraceCheckUtils]: 0: Hoare triple {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-08 08:35:22,523 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,523 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79323#false} #6457#return; {79323#false} is VALID [2022-04-08 08:35:22,539 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:35:22,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:35:22,551 INFO L290 TraceCheckUtils]: 0: Hoare triple {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-08 08:35:22,551 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,551 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79323#false} #6459#return; {79323#false} is VALID [2022-04-08 08:35:22,564 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-08 08:35:22,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:35:22,592 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-08 08:35:22,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:35:22,602 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:35:22,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:35:22,662 INFO L290 TraceCheckUtils]: 0: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:22,662 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-08 08:35:22,662 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,662 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-08 08:35:22,663 INFO L290 TraceCheckUtils]: 0: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:22,663 INFO L272 TraceCheckUtils]: 1: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:35:22,664 INFO L290 TraceCheckUtils]: 2: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:22,664 INFO L290 TraceCheckUtils]: 3: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-08 08:35:22,665 INFO L290 TraceCheckUtils]: 4: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,665 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-08 08:35:22,665 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,665 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-08 08:35:22,665 INFO L290 TraceCheckUtils]: 0: Hoare triple {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-08 08:35:22,666 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-08 08:35:22,667 INFO L272 TraceCheckUtils]: 2: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:35:22,667 INFO L290 TraceCheckUtils]: 3: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:22,667 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:35:22,668 INFO L290 TraceCheckUtils]: 5: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:22,668 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-08 08:35:22,668 INFO L290 TraceCheckUtils]: 7: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,668 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-08 08:35:22,668 INFO L290 TraceCheckUtils]: 9: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,668 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-08 08:35:22,668 INFO L290 TraceCheckUtils]: 11: Hoare triple {79322#true} #res := 0; {79322#true} is VALID [2022-04-08 08:35:22,668 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,669 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79323#false} #6463#return; {79323#false} is VALID [2022-04-08 08:35:22,672 INFO L272 TraceCheckUtils]: 0: Hoare triple {79322#true} call ULTIMATE.init(); {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:35:22,672 INFO L290 TraceCheckUtils]: 1: Hoare triple {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-08 08:35:22,677 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,677 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-08 08:35:22,678 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call #t~ret1155 := main(); {79322#true} is VALID [2022-04-08 08:35:22,678 INFO L290 TraceCheckUtils]: 5: Hoare triple {79322#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {79327#(= main_~i~24 0)} is VALID [2022-04-08 08:35:22,679 INFO L290 TraceCheckUtils]: 6: Hoare triple {79327#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {79327#(= main_~i~24 0)} is VALID [2022-04-08 08:35:22,679 INFO L290 TraceCheckUtils]: 7: Hoare triple {79327#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {79328#(<= main_~i~24 1)} is VALID [2022-04-08 08:35:22,680 INFO L290 TraceCheckUtils]: 8: Hoare triple {79328#(<= main_~i~24 1)} assume !(~i~24 < 4); {79323#false} is VALID [2022-04-08 08:35:22,680 INFO L290 TraceCheckUtils]: 9: Hoare triple {79323#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {79323#false} is VALID [2022-04-08 08:35:22,680 INFO L272 TraceCheckUtils]: 10: Hoare triple {79323#false} call _BLAST_init(); {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:35:22,680 INFO L290 TraceCheckUtils]: 11: Hoare triple {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-08 08:35:22,680 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,680 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79323#false} #6457#return; {79323#false} is VALID [2022-04-08 08:35:22,681 INFO L290 TraceCheckUtils]: 14: Hoare triple {79323#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {79323#false} is VALID [2022-04-08 08:35:22,681 INFO L290 TraceCheckUtils]: 15: Hoare triple {79323#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {79323#false} is VALID [2022-04-08 08:35:22,681 INFO L272 TraceCheckUtils]: 16: Hoare triple {79323#false} call stub_driver_init(); {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:35:22,681 INFO L290 TraceCheckUtils]: 17: Hoare triple {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-08 08:35:22,681 INFO L290 TraceCheckUtils]: 18: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,681 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {79322#true} {79323#false} #6459#return; {79323#false} is VALID [2022-04-08 08:35:22,681 INFO L290 TraceCheckUtils]: 20: Hoare triple {79323#false} assume !!(~status~31 >= 0); {79323#false} is VALID [2022-04-08 08:35:22,682 INFO L290 TraceCheckUtils]: 21: Hoare triple {79323#false} assume !(0 == ~__BLAST_NONDET~3); {79323#false} is VALID [2022-04-08 08:35:22,682 INFO L290 TraceCheckUtils]: 22: Hoare triple {79323#false} assume 1 == ~__BLAST_NONDET~3; {79323#false} is VALID [2022-04-08 08:35:22,682 INFO L272 TraceCheckUtils]: 23: Hoare triple {79323#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:35:22,682 INFO L290 TraceCheckUtils]: 24: Hoare triple {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-08 08:35:22,682 INFO L290 TraceCheckUtils]: 25: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-08 08:35:22,683 INFO L272 TraceCheckUtils]: 26: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:35:22,683 INFO L290 TraceCheckUtils]: 27: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:22,684 INFO L272 TraceCheckUtils]: 28: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:35:22,684 INFO L290 TraceCheckUtils]: 29: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:22,684 INFO L290 TraceCheckUtils]: 30: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-08 08:35:22,684 INFO L290 TraceCheckUtils]: 31: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,684 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-08 08:35:22,684 INFO L290 TraceCheckUtils]: 33: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,685 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-08 08:35:22,685 INFO L290 TraceCheckUtils]: 35: Hoare triple {79322#true} #res := 0; {79322#true} is VALID [2022-04-08 08:35:22,685 INFO L290 TraceCheckUtils]: 36: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:22,685 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {79322#true} {79323#false} #6463#return; {79323#false} is VALID [2022-04-08 08:35:22,685 INFO L290 TraceCheckUtils]: 38: Hoare triple {79323#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {79323#false} is VALID [2022-04-08 08:35:22,685 INFO L290 TraceCheckUtils]: 39: Hoare triple {79323#false} assume !(0 != ~we_should_unload~0); {79323#false} is VALID [2022-04-08 08:35:22,685 INFO L290 TraceCheckUtils]: 40: Hoare triple {79323#false} assume !(1 == ~pended~0); {79323#false} is VALID [2022-04-08 08:35:22,685 INFO L290 TraceCheckUtils]: 41: Hoare triple {79323#false} assume !(1 == ~pended~0); {79323#false} is VALID [2022-04-08 08:35:22,686 INFO L290 TraceCheckUtils]: 42: Hoare triple {79323#false} assume !(~s~0 == ~UNLOADED~0); {79323#false} is VALID [2022-04-08 08:35:22,686 INFO L290 TraceCheckUtils]: 43: Hoare triple {79323#false} assume !(-1 == ~status~31); {79323#false} is VALID [2022-04-08 08:35:22,690 INFO L290 TraceCheckUtils]: 44: Hoare triple {79323#false} assume ~s~0 != ~SKIP2~0; {79323#false} is VALID [2022-04-08 08:35:22,691 INFO L290 TraceCheckUtils]: 45: Hoare triple {79323#false} assume ~s~0 != ~IPC~0; {79323#false} is VALID [2022-04-08 08:35:22,691 INFO L290 TraceCheckUtils]: 46: Hoare triple {79323#false} assume ~s~0 != ~DC~0; {79323#false} is VALID [2022-04-08 08:35:22,691 INFO L272 TraceCheckUtils]: 47: Hoare triple {79323#false} call errorFn(); {79323#false} is VALID [2022-04-08 08:35:22,691 INFO L290 TraceCheckUtils]: 48: Hoare triple {79323#false} assume !false; {79323#false} is VALID [2022-04-08 08:35:22,692 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:35:22,692 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:35:22,694 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [223852754] [2022-04-08 08:35:22,696 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [223852754] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:35:22,696 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1420999035] [2022-04-08 08:35:22,696 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:35:22,696 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:35:22,696 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:35:22,697 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:35:22,727 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-08 08:35:23,380 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:35:23,380 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:35:23,385 INFO L263 TraceCheckSpWp]: Trace formula consists of 1477 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-08 08:35:23,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:35:23,421 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:35:23,541 INFO L272 TraceCheckUtils]: 0: Hoare triple {79322#true} call ULTIMATE.init(); {79322#true} is VALID [2022-04-08 08:35:23,541 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-08 08:35:23,541 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:23,542 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-08 08:35:23,542 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call #t~ret1155 := main(); {79322#true} is VALID [2022-04-08 08:35:23,542 INFO L290 TraceCheckUtils]: 5: Hoare triple {79322#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {79322#true} is VALID [2022-04-08 08:35:23,542 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {79322#true} is VALID [2022-04-08 08:35:23,542 INFO L290 TraceCheckUtils]: 7: Hoare triple {79322#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {79322#true} is VALID [2022-04-08 08:35:23,542 INFO L290 TraceCheckUtils]: 8: Hoare triple {79322#true} assume !(~i~24 < 4); {79322#true} is VALID [2022-04-08 08:35:23,542 INFO L290 TraceCheckUtils]: 9: Hoare triple {79322#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {79322#true} is VALID [2022-04-08 08:35:23,543 INFO L272 TraceCheckUtils]: 10: Hoare triple {79322#true} call _BLAST_init(); {79322#true} is VALID [2022-04-08 08:35:23,543 INFO L290 TraceCheckUtils]: 11: Hoare triple {79322#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-08 08:35:23,543 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:23,543 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79322#true} #6457#return; {79322#true} is VALID [2022-04-08 08:35:23,543 INFO L290 TraceCheckUtils]: 14: Hoare triple {79322#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {79322#true} is VALID [2022-04-08 08:35:23,543 INFO L290 TraceCheckUtils]: 15: Hoare triple {79322#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {79322#true} is VALID [2022-04-08 08:35:23,543 INFO L272 TraceCheckUtils]: 16: Hoare triple {79322#true} call stub_driver_init(); {79322#true} is VALID [2022-04-08 08:35:23,543 INFO L290 TraceCheckUtils]: 17: Hoare triple {79322#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {79322#true} is VALID [2022-04-08 08:35:23,544 INFO L290 TraceCheckUtils]: 18: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 08:35:23,544 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {79322#true} {79322#true} #6459#return; {79322#true} is VALID [2022-04-08 08:35:23,544 INFO L290 TraceCheckUtils]: 20: Hoare triple {79322#true} assume !!(~status~31 >= 0); {79322#true} is VALID [2022-04-08 08:35:23,544 INFO L290 TraceCheckUtils]: 21: Hoare triple {79322#true} assume !(0 == ~__BLAST_NONDET~3); {79322#true} is VALID [2022-04-08 08:35:23,544 INFO L290 TraceCheckUtils]: 22: Hoare triple {79322#true} assume 1 == ~__BLAST_NONDET~3; {79322#true} is VALID [2022-04-08 08:35:23,544 INFO L272 TraceCheckUtils]: 23: Hoare triple {79322#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {79322#true} is VALID [2022-04-08 08:35:23,545 INFO L290 TraceCheckUtils]: 24: Hoare triple {79322#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {79322#true} is VALID [2022-04-08 08:35:23,545 INFO L290 TraceCheckUtils]: 25: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {79322#true} is VALID [2022-04-08 08:35:23,545 INFO L272 TraceCheckUtils]: 26: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79322#true} is VALID [2022-04-08 08:35:23,545 INFO L290 TraceCheckUtils]: 27: Hoare triple {79322#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:23,545 INFO L272 TraceCheckUtils]: 28: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79322#true} is VALID [2022-04-08 08:35:23,545 INFO L290 TraceCheckUtils]: 29: Hoare triple {79322#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 08:35:23,546 INFO L290 TraceCheckUtils]: 30: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,546 INFO L290 TraceCheckUtils]: 31: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,547 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #6659#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,547 INFO L290 TraceCheckUtils]: 33: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,548 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #5919#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,549 INFO L290 TraceCheckUtils]: 35: Hoare triple {79459#(= ~s~0 ~DC~0)} #res := 0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,549 INFO L290 TraceCheckUtils]: 36: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,550 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #6463#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,551 INFO L290 TraceCheckUtils]: 38: Hoare triple {79459#(= ~s~0 ~DC~0)} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,551 INFO L290 TraceCheckUtils]: 39: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(0 != ~we_should_unload~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,551 INFO L290 TraceCheckUtils]: 40: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(1 == ~pended~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,552 INFO L290 TraceCheckUtils]: 41: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(1 == ~pended~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,552 INFO L290 TraceCheckUtils]: 42: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(~s~0 == ~UNLOADED~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,553 INFO L290 TraceCheckUtils]: 43: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(-1 == ~status~31); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,553 INFO L290 TraceCheckUtils]: 44: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~SKIP2~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,554 INFO L290 TraceCheckUtils]: 45: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~IPC~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 08:35:23,554 INFO L290 TraceCheckUtils]: 46: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~DC~0; {79323#false} is VALID [2022-04-08 08:35:23,554 INFO L272 TraceCheckUtils]: 47: Hoare triple {79323#false} call errorFn(); {79323#false} is VALID [2022-04-08 08:35:23,554 INFO L290 TraceCheckUtils]: 48: Hoare triple {79323#false} assume !false; {79323#false} is VALID [2022-04-08 08:35:23,554 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:35:23,555 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:35:23,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1420999035] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:35:23,555 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:35:23,555 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2022-04-08 08:35:23,555 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:35:23,555 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [776546401] [2022-04-08 08:35:23,555 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [776546401] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:35:23,555 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:35:23,556 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 08:35:23,556 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1565550270] [2022-04-08 08:35:23,556 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:35:23,556 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-08 08:35:23,556 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:35:23,556 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:35:23,610 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:35:23,610 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 08:35:23,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:35:23,611 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 08:35:23,611 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-08 08:35:23,611 INFO L87 Difference]: Start difference. First operand 3804 states and 5497 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:35:47,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:35:47,764 INFO L93 Difference]: Finished difference Result 4627 states and 6683 transitions. [2022-04-08 08:35:47,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 08:35:47,764 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-08 08:35:47,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:35:47,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:35:47,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4532 transitions. [2022-04-08 08:35:47,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:35:48,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4532 transitions. [2022-04-08 08:35:48,050 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 4532 transitions. [2022-04-08 08:35:51,978 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4532 edges. 4532 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:35:53,122 INFO L225 Difference]: With dead ends: 4627 [2022-04-08 08:35:53,123 INFO L226 Difference]: Without dead ends: 4622 [2022-04-08 08:35:53,124 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-08 08:35:53,125 INFO L913 BasicCegarLoop]: 4145 mSDtfsCounter, 1721 mSDsluCounter, 2715 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1721 SdHoareTripleChecker+Valid, 6860 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-08 08:35:53,125 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1721 Valid, 6860 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-08 08:35:53,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4622 states. [2022-04-08 08:35:54,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4622 to 4578. [2022-04-08 08:35:54,059 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:35:54,068 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-08 08:35:54,079 INFO L74 IsIncluded]: Start isIncluded. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-08 08:35:54,088 INFO L87 Difference]: Start difference. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-08 08:35:55,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:35:55,062 INFO L93 Difference]: Finished difference Result 4622 states and 6676 transitions. [2022-04-08 08:35:55,062 INFO L276 IsEmpty]: Start isEmpty. Operand 4622 states and 6676 transitions. [2022-04-08 08:35:55,076 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:35:55,077 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:35:55,087 INFO L74 IsIncluded]: Start isIncluded. First operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) Second operand 4622 states. [2022-04-08 08:35:55,096 INFO L87 Difference]: Start difference. First operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) Second operand 4622 states. [2022-04-08 08:35:55,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:35:55,914 INFO L93 Difference]: Finished difference Result 4622 states and 6676 transitions. [2022-04-08 08:35:55,914 INFO L276 IsEmpty]: Start isEmpty. Operand 4622 states and 6676 transitions. [2022-04-08 08:35:55,923 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:35:55,924 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:35:55,924 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:35:55,924 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:35:55,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-08 08:35:57,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4578 states to 4578 states and 6622 transitions. [2022-04-08 08:35:57,422 INFO L78 Accepts]: Start accepts. Automaton has 4578 states and 6622 transitions. Word has length 49 [2022-04-08 08:35:57,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:35:57,422 INFO L478 AbstractCegarLoop]: Abstraction has 4578 states and 6622 transitions. [2022-04-08 08:35:57,422 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:35:57,422 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4578 states and 6622 transitions. [2022-04-08 08:36:18,095 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6622 edges. 6622 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:36:18,095 INFO L276 IsEmpty]: Start isEmpty. Operand 4578 states and 6622 transitions. [2022-04-08 08:36:18,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-08 08:36:18,096 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:36:18,096 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:36:18,117 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-08 08:36:18,296 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:36:18,297 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:36:18,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:36:18,297 INFO L85 PathProgramCache]: Analyzing trace with hash 1061683448, now seen corresponding path program 1 times [2022-04-08 08:36:18,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:36:18,297 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1145972280] [2022-04-08 08:36:18,305 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:36:18,305 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:36:18,305 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:36:18,305 INFO L85 PathProgramCache]: Analyzing trace with hash 1061683448, now seen corresponding path program 2 times [2022-04-08 08:36:18,305 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:36:18,305 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647788107] [2022-04-08 08:36:18,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:36:18,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:36:18,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:36:18,610 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:36:18,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:36:18,648 INFO L290 TraceCheckUtils]: 0: Hoare triple {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-08 08:36:18,649 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,649 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-08 08:36:18,680 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:36:18,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:36:18,707 INFO L290 TraceCheckUtils]: 0: Hoare triple {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-08 08:36:18,708 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,708 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107168#false} #6457#return; {107168#false} is VALID [2022-04-08 08:36:18,724 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:36:18,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:36:18,737 INFO L290 TraceCheckUtils]: 0: Hoare triple {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-08 08:36:18,738 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,738 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107168#false} #6459#return; {107168#false} is VALID [2022-04-08 08:36:18,750 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-08 08:36:18,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:36:18,780 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-08 08:36:18,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:36:18,791 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:36:18,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:36:18,806 INFO L290 TraceCheckUtils]: 0: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:18,806 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 08:36:18,807 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,807 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 08:36:18,807 INFO L290 TraceCheckUtils]: 0: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:18,808 INFO L272 TraceCheckUtils]: 1: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:36:18,808 INFO L290 TraceCheckUtils]: 2: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:18,808 INFO L290 TraceCheckUtils]: 3: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 08:36:18,808 INFO L290 TraceCheckUtils]: 4: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,808 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 08:36:18,808 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,809 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-08 08:36:18,809 INFO L290 TraceCheckUtils]: 0: Hoare triple {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-08 08:36:18,809 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-08 08:36:18,810 INFO L272 TraceCheckUtils]: 2: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:36:18,810 INFO L290 TraceCheckUtils]: 3: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:18,810 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:36:18,811 INFO L290 TraceCheckUtils]: 5: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:18,811 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 08:36:18,811 INFO L290 TraceCheckUtils]: 7: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,811 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 08:36:18,811 INFO L290 TraceCheckUtils]: 9: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,811 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-08 08:36:18,811 INFO L290 TraceCheckUtils]: 11: Hoare triple {107167#true} #res := 0; {107167#true} is VALID [2022-04-08 08:36:18,811 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,811 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107168#false} #6463#return; {107168#false} is VALID [2022-04-08 08:36:18,815 INFO L272 TraceCheckUtils]: 0: Hoare triple {107167#true} call ULTIMATE.init(); {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:36:18,815 INFO L290 TraceCheckUtils]: 1: Hoare triple {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-08 08:36:18,815 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,815 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-08 08:36:18,815 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call #t~ret1155 := main(); {107167#true} is VALID [2022-04-08 08:36:18,816 INFO L290 TraceCheckUtils]: 5: Hoare triple {107167#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {107172#(= main_~i~24 0)} is VALID [2022-04-08 08:36:18,816 INFO L290 TraceCheckUtils]: 6: Hoare triple {107172#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {107172#(= main_~i~24 0)} is VALID [2022-04-08 08:36:18,816 INFO L290 TraceCheckUtils]: 7: Hoare triple {107172#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {107173#(<= main_~i~24 1)} is VALID [2022-04-08 08:36:18,817 INFO L290 TraceCheckUtils]: 8: Hoare triple {107173#(<= main_~i~24 1)} assume !(~i~24 < 4); {107168#false} is VALID [2022-04-08 08:36:18,817 INFO L290 TraceCheckUtils]: 9: Hoare triple {107168#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {107168#false} is VALID [2022-04-08 08:36:18,817 INFO L272 TraceCheckUtils]: 10: Hoare triple {107168#false} call _BLAST_init(); {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:36:18,817 INFO L290 TraceCheckUtils]: 11: Hoare triple {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-08 08:36:18,817 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,818 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107168#false} #6457#return; {107168#false} is VALID [2022-04-08 08:36:18,818 INFO L290 TraceCheckUtils]: 14: Hoare triple {107168#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {107168#false} is VALID [2022-04-08 08:36:18,818 INFO L290 TraceCheckUtils]: 15: Hoare triple {107168#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {107168#false} is VALID [2022-04-08 08:36:18,818 INFO L272 TraceCheckUtils]: 16: Hoare triple {107168#false} call stub_driver_init(); {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:36:18,818 INFO L290 TraceCheckUtils]: 17: Hoare triple {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-08 08:36:18,818 INFO L290 TraceCheckUtils]: 18: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,818 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {107167#true} {107168#false} #6459#return; {107168#false} is VALID [2022-04-08 08:36:18,818 INFO L290 TraceCheckUtils]: 20: Hoare triple {107168#false} assume !!(~status~31 >= 0); {107168#false} is VALID [2022-04-08 08:36:18,818 INFO L290 TraceCheckUtils]: 21: Hoare triple {107168#false} assume !(0 == ~__BLAST_NONDET~3); {107168#false} is VALID [2022-04-08 08:36:18,819 INFO L290 TraceCheckUtils]: 22: Hoare triple {107168#false} assume 1 == ~__BLAST_NONDET~3; {107168#false} is VALID [2022-04-08 08:36:18,819 INFO L272 TraceCheckUtils]: 23: Hoare triple {107168#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:36:18,819 INFO L290 TraceCheckUtils]: 24: Hoare triple {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-08 08:36:18,819 INFO L290 TraceCheckUtils]: 25: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-08 08:36:18,820 INFO L272 TraceCheckUtils]: 26: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:36:18,820 INFO L290 TraceCheckUtils]: 27: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:18,820 INFO L272 TraceCheckUtils]: 28: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:36:18,821 INFO L290 TraceCheckUtils]: 29: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:18,821 INFO L290 TraceCheckUtils]: 30: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 08:36:18,821 INFO L290 TraceCheckUtils]: 31: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,821 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 08:36:18,821 INFO L290 TraceCheckUtils]: 33: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,821 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-08 08:36:18,821 INFO L290 TraceCheckUtils]: 35: Hoare triple {107167#true} #res := 0; {107167#true} is VALID [2022-04-08 08:36:18,821 INFO L290 TraceCheckUtils]: 36: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:18,822 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {107167#true} {107168#false} #6463#return; {107168#false} is VALID [2022-04-08 08:36:18,822 INFO L290 TraceCheckUtils]: 38: Hoare triple {107168#false} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {107168#false} is VALID [2022-04-08 08:36:18,822 INFO L290 TraceCheckUtils]: 39: Hoare triple {107168#false} assume !(0 != ~we_should_unload~0); {107168#false} is VALID [2022-04-08 08:36:18,822 INFO L290 TraceCheckUtils]: 40: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-08 08:36:18,864 INFO L290 TraceCheckUtils]: 41: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-08 08:36:18,864 INFO L290 TraceCheckUtils]: 42: Hoare triple {107168#false} assume !(~s~0 == ~UNLOADED~0); {107168#false} is VALID [2022-04-08 08:36:18,864 INFO L290 TraceCheckUtils]: 43: Hoare triple {107168#false} assume !(-1 == ~status~31); {107168#false} is VALID [2022-04-08 08:36:18,864 INFO L290 TraceCheckUtils]: 44: Hoare triple {107168#false} assume !(~s~0 != ~SKIP2~0); {107168#false} is VALID [2022-04-08 08:36:18,865 INFO L290 TraceCheckUtils]: 45: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-08 08:36:18,865 INFO L290 TraceCheckUtils]: 46: Hoare triple {107168#false} assume ~s~0 == ~DC~0; {107168#false} is VALID [2022-04-08 08:36:18,865 INFO L290 TraceCheckUtils]: 47: Hoare triple {107168#false} assume 259 == ~status~31; {107168#false} is VALID [2022-04-08 08:36:18,865 INFO L272 TraceCheckUtils]: 48: Hoare triple {107168#false} call errorFn(); {107168#false} is VALID [2022-04-08 08:36:18,865 INFO L290 TraceCheckUtils]: 49: Hoare triple {107168#false} assume !false; {107168#false} is VALID [2022-04-08 08:36:18,865 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:36:18,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:36:18,866 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1647788107] [2022-04-08 08:36:18,866 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1647788107] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:36:18,866 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1847250496] [2022-04-08 08:36:18,866 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:36:18,866 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:36:18,866 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:36:18,872 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:36:18,876 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-08 08:36:19,655 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:36:19,655 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:36:19,660 INFO L263 TraceCheckSpWp]: Trace formula consists of 1481 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-08 08:36:19,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:36:19,694 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:36:19,874 INFO L272 TraceCheckUtils]: 0: Hoare triple {107167#true} call ULTIMATE.init(); {107167#true} is VALID [2022-04-08 08:36:19,874 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-08 08:36:19,874 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:19,874 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-08 08:36:19,874 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call #t~ret1155 := main(); {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L290 TraceCheckUtils]: 5: Hoare triple {107167#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L290 TraceCheckUtils]: 7: Hoare triple {107167#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L290 TraceCheckUtils]: 8: Hoare triple {107167#true} assume !(~i~24 < 4); {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L290 TraceCheckUtils]: 9: Hoare triple {107167#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L272 TraceCheckUtils]: 10: Hoare triple {107167#true} call _BLAST_init(); {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L290 TraceCheckUtils]: 11: Hoare triple {107167#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:19,875 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107167#true} #6457#return; {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L290 TraceCheckUtils]: 14: Hoare triple {107167#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L290 TraceCheckUtils]: 15: Hoare triple {107167#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L272 TraceCheckUtils]: 16: Hoare triple {107167#true} call stub_driver_init(); {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L290 TraceCheckUtils]: 17: Hoare triple {107167#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L290 TraceCheckUtils]: 18: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {107167#true} {107167#true} #6459#return; {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L290 TraceCheckUtils]: 20: Hoare triple {107167#true} assume !!(~status~31 >= 0); {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L290 TraceCheckUtils]: 21: Hoare triple {107167#true} assume !(0 == ~__BLAST_NONDET~3); {107167#true} is VALID [2022-04-08 08:36:19,876 INFO L290 TraceCheckUtils]: 22: Hoare triple {107167#true} assume 1 == ~__BLAST_NONDET~3; {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L272 TraceCheckUtils]: 23: Hoare triple {107167#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L290 TraceCheckUtils]: 24: Hoare triple {107167#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 4 + ~extension~3.offset, 4); {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L290 TraceCheckUtils]: 25: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 4294967296;havoc #t~mem292;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := 0;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L272 TraceCheckUtils]: 26: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L290 TraceCheckUtils]: 27: Hoare triple {107167#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L272 TraceCheckUtils]: 28: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L290 TraceCheckUtils]: 29: Hoare triple {107167#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L290 TraceCheckUtils]: 30: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L290 TraceCheckUtils]: 31: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:19,877 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 08:36:19,878 INFO L290 TraceCheckUtils]: 33: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 08:36:19,878 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-08 08:36:19,878 INFO L290 TraceCheckUtils]: 35: Hoare triple {107167#true} #res := 0; {107319#(<= |PptDispatchClose_#res| 0)} is VALID [2022-04-08 08:36:19,878 INFO L290 TraceCheckUtils]: 36: Hoare triple {107319#(<= |PptDispatchClose_#res| 0)} assume true; {107319#(<= |PptDispatchClose_#res| 0)} is VALID [2022-04-08 08:36:19,880 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {107319#(<= |PptDispatchClose_#res| 0)} {107167#true} #6463#return; {107326#(<= |main_#t~ret1110| 0)} is VALID [2022-04-08 08:36:19,880 INFO L290 TraceCheckUtils]: 38: Hoare triple {107326#(<= |main_#t~ret1110| 0)} assume -2147483648 <= #t~ret1110 && #t~ret1110 <= 2147483647;~status~31 := #t~ret1110;havoc #t~ret1110; {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,885 INFO L290 TraceCheckUtils]: 39: Hoare triple {107330#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,885 INFO L290 TraceCheckUtils]: 40: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,885 INFO L290 TraceCheckUtils]: 41: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,886 INFO L290 TraceCheckUtils]: 42: Hoare triple {107330#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,886 INFO L290 TraceCheckUtils]: 43: Hoare triple {107330#(<= main_~status~31 0)} assume !(-1 == ~status~31); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,886 INFO L290 TraceCheckUtils]: 44: Hoare triple {107330#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,886 INFO L290 TraceCheckUtils]: 45: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,887 INFO L290 TraceCheckUtils]: 46: Hoare triple {107330#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {107330#(<= main_~status~31 0)} is VALID [2022-04-08 08:36:19,887 INFO L290 TraceCheckUtils]: 47: Hoare triple {107330#(<= main_~status~31 0)} assume 259 == ~status~31; {107168#false} is VALID [2022-04-08 08:36:19,887 INFO L272 TraceCheckUtils]: 48: Hoare triple {107168#false} call errorFn(); {107168#false} is VALID [2022-04-08 08:36:19,887 INFO L290 TraceCheckUtils]: 49: Hoare triple {107168#false} assume !false; {107168#false} is VALID [2022-04-08 08:36:19,888 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:36:19,888 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:36:19,888 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1847250496] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:36:19,888 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:36:19,888 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-08 08:36:19,888 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:36:19,888 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1145972280] [2022-04-08 08:36:19,888 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1145972280] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:36:19,888 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:36:19,888 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 08:36:19,888 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [632135893] [2022-04-08 08:36:19,888 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:36:19,889 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 50 [2022-04-08 08:36:19,889 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:36:19,889 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:36:19,940 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:36:19,940 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 08:36:19,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:36:19,941 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 08:36:19,941 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 08:36:19,941 INFO L87 Difference]: Start difference. First operand 4578 states and 6622 transitions. Second operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:36:53,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:36:53,148 INFO L93 Difference]: Finished difference Result 4593 states and 6640 transitions. [2022-04-08 08:36:53,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 08:36:53,148 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 50 [2022-04-08 08:36:53,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:36:53,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:36:53,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2859 transitions. [2022-04-08 08:36:53,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:36:53,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2859 transitions. [2022-04-08 08:36:53,349 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2859 transitions. [2022-04-08 08:36:55,924 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2859 edges. 2859 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:36:56,959 INFO L225 Difference]: With dead ends: 4593 [2022-04-08 08:36:56,959 INFO L226 Difference]: Without dead ends: 4552 [2022-04-08 08:36:56,962 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 08:36:56,962 INFO L913 BasicCegarLoop]: 2840 mSDtfsCounter, 5 mSDsluCounter, 8500 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11340 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-08 08:36:56,963 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 11340 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-08 08:36:56,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4552 states. [2022-04-08 08:36:57,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4552 to 4552. [2022-04-08 08:36:57,866 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:36:57,874 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-08 08:36:57,884 INFO L74 IsIncluded]: Start isIncluded. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-08 08:36:57,893 INFO L87 Difference]: Start difference. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-08 08:36:58,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:36:58,798 INFO L93 Difference]: Finished difference Result 4552 states and 6585 transitions. [2022-04-08 08:36:58,798 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-08 08:36:58,808 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:36:58,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:36:58,817 INFO L74 IsIncluded]: Start isIncluded. First operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) Second operand 4552 states. [2022-04-08 08:36:58,825 INFO L87 Difference]: Start difference. First operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) Second operand 4552 states. [2022-04-08 08:36:59,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:36:59,516 INFO L93 Difference]: Finished difference Result 4552 states and 6585 transitions. [2022-04-08 08:36:59,516 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-08 08:36:59,569 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:36:59,570 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:36:59,570 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:36:59,570 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:36:59,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-08 08:37:00,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4552 states to 4552 states and 6585 transitions. [2022-04-08 08:37:00,666 INFO L78 Accepts]: Start accepts. Automaton has 4552 states and 6585 transitions. Word has length 50 [2022-04-08 08:37:00,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:37:00,666 INFO L478 AbstractCegarLoop]: Abstraction has 4552 states and 6585 transitions. [2022-04-08 08:37:00,666 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:37:00,666 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4552 states and 6585 transitions. [2022-04-08 08:37:21,502 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6585 edges. 6585 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:37:21,503 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-08 08:37:21,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-04-08 08:37:21,503 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:37:21,504 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:37:21,524 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-08 08:37:21,707 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:37:21,707 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:37:21,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:37:21,708 INFO L85 PathProgramCache]: Analyzing trace with hash -1755528464, now seen corresponding path program 1 times [2022-04-08 08:37:21,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:37:21,708 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1708444350] [2022-04-08 08:37:21,714 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:37:21,715 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:37:21,715 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:37:21,715 INFO L85 PathProgramCache]: Analyzing trace with hash -1755528464, now seen corresponding path program 2 times [2022-04-08 08:37:21,715 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:37:21,715 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895916899] [2022-04-08 08:37:21,715 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:37:21,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:37:21,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:37:22,016 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:37:22,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:37:22,041 INFO L290 TraceCheckUtils]: 0: Hoare triple {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134757#true} is VALID [2022-04-08 08:37:22,041 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 08:37:22,041 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134757#true} #6857#return; {134757#true} is VALID [2022-04-08 08:37:22,072 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:37:22,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:37:22,084 INFO L290 TraceCheckUtils]: 0: Hoare triple {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134757#true} is VALID [2022-04-08 08:37:22,084 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 08:37:22,084 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134758#false} #6457#return; {134758#false} is VALID [2022-04-08 08:37:22,101 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:37:22,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:37:22,112 INFO L290 TraceCheckUtils]: 0: Hoare triple {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134757#true} is VALID [2022-04-08 08:37:22,112 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 08:37:22,112 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134758#false} #6459#return; {134758#false} is VALID [2022-04-08 08:37:22,113 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-08 08:37:22,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:37:22,127 INFO L290 TraceCheckUtils]: 0: Hoare triple {134757#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134757#true} is VALID [2022-04-08 08:37:22,127 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume 0 == ~__BLAST_NONDET~26; {134757#true} is VALID [2022-04-08 08:37:22,127 INFO L290 TraceCheckUtils]: 2: Hoare triple {134757#true} #res := 0; {134757#true} is VALID [2022-04-08 08:37:22,127 INFO L290 TraceCheckUtils]: 3: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 08:37:22,127 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {134757#true} {134758#false} #5849#return; {134758#false} is VALID [2022-04-08 08:37:22,131 INFO L272 TraceCheckUtils]: 0: Hoare triple {134757#true} call ULTIMATE.init(); {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:37:22,131 INFO L290 TraceCheckUtils]: 1: Hoare triple {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134757#true} is VALID [2022-04-08 08:37:22,131 INFO L290 TraceCheckUtils]: 2: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 08:37:22,131 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134757#true} {134757#true} #6857#return; {134757#true} is VALID [2022-04-08 08:37:22,131 INFO L272 TraceCheckUtils]: 4: Hoare triple {134757#true} call #t~ret1155 := main(); {134757#true} is VALID [2022-04-08 08:37:22,131 INFO L290 TraceCheckUtils]: 5: Hoare triple {134757#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {134762#(= main_~i~24 0)} is VALID [2022-04-08 08:37:22,132 INFO L290 TraceCheckUtils]: 6: Hoare triple {134762#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {134762#(= main_~i~24 0)} is VALID [2022-04-08 08:37:22,132 INFO L290 TraceCheckUtils]: 7: Hoare triple {134762#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {134763#(<= main_~i~24 1)} is VALID [2022-04-08 08:37:22,133 INFO L290 TraceCheckUtils]: 8: Hoare triple {134763#(<= main_~i~24 1)} assume !(~i~24 < 4); {134758#false} is VALID [2022-04-08 08:37:22,133 INFO L290 TraceCheckUtils]: 9: Hoare triple {134758#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {134758#false} is VALID [2022-04-08 08:37:22,133 INFO L272 TraceCheckUtils]: 10: Hoare triple {134758#false} call _BLAST_init(); {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:37:22,133 INFO L290 TraceCheckUtils]: 11: Hoare triple {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134757#true} is VALID [2022-04-08 08:37:22,133 INFO L290 TraceCheckUtils]: 12: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 08:37:22,133 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {134757#true} {134758#false} #6457#return; {134758#false} is VALID [2022-04-08 08:37:22,133 INFO L290 TraceCheckUtils]: 14: Hoare triple {134758#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {134758#false} is VALID [2022-04-08 08:37:22,133 INFO L290 TraceCheckUtils]: 15: Hoare triple {134758#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {134758#false} is VALID [2022-04-08 08:37:22,134 INFO L272 TraceCheckUtils]: 16: Hoare triple {134758#false} call stub_driver_init(); {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:37:22,134 INFO L290 TraceCheckUtils]: 17: Hoare triple {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134757#true} is VALID [2022-04-08 08:37:22,134 INFO L290 TraceCheckUtils]: 18: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 08:37:22,134 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {134757#true} {134758#false} #6459#return; {134758#false} is VALID [2022-04-08 08:37:22,134 INFO L290 TraceCheckUtils]: 20: Hoare triple {134758#false} assume !!(~status~31 >= 0); {134758#false} is VALID [2022-04-08 08:37:22,134 INFO L290 TraceCheckUtils]: 21: Hoare triple {134758#false} assume !(0 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 08:37:22,134 INFO L290 TraceCheckUtils]: 22: Hoare triple {134758#false} assume !(1 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 08:37:22,134 INFO L290 TraceCheckUtils]: 23: Hoare triple {134758#false} assume !(3 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 08:37:22,134 INFO L290 TraceCheckUtils]: 24: Hoare triple {134758#false} assume !(4 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 08:37:22,135 INFO L290 TraceCheckUtils]: 25: Hoare triple {134758#false} assume !(5 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 08:37:22,135 INFO L290 TraceCheckUtils]: 26: Hoare triple {134758#false} assume 6 == ~__BLAST_NONDET~3; {134758#false} is VALID [2022-04-08 08:37:22,135 INFO L272 TraceCheckUtils]: 27: Hoare triple {134758#false} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {134758#false} is VALID [2022-04-08 08:37:22,135 INFO L290 TraceCheckUtils]: 28: Hoare triple {134758#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {134758#false} is VALID [2022-04-08 08:37:22,135 INFO L272 TraceCheckUtils]: 29: Hoare triple {134758#false} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {134757#true} is VALID [2022-04-08 08:37:22,135 INFO L290 TraceCheckUtils]: 30: Hoare triple {134757#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134757#true} is VALID [2022-04-08 08:37:22,135 INFO L290 TraceCheckUtils]: 31: Hoare triple {134757#true} assume 0 == ~__BLAST_NONDET~26; {134757#true} is VALID [2022-04-08 08:37:22,135 INFO L290 TraceCheckUtils]: 32: Hoare triple {134757#true} #res := 0; {134757#true} is VALID [2022-04-08 08:37:22,136 INFO L290 TraceCheckUtils]: 33: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 08:37:22,136 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {134757#true} {134758#false} #5849#return; {134758#false} is VALID [2022-04-08 08:37:22,136 INFO L290 TraceCheckUtils]: 35: Hoare triple {134758#false} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-08 08:37:22,136 INFO L290 TraceCheckUtils]: 36: Hoare triple {134758#false} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-08 08:37:22,136 INFO L290 TraceCheckUtils]: 37: Hoare triple {134758#false} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-08 08:37:22,136 INFO L290 TraceCheckUtils]: 38: Hoare triple {134758#false} assume 3 == #t~mem1080;havoc #t~mem1080; {134758#false} is VALID [2022-04-08 08:37:22,136 INFO L290 TraceCheckUtils]: 39: Hoare triple {134758#false} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {134758#false} is VALID [2022-04-08 08:37:22,136 INFO L290 TraceCheckUtils]: 40: Hoare triple {134758#false} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {134758#false} is VALID [2022-04-08 08:37:22,136 INFO L272 TraceCheckUtils]: 41: Hoare triple {134758#false} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {134758#false} is VALID [2022-04-08 08:37:22,137 INFO L290 TraceCheckUtils]: 42: Hoare triple {134758#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {134758#false} is VALID [2022-04-08 08:37:22,137 INFO L290 TraceCheckUtils]: 43: Hoare triple {134758#false} assume 0 != ~compRegistered~0; {134758#false} is VALID [2022-04-08 08:37:22,137 INFO L290 TraceCheckUtils]: 44: Hoare triple {134758#false} assume !(0 == ~routine~0); {134758#false} is VALID [2022-04-08 08:37:22,137 INFO L290 TraceCheckUtils]: 45: Hoare triple {134758#false} assume !(1 == ~routine~0); {134758#false} is VALID [2022-04-08 08:37:22,138 INFO L290 TraceCheckUtils]: 46: Hoare triple {134758#false} assume -1073741802 == ~compRetStatus~0; {134758#false} is VALID [2022-04-08 08:37:22,138 INFO L272 TraceCheckUtils]: 47: Hoare triple {134758#false} call stubMoreProcessingRequired(); {134758#false} is VALID [2022-04-08 08:37:22,138 INFO L290 TraceCheckUtils]: 48: Hoare triple {134758#false} assume !(~s~0 == ~NP~0); {134758#false} is VALID [2022-04-08 08:37:22,138 INFO L272 TraceCheckUtils]: 49: Hoare triple {134758#false} call errorFn(); {134758#false} is VALID [2022-04-08 08:37:22,138 INFO L290 TraceCheckUtils]: 50: Hoare triple {134758#false} assume !false; {134758#false} is VALID [2022-04-08 08:37:22,139 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:37:22,139 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:37:22,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895916899] [2022-04-08 08:37:22,139 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1895916899] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:37:22,139 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [503790461] [2022-04-08 08:37:22,139 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:37:22,139 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:37:22,140 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:37:22,144 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:37:22,148 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-08 08:37:23,025 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:37:23,025 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:37:23,030 INFO L263 TraceCheckSpWp]: Trace formula consists of 1578 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-08 08:37:23,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:37:23,064 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:37:23,195 INFO L272 TraceCheckUtils]: 0: Hoare triple {134757#true} call ULTIMATE.init(); {134757#true} is VALID [2022-04-08 08:37:23,199 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,199 INFO L290 TraceCheckUtils]: 2: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,199 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134784#(= ~routine~0 0)} {134757#true} #6857#return; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,200 INFO L272 TraceCheckUtils]: 4: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1155 := main(); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,200 INFO L290 TraceCheckUtils]: 5: Hoare triple {134784#(= ~routine~0 0)} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,200 INFO L290 TraceCheckUtils]: 6: Hoare triple {134784#(= ~routine~0 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,201 INFO L290 TraceCheckUtils]: 7: Hoare triple {134784#(= ~routine~0 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,201 INFO L290 TraceCheckUtils]: 8: Hoare triple {134784#(= ~routine~0 0)} assume !(~i~24 < 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,201 INFO L290 TraceCheckUtils]: 9: Hoare triple {134784#(= ~routine~0 0)} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,203 INFO L272 TraceCheckUtils]: 10: Hoare triple {134784#(= ~routine~0 0)} call _BLAST_init(); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,204 INFO L290 TraceCheckUtils]: 11: Hoare triple {134784#(= ~routine~0 0)} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,204 INFO L290 TraceCheckUtils]: 12: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,205 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #6457#return; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,205 INFO L290 TraceCheckUtils]: 14: Hoare triple {134784#(= ~routine~0 0)} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,205 INFO L290 TraceCheckUtils]: 15: Hoare triple {134784#(= ~routine~0 0)} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,206 INFO L272 TraceCheckUtils]: 16: Hoare triple {134784#(= ~routine~0 0)} call stub_driver_init(); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,206 INFO L290 TraceCheckUtils]: 17: Hoare triple {134784#(= ~routine~0 0)} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,207 INFO L290 TraceCheckUtils]: 18: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,207 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #6459#return; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,208 INFO L290 TraceCheckUtils]: 20: Hoare triple {134784#(= ~routine~0 0)} assume !!(~status~31 >= 0); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,208 INFO L290 TraceCheckUtils]: 21: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,208 INFO L290 TraceCheckUtils]: 22: Hoare triple {134784#(= ~routine~0 0)} assume !(1 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,209 INFO L290 TraceCheckUtils]: 23: Hoare triple {134784#(= ~routine~0 0)} assume !(3 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,209 INFO L290 TraceCheckUtils]: 24: Hoare triple {134784#(= ~routine~0 0)} assume !(4 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,210 INFO L290 TraceCheckUtils]: 25: Hoare triple {134784#(= ~routine~0 0)} assume !(5 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,210 INFO L290 TraceCheckUtils]: 26: Hoare triple {134784#(= ~routine~0 0)} assume 6 == ~__BLAST_NONDET~3; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,211 INFO L272 TraceCheckUtils]: 27: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,212 INFO L290 TraceCheckUtils]: 28: Hoare triple {134784#(= ~routine~0 0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,213 INFO L272 TraceCheckUtils]: 29: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,214 INFO L290 TraceCheckUtils]: 30: Hoare triple {134784#(= ~routine~0 0)} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,214 INFO L290 TraceCheckUtils]: 31: Hoare triple {134784#(= ~routine~0 0)} assume 0 == ~__BLAST_NONDET~26; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,215 INFO L290 TraceCheckUtils]: 32: Hoare triple {134784#(= ~routine~0 0)} #res := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,215 INFO L290 TraceCheckUtils]: 33: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,217 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #5849#return; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,217 INFO L290 TraceCheckUtils]: 35: Hoare triple {134784#(= ~routine~0 0)} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,217 INFO L290 TraceCheckUtils]: 36: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,218 INFO L290 TraceCheckUtils]: 37: Hoare triple {134784#(= ~routine~0 0)} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,218 INFO L290 TraceCheckUtils]: 38: Hoare triple {134784#(= ~routine~0 0)} assume 3 == #t~mem1080;havoc #t~mem1080; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,218 INFO L290 TraceCheckUtils]: 39: Hoare triple {134784#(= ~routine~0 0)} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,219 INFO L290 TraceCheckUtils]: 40: Hoare triple {134784#(= ~routine~0 0)} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,219 INFO L272 TraceCheckUtils]: 41: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,220 INFO L290 TraceCheckUtils]: 42: Hoare triple {134784#(= ~routine~0 0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,220 INFO L290 TraceCheckUtils]: 43: Hoare triple {134784#(= ~routine~0 0)} assume 0 != ~compRegistered~0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 08:37:23,220 INFO L290 TraceCheckUtils]: 44: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == ~routine~0); {134758#false} is VALID [2022-04-08 08:37:23,220 INFO L290 TraceCheckUtils]: 45: Hoare triple {134758#false} assume !(1 == ~routine~0); {134758#false} is VALID [2022-04-08 08:37:23,221 INFO L290 TraceCheckUtils]: 46: Hoare triple {134758#false} assume -1073741802 == ~compRetStatus~0; {134758#false} is VALID [2022-04-08 08:37:23,221 INFO L272 TraceCheckUtils]: 47: Hoare triple {134758#false} call stubMoreProcessingRequired(); {134758#false} is VALID [2022-04-08 08:37:23,221 INFO L290 TraceCheckUtils]: 48: Hoare triple {134758#false} assume !(~s~0 == ~NP~0); {134758#false} is VALID [2022-04-08 08:37:23,221 INFO L272 TraceCheckUtils]: 49: Hoare triple {134758#false} call errorFn(); {134758#false} is VALID [2022-04-08 08:37:23,221 INFO L290 TraceCheckUtils]: 50: Hoare triple {134758#false} assume !false; {134758#false} is VALID [2022-04-08 08:37:23,221 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:37:23,221 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:37:23,221 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [503790461] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:37:23,221 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:37:23,221 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-08 08:37:23,222 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:37:23,222 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1708444350] [2022-04-08 08:37:23,222 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1708444350] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:37:23,222 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:37:23,222 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 08:37:23,222 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [544230453] [2022-04-08 08:37:23,222 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:37:23,222 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) Word has length 51 [2022-04-08 08:37:23,222 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:37:23,223 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 08:37:23,275 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:37:23,276 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 08:37:23,276 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:37:23,276 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 08:37:23,276 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 08:37:23,276 INFO L87 Difference]: Start difference. First operand 4552 states and 6585 transitions. Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 08:37:37,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:37:37,718 INFO L93 Difference]: Finished difference Result 7500 states and 10838 transitions. [2022-04-08 08:37:37,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 08:37:37,718 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) Word has length 51 [2022-04-08 08:37:37,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:37:37,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 08:37:37,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4966 transitions. [2022-04-08 08:37:37,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 08:37:38,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4966 transitions. [2022-04-08 08:37:38,007 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 4966 transitions. [2022-04-08 08:37:42,503 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4966 edges. 4966 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:37:43,580 INFO L225 Difference]: With dead ends: 7500 [2022-04-08 08:37:43,580 INFO L226 Difference]: Without dead ends: 4606 [2022-04-08 08:37:43,590 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 08:37:43,591 INFO L913 BasicCegarLoop]: 2819 mSDtfsCounter, 2710 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2710 SdHoareTripleChecker+Valid, 2964 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-08 08:37:43,591 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2710 Valid, 2964 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-08 08:37:43,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4606 states. [2022-04-08 08:37:44,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4606 to 4521. [2022-04-08 08:37:44,607 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:37:44,613 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-08 08:37:44,619 INFO L74 IsIncluded]: Start isIncluded. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-08 08:37:44,625 INFO L87 Difference]: Start difference. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-08 08:37:45,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:37:45,308 INFO L93 Difference]: Finished difference Result 4606 states and 6629 transitions. [2022-04-08 08:37:45,308 INFO L276 IsEmpty]: Start isEmpty. Operand 4606 states and 6629 transitions. [2022-04-08 08:37:45,315 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:37:45,316 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:37:45,322 INFO L74 IsIncluded]: Start isIncluded. First operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) Second operand 4606 states. [2022-04-08 08:37:45,326 INFO L87 Difference]: Start difference. First operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) Second operand 4606 states. [2022-04-08 08:37:46,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:37:46,016 INFO L93 Difference]: Finished difference Result 4606 states and 6629 transitions. [2022-04-08 08:37:46,016 INFO L276 IsEmpty]: Start isEmpty. Operand 4606 states and 6629 transitions. [2022-04-08 08:37:46,026 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:37:46,027 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:37:46,027 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:37:46,027 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:37:46,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-08 08:37:47,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4521 states to 4521 states and 6531 transitions. [2022-04-08 08:37:47,193 INFO L78 Accepts]: Start accepts. Automaton has 4521 states and 6531 transitions. Word has length 51 [2022-04-08 08:37:47,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:37:47,193 INFO L478 AbstractCegarLoop]: Abstraction has 4521 states and 6531 transitions. [2022-04-08 08:37:47,193 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 08:37:47,193 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4521 states and 6531 transitions. [2022-04-08 08:38:09,062 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6531 edges. 6531 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:38:09,063 INFO L276 IsEmpty]: Start isEmpty. Operand 4521 states and 6531 transitions. [2022-04-08 08:38:09,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-08 08:38:09,064 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:38:09,064 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:38:09,084 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2022-04-08 08:38:09,264 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:38:09,265 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:38:09,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:38:09,265 INFO L85 PathProgramCache]: Analyzing trace with hash 111621356, now seen corresponding path program 1 times [2022-04-08 08:38:09,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:38:09,265 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2029047043] [2022-04-08 08:38:09,271 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:38:09,272 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:38:09,272 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:38:09,272 INFO L85 PathProgramCache]: Analyzing trace with hash 111621356, now seen corresponding path program 2 times [2022-04-08 08:38:09,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:38:09,272 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2108322154] [2022-04-08 08:38:09,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:38:09,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:38:09,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:38:09,584 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:38:09,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:38:09,607 INFO L290 TraceCheckUtils]: 0: Hoare triple {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-08 08:38:09,608 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,608 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-08 08:38:09,638 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:38:09,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:38:09,648 INFO L290 TraceCheckUtils]: 0: Hoare triple {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-08 08:38:09,649 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,649 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168186#false} #6457#return; {168186#false} is VALID [2022-04-08 08:38:09,666 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:38:09,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:38:09,677 INFO L290 TraceCheckUtils]: 0: Hoare triple {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-08 08:38:09,677 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,677 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168186#false} #6459#return; {168186#false} is VALID [2022-04-08 08:38:09,690 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-08 08:38:09,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:38:09,721 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-04-08 08:38:09,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:38:09,733 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:38:09,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:38:09,745 INFO L290 TraceCheckUtils]: 0: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:09,745 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 08:38:09,745 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,745 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 08:38:09,745 INFO L290 TraceCheckUtils]: 0: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:09,746 INFO L272 TraceCheckUtils]: 1: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:38:09,746 INFO L290 TraceCheckUtils]: 2: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:09,746 INFO L290 TraceCheckUtils]: 3: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 08:38:09,746 INFO L290 TraceCheckUtils]: 4: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,746 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 08:38:09,747 INFO L290 TraceCheckUtils]: 6: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,747 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-08 08:38:09,747 INFO L290 TraceCheckUtils]: 0: Hoare triple {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-08 08:38:09,747 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-08 08:38:09,747 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-08 08:38:09,748 INFO L272 TraceCheckUtils]: 3: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:38:09,748 INFO L290 TraceCheckUtils]: 4: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:09,748 INFO L272 TraceCheckUtils]: 5: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:38:09,749 INFO L290 TraceCheckUtils]: 6: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:09,749 INFO L290 TraceCheckUtils]: 7: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 08:38:09,749 INFO L290 TraceCheckUtils]: 8: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,749 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 08:38:09,749 INFO L290 TraceCheckUtils]: 10: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,749 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-08 08:38:09,749 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} #res := 0; {168185#true} is VALID [2022-04-08 08:38:09,749 INFO L290 TraceCheckUtils]: 13: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,749 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {168185#true} {168186#false} #6469#return; {168186#false} is VALID [2022-04-08 08:38:09,753 INFO L272 TraceCheckUtils]: 0: Hoare triple {168185#true} call ULTIMATE.init(); {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:38:09,753 INFO L290 TraceCheckUtils]: 1: Hoare triple {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-08 08:38:09,753 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,753 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-08 08:38:09,753 INFO L272 TraceCheckUtils]: 4: Hoare triple {168185#true} call #t~ret1155 := main(); {168185#true} is VALID [2022-04-08 08:38:09,753 INFO L290 TraceCheckUtils]: 5: Hoare triple {168185#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {168190#(= main_~i~24 0)} is VALID [2022-04-08 08:38:09,754 INFO L290 TraceCheckUtils]: 6: Hoare triple {168190#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {168190#(= main_~i~24 0)} is VALID [2022-04-08 08:38:09,754 INFO L290 TraceCheckUtils]: 7: Hoare triple {168190#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {168191#(<= main_~i~24 1)} is VALID [2022-04-08 08:38:09,755 INFO L290 TraceCheckUtils]: 8: Hoare triple {168191#(<= main_~i~24 1)} assume !(~i~24 < 4); {168186#false} is VALID [2022-04-08 08:38:09,755 INFO L290 TraceCheckUtils]: 9: Hoare triple {168186#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {168186#false} is VALID [2022-04-08 08:38:09,755 INFO L272 TraceCheckUtils]: 10: Hoare triple {168186#false} call _BLAST_init(); {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:38:09,755 INFO L290 TraceCheckUtils]: 11: Hoare triple {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-08 08:38:09,755 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,755 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {168185#true} {168186#false} #6457#return; {168186#false} is VALID [2022-04-08 08:38:09,755 INFO L290 TraceCheckUtils]: 14: Hoare triple {168186#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {168186#false} is VALID [2022-04-08 08:38:09,755 INFO L290 TraceCheckUtils]: 15: Hoare triple {168186#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {168186#false} is VALID [2022-04-08 08:38:09,755 INFO L272 TraceCheckUtils]: 16: Hoare triple {168186#false} call stub_driver_init(); {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:38:09,756 INFO L290 TraceCheckUtils]: 17: Hoare triple {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-08 08:38:09,756 INFO L290 TraceCheckUtils]: 18: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,756 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {168185#true} {168186#false} #6459#return; {168186#false} is VALID [2022-04-08 08:38:09,756 INFO L290 TraceCheckUtils]: 20: Hoare triple {168186#false} assume !!(~status~31 >= 0); {168186#false} is VALID [2022-04-08 08:38:09,756 INFO L290 TraceCheckUtils]: 21: Hoare triple {168186#false} assume !(0 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 08:38:09,756 INFO L290 TraceCheckUtils]: 22: Hoare triple {168186#false} assume !(1 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 08:38:09,756 INFO L290 TraceCheckUtils]: 23: Hoare triple {168186#false} assume !(3 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 08:38:09,756 INFO L290 TraceCheckUtils]: 24: Hoare triple {168186#false} assume !(4 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 08:38:09,756 INFO L290 TraceCheckUtils]: 25: Hoare triple {168186#false} assume 5 == ~__BLAST_NONDET~3; {168186#false} is VALID [2022-04-08 08:38:09,757 INFO L272 TraceCheckUtils]: 26: Hoare triple {168186#false} call #t~ret1113 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:38:09,757 INFO L290 TraceCheckUtils]: 27: Hoare triple {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-08 08:38:09,757 INFO L290 TraceCheckUtils]: 28: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-08 08:38:09,757 INFO L290 TraceCheckUtils]: 29: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-08 08:38:09,758 INFO L272 TraceCheckUtils]: 30: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:38:09,758 INFO L290 TraceCheckUtils]: 31: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:09,758 INFO L272 TraceCheckUtils]: 32: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:38:09,758 INFO L290 TraceCheckUtils]: 33: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:09,759 INFO L290 TraceCheckUtils]: 34: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 08:38:09,759 INFO L290 TraceCheckUtils]: 35: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,759 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 08:38:09,759 INFO L290 TraceCheckUtils]: 37: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,759 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-08 08:38:09,759 INFO L290 TraceCheckUtils]: 39: Hoare triple {168185#true} #res := 0; {168185#true} is VALID [2022-04-08 08:38:09,759 INFO L290 TraceCheckUtils]: 40: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:09,759 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {168185#true} {168186#false} #6469#return; {168186#false} is VALID [2022-04-08 08:38:09,759 INFO L290 TraceCheckUtils]: 42: Hoare triple {168186#false} assume -2147483648 <= #t~ret1113 && #t~ret1113 <= 2147483647;~status~31 := #t~ret1113;havoc #t~ret1113; {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 43: Hoare triple {168186#false} assume !(0 != ~we_should_unload~0); {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 44: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 45: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 46: Hoare triple {168186#false} assume !(~s~0 == ~UNLOADED~0); {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 47: Hoare triple {168186#false} assume !(-1 == ~status~31); {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 48: Hoare triple {168186#false} assume !(~s~0 != ~SKIP2~0); {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 49: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 50: Hoare triple {168186#false} assume ~s~0 == ~DC~0; {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L290 TraceCheckUtils]: 51: Hoare triple {168186#false} assume 259 == ~status~31; {168186#false} is VALID [2022-04-08 08:38:09,760 INFO L272 TraceCheckUtils]: 52: Hoare triple {168186#false} call errorFn(); {168186#false} is VALID [2022-04-08 08:38:09,761 INFO L290 TraceCheckUtils]: 53: Hoare triple {168186#false} assume !false; {168186#false} is VALID [2022-04-08 08:38:09,761 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:38:09,761 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:38:09,761 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2108322154] [2022-04-08 08:38:09,761 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2108322154] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:38:09,761 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [913122424] [2022-04-08 08:38:09,762 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:38:09,762 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:38:09,762 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:38:09,763 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:38:09,794 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-08 08:38:10,738 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:38:10,739 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:38:10,746 INFO L263 TraceCheckSpWp]: Trace formula consists of 1484 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-08 08:38:10,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:38:10,783 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:38:10,991 INFO L272 TraceCheckUtils]: 0: Hoare triple {168185#true} call ULTIMATE.init(); {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L272 TraceCheckUtils]: 4: Hoare triple {168185#true} call #t~ret1155 := main(); {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 5: Hoare triple {168185#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 6: Hoare triple {168185#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 7: Hoare triple {168185#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 8: Hoare triple {168185#true} assume !(~i~24 < 4); {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 9: Hoare triple {168185#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L272 TraceCheckUtils]: 10: Hoare triple {168185#true} call _BLAST_init(); {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 11: Hoare triple {168185#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-08 08:38:10,992 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {168185#true} {168185#true} #6457#return; {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 14: Hoare triple {168185#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 15: Hoare triple {168185#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L272 TraceCheckUtils]: 16: Hoare triple {168185#true} call stub_driver_init(); {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 17: Hoare triple {168185#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 18: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {168185#true} {168185#true} #6459#return; {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 20: Hoare triple {168185#true} assume !!(~status~31 >= 0); {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 21: Hoare triple {168185#true} assume !(0 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 22: Hoare triple {168185#true} assume !(1 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 23: Hoare triple {168185#true} assume !(3 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 08:38:10,993 INFO L290 TraceCheckUtils]: 24: Hoare triple {168185#true} assume !(4 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 08:38:10,994 INFO L290 TraceCheckUtils]: 25: Hoare triple {168185#true} assume 5 == ~__BLAST_NONDET~3; {168185#true} is VALID [2022-04-08 08:38:10,994 INFO L272 TraceCheckUtils]: 26: Hoare triple {168185#true} call #t~ret1113 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {168185#true} is VALID [2022-04-08 08:38:10,994 INFO L290 TraceCheckUtils]: 27: Hoare triple {168185#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 4 + ~extension~0.offset, 4); {168185#true} is VALID [2022-04-08 08:38:10,994 INFO L290 TraceCheckUtils]: 28: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 4294967296;havoc #t~mem68; {168185#true} is VALID [2022-04-08 08:38:10,994 INFO L290 TraceCheckUtils]: 29: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 24 + ~Irp.offset, 4);call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {168185#true} is VALID [2022-04-08 08:38:10,994 INFO L272 TraceCheckUtils]: 30: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168185#true} is VALID [2022-04-08 08:38:10,994 INFO L290 TraceCheckUtils]: 31: Hoare triple {168185#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:10,999 INFO L272 TraceCheckUtils]: 32: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168185#true} is VALID [2022-04-08 08:38:10,999 INFO L290 TraceCheckUtils]: 33: Hoare triple {168185#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 08:38:10,999 INFO L290 TraceCheckUtils]: 34: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 08:38:10,999 INFO L290 TraceCheckUtils]: 35: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:11,000 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 08:38:11,000 INFO L290 TraceCheckUtils]: 37: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 08:38:11,000 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-08 08:38:11,003 INFO L290 TraceCheckUtils]: 39: Hoare triple {168185#true} #res := 0; {168350#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-08 08:38:11,007 INFO L290 TraceCheckUtils]: 40: Hoare triple {168350#(<= |PptDispatchCleanup_#res| 0)} assume true; {168350#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-08 08:38:11,008 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {168350#(<= |PptDispatchCleanup_#res| 0)} {168185#true} #6469#return; {168357#(<= |main_#t~ret1113| 0)} is VALID [2022-04-08 08:38:11,009 INFO L290 TraceCheckUtils]: 42: Hoare triple {168357#(<= |main_#t~ret1113| 0)} assume -2147483648 <= #t~ret1113 && #t~ret1113 <= 2147483647;~status~31 := #t~ret1113;havoc #t~ret1113; {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,009 INFO L290 TraceCheckUtils]: 43: Hoare triple {168361#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,010 INFO L290 TraceCheckUtils]: 44: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,010 INFO L290 TraceCheckUtils]: 45: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,011 INFO L290 TraceCheckUtils]: 46: Hoare triple {168361#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,011 INFO L290 TraceCheckUtils]: 47: Hoare triple {168361#(<= main_~status~31 0)} assume !(-1 == ~status~31); {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,011 INFO L290 TraceCheckUtils]: 48: Hoare triple {168361#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,012 INFO L290 TraceCheckUtils]: 49: Hoare triple {168361#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,012 INFO L290 TraceCheckUtils]: 50: Hoare triple {168361#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {168361#(<= main_~status~31 0)} is VALID [2022-04-08 08:38:11,012 INFO L290 TraceCheckUtils]: 51: Hoare triple {168361#(<= main_~status~31 0)} assume 259 == ~status~31; {168186#false} is VALID [2022-04-08 08:38:11,012 INFO L272 TraceCheckUtils]: 52: Hoare triple {168186#false} call errorFn(); {168186#false} is VALID [2022-04-08 08:38:11,013 INFO L290 TraceCheckUtils]: 53: Hoare triple {168186#false} assume !false; {168186#false} is VALID [2022-04-08 08:38:11,013 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:38:11,013 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:38:11,013 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [913122424] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:38:11,013 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:38:11,013 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-08 08:38:11,013 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:38:11,013 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2029047043] [2022-04-08 08:38:11,013 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2029047043] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:38:11,013 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:38:11,014 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 08:38:11,014 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636947148] [2022-04-08 08:38:11,014 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:38:11,014 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 54 [2022-04-08 08:38:11,014 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:38:11,014 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:38:11,068 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:38:11,068 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 08:38:11,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:38:11,069 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 08:38:11,069 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 08:38:11,069 INFO L87 Difference]: Start difference. First operand 4521 states and 6531 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:38:48,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:38:48,624 INFO L93 Difference]: Finished difference Result 4536 states and 6549 transitions. [2022-04-08 08:38:48,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 08:38:48,624 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 54 [2022-04-08 08:38:48,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:38:48,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:38:48,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2816 transitions. [2022-04-08 08:38:48,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:38:48,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2816 transitions. [2022-04-08 08:38:48,794 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2816 transitions. [2022-04-08 08:38:51,402 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2816 edges. 2816 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:38:52,429 INFO L225 Difference]: With dead ends: 4536 [2022-04-08 08:38:52,429 INFO L226 Difference]: Without dead ends: 4519 [2022-04-08 08:38:52,430 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 08:38:52,431 INFO L913 BasicCegarLoop]: 2811 mSDtfsCounter, 5 mSDsluCounter, 8402 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11213 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-08 08:38:52,431 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 11213 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-08 08:38:52,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4519 states. [2022-04-08 08:38:53,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4519 to 4519. [2022-04-08 08:38:53,263 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:38:53,269 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 08:38:53,276 INFO L74 IsIncluded]: Start isIncluded. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 08:38:53,287 INFO L87 Difference]: Start difference. First operand 4519 states. Second operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 08:38:53,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:38:53,927 INFO L93 Difference]: Finished difference Result 4519 states and 6527 transitions. [2022-04-08 08:38:53,927 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-08 08:38:53,938 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:38:53,938 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:38:53,947 INFO L74 IsIncluded]: Start isIncluded. First operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4519 states. [2022-04-08 08:38:53,954 INFO L87 Difference]: Start difference. First operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4519 states. [2022-04-08 08:38:54,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:38:54,592 INFO L93 Difference]: Finished difference Result 4519 states and 6527 transitions. [2022-04-08 08:38:54,593 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-08 08:38:54,600 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:38:54,600 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:38:54,600 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:38:54,600 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:38:54,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4519 states, 3005 states have (on average 1.3574043261231281) internal successors, (4079), 3087 states have internal predecessors, (4079), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 08:38:55,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4519 states to 4519 states and 6527 transitions. [2022-04-08 08:38:55,736 INFO L78 Accepts]: Start accepts. Automaton has 4519 states and 6527 transitions. Word has length 54 [2022-04-08 08:38:55,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:38:55,736 INFO L478 AbstractCegarLoop]: Abstraction has 4519 states and 6527 transitions. [2022-04-08 08:38:55,736 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:38:55,736 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4519 states and 6527 transitions. [2022-04-08 08:39:17,182 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6527 edges. 6527 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:39:17,183 INFO L276 IsEmpty]: Start isEmpty. Operand 4519 states and 6527 transitions. [2022-04-08 08:39:17,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-04-08 08:39:17,184 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:39:17,184 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:39:17,206 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-08 08:39:17,384 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:39:17,384 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:39:17,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:39:17,385 INFO L85 PathProgramCache]: Analyzing trace with hash -851908546, now seen corresponding path program 1 times [2022-04-08 08:39:17,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:39:17,385 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [853723356] [2022-04-08 08:39:17,390 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:39:17,390 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:39:17,390 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:39:17,391 INFO L85 PathProgramCache]: Analyzing trace with hash -851908546, now seen corresponding path program 2 times [2022-04-08 08:39:17,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:39:17,391 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [757854639] [2022-04-08 08:39:17,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:39:17,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:39:17,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:39:17,667 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:39:17,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:39:17,691 INFO L290 TraceCheckUtils]: 0: Hoare triple {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-08 08:39:17,691 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:17,691 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-08 08:39:17,719 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:39:17,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:39:17,730 INFO L290 TraceCheckUtils]: 0: Hoare triple {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-08 08:39:17,731 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:17,731 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195543#false} #6457#return; {195543#false} is VALID [2022-04-08 08:39:17,747 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:39:17,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:39:17,757 INFO L290 TraceCheckUtils]: 0: Hoare triple {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-08 08:39:17,757 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:17,757 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195542#true} {195543#false} #6459#return; {195543#false} is VALID [2022-04-08 08:39:17,758 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-08 08:39:17,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:39:17,769 INFO L290 TraceCheckUtils]: 0: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-08 08:39:17,769 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-08 08:39:17,769 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-08 08:39:17,769 INFO L290 TraceCheckUtils]: 3: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:17,770 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {195542#true} {195543#false} #5849#return; {195543#false} is VALID [2022-04-08 08:39:17,773 INFO L272 TraceCheckUtils]: 0: Hoare triple {195542#true} call ULTIMATE.init(); {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:39:17,773 INFO L290 TraceCheckUtils]: 1: Hoare triple {195560#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-08 08:39:17,773 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:17,773 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-08 08:39:17,773 INFO L272 TraceCheckUtils]: 4: Hoare triple {195542#true} call #t~ret1155 := main(); {195542#true} is VALID [2022-04-08 08:39:17,774 INFO L290 TraceCheckUtils]: 5: Hoare triple {195542#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {195547#(= main_~i~24 0)} is VALID [2022-04-08 08:39:17,774 INFO L290 TraceCheckUtils]: 6: Hoare triple {195547#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {195547#(= main_~i~24 0)} is VALID [2022-04-08 08:39:17,775 INFO L290 TraceCheckUtils]: 7: Hoare triple {195547#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {195548#(<= main_~i~24 1)} is VALID [2022-04-08 08:39:17,775 INFO L290 TraceCheckUtils]: 8: Hoare triple {195548#(<= main_~i~24 1)} assume !(~i~24 < 4); {195543#false} is VALID [2022-04-08 08:39:17,775 INFO L290 TraceCheckUtils]: 9: Hoare triple {195543#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {195543#false} is VALID [2022-04-08 08:39:17,775 INFO L272 TraceCheckUtils]: 10: Hoare triple {195543#false} call _BLAST_init(); {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:39:17,775 INFO L290 TraceCheckUtils]: 11: Hoare triple {195561#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-08 08:39:17,775 INFO L290 TraceCheckUtils]: 12: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:17,776 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {195542#true} {195543#false} #6457#return; {195543#false} is VALID [2022-04-08 08:39:17,776 INFO L290 TraceCheckUtils]: 14: Hoare triple {195543#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {195543#false} is VALID [2022-04-08 08:39:17,776 INFO L290 TraceCheckUtils]: 15: Hoare triple {195543#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {195543#false} is VALID [2022-04-08 08:39:17,776 INFO L272 TraceCheckUtils]: 16: Hoare triple {195543#false} call stub_driver_init(); {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:39:17,776 INFO L290 TraceCheckUtils]: 17: Hoare triple {195562#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-08 08:39:17,776 INFO L290 TraceCheckUtils]: 18: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:17,776 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {195542#true} {195543#false} #6459#return; {195543#false} is VALID [2022-04-08 08:39:17,776 INFO L290 TraceCheckUtils]: 20: Hoare triple {195543#false} assume !!(~status~31 >= 0); {195543#false} is VALID [2022-04-08 08:39:17,776 INFO L290 TraceCheckUtils]: 21: Hoare triple {195543#false} assume !(0 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-08 08:39:17,776 INFO L290 TraceCheckUtils]: 22: Hoare triple {195543#false} assume !(1 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-08 08:39:17,777 INFO L290 TraceCheckUtils]: 23: Hoare triple {195543#false} assume !(3 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-08 08:39:17,777 INFO L290 TraceCheckUtils]: 24: Hoare triple {195543#false} assume !(4 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-08 08:39:17,777 INFO L290 TraceCheckUtils]: 25: Hoare triple {195543#false} assume !(5 == ~__BLAST_NONDET~3); {195543#false} is VALID [2022-04-08 08:39:17,777 INFO L290 TraceCheckUtils]: 26: Hoare triple {195543#false} assume 6 == ~__BLAST_NONDET~3; {195543#false} is VALID [2022-04-08 08:39:17,777 INFO L272 TraceCheckUtils]: 27: Hoare triple {195543#false} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {195543#false} is VALID [2022-04-08 08:39:17,777 INFO L290 TraceCheckUtils]: 28: Hoare triple {195543#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {195543#false} is VALID [2022-04-08 08:39:17,777 INFO L272 TraceCheckUtils]: 29: Hoare triple {195543#false} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {195542#true} is VALID [2022-04-08 08:39:17,777 INFO L290 TraceCheckUtils]: 30: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-08 08:39:17,777 INFO L290 TraceCheckUtils]: 31: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-08 08:39:17,777 INFO L290 TraceCheckUtils]: 32: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-08 08:39:17,778 INFO L290 TraceCheckUtils]: 33: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:17,778 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {195542#true} {195543#false} #5849#return; {195543#false} is VALID [2022-04-08 08:39:17,778 INFO L290 TraceCheckUtils]: 35: Hoare triple {195543#false} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-08 08:39:17,778 INFO L290 TraceCheckUtils]: 36: Hoare triple {195543#false} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-08 08:39:17,778 INFO L290 TraceCheckUtils]: 37: Hoare triple {195543#false} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195543#false} is VALID [2022-04-08 08:39:17,778 INFO L290 TraceCheckUtils]: 38: Hoare triple {195543#false} assume 3 == #t~mem1080;havoc #t~mem1080; {195543#false} is VALID [2022-04-08 08:39:17,778 INFO L290 TraceCheckUtils]: 39: Hoare triple {195543#false} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {195543#false} is VALID [2022-04-08 08:39:17,778 INFO L290 TraceCheckUtils]: 40: Hoare triple {195543#false} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {195543#false} is VALID [2022-04-08 08:39:17,778 INFO L272 TraceCheckUtils]: 41: Hoare triple {195543#false} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {195543#false} is VALID [2022-04-08 08:39:17,779 INFO L290 TraceCheckUtils]: 42: Hoare triple {195543#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {195543#false} is VALID [2022-04-08 08:39:17,779 INFO L290 TraceCheckUtils]: 43: Hoare triple {195543#false} assume !(0 != ~compRegistered~0); {195543#false} is VALID [2022-04-08 08:39:17,779 INFO L290 TraceCheckUtils]: 44: Hoare triple {195543#false} assume 0 == ~__BLAST_NONDET~14; {195543#false} is VALID [2022-04-08 08:39:17,779 INFO L290 TraceCheckUtils]: 45: Hoare triple {195543#false} ~returnVal2~0 := 0; {195543#false} is VALID [2022-04-08 08:39:17,779 INFO L290 TraceCheckUtils]: 46: Hoare triple {195543#false} assume !(~s~0 == ~NP~0); {195543#false} is VALID [2022-04-08 08:39:17,779 INFO L290 TraceCheckUtils]: 47: Hoare triple {195543#false} assume !(~s~0 == ~MPR1~0); {195543#false} is VALID [2022-04-08 08:39:17,779 INFO L290 TraceCheckUtils]: 48: Hoare triple {195543#false} assume !(~s~0 == ~SKIP1~0); {195543#false} is VALID [2022-04-08 08:39:17,780 INFO L272 TraceCheckUtils]: 49: Hoare triple {195543#false} call errorFn(); {195543#false} is VALID [2022-04-08 08:39:17,780 INFO L290 TraceCheckUtils]: 50: Hoare triple {195543#false} assume !false; {195543#false} is VALID [2022-04-08 08:39:17,781 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:39:17,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:39:17,781 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [757854639] [2022-04-08 08:39:17,781 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [757854639] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:39:17,781 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [178899971] [2022-04-08 08:39:17,781 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:39:17,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:39:17,781 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:39:17,782 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:39:17,810 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-08 08:39:18,525 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:39:18,525 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:39:18,531 INFO L263 TraceCheckSpWp]: Trace formula consists of 1576 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-08 08:39:18,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:39:18,582 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:39:18,684 INFO L272 TraceCheckUtils]: 0: Hoare triple {195542#true} call ULTIMATE.init(); {195542#true} is VALID [2022-04-08 08:39:18,684 INFO L290 TraceCheckUtils]: 1: Hoare triple {195542#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195542#true} is VALID [2022-04-08 08:39:18,684 INFO L290 TraceCheckUtils]: 2: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:18,684 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195542#true} {195542#true} #6857#return; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L272 TraceCheckUtils]: 4: Hoare triple {195542#true} call #t~ret1155 := main(); {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 5: Hoare triple {195542#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 6: Hoare triple {195542#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 7: Hoare triple {195542#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 8: Hoare triple {195542#true} assume !(~i~24 < 4); {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 9: Hoare triple {195542#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L272 TraceCheckUtils]: 10: Hoare triple {195542#true} call _BLAST_init(); {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 11: Hoare triple {195542#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 12: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {195542#true} {195542#true} #6457#return; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 14: Hoare triple {195542#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L290 TraceCheckUtils]: 15: Hoare triple {195542#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {195542#true} is VALID [2022-04-08 08:39:18,685 INFO L272 TraceCheckUtils]: 16: Hoare triple {195542#true} call stub_driver_init(); {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 17: Hoare triple {195542#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 18: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {195542#true} {195542#true} #6459#return; {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 20: Hoare triple {195542#true} assume !!(~status~31 >= 0); {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 21: Hoare triple {195542#true} assume !(0 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 22: Hoare triple {195542#true} assume !(1 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 23: Hoare triple {195542#true} assume !(3 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 24: Hoare triple {195542#true} assume !(4 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 25: Hoare triple {195542#true} assume !(5 == ~__BLAST_NONDET~3); {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 26: Hoare triple {195542#true} assume 6 == ~__BLAST_NONDET~3; {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L272 TraceCheckUtils]: 27: Hoare triple {195542#true} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L290 TraceCheckUtils]: 28: Hoare triple {195542#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {195542#true} is VALID [2022-04-08 08:39:18,686 INFO L272 TraceCheckUtils]: 29: Hoare triple {195542#true} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 386 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {195542#true} is VALID [2022-04-08 08:39:18,687 INFO L290 TraceCheckUtils]: 30: Hoare triple {195542#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {195542#true} is VALID [2022-04-08 08:39:18,687 INFO L290 TraceCheckUtils]: 31: Hoare triple {195542#true} assume 0 == ~__BLAST_NONDET~26; {195542#true} is VALID [2022-04-08 08:39:18,687 INFO L290 TraceCheckUtils]: 32: Hoare triple {195542#true} #res := 0; {195542#true} is VALID [2022-04-08 08:39:18,687 INFO L290 TraceCheckUtils]: 33: Hoare triple {195542#true} assume true; {195542#true} is VALID [2022-04-08 08:39:18,687 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {195542#true} {195542#true} #5849#return; {195542#true} is VALID [2022-04-08 08:39:18,687 INFO L290 TraceCheckUtils]: 35: Hoare triple {195542#true} assume -2147483648 <= #t~ret1077 && #t~ret1077 <= 2147483647;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-08 08:39:18,687 INFO L290 TraceCheckUtils]: 36: Hoare triple {195542#true} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-08 08:39:18,687 INFO L290 TraceCheckUtils]: 37: Hoare triple {195542#true} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {195542#true} is VALID [2022-04-08 08:39:18,688 INFO L290 TraceCheckUtils]: 38: Hoare triple {195542#true} assume 3 == #t~mem1080;havoc #t~mem1080; {195542#true} is VALID [2022-04-08 08:39:18,691 INFO L290 TraceCheckUtils]: 39: Hoare triple {195542#true} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,692 INFO L290 TraceCheckUtils]: 40: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} call #t~mem1082 := read~int(~Irp.base, 35 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 35 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);call write~$Pointer$(#t~mem1083.base, 36 + #t~mem1083.offset, ~Irp.base, 96 + ~Irp.offset, 4);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 20 + ~pDevExt~0.offset, 4); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,693 INFO L272 TraceCheckUtils]: 41: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,693 INFO L290 TraceCheckUtils]: 42: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,694 INFO L290 TraceCheckUtils]: 43: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(0 != ~compRegistered~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,694 INFO L290 TraceCheckUtils]: 44: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume 0 == ~__BLAST_NONDET~14; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,695 INFO L290 TraceCheckUtils]: 45: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} ~returnVal2~0 := 0; {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,695 INFO L290 TraceCheckUtils]: 46: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~NP~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,695 INFO L290 TraceCheckUtils]: 47: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~MPR1~0); {195683#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 08:39:18,696 INFO L290 TraceCheckUtils]: 48: Hoare triple {195683#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~SKIP1~0); {195543#false} is VALID [2022-04-08 08:39:18,696 INFO L272 TraceCheckUtils]: 49: Hoare triple {195543#false} call errorFn(); {195543#false} is VALID [2022-04-08 08:39:18,696 INFO L290 TraceCheckUtils]: 50: Hoare triple {195543#false} assume !false; {195543#false} is VALID [2022-04-08 08:39:18,696 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:39:18,696 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:39:18,696 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [178899971] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:39:18,697 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:39:18,697 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-08 08:39:18,697 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:39:18,697 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [853723356] [2022-04-08 08:39:18,697 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [853723356] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:39:18,697 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:39:18,697 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 08:39:18,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [976512123] [2022-04-08 08:39:18,697 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:39:18,698 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 51 [2022-04-08 08:39:18,698 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:39:18,698 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 08:39:18,757 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:39:18,758 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 08:39:18,758 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:39:18,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 08:39:18,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 08:39:18,758 INFO L87 Difference]: Start difference. First operand 4519 states and 6527 transitions. Second operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 08:39:40,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:39:40,059 INFO L93 Difference]: Finished difference Result 4533 states and 6545 transitions. [2022-04-08 08:39:40,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 08:39:40,059 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 51 [2022-04-08 08:39:40,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:39:40,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 08:39:40,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2831 transitions. [2022-04-08 08:39:40,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 08:39:40,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2831 transitions. [2022-04-08 08:39:40,225 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2831 transitions. [2022-04-08 08:39:43,090 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2831 edges. 2831 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:39:44,117 INFO L225 Difference]: With dead ends: 4533 [2022-04-08 08:39:44,118 INFO L226 Difference]: Without dead ends: 4530 [2022-04-08 08:39:44,119 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 08:39:44,121 INFO L913 BasicCegarLoop]: 2791 mSDtfsCounter, 33 mSDsluCounter, 2726 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 5517 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-08 08:39:44,121 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 5517 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-08 08:39:44,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4530 states. [2022-04-08 08:39:44,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4530 to 4527. [2022-04-08 08:39:44,950 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:39:44,955 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 08:39:44,960 INFO L74 IsIncluded]: Start isIncluded. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 08:39:44,964 INFO L87 Difference]: Start difference. First operand 4530 states. Second operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 08:39:45,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:39:45,595 INFO L93 Difference]: Finished difference Result 4530 states and 6542 transitions. [2022-04-08 08:39:45,595 INFO L276 IsEmpty]: Start isEmpty. Operand 4530 states and 6542 transitions. [2022-04-08 08:39:45,602 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:39:45,602 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:39:45,609 INFO L74 IsIncluded]: Start isIncluded. First operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4530 states. [2022-04-08 08:39:45,613 INFO L87 Difference]: Start difference. First operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4530 states. [2022-04-08 08:39:46,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:39:46,248 INFO L93 Difference]: Finished difference Result 4530 states and 6542 transitions. [2022-04-08 08:39:46,248 INFO L276 IsEmpty]: Start isEmpty. Operand 4530 states and 6542 transitions. [2022-04-08 08:39:46,255 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:39:46,255 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:39:46,255 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:39:46,255 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:39:46,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4527 states, 3013 states have (on average 1.3577829405907733) internal successors, (4091), 3094 states have internal predecessors, (4091), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 08:39:47,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4527 states to 4527 states and 6539 transitions. [2022-04-08 08:39:47,339 INFO L78 Accepts]: Start accepts. Automaton has 4527 states and 6539 transitions. Word has length 51 [2022-04-08 08:39:47,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:39:47,339 INFO L478 AbstractCegarLoop]: Abstraction has 4527 states and 6539 transitions. [2022-04-08 08:39:47,340 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 08:39:47,340 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4527 states and 6539 transitions. [2022-04-08 08:40:10,502 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6539 edges. 6539 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:40:10,503 INFO L276 IsEmpty]: Start isEmpty. Operand 4527 states and 6539 transitions. [2022-04-08 08:40:10,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-08 08:40:10,504 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:40:10,504 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:40:10,525 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-08 08:40:10,704 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2022-04-08 08:40:10,705 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:40:10,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:40:10,705 INFO L85 PathProgramCache]: Analyzing trace with hash -1656471014, now seen corresponding path program 1 times [2022-04-08 08:40:10,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:40:10,705 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1204381401] [2022-04-08 08:40:10,711 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:40:10,711 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:40:10,711 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:40:10,711 INFO L85 PathProgramCache]: Analyzing trace with hash -1656471014, now seen corresponding path program 2 times [2022-04-08 08:40:10,711 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:40:10,711 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753831243] [2022-04-08 08:40:10,711 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:40:10,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:40:10,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:10,995 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:40:11,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,017 INFO L290 TraceCheckUtils]: 0: Hoare triple {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-08 08:40:11,018 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,018 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-08 08:40:11,053 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:40:11,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,064 INFO L290 TraceCheckUtils]: 0: Hoare triple {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-08 08:40:11,064 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,064 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222897#false} #6457#return; {222897#false} is VALID [2022-04-08 08:40:11,085 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:40:11,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,095 INFO L290 TraceCheckUtils]: 0: Hoare triple {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-08 08:40:11,095 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,095 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222896#true} {222897#false} #6459#return; {222897#false} is VALID [2022-04-08 08:40:11,096 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-08 08:40:11,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,120 INFO L290 TraceCheckUtils]: 0: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-08 08:40:11,121 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-08 08:40:11,121 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,121 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222897#false} #5941#return; {222897#false} is VALID [2022-04-08 08:40:11,135 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-08 08:40:11,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,199 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:40:11,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,241 INFO L290 TraceCheckUtils]: 0: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-08 08:40:11,241 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 08:40:11,242 INFO L290 TraceCheckUtils]: 2: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 08:40:11,243 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-08 08:40:11,243 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-08 08:40:11,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,281 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:40:11,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,291 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:40:11,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:11,304 INFO L290 TraceCheckUtils]: 0: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,304 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-08 08:40:11,304 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,305 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-08 08:40:11,305 INFO L290 TraceCheckUtils]: 0: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,305 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:40:11,306 INFO L290 TraceCheckUtils]: 2: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,306 INFO L290 TraceCheckUtils]: 3: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-08 08:40:11,306 INFO L290 TraceCheckUtils]: 4: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,306 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-08 08:40:11,306 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,306 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-08 08:40:11,306 INFO L290 TraceCheckUtils]: 0: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-08 08:40:11,307 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:40:11,307 INFO L290 TraceCheckUtils]: 2: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,308 INFO L272 TraceCheckUtils]: 3: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:40:11,308 INFO L290 TraceCheckUtils]: 4: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,308 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-08 08:40:11,308 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,308 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-08 08:40:11,308 INFO L290 TraceCheckUtils]: 8: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,309 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-08 08:40:11,309 INFO L290 TraceCheckUtils]: 10: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-08 08:40:11,309 INFO L290 TraceCheckUtils]: 11: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,309 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-08 08:40:11,309 INFO L290 TraceCheckUtils]: 0: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-08 08:40:11,309 INFO L272 TraceCheckUtils]: 1: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-08 08:40:11,309 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-08 08:40:11,310 INFO L290 TraceCheckUtils]: 3: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 08:40:11,310 INFO L290 TraceCheckUtils]: 4: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 08:40:11,312 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-08 08:40:11,312 INFO L290 TraceCheckUtils]: 6: Hoare triple {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} is VALID [2022-04-08 08:40:11,312 INFO L290 TraceCheckUtils]: 7: Hoare triple {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-08 08:40:11,313 INFO L272 TraceCheckUtils]: 8: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:40:11,313 INFO L290 TraceCheckUtils]: 9: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-08 08:40:11,313 INFO L272 TraceCheckUtils]: 10: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:40:11,314 INFO L290 TraceCheckUtils]: 11: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,314 INFO L272 TraceCheckUtils]: 12: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:40:11,314 INFO L290 TraceCheckUtils]: 13: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,314 INFO L290 TraceCheckUtils]: 14: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-08 08:40:11,315 INFO L290 TraceCheckUtils]: 15: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,315 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-08 08:40:11,315 INFO L290 TraceCheckUtils]: 17: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,315 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-08 08:40:11,315 INFO L290 TraceCheckUtils]: 19: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-08 08:40:11,315 INFO L290 TraceCheckUtils]: 20: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,315 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-08 08:40:11,315 INFO L290 TraceCheckUtils]: 22: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-08 08:40:11,315 INFO L290 TraceCheckUtils]: 23: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-08 08:40:11,316 INFO L290 TraceCheckUtils]: 24: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-08 08:40:11,316 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {222897#false} {222897#false} #5943#return; {222897#false} is VALID [2022-04-08 08:40:11,320 INFO L272 TraceCheckUtils]: 0: Hoare triple {222896#true} call ULTIMATE.init(); {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:40:11,320 INFO L290 TraceCheckUtils]: 1: Hoare triple {222939#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-08 08:40:11,320 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,320 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-08 08:40:11,320 INFO L272 TraceCheckUtils]: 4: Hoare triple {222896#true} call #t~ret1155 := main(); {222896#true} is VALID [2022-04-08 08:40:11,321 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {222901#(= main_~i~24 0)} is VALID [2022-04-08 08:40:11,321 INFO L290 TraceCheckUtils]: 6: Hoare triple {222901#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {222901#(= main_~i~24 0)} is VALID [2022-04-08 08:40:11,322 INFO L290 TraceCheckUtils]: 7: Hoare triple {222901#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {222902#(<= main_~i~24 1)} is VALID [2022-04-08 08:40:11,322 INFO L290 TraceCheckUtils]: 8: Hoare triple {222902#(<= main_~i~24 1)} assume !(~i~24 < 4); {222897#false} is VALID [2022-04-08 08:40:11,322 INFO L290 TraceCheckUtils]: 9: Hoare triple {222897#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {222897#false} is VALID [2022-04-08 08:40:11,322 INFO L272 TraceCheckUtils]: 10: Hoare triple {222897#false} call _BLAST_init(); {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:40:11,322 INFO L290 TraceCheckUtils]: 11: Hoare triple {222940#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-08 08:40:11,323 INFO L290 TraceCheckUtils]: 12: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,323 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {222896#true} {222897#false} #6457#return; {222897#false} is VALID [2022-04-08 08:40:11,323 INFO L290 TraceCheckUtils]: 14: Hoare triple {222897#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {222897#false} is VALID [2022-04-08 08:40:11,323 INFO L290 TraceCheckUtils]: 15: Hoare triple {222897#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {222897#false} is VALID [2022-04-08 08:40:11,323 INFO L272 TraceCheckUtils]: 16: Hoare triple {222897#false} call stub_driver_init(); {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:40:11,323 INFO L290 TraceCheckUtils]: 17: Hoare triple {222941#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-08 08:40:11,323 INFO L290 TraceCheckUtils]: 18: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,323 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {222896#true} {222897#false} #6459#return; {222897#false} is VALID [2022-04-08 08:40:11,323 INFO L290 TraceCheckUtils]: 20: Hoare triple {222897#false} assume !!(~status~31 >= 0); {222897#false} is VALID [2022-04-08 08:40:11,323 INFO L290 TraceCheckUtils]: 21: Hoare triple {222897#false} assume !(0 == ~__BLAST_NONDET~3); {222897#false} is VALID [2022-04-08 08:40:11,324 INFO L290 TraceCheckUtils]: 22: Hoare triple {222897#false} assume !(1 == ~__BLAST_NONDET~3); {222897#false} is VALID [2022-04-08 08:40:11,324 INFO L290 TraceCheckUtils]: 23: Hoare triple {222897#false} assume 3 == ~__BLAST_NONDET~3; {222897#false} is VALID [2022-04-08 08:40:11,324 INFO L290 TraceCheckUtils]: 24: Hoare triple {222897#false} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {222897#false} is VALID [2022-04-08 08:40:11,324 INFO L272 TraceCheckUtils]: 25: Hoare triple {222897#false} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {222897#false} is VALID [2022-04-08 08:40:11,324 INFO L290 TraceCheckUtils]: 26: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {222897#false} is VALID [2022-04-08 08:40:11,324 INFO L272 TraceCheckUtils]: 27: Hoare triple {222897#false} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-08 08:40:11,324 INFO L290 TraceCheckUtils]: 28: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-08 08:40:11,324 INFO L290 TraceCheckUtils]: 29: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-08 08:40:11,324 INFO L290 TraceCheckUtils]: 30: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,325 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {222896#true} {222897#false} #5941#return; {222897#false} is VALID [2022-04-08 08:40:11,325 INFO L272 TraceCheckUtils]: 32: Hoare triple {222897#false} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:40:11,325 INFO L290 TraceCheckUtils]: 33: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-08 08:40:11,325 INFO L272 TraceCheckUtils]: 34: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-08 08:40:11,325 INFO L290 TraceCheckUtils]: 35: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-08 08:40:11,325 INFO L290 TraceCheckUtils]: 36: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 08:40:11,326 INFO L290 TraceCheckUtils]: 37: Hoare triple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {222962#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 08:40:11,327 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {222962#(= |IoAcquireRemoveLockEx_#res| 0)} {222896#true} #6705#return; {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-08 08:40:11,327 INFO L290 TraceCheckUtils]: 39: Hoare triple {222947#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} is VALID [2022-04-08 08:40:11,328 INFO L290 TraceCheckUtils]: 40: Hoare triple {222948#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-08 08:40:11,328 INFO L272 TraceCheckUtils]: 41: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:40:11,328 INFO L290 TraceCheckUtils]: 42: Hoare triple {222942#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222896#true} is VALID [2022-04-08 08:40:11,329 INFO L272 TraceCheckUtils]: 43: Hoare triple {222896#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:40:11,329 INFO L290 TraceCheckUtils]: 44: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,329 INFO L272 TraceCheckUtils]: 45: Hoare triple {222896#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222971#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:40:11,330 INFO L290 TraceCheckUtils]: 46: Hoare triple {222971#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222896#true} is VALID [2022-04-08 08:40:11,330 INFO L290 TraceCheckUtils]: 47: Hoare triple {222896#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222896#true} is VALID [2022-04-08 08:40:11,330 INFO L290 TraceCheckUtils]: 48: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,330 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {222896#true} {222896#true} #6659#return; {222896#true} is VALID [2022-04-08 08:40:11,330 INFO L290 TraceCheckUtils]: 50: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,330 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {222896#true} {222896#true} #6455#return; {222896#true} is VALID [2022-04-08 08:40:11,330 INFO L290 TraceCheckUtils]: 52: Hoare triple {222896#true} #res := ~Status; {222896#true} is VALID [2022-04-08 08:40:11,330 INFO L290 TraceCheckUtils]: 53: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:11,330 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {222896#true} {222897#false} #6707#return; {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L290 TraceCheckUtils]: 55: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L290 TraceCheckUtils]: 56: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L290 TraceCheckUtils]: 57: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {222897#false} {222897#false} #5943#return; {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L290 TraceCheckUtils]: 59: Hoare triple {222897#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L290 TraceCheckUtils]: 60: Hoare triple {222897#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L290 TraceCheckUtils]: 61: Hoare triple {222897#false} assume ~minorFunction~0 % 256 > 24; {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L272 TraceCheckUtils]: 62: Hoare triple {222897#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L290 TraceCheckUtils]: 63: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {222897#false} is VALID [2022-04-08 08:40:11,331 INFO L272 TraceCheckUtils]: 64: Hoare triple {222897#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-08 08:40:11,332 INFO L290 TraceCheckUtils]: 65: Hoare triple {222897#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {222897#false} is VALID [2022-04-08 08:40:11,332 INFO L290 TraceCheckUtils]: 66: Hoare triple {222897#false} assume !(~s~0 == ~NP~0); {222897#false} is VALID [2022-04-08 08:40:11,332 INFO L272 TraceCheckUtils]: 67: Hoare triple {222897#false} call errorFn(); {222897#false} is VALID [2022-04-08 08:40:11,332 INFO L290 TraceCheckUtils]: 68: Hoare triple {222897#false} assume !false; {222897#false} is VALID [2022-04-08 08:40:11,332 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:40:11,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:40:11,333 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753831243] [2022-04-08 08:40:11,333 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [753831243] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:40:11,333 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1884055449] [2022-04-08 08:40:11,333 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:40:11,333 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:40:11,333 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:40:11,334 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:40:11,335 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-08 08:40:12,295 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:40:12,295 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:40:12,301 INFO L263 TraceCheckSpWp]: Trace formula consists of 1862 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-08 08:40:12,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:40:12,349 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:40:12,555 INFO L272 TraceCheckUtils]: 0: Hoare triple {222896#true} call ULTIMATE.init(); {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 1: Hoare triple {222896#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 2: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222896#true} {222896#true} #6857#return; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L272 TraceCheckUtils]: 4: Hoare triple {222896#true} call #t~ret1155 := main(); {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 5: Hoare triple {222896#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 6: Hoare triple {222896#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 7: Hoare triple {222896#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 8: Hoare triple {222896#true} assume !(~i~24 < 4); {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 9: Hoare triple {222896#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L272 TraceCheckUtils]: 10: Hoare triple {222896#true} call _BLAST_init(); {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 11: Hoare triple {222896#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L290 TraceCheckUtils]: 12: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:12,556 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {222896#true} {222896#true} #6457#return; {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 14: Hoare triple {222896#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 15: Hoare triple {222896#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L272 TraceCheckUtils]: 16: Hoare triple {222896#true} call stub_driver_init(); {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 17: Hoare triple {222896#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 18: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {222896#true} {222896#true} #6459#return; {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 20: Hoare triple {222896#true} assume !!(~status~31 >= 0); {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 21: Hoare triple {222896#true} assume !(0 == ~__BLAST_NONDET~3); {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 22: Hoare triple {222896#true} assume !(1 == ~__BLAST_NONDET~3); {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 23: Hoare triple {222896#true} assume 3 == ~__BLAST_NONDET~3; {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L290 TraceCheckUtils]: 24: Hoare triple {222896#true} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {222896#true} is VALID [2022-04-08 08:40:12,557 INFO L272 TraceCheckUtils]: 25: Hoare triple {222896#true} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L290 TraceCheckUtils]: 26: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L272 TraceCheckUtils]: 27: Hoare triple {222896#true} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L290 TraceCheckUtils]: 28: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L290 TraceCheckUtils]: 29: Hoare triple {222896#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L290 TraceCheckUtils]: 30: Hoare triple {222896#true} assume true; {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {222896#true} {222896#true} #5941#return; {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L272 TraceCheckUtils]: 32: Hoare triple {222896#true} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L290 TraceCheckUtils]: 33: Hoare triple {222896#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L272 TraceCheckUtils]: 34: Hoare triple {222896#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {222896#true} is VALID [2022-04-08 08:40:12,558 INFO L290 TraceCheckUtils]: 35: Hoare triple {222896#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {222896#true} is VALID [2022-04-08 08:40:12,559 INFO L290 TraceCheckUtils]: 36: Hoare triple {222896#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} is VALID [2022-04-08 08:40:12,559 INFO L290 TraceCheckUtils]: 37: Hoare triple {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} assume true; {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} is VALID [2022-04-08 08:40:12,560 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {223087#(<= 0 |IoAcquireRemoveLockEx_#res|)} {222896#true} #6705#return; {223094#(<= 0 |PptAcquireRemoveLockOrFailIrp_#t~ret905|)} is VALID [2022-04-08 08:40:12,560 INFO L290 TraceCheckUtils]: 39: Hoare triple {223094#(<= 0 |PptAcquireRemoveLockOrFailIrp_#t~ret905|)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {223098#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} is VALID [2022-04-08 08:40:12,561 INFO L290 TraceCheckUtils]: 40: Hoare triple {223098#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} assume !(~status~23 >= 0); {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L272 TraceCheckUtils]: 41: Hoare triple {222897#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L290 TraceCheckUtils]: 42: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L272 TraceCheckUtils]: 43: Hoare triple {222897#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L290 TraceCheckUtils]: 44: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L272 TraceCheckUtils]: 45: Hoare triple {222897#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L290 TraceCheckUtils]: 46: Hoare triple {222897#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L290 TraceCheckUtils]: 47: Hoare triple {222897#false} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L290 TraceCheckUtils]: 48: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-08 08:40:12,561 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {222897#false} {222897#false} #6659#return; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 50: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {222897#false} {222897#false} #6455#return; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 52: Hoare triple {222897#false} #res := ~Status; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 53: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {222897#false} {222897#false} #6707#return; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 55: Hoare triple {222897#false} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 56: Hoare triple {222897#false} #res := ~status~23; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 57: Hoare triple {222897#false} assume true; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {222897#false} {222896#true} #5943#return; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 59: Hoare triple {222897#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 60: Hoare triple {222897#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L290 TraceCheckUtils]: 61: Hoare triple {222897#false} assume ~minorFunction~0 % 256 > 24; {222897#false} is VALID [2022-04-08 08:40:12,562 INFO L272 TraceCheckUtils]: 62: Hoare triple {222897#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-08 08:40:12,563 INFO L290 TraceCheckUtils]: 63: Hoare triple {222897#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {222897#false} is VALID [2022-04-08 08:40:12,563 INFO L272 TraceCheckUtils]: 64: Hoare triple {222897#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {222897#false} is VALID [2022-04-08 08:40:12,563 INFO L290 TraceCheckUtils]: 65: Hoare triple {222897#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {222897#false} is VALID [2022-04-08 08:40:12,563 INFO L290 TraceCheckUtils]: 66: Hoare triple {222897#false} assume !(~s~0 == ~NP~0); {222897#false} is VALID [2022-04-08 08:40:12,563 INFO L272 TraceCheckUtils]: 67: Hoare triple {222897#false} call errorFn(); {222897#false} is VALID [2022-04-08 08:40:12,563 INFO L290 TraceCheckUtils]: 68: Hoare triple {222897#false} assume !false; {222897#false} is VALID [2022-04-08 08:40:12,563 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:40:12,563 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:40:12,563 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1884055449] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:40:12,563 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:40:12,563 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [12] total 15 [2022-04-08 08:40:12,564 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:40:12,564 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1204381401] [2022-04-08 08:40:12,564 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1204381401] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:40:12,564 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:40:12,564 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 08:40:12,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941568579] [2022-04-08 08:40:12,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:40:12,564 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-08 08:40:12,564 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:40:12,565 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:40:12,633 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:40:12,633 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 08:40:12,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:40:12,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 08:40:12,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-08 08:40:12,634 INFO L87 Difference]: Start difference. First operand 4527 states and 6539 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:40:54,799 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:40:54,799 INFO L93 Difference]: Finished difference Result 8396 states and 12123 transitions. [2022-04-08 08:40:54,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 08:40:54,800 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-08 08:40:54,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:40:54,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:40:54,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5306 transitions. [2022-04-08 08:40:54,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:40:55,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5306 transitions. [2022-04-08 08:40:55,119 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 5306 transitions. [2022-04-08 08:41:00,872 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5306 edges. 5306 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:41:01,864 INFO L225 Difference]: With dead ends: 8396 [2022-04-08 08:41:01,864 INFO L226 Difference]: Without dead ends: 4531 [2022-04-08 08:41:01,874 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-08 08:41:01,874 INFO L913 BasicCegarLoop]: 2793 mSDtfsCounter, 3 mSDsluCounter, 8372 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 11165 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-08 08:41:01,875 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 11165 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-08 08:41:01,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4531 states. [2022-04-08 08:41:02,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4531 to 4531. [2022-04-08 08:41:02,863 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:41:02,869 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-08 08:41:02,874 INFO L74 IsIncluded]: Start isIncluded. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-08 08:41:02,878 INFO L87 Difference]: Start difference. First operand 4531 states. Second operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-08 08:41:03,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:41:03,484 INFO L93 Difference]: Finished difference Result 4531 states and 6544 transitions. [2022-04-08 08:41:03,484 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-08 08:41:03,491 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:41:03,491 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:41:03,497 INFO L74 IsIncluded]: Start isIncluded. First operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) Second operand 4531 states. [2022-04-08 08:41:03,502 INFO L87 Difference]: Start difference. First operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) Second operand 4531 states. [2022-04-08 08:41:04,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:41:04,140 INFO L93 Difference]: Finished difference Result 4531 states and 6544 transitions. [2022-04-08 08:41:04,140 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-08 08:41:04,148 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:41:04,148 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:41:04,148 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:41:04,148 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:41:04,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4531 states, 3016 states have (on average 1.3574270557029178) internal successors, (4094), 3097 states have internal predecessors, (4094), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 314 states have return successors, (1250), 1167 states have call predecessors, (1250), 1183 states have call successors, (1250) [2022-04-08 08:41:05,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4531 states to 4531 states and 6544 transitions. [2022-04-08 08:41:05,234 INFO L78 Accepts]: Start accepts. Automaton has 4531 states and 6544 transitions. Word has length 69 [2022-04-08 08:41:05,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:41:05,234 INFO L478 AbstractCegarLoop]: Abstraction has 4531 states and 6544 transitions. [2022-04-08 08:41:05,234 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:41:05,234 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4531 states and 6544 transitions. [2022-04-08 08:41:27,561 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6544 edges. 6544 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:41:27,562 INFO L276 IsEmpty]: Start isEmpty. Operand 4531 states and 6544 transitions. [2022-04-08 08:41:27,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-08 08:41:27,563 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:41:27,563 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:41:27,587 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2022-04-08 08:41:27,771 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-08 08:41:27,772 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:41:27,772 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:41:27,772 INFO L85 PathProgramCache]: Analyzing trace with hash 454819355, now seen corresponding path program 1 times [2022-04-08 08:41:27,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:41:27,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [522900907] [2022-04-08 08:41:27,778 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:41:27,778 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:41:27,778 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:41:27,778 INFO L85 PathProgramCache]: Analyzing trace with hash 454819355, now seen corresponding path program 2 times [2022-04-08 08:41:27,778 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:41:27,778 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479992691] [2022-04-08 08:41:27,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:41:27,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:41:27,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,110 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:41:28,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,131 INFO L290 TraceCheckUtils]: 0: Hoare triple {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-08 08:41:28,131 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,131 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-08 08:41:28,166 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:41:28,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,177 INFO L290 TraceCheckUtils]: 0: Hoare triple {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-08 08:41:28,177 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,177 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258102#false} #6457#return; {258102#false} is VALID [2022-04-08 08:41:28,197 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:41:28,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,207 INFO L290 TraceCheckUtils]: 0: Hoare triple {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-08 08:41:28,207 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,207 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {258101#true} {258102#false} #6459#return; {258102#false} is VALID [2022-04-08 08:41:28,207 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-08 08:41:28,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,219 INFO L290 TraceCheckUtils]: 0: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-08 08:41:28,219 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-08 08:41:28,219 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,220 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258102#false} #5941#return; {258102#false} is VALID [2022-04-08 08:41:28,234 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-08 08:41:28,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,259 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:41:28,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,269 INFO L290 TraceCheckUtils]: 0: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-08 08:41:28,269 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-08 08:41:28,269 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,269 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-08 08:41:28,270 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-08 08:41:28,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,290 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:41:28,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,299 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:41:28,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:28,309 INFO L290 TraceCheckUtils]: 0: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,309 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-08 08:41:28,309 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,309 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-08 08:41:28,309 INFO L290 TraceCheckUtils]: 0: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,310 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:41:28,310 INFO L290 TraceCheckUtils]: 2: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,310 INFO L290 TraceCheckUtils]: 3: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-08 08:41:28,310 INFO L290 TraceCheckUtils]: 4: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,311 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-08 08:41:28,311 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,311 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-08 08:41:28,311 INFO L290 TraceCheckUtils]: 0: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-08 08:41:28,312 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:41:28,312 INFO L290 TraceCheckUtils]: 2: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,312 INFO L272 TraceCheckUtils]: 3: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:41:28,313 INFO L290 TraceCheckUtils]: 4: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,313 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-08 08:41:28,313 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,313 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-08 08:41:28,313 INFO L290 TraceCheckUtils]: 8: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,313 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-08 08:41:28,313 INFO L290 TraceCheckUtils]: 10: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-08 08:41:28,313 INFO L290 TraceCheckUtils]: 11: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,313 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-08 08:41:28,314 INFO L290 TraceCheckUtils]: 0: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-08 08:41:28,314 INFO L272 TraceCheckUtils]: 1: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-08 08:41:28,314 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-08 08:41:28,314 INFO L290 TraceCheckUtils]: 3: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-08 08:41:28,314 INFO L290 TraceCheckUtils]: 4: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,314 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-08 08:41:28,314 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258101#true} is VALID [2022-04-08 08:41:28,314 INFO L290 TraceCheckUtils]: 7: Hoare triple {258101#true} assume !(~status~23 >= 0); {258101#true} is VALID [2022-04-08 08:41:28,315 INFO L272 TraceCheckUtils]: 8: Hoare triple {258101#true} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:41:28,315 INFO L290 TraceCheckUtils]: 9: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-08 08:41:28,316 INFO L272 TraceCheckUtils]: 10: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:41:28,316 INFO L290 TraceCheckUtils]: 11: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,317 INFO L272 TraceCheckUtils]: 12: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:41:28,317 INFO L290 TraceCheckUtils]: 13: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,317 INFO L290 TraceCheckUtils]: 14: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-08 08:41:28,317 INFO L290 TraceCheckUtils]: 15: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,317 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-08 08:41:28,317 INFO L290 TraceCheckUtils]: 17: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,317 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-08 08:41:28,317 INFO L290 TraceCheckUtils]: 19: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-08 08:41:28,318 INFO L290 TraceCheckUtils]: 20: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,318 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-08 08:41:28,318 INFO L290 TraceCheckUtils]: 22: Hoare triple {258101#true} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258101#true} is VALID [2022-04-08 08:41:28,318 INFO L290 TraceCheckUtils]: 23: Hoare triple {258101#true} #res := ~status~23; {258101#true} is VALID [2022-04-08 08:41:28,318 INFO L290 TraceCheckUtils]: 24: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,318 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {258101#true} {258102#false} #5943#return; {258102#false} is VALID [2022-04-08 08:41:28,321 INFO L272 TraceCheckUtils]: 0: Hoare triple {258101#true} call ULTIMATE.init(); {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:41:28,322 INFO L290 TraceCheckUtils]: 1: Hoare triple {258144#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-08 08:41:28,322 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,322 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-08 08:41:28,322 INFO L272 TraceCheckUtils]: 4: Hoare triple {258101#true} call #t~ret1155 := main(); {258101#true} is VALID [2022-04-08 08:41:28,322 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {258106#(= main_~i~24 0)} is VALID [2022-04-08 08:41:28,323 INFO L290 TraceCheckUtils]: 6: Hoare triple {258106#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {258106#(= main_~i~24 0)} is VALID [2022-04-08 08:41:28,323 INFO L290 TraceCheckUtils]: 7: Hoare triple {258106#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {258107#(<= main_~i~24 1)} is VALID [2022-04-08 08:41:28,324 INFO L290 TraceCheckUtils]: 8: Hoare triple {258107#(<= main_~i~24 1)} assume !(~i~24 < 4); {258102#false} is VALID [2022-04-08 08:41:28,324 INFO L290 TraceCheckUtils]: 9: Hoare triple {258102#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {258102#false} is VALID [2022-04-08 08:41:28,324 INFO L272 TraceCheckUtils]: 10: Hoare triple {258102#false} call _BLAST_init(); {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:41:28,324 INFO L290 TraceCheckUtils]: 11: Hoare triple {258145#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-08 08:41:28,324 INFO L290 TraceCheckUtils]: 12: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,324 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {258101#true} {258102#false} #6457#return; {258102#false} is VALID [2022-04-08 08:41:28,324 INFO L290 TraceCheckUtils]: 14: Hoare triple {258102#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {258102#false} is VALID [2022-04-08 08:41:28,324 INFO L290 TraceCheckUtils]: 15: Hoare triple {258102#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {258102#false} is VALID [2022-04-08 08:41:28,325 INFO L272 TraceCheckUtils]: 16: Hoare triple {258102#false} call stub_driver_init(); {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:41:28,325 INFO L290 TraceCheckUtils]: 17: Hoare triple {258146#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-08 08:41:28,325 INFO L290 TraceCheckUtils]: 18: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,325 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {258101#true} {258102#false} #6459#return; {258102#false} is VALID [2022-04-08 08:41:28,325 INFO L290 TraceCheckUtils]: 20: Hoare triple {258102#false} assume !!(~status~31 >= 0); {258102#false} is VALID [2022-04-08 08:41:28,325 INFO L290 TraceCheckUtils]: 21: Hoare triple {258102#false} assume !(0 == ~__BLAST_NONDET~3); {258102#false} is VALID [2022-04-08 08:41:28,325 INFO L290 TraceCheckUtils]: 22: Hoare triple {258102#false} assume !(1 == ~__BLAST_NONDET~3); {258102#false} is VALID [2022-04-08 08:41:28,325 INFO L290 TraceCheckUtils]: 23: Hoare triple {258102#false} assume 3 == ~__BLAST_NONDET~3; {258102#false} is VALID [2022-04-08 08:41:28,325 INFO L290 TraceCheckUtils]: 24: Hoare triple {258102#false} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {258102#false} is VALID [2022-04-08 08:41:28,325 INFO L272 TraceCheckUtils]: 25: Hoare triple {258102#false} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {258102#false} is VALID [2022-04-08 08:41:28,326 INFO L290 TraceCheckUtils]: 26: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {258102#false} is VALID [2022-04-08 08:41:28,326 INFO L272 TraceCheckUtils]: 27: Hoare triple {258102#false} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-08 08:41:28,326 INFO L290 TraceCheckUtils]: 28: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-08 08:41:28,326 INFO L290 TraceCheckUtils]: 29: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-08 08:41:28,326 INFO L290 TraceCheckUtils]: 30: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,326 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {258101#true} {258102#false} #5941#return; {258102#false} is VALID [2022-04-08 08:41:28,326 INFO L272 TraceCheckUtils]: 32: Hoare triple {258102#false} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:41:28,326 INFO L290 TraceCheckUtils]: 33: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-08 08:41:28,326 INFO L272 TraceCheckUtils]: 34: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-08 08:41:28,326 INFO L290 TraceCheckUtils]: 35: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-08 08:41:28,327 INFO L290 TraceCheckUtils]: 36: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258101#true} is VALID [2022-04-08 08:41:28,327 INFO L290 TraceCheckUtils]: 37: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,327 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {258101#true} {258101#true} #6705#return; {258101#true} is VALID [2022-04-08 08:41:28,327 INFO L290 TraceCheckUtils]: 39: Hoare triple {258101#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258101#true} is VALID [2022-04-08 08:41:28,327 INFO L290 TraceCheckUtils]: 40: Hoare triple {258101#true} assume !(~status~23 >= 0); {258101#true} is VALID [2022-04-08 08:41:28,328 INFO L272 TraceCheckUtils]: 41: Hoare triple {258101#true} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:41:28,328 INFO L290 TraceCheckUtils]: 42: Hoare triple {258147#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-08 08:41:28,329 INFO L272 TraceCheckUtils]: 43: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:41:28,329 INFO L290 TraceCheckUtils]: 44: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,329 INFO L272 TraceCheckUtils]: 45: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258173#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 08:41:28,330 INFO L290 TraceCheckUtils]: 46: Hoare triple {258173#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L290 TraceCheckUtils]: 47: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L290 TraceCheckUtils]: 48: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L290 TraceCheckUtils]: 50: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L290 TraceCheckUtils]: 52: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L290 TraceCheckUtils]: 53: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {258101#true} {258101#true} #6707#return; {258101#true} is VALID [2022-04-08 08:41:28,330 INFO L290 TraceCheckUtils]: 55: Hoare triple {258101#true} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258101#true} is VALID [2022-04-08 08:41:28,331 INFO L290 TraceCheckUtils]: 56: Hoare triple {258101#true} #res := ~status~23; {258101#true} is VALID [2022-04-08 08:41:28,331 INFO L290 TraceCheckUtils]: 57: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:28,331 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {258101#true} {258102#false} #5943#return; {258102#false} is VALID [2022-04-08 08:41:28,331 INFO L290 TraceCheckUtils]: 59: Hoare triple {258102#false} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {258102#false} is VALID [2022-04-08 08:41:28,331 INFO L290 TraceCheckUtils]: 60: Hoare triple {258102#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {258102#false} is VALID [2022-04-08 08:41:28,331 INFO L290 TraceCheckUtils]: 61: Hoare triple {258102#false} assume ~minorFunction~0 % 256 > 24; {258102#false} is VALID [2022-04-08 08:41:28,331 INFO L272 TraceCheckUtils]: 62: Hoare triple {258102#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-08 08:41:28,331 INFO L290 TraceCheckUtils]: 63: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {258102#false} is VALID [2022-04-08 08:41:28,331 INFO L272 TraceCheckUtils]: 64: Hoare triple {258102#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-08 08:41:28,331 INFO L290 TraceCheckUtils]: 65: Hoare triple {258102#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {258102#false} is VALID [2022-04-08 08:41:28,332 INFO L290 TraceCheckUtils]: 66: Hoare triple {258102#false} assume !(~s~0 == ~NP~0); {258102#false} is VALID [2022-04-08 08:41:28,332 INFO L272 TraceCheckUtils]: 67: Hoare triple {258102#false} call errorFn(); {258102#false} is VALID [2022-04-08 08:41:28,332 INFO L290 TraceCheckUtils]: 68: Hoare triple {258102#false} assume !false; {258102#false} is VALID [2022-04-08 08:41:28,332 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:41:28,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:41:28,332 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479992691] [2022-04-08 08:41:28,332 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [479992691] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:41:28,333 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1751332096] [2022-04-08 08:41:28,333 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:41:28,333 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:41:28,333 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:41:28,334 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:41:28,351 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-08 08:41:29,321 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:41:29,322 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:41:29,328 INFO L263 TraceCheckSpWp]: Trace formula consists of 1863 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-08 08:41:29,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:41:29,377 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:41:29,653 INFO L272 TraceCheckUtils]: 0: Hoare triple {258101#true} call ULTIMATE.init(); {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L290 TraceCheckUtils]: 1: Hoare triple {258101#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L290 TraceCheckUtils]: 2: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {258101#true} {258101#true} #6857#return; {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L272 TraceCheckUtils]: 4: Hoare triple {258101#true} call #t~ret1155 := main(); {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L290 TraceCheckUtils]: 5: Hoare triple {258101#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L290 TraceCheckUtils]: 6: Hoare triple {258101#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L290 TraceCheckUtils]: 7: Hoare triple {258101#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L290 TraceCheckUtils]: 8: Hoare triple {258101#true} assume !(~i~24 < 4); {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L290 TraceCheckUtils]: 9: Hoare triple {258101#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L272 TraceCheckUtils]: 10: Hoare triple {258101#true} call _BLAST_init(); {258101#true} is VALID [2022-04-08 08:41:29,654 INFO L290 TraceCheckUtils]: 11: Hoare triple {258101#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 12: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {258101#true} {258101#true} #6457#return; {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 14: Hoare triple {258101#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 15: Hoare triple {258101#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L272 TraceCheckUtils]: 16: Hoare triple {258101#true} call stub_driver_init(); {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 17: Hoare triple {258101#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 18: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {258101#true} {258101#true} #6459#return; {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 20: Hoare triple {258101#true} assume !!(~status~31 >= 0); {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 21: Hoare triple {258101#true} assume !(0 == ~__BLAST_NONDET~3); {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 22: Hoare triple {258101#true} assume !(1 == ~__BLAST_NONDET~3); {258101#true} is VALID [2022-04-08 08:41:29,655 INFO L290 TraceCheckUtils]: 23: Hoare triple {258101#true} assume 3 == ~__BLAST_NONDET~3; {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L290 TraceCheckUtils]: 24: Hoare triple {258101#true} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(72);call write~int(1, ~#rl~0.base, 36 + ~#rl~0.offset, 4);call write~int(1, ~#rl~0.base, 28 + ~#rl~0.offset, 4);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 28 + ~pirp~0.offset, 4); {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L272 TraceCheckUtils]: 25: Hoare triple {258101#true} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L290 TraceCheckUtils]: 26: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L272 TraceCheckUtils]: 27: Hoare triple {258101#true} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L290 TraceCheckUtils]: 28: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L290 TraceCheckUtils]: 29: Hoare triple {258101#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 4 * (#t~mem72 % 256), 4);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L290 TraceCheckUtils]: 30: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {258101#true} {258101#true} #5941#return; {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L272 TraceCheckUtils]: 32: Hoare triple {258101#true} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L290 TraceCheckUtils]: 33: Hoare triple {258101#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L272 TraceCheckUtils]: 34: Hoare triple {258101#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {258101#true} is VALID [2022-04-08 08:41:29,656 INFO L290 TraceCheckUtils]: 35: Hoare triple {258101#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {258101#true} is VALID [2022-04-08 08:41:29,663 INFO L290 TraceCheckUtils]: 36: Hoare triple {258101#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} is VALID [2022-04-08 08:41:29,664 INFO L290 TraceCheckUtils]: 37: Hoare triple {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} assume true; {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} is VALID [2022-04-08 08:41:29,665 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {258289#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} {258101#true} #6705#return; {258296#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#t~ret905|) 0)} is VALID [2022-04-08 08:41:29,666 INFO L290 TraceCheckUtils]: 39: Hoare triple {258296#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#t~ret905|) 0)} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-08 08:41:29,667 INFO L290 TraceCheckUtils]: 40: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} assume !(~status~23 >= 0); {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-08 08:41:29,667 INFO L272 TraceCheckUtils]: 41: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {258101#true} is VALID [2022-04-08 08:41:29,667 INFO L290 TraceCheckUtils]: 42: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 24 + ~Irp.offset, 4);~myStatus~0 := ~Status;call write~int(0, ~Irp.base, 28 + ~Irp.offset, 4); {258101#true} is VALID [2022-04-08 08:41:29,667 INFO L272 TraceCheckUtils]: 43: Hoare triple {258101#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {258101#true} is VALID [2022-04-08 08:41:29,667 INFO L290 TraceCheckUtils]: 44: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:29,667 INFO L272 TraceCheckUtils]: 45: Hoare triple {258101#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {258101#true} is VALID [2022-04-08 08:41:29,667 INFO L290 TraceCheckUtils]: 46: Hoare triple {258101#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {258101#true} is VALID [2022-04-08 08:41:29,667 INFO L290 TraceCheckUtils]: 47: Hoare triple {258101#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {258101#true} is VALID [2022-04-08 08:41:29,668 INFO L290 TraceCheckUtils]: 48: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:29,668 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {258101#true} {258101#true} #6659#return; {258101#true} is VALID [2022-04-08 08:41:29,668 INFO L290 TraceCheckUtils]: 50: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:29,668 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {258101#true} {258101#true} #6455#return; {258101#true} is VALID [2022-04-08 08:41:29,668 INFO L290 TraceCheckUtils]: 52: Hoare triple {258101#true} #res := ~Status; {258101#true} is VALID [2022-04-08 08:41:29,668 INFO L290 TraceCheckUtils]: 53: Hoare triple {258101#true} assume true; {258101#true} is VALID [2022-04-08 08:41:29,669 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {258101#true} {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} #6707#return; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-08 08:41:29,669 INFO L290 TraceCheckUtils]: 55: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} assume -2147483648 <= #t~ret906 && #t~ret906 <= 2147483647;havoc #t~ret906; {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-08 08:41:29,670 INFO L290 TraceCheckUtils]: 56: Hoare triple {258300#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} #res := ~status~23; {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} is VALID [2022-04-08 08:41:29,670 INFO L290 TraceCheckUtils]: 57: Hoare triple {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} assume true; {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} is VALID [2022-04-08 08:41:29,671 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {258352#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} {258101#true} #5943#return; {258359#(<= (+ 1073741738 |PptDispatchPnp_#t~ret599|) 0)} is VALID [2022-04-08 08:41:29,672 INFO L290 TraceCheckUtils]: 59: Hoare triple {258359#(<= (+ 1073741738 |PptDispatchPnp_#t~ret599|) 0)} assume -2147483648 <= #t~ret599 && #t~ret599 <= 2147483647;~status~11 := #t~ret599;havoc #t~ret599; {258363#(<= (+ 1073741738 PptDispatchPnp_~status~11) 0)} is VALID [2022-04-08 08:41:29,673 INFO L290 TraceCheckUtils]: 60: Hoare triple {258363#(<= (+ 1073741738 PptDispatchPnp_~status~11) 0)} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 96 + ~Irp.offset, 4);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {258102#false} is VALID [2022-04-08 08:41:29,673 INFO L290 TraceCheckUtils]: 61: Hoare triple {258102#false} assume ~minorFunction~0 % 256 > 24; {258102#false} is VALID [2022-04-08 08:41:29,673 INFO L272 TraceCheckUtils]: 62: Hoare triple {258102#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-08 08:41:29,673 INFO L290 TraceCheckUtils]: 63: Hoare triple {258102#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4); {258102#false} is VALID [2022-04-08 08:41:29,673 INFO L272 TraceCheckUtils]: 64: Hoare triple {258102#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {258102#false} is VALID [2022-04-08 08:41:29,673 INFO L290 TraceCheckUtils]: 65: Hoare triple {258102#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {258102#false} is VALID [2022-04-08 08:41:29,673 INFO L290 TraceCheckUtils]: 66: Hoare triple {258102#false} assume !(~s~0 == ~NP~0); {258102#false} is VALID [2022-04-08 08:41:29,673 INFO L272 TraceCheckUtils]: 67: Hoare triple {258102#false} call errorFn(); {258102#false} is VALID [2022-04-08 08:41:29,674 INFO L290 TraceCheckUtils]: 68: Hoare triple {258102#false} assume !false; {258102#false} is VALID [2022-04-08 08:41:29,674 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:41:29,674 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:41:29,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1751332096] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:41:29,674 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:41:29,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-08 08:41:29,675 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:41:29,675 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [522900907] [2022-04-08 08:41:29,675 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [522900907] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:41:29,675 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:41:29,675 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-08 08:41:29,675 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2039349004] [2022-04-08 08:41:29,675 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:41:29,677 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-08 08:41:29,677 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:41:29,677 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:41:29,755 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:41:29,755 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-08 08:41:29,755 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:41:29,756 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-08 08:41:29,756 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2022-04-08 08:41:29,756 INFO L87 Difference]: Start difference. First operand 4531 states and 6544 transitions. Second operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:42:39,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:42:39,190 INFO L93 Difference]: Finished difference Result 7739 states and 11131 transitions. [2022-04-08 08:42:39,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-08 08:42:39,190 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-08 08:42:39,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:42:39,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:42:39,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 5302 transitions. [2022-04-08 08:42:39,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:42:39,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 5302 transitions. [2022-04-08 08:42:39,534 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 5302 transitions. [2022-04-08 08:42:45,724 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5302 edges. 5302 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:42:46,771 INFO L225 Difference]: With dead ends: 7739 [2022-04-08 08:42:46,771 INFO L226 Difference]: Without dead ends: 4406 [2022-04-08 08:42:46,779 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2022-04-08 08:42:46,779 INFO L913 BasicCegarLoop]: 2789 mSDtfsCounter, 5 mSDsluCounter, 16695 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 19484 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-08 08:42:46,779 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [5 Valid, 19484 Invalid, 71 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-08 08:42:46,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4406 states. [2022-04-08 08:42:47,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4406 to 4403. [2022-04-08 08:42:47,651 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:42:47,657 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-08 08:42:47,662 INFO L74 IsIncluded]: Start isIncluded. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-08 08:42:47,668 INFO L87 Difference]: Start difference. First operand 4406 states. Second operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-08 08:42:48,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:42:48,284 INFO L93 Difference]: Finished difference Result 4406 states and 6325 transitions. [2022-04-08 08:42:48,284 INFO L276 IsEmpty]: Start isEmpty. Operand 4406 states and 6325 transitions. [2022-04-08 08:42:48,291 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:42:48,291 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:42:48,297 INFO L74 IsIncluded]: Start isIncluded. First operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) Second operand 4406 states. [2022-04-08 08:42:48,301 INFO L87 Difference]: Start difference. First operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) Second operand 4406 states. [2022-04-08 08:42:48,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:42:48,920 INFO L93 Difference]: Finished difference Result 4406 states and 6325 transitions. [2022-04-08 08:42:48,920 INFO L276 IsEmpty]: Start isEmpty. Operand 4406 states and 6325 transitions. [2022-04-08 08:42:48,928 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:42:48,928 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:42:48,928 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:42:48,928 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:42:48,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4403 states, 2931 states have (on average 1.3534629819174344) internal successors, (3967), 2998 states have internal predecessors, (3967), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 309 states have return successors, (1193), 1158 states have call predecessors, (1193), 1148 states have call successors, (1193) [2022-04-08 08:42:50,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4403 states to 4403 states and 6322 transitions. [2022-04-08 08:42:50,044 INFO L78 Accepts]: Start accepts. Automaton has 4403 states and 6322 transitions. Word has length 69 [2022-04-08 08:42:50,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:42:50,045 INFO L478 AbstractCegarLoop]: Abstraction has 4403 states and 6322 transitions. [2022-04-08 08:42:50,045 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 08:42:50,045 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4403 states and 6322 transitions. [2022-04-08 08:43:14,941 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6322 edges. 6322 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:43:14,942 INFO L276 IsEmpty]: Start isEmpty. Operand 4403 states and 6322 transitions. [2022-04-08 08:43:14,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-04-08 08:43:14,943 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 08:43:14,943 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 08:43:14,966 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-08 08:43:15,143 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-08 08:43:15,144 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 08:43:15,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 08:43:15,144 INFO L85 PathProgramCache]: Analyzing trace with hash 1515186020, now seen corresponding path program 1 times [2022-04-08 08:43:15,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 08:43:15,144 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [565851187] [2022-04-08 08:43:15,155 INFO L89 AcceleratorJordan]: Jordan loop acceleration statistics: -1 HavocedVariables, -1 AssignedVariables, -1 ReadonlyVariables, Eigenvalues: {}, 0 SequentialAcceleration, 0 AlternatingAcceleration, 0 QuantifierFreeResult [2022-04-08 08:43:15,155 WARN L91 AcceleratorJordan]: Jordan acceleration failed, because SIMULTANEOUS_UPDATE_FAILED [2022-04-08 08:43:15,155 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 08:43:15,155 INFO L85 PathProgramCache]: Analyzing trace with hash 1515186020, now seen corresponding path program 2 times [2022-04-08 08:43:15,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 08:43:15,156 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725981250] [2022-04-08 08:43:15,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 08:43:15,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 08:43:15,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:43:15,452 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 08:43:15,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:43:15,476 INFO L290 TraceCheckUtils]: 0: Hoare triple {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-08 08:43:15,476 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,476 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-08 08:43:15,511 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 08:43:15,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:43:15,520 INFO L290 TraceCheckUtils]: 0: Hoare triple {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-08 08:43:15,520 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,521 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291489#false} #6457#return; {291489#false} is VALID [2022-04-08 08:43:15,542 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 08:43:15,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:43:15,551 INFO L290 TraceCheckUtils]: 0: Hoare triple {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-08 08:43:15,552 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,552 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {291488#true} {291489#false} #6459#return; {291489#false} is VALID [2022-04-08 08:43:15,566 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-08 08:43:15,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:43:15,585 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-08 08:43:15,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:43:15,596 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 08:43:15,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:43:15,646 INFO L290 TraceCheckUtils]: 0: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-08 08:43:15,646 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-08 08:43:15,646 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,646 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L290 TraceCheckUtils]: 0: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L272 TraceCheckUtils]: 1: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L290 TraceCheckUtils]: 3: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L290 TraceCheckUtils]: 4: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-08 08:43:15,647 INFO L290 TraceCheckUtils]: 8: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-08 08:43:15,648 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,648 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-08 08:43:15,648 INFO L290 TraceCheckUtils]: 0: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-08 08:43:15,648 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-08 08:43:15,649 INFO L272 TraceCheckUtils]: 2: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:43:15,649 INFO L290 TraceCheckUtils]: 3: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L290 TraceCheckUtils]: 10: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L290 TraceCheckUtils]: 11: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,650 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-08 08:43:15,651 INFO L290 TraceCheckUtils]: 14: Hoare triple {291488#true} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291488#true} is VALID [2022-04-08 08:43:15,651 INFO L290 TraceCheckUtils]: 15: Hoare triple {291488#true} assume !(~status~1 >= 0);#res := ~status~1; {291488#true} is VALID [2022-04-08 08:43:15,651 INFO L290 TraceCheckUtils]: 16: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,651 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {291488#true} {291489#false} #6461#return; {291489#false} is VALID [2022-04-08 08:43:15,654 INFO L272 TraceCheckUtils]: 0: Hoare triple {291488#true} call ULTIMATE.init(); {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 08:43:15,655 INFO L290 TraceCheckUtils]: 1: Hoare triple {291519#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-08 08:43:15,655 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,655 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-08 08:43:15,655 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret1155 := main(); {291488#true} is VALID [2022-04-08 08:43:15,655 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {291493#(= main_~i~24 0)} is VALID [2022-04-08 08:43:15,656 INFO L290 TraceCheckUtils]: 6: Hoare triple {291493#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {291493#(= main_~i~24 0)} is VALID [2022-04-08 08:43:15,656 INFO L290 TraceCheckUtils]: 7: Hoare triple {291493#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {291494#(<= main_~i~24 1)} is VALID [2022-04-08 08:43:15,657 INFO L290 TraceCheckUtils]: 8: Hoare triple {291494#(<= main_~i~24 1)} assume !(~i~24 < 4); {291489#false} is VALID [2022-04-08 08:43:15,657 INFO L290 TraceCheckUtils]: 9: Hoare triple {291489#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {291489#false} is VALID [2022-04-08 08:43:15,657 INFO L272 TraceCheckUtils]: 10: Hoare triple {291489#false} call _BLAST_init(); {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:43:15,657 INFO L290 TraceCheckUtils]: 11: Hoare triple {291520#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-08 08:43:15,657 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,657 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291489#false} #6457#return; {291489#false} is VALID [2022-04-08 08:43:15,657 INFO L290 TraceCheckUtils]: 14: Hoare triple {291489#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {291489#false} is VALID [2022-04-08 08:43:15,657 INFO L290 TraceCheckUtils]: 15: Hoare triple {291489#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {291489#false} is VALID [2022-04-08 08:43:15,657 INFO L272 TraceCheckUtils]: 16: Hoare triple {291489#false} call stub_driver_init(); {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:43:15,657 INFO L290 TraceCheckUtils]: 17: Hoare triple {291521#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-08 08:43:15,658 INFO L290 TraceCheckUtils]: 18: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,658 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {291488#true} {291489#false} #6459#return; {291489#false} is VALID [2022-04-08 08:43:15,658 INFO L290 TraceCheckUtils]: 20: Hoare triple {291489#false} assume !!(~status~31 >= 0); {291489#false} is VALID [2022-04-08 08:43:15,658 INFO L290 TraceCheckUtils]: 21: Hoare triple {291489#false} assume 0 == ~__BLAST_NONDET~3; {291489#false} is VALID [2022-04-08 08:43:15,658 INFO L272 TraceCheckUtils]: 22: Hoare triple {291489#false} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:43:15,658 INFO L290 TraceCheckUtils]: 23: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-08 08:43:15,658 INFO L290 TraceCheckUtils]: 24: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-08 08:43:15,659 INFO L272 TraceCheckUtils]: 25: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 08:43:15,659 INFO L290 TraceCheckUtils]: 26: Hoare triple {291522#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-08 08:43:15,660 INFO L272 TraceCheckUtils]: 27: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-08 08:43:15,660 INFO L290 TraceCheckUtils]: 28: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-08 08:43:15,660 INFO L290 TraceCheckUtils]: 29: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-08 08:43:15,660 INFO L290 TraceCheckUtils]: 30: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,660 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-08 08:43:15,660 INFO L290 TraceCheckUtils]: 32: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-08 08:43:15,660 INFO L290 TraceCheckUtils]: 33: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291488#true} is VALID [2022-04-08 08:43:15,660 INFO L290 TraceCheckUtils]: 34: Hoare triple {291488#true} #res := ~status~23; {291488#true} is VALID [2022-04-08 08:43:15,661 INFO L290 TraceCheckUtils]: 35: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,661 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {291488#true} {291488#true} #5993#return; {291488#true} is VALID [2022-04-08 08:43:15,661 INFO L290 TraceCheckUtils]: 37: Hoare triple {291488#true} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291488#true} is VALID [2022-04-08 08:43:15,661 INFO L290 TraceCheckUtils]: 38: Hoare triple {291488#true} assume !(~status~1 >= 0);#res := ~status~1; {291488#true} is VALID [2022-04-08 08:43:15,661 INFO L290 TraceCheckUtils]: 39: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:15,661 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {291488#true} {291489#false} #6461#return; {291489#false} is VALID [2022-04-08 08:43:15,661 INFO L290 TraceCheckUtils]: 41: Hoare triple {291489#false} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {291489#false} is VALID [2022-04-08 08:43:15,661 INFO L290 TraceCheckUtils]: 42: Hoare triple {291489#false} assume !(0 != ~we_should_unload~0); {291489#false} is VALID [2022-04-08 08:43:15,661 INFO L290 TraceCheckUtils]: 43: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-08 08:43:15,662 INFO L290 TraceCheckUtils]: 44: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-08 08:43:15,662 INFO L290 TraceCheckUtils]: 45: Hoare triple {291489#false} assume !(~s~0 == ~UNLOADED~0); {291489#false} is VALID [2022-04-08 08:43:15,662 INFO L290 TraceCheckUtils]: 46: Hoare triple {291489#false} assume !(-1 == ~status~31); {291489#false} is VALID [2022-04-08 08:43:15,663 INFO L290 TraceCheckUtils]: 47: Hoare triple {291489#false} assume ~s~0 != ~SKIP2~0; {291489#false} is VALID [2022-04-08 08:43:15,663 INFO L290 TraceCheckUtils]: 48: Hoare triple {291489#false} assume ~s~0 != ~IPC~0; {291489#false} is VALID [2022-04-08 08:43:15,663 INFO L290 TraceCheckUtils]: 49: Hoare triple {291489#false} assume ~s~0 != ~DC~0; {291489#false} is VALID [2022-04-08 08:43:15,663 INFO L272 TraceCheckUtils]: 50: Hoare triple {291489#false} call errorFn(); {291489#false} is VALID [2022-04-08 08:43:15,663 INFO L290 TraceCheckUtils]: 51: Hoare triple {291489#false} assume !false; {291489#false} is VALID [2022-04-08 08:43:15,663 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 08:43:15,664 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 08:43:15,664 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725981250] [2022-04-08 08:43:15,664 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [725981250] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 08:43:15,664 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1948212672] [2022-04-08 08:43:15,664 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 08:43:15,664 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 08:43:15,665 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 08:43:15,665 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 08:43:15,667 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-08 08:43:16,443 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 08:43:16,443 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 08:43:16,448 INFO L263 TraceCheckSpWp]: Trace formula consists of 1514 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-08 08:43:16,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 08:43:16,486 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 08:43:16,659 INFO L272 TraceCheckUtils]: 0: Hoare triple {291488#true} call ULTIMATE.init(); {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L290 TraceCheckUtils]: 1: Hoare triple {291488#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(100, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 4 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 12 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 20 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 28 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 36 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 44 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 52 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 60 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 68 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 76 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 84 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 92 + ~#PnpIrpName~0.offset, 4);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 4);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(16, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 4);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 4 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 6 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 9 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 11 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(4, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 4);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(4, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 4);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(8, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 4);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(8, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 4);call write~init~int(0, ~#PhysicalZero~0.base, 4 + ~#PhysicalZero~0.offset, 4);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(16, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 4);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 4 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 6 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 9 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 11 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(12, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 4);call write~init~int(1, ~#PptWmiGuidList~0.base, 4 + ~#PptWmiGuidList~0.offset, 4);call write~init~int(0, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 4);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L290 TraceCheckUtils]: 2: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {291488#true} {291488#true} #6857#return; {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L272 TraceCheckUtils]: 4: Hoare triple {291488#true} call #t~ret1155 := main(); {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L290 TraceCheckUtils]: 5: Hoare triple {291488#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(168);assume -2147483648 <= #t~nondet1096 && #t~nondet1096 <= 2147483647;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(111);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(175);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 4);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(434);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 40 + ~#devobj~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 28 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 28 + ~e~0.offset, ~e~0.base, 32 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 196 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 196 + ~e~0.offset, ~e~0.base, 200 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 36 + ~e~0.offset, 4);call write~$Pointer$(~e~0.base, 36 + ~e~0.offset, ~e~0.base, 40 + ~e~0.offset, 4);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(144);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L290 TraceCheckUtils]: 6: Hoare triple {291488#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(72);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 36 * ~i~24), 4);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(36);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 4);call write~int(1, ~l~0.base, 16 + ~l~0.offset, 4);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 8 + (#t~mem1107.offset + 36 * ~i~24), 4);havoc #t~mem1107.base, #t~mem1107.offset; {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L290 TraceCheckUtils]: 7: Hoare triple {291488#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L290 TraceCheckUtils]: 8: Hoare triple {291488#true} assume !(~i~24 < 4); {291488#true} is VALID [2022-04-08 08:43:16,659 INFO L290 TraceCheckUtils]: 9: Hoare triple {291488#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 96 + ~#irp~0.offset, 4);call write~$Pointer$(#t~mem1108.base, 108 + #t~mem1108.offset, ~#irp~0.base, 96 + ~#irp~0.offset, 4);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L272 TraceCheckUtils]: 10: Hoare triple {291488#true} call _BLAST_init(); {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 11: Hoare triple {291488#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 12: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {291488#true} {291488#true} #6457#return; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 14: Hoare triple {291488#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset;call write~int(0, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := 0; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 15: Hoare triple {291488#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 24 + ~pirp~0.offset, 4);~myStatus~0 := -1073741637; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L272 TraceCheckUtils]: 16: Hoare triple {291488#true} call stub_driver_init(); {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 17: Hoare triple {291488#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := ~compFptr~0.base + ~compFptr~0.offset; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 18: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {291488#true} {291488#true} #6459#return; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 20: Hoare triple {291488#true} assume !!(~status~31 >= 0); {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 21: Hoare triple {291488#true} assume 0 == ~__BLAST_NONDET~3; {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L272 TraceCheckUtils]: 22: Hoare triple {291488#true} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {291488#true} is VALID [2022-04-08 08:43:16,660 INFO L290 TraceCheckUtils]: 23: Hoare triple {291488#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 4 + ~extension~2.offset, 4); {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L290 TraceCheckUtils]: 24: Hoare triple {291488#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 4294967296);havoc #t~mem287; {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L272 TraceCheckUtils]: 25: Hoare triple {291488#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L290 TraceCheckUtils]: 26: Hoare triple {291488#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 40 + ~DeviceObject.offset, 4);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 298 + ~extension~15.offset; {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L272 TraceCheckUtils]: 27: Hoare triple {291488#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 24); {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L290 TraceCheckUtils]: 28: Hoare triple {291488#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L290 TraceCheckUtils]: 29: Hoare triple {291488#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L290 TraceCheckUtils]: 30: Hoare triple {291488#true} assume true; {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {291488#true} {291488#true} #6705#return; {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L290 TraceCheckUtils]: 32: Hoare triple {291488#true} assume -2147483648 <= #t~ret905 && #t~ret905 <= 2147483647;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {291488#true} is VALID [2022-04-08 08:43:16,661 INFO L290 TraceCheckUtils]: 33: Hoare triple {291488#true} assume !!(~status~23 >= 0); {291640#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} is VALID [2022-04-08 08:43:16,662 INFO L290 TraceCheckUtils]: 34: Hoare triple {291640#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} #res := ~status~23; {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} is VALID [2022-04-08 08:43:16,662 INFO L290 TraceCheckUtils]: 35: Hoare triple {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} assume true; {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} is VALID [2022-04-08 08:43:16,663 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {291644#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} {291488#true} #5993#return; {291651#(<= 0 |PptDispatchCreate_#t~ret289|)} is VALID [2022-04-08 08:43:16,671 INFO L290 TraceCheckUtils]: 37: Hoare triple {291651#(<= 0 |PptDispatchCreate_#t~ret289|)} assume -2147483648 <= #t~ret289 && #t~ret289 <= 2147483647;~status~1 := #t~ret289;havoc #t~ret289; {291655#(<= 0 PptDispatchCreate_~status~1)} is VALID [2022-04-08 08:43:16,672 INFO L290 TraceCheckUtils]: 38: Hoare triple {291655#(<= 0 PptDispatchCreate_~status~1)} assume !(~status~1 >= 0);#res := ~status~1; {291489#false} is VALID [2022-04-08 08:43:16,672 INFO L290 TraceCheckUtils]: 39: Hoare triple {291489#false} assume true; {291489#false} is VALID [2022-04-08 08:43:16,672 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {291489#false} {291488#true} #6461#return; {291489#false} is VALID [2022-04-08 08:43:16,672 INFO L290 TraceCheckUtils]: 41: Hoare triple {291489#false} assume -2147483648 <= #t~ret1109 && #t~ret1109 <= 2147483647;~status~31 := #t~ret1109;havoc #t~ret1109; {291489#false} is VALID [2022-04-08 08:43:16,672 INFO L290 TraceCheckUtils]: 42: Hoare triple {291489#false} assume !(0 != ~we_should_unload~0); {291489#false} is VALID [2022-04-08 08:43:16,672 INFO L290 TraceCheckUtils]: 43: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-08 08:43:16,672 INFO L290 TraceCheckUtils]: 44: Hoare triple {291489#false} assume !(1 == ~pended~0); {291489#false} is VALID [2022-04-08 08:43:16,672 INFO L290 TraceCheckUtils]: 45: Hoare triple {291489#false} assume !(~s~0 == ~UNLOADED~0); {291489#false} is VALID [2022-04-08 08:43:16,673 INFO L290 TraceCheckUtils]: 46: Hoare triple {291489#false} assume !(-1 == ~status~31); {291489#false} is VALID [2022-04-08 08:43:16,673 INFO L290 TraceCheckUtils]: 47: Hoare triple {291489#false} assume ~s~0 != ~SKIP2~0; {291489#false} is VALID [2022-04-08 08:43:16,673 INFO L290 TraceCheckUtils]: 48: Hoare triple {291489#false} assume ~s~0 != ~IPC~0; {291489#false} is VALID [2022-04-08 08:43:16,673 INFO L290 TraceCheckUtils]: 49: Hoare triple {291489#false} assume ~s~0 != ~DC~0; {291489#false} is VALID [2022-04-08 08:43:16,673 INFO L272 TraceCheckUtils]: 50: Hoare triple {291489#false} call errorFn(); {291489#false} is VALID [2022-04-08 08:43:16,673 INFO L290 TraceCheckUtils]: 51: Hoare triple {291489#false} assume !false; {291489#false} is VALID [2022-04-08 08:43:16,673 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 08:43:16,673 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 08:43:16,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1948212672] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:43:16,674 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 08:43:16,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-04-08 08:43:16,674 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 08:43:16,674 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [565851187] [2022-04-08 08:43:16,674 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [565851187] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 08:43:16,674 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 08:43:16,674 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-08 08:43:16,674 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1942578405] [2022-04-08 08:43:16,674 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 08:43:16,675 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-04-08 08:43:16,675 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 08:43:16,675 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:43:16,752 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:43:16,752 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-08 08:43:16,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 08:43:16,752 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-08 08:43:16,753 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2022-04-08 08:43:16,753 INFO L87 Difference]: Start difference. First operand 4403 states and 6322 transitions. Second operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:44:05,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:44:05,345 INFO L93 Difference]: Finished difference Result 4446 states and 6373 transitions. [2022-04-08 08:44:05,345 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-04-08 08:44:05,345 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-04-08 08:44:05,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 08:44:05,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:44:05,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 2848 transitions. [2022-04-08 08:44:05,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:44:05,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 2848 transitions. [2022-04-08 08:44:05,529 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 6 states and 2848 transitions. [2022-04-08 08:44:08,793 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2848 edges. 2848 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 08:44:09,799 INFO L225 Difference]: With dead ends: 4446 [2022-04-08 08:44:09,800 INFO L226 Difference]: Without dead ends: 4402 [2022-04-08 08:44:09,801 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2022-04-08 08:44:09,801 INFO L913 BasicCegarLoop]: 2785 mSDtfsCounter, 10 mSDsluCounter, 11121 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 13906 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-08 08:44:09,801 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 13906 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-08 08:44:09,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4402 states. [2022-04-08 08:44:10,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4402 to 4400. [2022-04-08 08:44:10,553 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 08:44:10,559 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-08 08:44:10,564 INFO L74 IsIncluded]: Start isIncluded. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-08 08:44:10,569 INFO L87 Difference]: Start difference. First operand 4402 states. Second operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-08 08:44:11,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:44:11,176 INFO L93 Difference]: Finished difference Result 4402 states and 6320 transitions. [2022-04-08 08:44:11,176 INFO L276 IsEmpty]: Start isEmpty. Operand 4402 states and 6320 transitions. [2022-04-08 08:44:11,183 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:44:11,183 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:44:11,189 INFO L74 IsIncluded]: Start isIncluded. First operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) Second operand 4402 states. [2022-04-08 08:44:11,193 INFO L87 Difference]: Start difference. First operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) Second operand 4402 states. [2022-04-08 08:44:11,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 08:44:11,816 INFO L93 Difference]: Finished difference Result 4402 states and 6320 transitions. [2022-04-08 08:44:11,816 INFO L276 IsEmpty]: Start isEmpty. Operand 4402 states and 6320 transitions. [2022-04-08 08:44:11,822 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 08:44:11,822 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 08:44:11,822 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 08:44:11,822 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 08:44:11,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4400 states, 2929 states have (on average 1.3533629224991464) internal successors, (3964), 2996 states have internal predecessors, (3964), 1162 states have call successors, (1162), 291 states have call predecessors, (1162), 308 states have return successors, (1192), 1157 states have call predecessors, (1192), 1148 states have call successors, (1192) [2022-04-08 08:44:12,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4400 states to 4400 states and 6318 transitions. [2022-04-08 08:44:12,841 INFO L78 Accepts]: Start accepts. Automaton has 4400 states and 6318 transitions. Word has length 52 [2022-04-08 08:44:12,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 08:44:12,841 INFO L478 AbstractCegarLoop]: Abstraction has 4400 states and 6318 transitions. [2022-04-08 08:44:12,841 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 08:44:12,841 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4400 states and 6318 transitions.