/usr/bin/java -ea -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationQvasr_64.epf -i ../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-34549b5 [2022-04-08 15:09:50,109 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-04-08 15:09:50,110 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-04-08 15:09:50,132 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-04-08 15:09:50,133 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-04-08 15:09:50,134 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-04-08 15:09:50,135 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-04-08 15:09:50,136 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-04-08 15:09:50,137 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-04-08 15:09:50,138 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-04-08 15:09:50,139 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-04-08 15:09:50,140 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-04-08 15:09:50,140 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-04-08 15:09:50,141 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-04-08 15:09:50,142 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-04-08 15:09:50,143 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-04-08 15:09:50,144 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-04-08 15:09:50,144 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-04-08 15:09:50,146 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-04-08 15:09:50,147 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-04-08 15:09:50,148 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-04-08 15:09:50,149 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-04-08 15:09:50,150 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-04-08 15:09:50,151 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-04-08 15:09:50,151 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-04-08 15:09:50,154 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-04-08 15:09:50,154 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-04-08 15:09:50,154 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-04-08 15:09:50,155 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-04-08 15:09:50,155 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-04-08 15:09:50,156 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-04-08 15:09:50,157 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-04-08 15:09:50,157 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-04-08 15:09:50,158 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-04-08 15:09:50,159 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-04-08 15:09:50,159 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-04-08 15:09:50,160 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-04-08 15:09:50,160 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-04-08 15:09:50,161 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-04-08 15:09:50,161 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-04-08 15:09:50,162 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-04-08 15:09:50,171 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-04-08 15:09:50,172 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/acceleratedInterpolation/acceleratedInterpolationQvasr_64.epf [2022-04-08 15:09:50,183 INFO L113 SettingsManager]: Loading preferences was successful [2022-04-08 15:09:50,184 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-04-08 15:09:50,185 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-04-08 15:09:50,185 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-04-08 15:09:50,185 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-04-08 15:09:50,186 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-04-08 15:09:50,186 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-04-08 15:09:50,186 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-04-08 15:09:50,186 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-04-08 15:09:50,187 INFO L138 SettingsManager]: * Use constant arrays=true [2022-04-08 15:09:50,187 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-04-08 15:09:50,187 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-04-08 15:09:50,187 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-04-08 15:09:50,187 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-04-08 15:09:50,187 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-04-08 15:09:50,188 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-08 15:09:50,188 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-04-08 15:09:50,188 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-04-08 15:09:50,188 INFO L138 SettingsManager]: * Trace refinement strategy=ACCELERATED_INTERPOLATION [2022-04-08 15:09:50,188 INFO L138 SettingsManager]: * Trace refinement strategy used in Accelerated Interpolation=CAMEL [2022-04-08 15:09:50,188 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-04-08 15:09:50,188 INFO L138 SettingsManager]: * Loop acceleration method that is used by accelerated interpolation=QVASR [2022-04-08 15:09:50,189 INFO L138 SettingsManager]: * Use separate solver for trace checks=false WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-04-08 15:09:50,381 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-04-08 15:09:50,397 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-04-08 15:09:50,399 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-04-08 15:09:50,400 INFO L271 PluginConnector]: Initializing CDTParser... [2022-04-08 15:09:50,401 INFO L275 PluginConnector]: CDTParser initialized [2022-04-08 15:09:50,401 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-08 15:09:50,457 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/df208058c/ca24441bb5c248de99726ca61a676629/FLAGb4c61cc58 [2022-04-08 15:09:51,032 INFO L306 CDTParser]: Found 1 translation units. [2022-04-08 15:09:51,033 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c [2022-04-08 15:09:51,086 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/df208058c/ca24441bb5c248de99726ca61a676629/FLAGb4c61cc58 [2022-04-08 15:09:51,481 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/df208058c/ca24441bb5c248de99726ca61a676629 [2022-04-08 15:09:51,483 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-04-08 15:09:51,484 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-04-08 15:09:51,484 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-04-08 15:09:51,484 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-04-08 15:09:51,492 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-04-08 15:09:51,493 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.04 03:09:51" (1/1) ... [2022-04-08 15:09:51,494 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4bf98f6e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:51, skipping insertion in model container [2022-04-08 15:09:51,494 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.04 03:09:51" (1/1) ... [2022-04-08 15:09:51,499 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-04-08 15:09:51,572 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-04-08 15:09:52,133 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-08 15:09:52,749 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-08 15:09:52,763 INFO L203 MainTranslator]: Completed pre-run [2022-04-08 15:09:52,799 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/ntdrivers/parport.i.cil-2.c[86591,86604] [2022-04-08 15:09:53,015 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-04-08 15:09:53,103 INFO L208 MainTranslator]: Completed translation [2022-04-08 15:09:53,104 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53 WrapperNode [2022-04-08 15:09:53,104 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-04-08 15:09:53,105 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-04-08 15:09:53,105 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-04-08 15:09:53,105 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-04-08 15:09:53,113 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (1/1) ... [2022-04-08 15:09:53,113 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (1/1) ... [2022-04-08 15:09:53,174 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (1/1) ... [2022-04-08 15:09:53,174 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (1/1) ... [2022-04-08 15:09:53,332 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (1/1) ... [2022-04-08 15:09:53,353 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (1/1) ... [2022-04-08 15:09:53,376 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (1/1) ... [2022-04-08 15:09:53,414 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-04-08 15:09:53,414 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-04-08 15:09:53,414 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-04-08 15:09:53,414 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-04-08 15:09:53,416 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (1/1) ... [2022-04-08 15:09:53,426 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-04-08 15:09:53,439 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:09:53,452 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-04-08 15:09:53,463 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-04-08 15:09:53,476 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2022-04-08 15:09:53,477 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-04-08 15:09:53,477 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure ##fun~~PVOID~0~TO~VOID [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure reach_error [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure memcpy_guard [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlIntegerToUnicodeString [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlUnicodeStringToInteger [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareUnicodeString [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAppendUnicodeStringToString [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure READ_PORT_UCHAR [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure WRITE_PORT_UCHAR [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedIncrement [2022-04-08 15:09:53,478 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedDecrement [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure InterlockedExchange [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeDpc [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInsertQueueDpc [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSynchronizeExecution [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTimeIncrement [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireCancelSpinLock [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateErrorLogEntry [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure IoConnectInterrupt [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReportResourceUsage [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure IoInitializeRemoveLockEx [2022-04-08 15:09:53,479 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockEx [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseRemoveLockAndWaitEx [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWriteErrorLogEntry [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure IoWMIRegistrationControl [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure IoOpenDeviceRegistryKey [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure KeStallExecutionProcessor [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure PoRequestPowerIrp [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure PoSetPowerState [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfReferenceObject [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwQueryValueKey [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwSetValueKey [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiCompleteRequest [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure errorFn [2022-04-08 15:09:53,480 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCleanup [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpPnpIrpInfo [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLock [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLock [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptReleaseRemoveLockAndWait [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceList [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDebugDumpResourceRequirementsList [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLogError [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure DriverEntry [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptUnload [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCleanRemovalRelationsList [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAddPptRemovalRelation [2022-04-08 15:09:53,481 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRemovePptRemovalRelation [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpRemovalRelationsList [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDumpPptRemovalRelationsStruct [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchInternalDeviceControl [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsNecR98Machine [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchCreate [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchClose [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitiate1284_3 [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectDevice [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectDevice [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure Ppt1284_3AssignAddress [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfNon1284_3Present [2022-04-08 15:09:53,482 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStl1284_3 [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckIfStlProductId [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSend1284_3Command [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectChipFilter [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortType [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectPortCapabilities [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEcpPort [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPortIfUserRequested [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectEppPort [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetectBytePort [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoDepth [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDetermineFifoWidth [2022-04-08 15:09:53,483 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetChipMode [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearChipMode [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrSetMode [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetByteMode [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptClearByteMode [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCheckByteMode [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptEcrClearMode [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFindNatChip [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildResourceList [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBuildRemovalRelations [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanPciCardCmResourceList [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptIsPci [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCompleteRequest [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpInitDispatchFunctionTable [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpAddDevice [2022-04-08 15:09:53,484 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPnp [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartDevice [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartScanCmResourceList [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStartValidateResources [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterResourceRequirements [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryDeviceRelations [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryStopDevice [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelStopDevice [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpStopDevice [2022-04-08 15:09:53,485 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpQueryRemoveDevice [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpCancelRemoveDevice [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpRemoveDevice [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpSurpriseRemoval [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpBounceAndCatchPnpIrp [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPnpUnhandledIrp [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptPowerComplete [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure InitNEC_98 [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPower [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockDiskModeByte [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipClockPrtModeByte [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipSetDiskMode [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptLegacyZipCheckDevice [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTrySelectLegacyZip [2022-04-08 15:09:53,486 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDeselectLegacyZip [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegInitDriverSettings [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegGetDeviceParameterDword [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptRegSetDeviceParameterDword [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFailRequest [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptAcquireRemoveLockOrFailIrp [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPreProcessIrp [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchPostProcessIrp [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchCompletionRoutine [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptConnectInterrupt [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDisconnectInterrupt [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedIncrement [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDecrement [2022-04-08 15:09:53,487 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedRead [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedQueue [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSynchronizedDisconnect [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptCancelRoutine [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortDpc [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePortAtInterruptLevel [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePortFromInterruptLevel [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInterruptService [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTryAllocatePort [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptTraversePortCheckList [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptFreePort [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptQueryNumWaiters [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptSetCancelRoutine [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure KeQueryTickCount [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure CheckPort [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildParallelPortDeviceName [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptInitializeDeviceExtension [2022-04-08 15:09:53,488 INFO L138 BoogieDeclarations]: Found implementation of procedure PptGetPortNumberFromLptName [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure PptBuildDeviceObject [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiInitWmi [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure PptDispatchSystemControl [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiRegInfo [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure PptWmiQueryWmiDataBlock [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure _BLAST_init [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure stub_driver_init [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAcquireFastMutex [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure ExReleaseFastMutex [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure ExAllocatePoolWithTag [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure ExFreePool [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertHeadList [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedInsertTailList [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure ExfInterlockedRemoveHeadList [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAllocateMdl [2022-04-08 15:09:53,489 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAttachDeviceToDeviceStack [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildAsynchronousFsdRequest [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoBuildDeviceIoControlRequest [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateDevice [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoCreateSymbolicLink [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteDevice [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDeleteSymbolicLink [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoDetachDevice [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeIrp [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoFreeMdl [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoGetConfigurationInformation [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoQueryDeviceDescription [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoRegisterDeviceInterface [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoReleaseCancelSpinLock [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetDeviceInterfaceState [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IoSetHardErrorOrVerifyDevice [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure stubMoreProcessingRequired [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCallDriver [2022-04-08 15:09:53,490 INFO L138 BoogieDeclarations]: Found implementation of procedure IofCompleteRequest [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KeAcquireSpinLockRaiseToDpc [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KeDelayExecutionThread [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeEvent [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSemaphore [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KeInitializeSpinLock [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KeReleaseSemaphore [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KfReleaseSpinLock [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KeSetEvent [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure KeWaitForSingleObject [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure MmAllocateContiguousMemory [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure MmFreeContiguousMemory [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure MmMapLockedPagesSpecifyCache [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure MmPageEntireDriver [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure MmResetDriverPaging [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure MmUnlockPages [2022-04-08 15:09:53,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ObReferenceObjectByHandle [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ObfDereferenceObject [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure PoCallDriver [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure PoStartNextPowerIrp [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure PsCreateSystemThread [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure PsTerminateSystemThread [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlAnsiStringToUnicodeString [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCompareMemory [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlCopyUnicodeString [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlDeleteRegistryValue [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlFreeUnicodeString [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitString [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlInitUnicodeString [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure RtlQueryRegistryValues [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure ZwClose [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure WmiSystemControl [2022-04-08 15:09:53,492 INFO L138 BoogieDeclarations]: Found implementation of procedure IoAcquireRemoveLockEx [2022-04-08 15:09:53,493 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2022-04-08 15:09:53,493 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2022-04-08 15:09:53,493 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memmove [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure abort [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure __assert_fail [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure reach_error [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_short [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_long [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_ulong [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy_guard [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure malloc [2022-04-08 15:09:53,493 INFO L130 BoogieDeclarations]: Found specification of procedure memcpy [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure memset [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure memmove [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlQueryRegistryValues [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlDeleteRegistryValue [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlIntegerToUnicodeString [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlUnicodeStringToInteger [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitString [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlInitUnicodeString [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAnsiStringToUnicodeString [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareUnicodeString [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCopyUnicodeString [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlAppendUnicodeStringToString [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlFreeUnicodeString [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure RtlCompareMemory [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure READ_PORT_UCHAR [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure WRITE_PORT_UCHAR [2022-04-08 15:09:53,494 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedIncrement [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedDecrement [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure InterlockedExchange [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeDpc [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeInsertQueueDpc [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeSynchronizeExecution [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeEvent [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeSetEvent [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSemaphore [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeReleaseSemaphore [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeDelayExecutionThread [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeWaitForSingleObject [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeInitializeSpinLock [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KfReleaseSpinLock [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTimeIncrement [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure ExAllocatePoolWithTag [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure ExFreePool [2022-04-08 15:09:53,495 INFO L130 BoogieDeclarations]: Found specification of procedure ExAcquireFastMutex [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure ExReleaseFastMutex [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertHeadList [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedInsertTailList [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure ExfInterlockedRemoveHeadList [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure MmUnlockPages [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure MmMapLockedPagesSpecifyCache [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure MmAllocateContiguousMemory [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure MmFreeContiguousMemory [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure MmResetDriverPaging [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure MmPageEntireDriver [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure PsCreateSystemThread [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure PsTerminateSystemThread [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireCancelSpinLock [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateErrorLogEntry [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure IoAllocateMdl [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure IoAttachDeviceToDeviceStack [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildAsynchronousFsdRequest [2022-04-08 15:09:53,496 INFO L130 BoogieDeclarations]: Found specification of procedure IoBuildDeviceIoControlRequest [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IofCallDriver [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IofCompleteRequest [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoConnectInterrupt [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~~PVOID~0~TO~~BOOLEAN~0 [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateDevice [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoCreateSymbolicLink [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteDevice [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoDeleteSymbolicLink [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoDetachDevice [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeIrp [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoFreeMdl [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoGetConfigurationInformation [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoQueryDeviceDescription [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseCancelSpinLock [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoReportResourceUsage [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetHardErrorOrVerifyDevice [2022-04-08 15:09:53,497 INFO L130 BoogieDeclarations]: Found specification of procedure IoInitializeRemoveLockEx [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure IoAcquireRemoveLockEx [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockEx [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure IoReleaseRemoveLockAndWaitEx [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure IoWriteErrorLogEntry [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure IoWMIRegistrationControl [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure IoOpenDeviceRegistryKey [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure IoRegisterDeviceInterface [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure IoSetDeviceInterfaceState [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure KeStallExecutionProcessor [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure PoRequestPowerIrp [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure PoSetPowerState [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure PoCallDriver [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure PoStartNextPowerIrp [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure ObReferenceObjectByHandle [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure ObfReferenceObject [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure ObfDereferenceObject [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure ZwClose [2022-04-08 15:09:53,498 INFO L130 BoogieDeclarations]: Found specification of procedure ZwQueryValueKey [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure ZwSetValueKey [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure WmiCompleteRequest [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure WmiSystemControl [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptCompleteRequest [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure errorFn [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiInitWmi [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchSystemControl [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpInitDispatchFunctionTable [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpAddDevice [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPnp [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptFailRequest [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPreProcessIrp [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPostProcessIrp [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure DriverEntry [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptUnload [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchCompletionRoutine [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptLogError [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptConnectInterrupt [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptDisconnectInterrupt [2022-04-08 15:09:53,499 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCreate [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchClose [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedIncrement [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDecrement [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedRead [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedQueue [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptSynchronizedDisconnect [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptCancelRoutine [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortDpc [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePortAtInterruptLevel [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePortFromInterruptLevel [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptInterruptService [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptTryAllocatePort [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptTraversePortCheckList [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptFreePort [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptQueryNumWaiters [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchInternalDeviceControl [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchCleanup [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsNecR98Machine [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptDispatchPower [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegInitDriverSettings [2022-04-08 15:09:53,500 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNameFromPhysicalDeviceObject [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetCancelRoutine [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLockOrFailIrp [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpPnpIrpInfo [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptAcquireRemoveLock [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLock [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptReleaseRemoveLockAndWait [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceList [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptDebugDumpResourceRequirementsList [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectChipFilter [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortType [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetChipMode [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearChipMode [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitiate1284_3 [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectDevice [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectDevice [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure Ppt1284_3AssignAddress [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptSend1284_3Command [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptTrySelectLegacyZip [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptDeselectLegacyZip [2022-04-08 15:09:53,501 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpRemovalRelationsList [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegGetDeviceParameterDword [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptRegSetDeviceParameterDword [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildParallelPortDeviceName [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptInitializeDeviceExtension [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptGetPortNumberFromLptName [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildDeviceObject [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPort [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptCleanRemovalRelationsList [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure CheckPort [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memmove [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptAddPptRemovalRelation [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptRemovePptRemovalRelation [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptDumpPptRemovalRelationsStruct [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStl1284_3 [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfNon1284_3Present [2022-04-08 15:09:53,502 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckIfStlProductId [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectPortCapabilities [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEcpPort [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfDot3DevicePresent [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectEppPortIfUserRequested [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetectBytePort [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoDepth [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptDetermineFifoWidth [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrSetMode [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptEcrClearMode [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptFindNatChip [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptBuildResourceList [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptSetByteMode [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptClearByteMode [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptCheckByteMode [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~X~~UCHAR~0~TO~~NTSTATUS~0 [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterResourceRequirements [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryDeviceRelations [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryStopDevice [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelStopDevice [2022-04-08 15:09:53,503 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStopDevice [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpQueryRemoveDevice [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpCancelRemoveDevice [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpRemoveDevice [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpSurpriseRemoval [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpUnhandledIrp [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartDevice [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartValidateResources [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanCmResourceList [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpPassThroughPnpIrpAndReleaseRemoveLock [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptors [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterNukeIrqResourceDescriptorsFromAllLists [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterExistsNonIrqResourceList [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterGetEndOfResourceRequirementsList [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpListContainsIrqResourceDescriptor [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpFilterRemoveIrqResourceLists [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBounceAndCatchPnpIrp [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpBuildRemovalRelations [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPnpStartScanPciCardCmResourceList [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptIsPci [2022-04-08 15:09:53,504 INFO L130 BoogieDeclarations]: Found specification of procedure PptPowerComplete [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure InitNEC_98 [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockDiskModeByte [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipClockPrtModeByte [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipSetDiskMode [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptLegacyZipCheckDevice [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure ##fun~~PVOID~0~TO~VOID [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure KeQueryTickCount [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiRegInfo [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure PptWmiQueryWmiDataBlock [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure _BLAST_init [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure stub_driver_init [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure main [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure stubMoreProcessingRequired [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure KeAcquireSpinLockRaiseToDpc [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$ [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~$Pointer$ [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~$Pointer$ [2022-04-08 15:09:53,505 INFO L130 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2022-04-08 15:09:53,506 INFO L130 BoogieDeclarations]: Found specification of procedure read~unchecked~int [2022-04-08 15:09:54,255 INFO L234 CfgBuilder]: Building ICFG [2022-04-08 15:09:54,258 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-04-08 15:09:54,281 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:54,342 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:09:54,342 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:09:54,634 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:54,740 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##8: assume !false; [2022-04-08 15:09:54,741 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##7: assume false; [2022-04-08 15:09:54,759 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:54,788 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-08 15:09:54,788 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-08 15:09:54,789 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:54,800 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:09:54,800 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:09:54,911 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:54,953 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##9: assume false; [2022-04-08 15:09:54,953 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##10: assume !false; [2022-04-08 15:09:54,954 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:54,965 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:09:54,965 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:09:55,178 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:55,194 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:09:55,195 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:09:55,309 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:55,338 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-08 15:09:55,338 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-08 15:09:55,377 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:55,418 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-08 15:09:55,418 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-08 15:09:55,419 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:55,434 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-08 15:09:55,434 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-08 15:09:55,452 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:55,456 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:09:55,456 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:09:55,650 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:09:59,549 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##39: assume !false; [2022-04-08 15:09:59,549 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##38: assume false; [2022-04-08 15:10:01,650 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:01,655 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:01,655 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:01,740 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:01,740 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:02,134 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume !false; [2022-04-08 15:10:02,134 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume !false; [2022-04-08 15:10:02,134 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##25: assume false; [2022-04-08 15:10:02,134 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##19: assume false; [2022-04-08 15:10:02,399 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:02,405 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:02,405 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:02,580 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:02,590 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:02,590 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:02,887 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:02,892 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:02,892 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:02,892 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:02,926 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:02,926 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:02,950 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:02,956 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:02,956 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:02,956 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:02,961 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:02,961 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:02,961 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:02,972 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:02,972 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:03,107 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:03,111 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:03,112 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:03,118 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:03,122 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:03,122 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:03,188 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:03,193 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:03,193 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:03,205 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:03,210 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:03,210 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:03,592 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:03,596 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:03,596 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:03,606 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:03,643 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##6: assume !false; [2022-04-08 15:10:03,643 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##5: assume false; [2022-04-08 15:10:03,649 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:03,902 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##31: assume !false; [2022-04-08 15:10:03,902 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##30: assume false; [2022-04-08 15:10:04,171 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:04,176 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:04,176 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:04,297 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:04,351 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##21: assume !false; [2022-04-08 15:10:04,351 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##20: assume false; [2022-04-08 15:10:04,419 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:05,688 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##27: assume !false; [2022-04-08 15:10:05,688 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##26: assume false; [2022-04-08 15:10:05,738 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:05,772 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-08 15:10:05,772 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-08 15:10:05,773 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:05,811 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##18: assume !false; [2022-04-08 15:10:05,811 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##17: assume false; [2022-04-08 15:10:05,854 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:05,862 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##16: assume !false; [2022-04-08 15:10:05,862 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##15: assume false; [2022-04-08 15:10:05,965 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:05,969 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##4: assume !false; [2022-04-08 15:10:05,969 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##3: assume false; [2022-04-08 15:10:06,140 WARN L811 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2022-04-08 15:10:06,161 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##12: assume !false; [2022-04-08 15:10:06,161 INFO L764 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##11: assume false; [2022-04-08 15:10:06,230 INFO L275 CfgBuilder]: Performing block encoding [2022-04-08 15:10:06,256 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-04-08 15:10:06,256 INFO L299 CfgBuilder]: Removed 38 assume(true) statements. [2022-04-08 15:10:06,259 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.04 03:10:06 BoogieIcfgContainer [2022-04-08 15:10:06,260 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-04-08 15:10:06,264 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-04-08 15:10:06,264 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-04-08 15:10:06,269 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-04-08 15:10:06,269 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 08.04 03:09:51" (1/3) ... [2022-04-08 15:10:06,270 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c9568de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.04 03:10:06, skipping insertion in model container [2022-04-08 15:10:06,270 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.04 03:09:53" (2/3) ... [2022-04-08 15:10:06,270 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c9568de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 08.04 03:10:06, skipping insertion in model container [2022-04-08 15:10:06,270 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.04 03:10:06" (3/3) ... [2022-04-08 15:10:06,271 INFO L111 eAbstractionObserver]: Analyzing ICFG parport.i.cil-2.c [2022-04-08 15:10:06,274 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-04-08 15:10:06,274 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-04-08 15:10:06,303 INFO L339 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-04-08 15:10:06,307 INFO L340 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=All, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP [2022-04-08 15:10:06,307 INFO L341 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-04-08 15:10:06,366 INFO L276 IsEmpty]: Start isEmpty. Operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) [2022-04-08 15:10:06,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-04-08 15:10:06,373 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:10:06,373 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:10:06,373 INFO L403 AbstractCegarLoop]: === Iteration 1 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:10:06,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:10:06,380 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 1 times [2022-04-08 15:10:06,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:10:06,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2058264395] [2022-04-08 15:10:06,393 INFO L202 tedInterpolationCore]: No loops in this trace, falling back to nested interpolation [2022-04-08 15:10:06,393 INFO L85 PathProgramCache]: Analyzing trace with hash -2073400986, now seen corresponding path program 2 times [2022-04-08 15:10:06,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:10:06,396 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1145095329] [2022-04-08 15:10:06,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:10:06,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:10:06,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:10:07,003 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:10:07,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:10:07,038 INFO L290 TraceCheckUtils]: 0: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-08 15:10:07,038 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-08 15:10:07,038 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-08 15:10:07,066 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-08 15:10:07,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:10:07,092 INFO L290 TraceCheckUtils]: 0: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-08 15:10:07,093 INFO L290 TraceCheckUtils]: 1: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-08 15:10:07,093 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-08 15:10:07,097 INFO L272 TraceCheckUtils]: 0: Hoare triple {2253#true} call ULTIMATE.init(); {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:10:07,097 INFO L290 TraceCheckUtils]: 1: Hoare triple {2262#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {2253#true} is VALID [2022-04-08 15:10:07,097 INFO L290 TraceCheckUtils]: 2: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-08 15:10:07,097 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {2253#true} {2253#true} #6857#return; {2253#true} is VALID [2022-04-08 15:10:07,097 INFO L272 TraceCheckUtils]: 4: Hoare triple {2253#true} call #t~ret1155 := main(); {2253#true} is VALID [2022-04-08 15:10:07,098 INFO L290 TraceCheckUtils]: 5: Hoare triple {2253#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {2258#(= main_~i~24 0)} is VALID [2022-04-08 15:10:07,099 INFO L290 TraceCheckUtils]: 6: Hoare triple {2258#(= main_~i~24 0)} assume !(~i~24 < 4); {2254#false} is VALID [2022-04-08 15:10:07,099 INFO L290 TraceCheckUtils]: 7: Hoare triple {2254#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {2254#false} is VALID [2022-04-08 15:10:07,100 INFO L272 TraceCheckUtils]: 8: Hoare triple {2254#false} call _BLAST_init(); {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:10:07,100 INFO L290 TraceCheckUtils]: 9: Hoare triple {2263#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {2253#true} is VALID [2022-04-08 15:10:07,100 INFO L290 TraceCheckUtils]: 10: Hoare triple {2253#true} assume true; {2253#true} is VALID [2022-04-08 15:10:07,100 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {2253#true} {2254#false} #6457#return; {2254#false} is VALID [2022-04-08 15:10:07,100 INFO L290 TraceCheckUtils]: 12: Hoare triple {2254#false} assume !(~status~31 >= 0); {2254#false} is VALID [2022-04-08 15:10:07,100 INFO L290 TraceCheckUtils]: 13: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-08 15:10:07,100 INFO L290 TraceCheckUtils]: 14: Hoare triple {2254#false} assume !(1 == ~pended~0); {2254#false} is VALID [2022-04-08 15:10:07,100 INFO L290 TraceCheckUtils]: 15: Hoare triple {2254#false} assume !(~s~0 == ~UNLOADED~0); {2254#false} is VALID [2022-04-08 15:10:07,101 INFO L290 TraceCheckUtils]: 16: Hoare triple {2254#false} assume !(-1 == ~status~31); {2254#false} is VALID [2022-04-08 15:10:07,101 INFO L290 TraceCheckUtils]: 17: Hoare triple {2254#false} assume !(~s~0 != ~SKIP2~0); {2254#false} is VALID [2022-04-08 15:10:07,101 INFO L290 TraceCheckUtils]: 18: Hoare triple {2254#false} assume 1 == ~pended~0; {2254#false} is VALID [2022-04-08 15:10:07,101 INFO L290 TraceCheckUtils]: 19: Hoare triple {2254#false} assume 259 != ~status~31; {2254#false} is VALID [2022-04-08 15:10:07,101 INFO L272 TraceCheckUtils]: 20: Hoare triple {2254#false} call errorFn(); {2254#false} is VALID [2022-04-08 15:10:07,101 INFO L290 TraceCheckUtils]: 21: Hoare triple {2254#false} assume !false; {2254#false} is VALID [2022-04-08 15:10:07,102 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:10:07,102 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:10:07,102 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1145095329] [2022-04-08 15:10:07,103 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1145095329] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:10:07,103 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:10:07,103 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 15:10:07,104 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:10:07,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2058264395] [2022-04-08 15:10:07,105 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2058264395] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:10:07,105 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:10:07,105 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 15:10:07,105 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1485430720] [2022-04-08 15:10:07,106 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:10:07,110 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-08 15:10:07,111 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:10:07,113 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 15:10:07,145 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 22 edges. 22 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:10:07,145 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 15:10:07,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:10:07,166 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 15:10:07,166 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-08 15:10:07,174 INFO L87 Difference]: Start difference. First operand has 2250 states, 1521 states have (on average 1.4372123602892835) internal successors, (2186), 1577 states have internal predecessors, (2186), 562 states have call successors, (562), 151 states have call predecessors, (562), 151 states have return successors, (562), 547 states have call predecessors, (562), 562 states have call successors, (562) Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 15:10:21,136 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-08 15:10:30,254 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.01s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-08 15:10:47,679 WARN L534 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.00s for a HTC check with result UNKNOWN. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [] [2022-04-08 15:11:11,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:11:11,076 INFO L93 Difference]: Finished difference Result 4216 states and 6551 transitions. [2022-04-08 15:11:11,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 15:11:11,076 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) Word has length 22 [2022-04-08 15:11:11,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:11:11,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 15:11:11,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-08 15:11:11,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 15:11:11,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6551 transitions. [2022-04-08 15:11:11,655 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 6551 transitions. [2022-04-08 15:11:23,398 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6551 edges. 6551 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:11:23,995 INFO L225 Difference]: With dead ends: 4216 [2022-04-08 15:11:23,995 INFO L226 Difference]: Without dead ends: 2226 [2022-04-08 15:11:24,007 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2022-04-08 15:11:24,009 INFO L913 BasicCegarLoop]: 2421 mSDtfsCounter, 3234 mSDsluCounter, 361 mSDsCounter, 0 mSdLazyCounter, 3763 mSolverCounterSat, 1561 mSolverCounterUnsat, 3 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 25.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3637 SdHoareTripleChecker+Valid, 2782 SdHoareTripleChecker+Invalid, 5327 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1561 IncrementalHoareTripleChecker+Valid, 3763 IncrementalHoareTripleChecker+Invalid, 3 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 25.8s IncrementalHoareTripleChecker+Time [2022-04-08 15:11:24,010 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3637 Valid, 2782 Invalid, 5327 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1561 Valid, 3763 Invalid, 3 Unknown, 0 Unchecked, 25.8s Time] [2022-04-08 15:11:24,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2226 states. [2022-04-08 15:11:24,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2226 to 1985. [2022-04-08 15:11:24,473 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:11:24,489 INFO L82 GeneralOperation]: Start isEquivalent. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 15:11:24,501 INFO L74 IsIncluded]: Start isIncluded. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 15:11:24,512 INFO L87 Difference]: Start difference. First operand 2226 states. Second operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 15:11:24,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:11:24,710 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-08 15:11:24,710 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-08 15:11:24,729 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:11:24,729 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:11:24,734 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-08 15:11:24,739 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 2226 states. [2022-04-08 15:11:24,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:11:24,924 INFO L93 Difference]: Finished difference Result 2226 states and 3242 transitions. [2022-04-08 15:11:24,924 INFO L276 IsEmpty]: Start isEmpty. Operand 2226 states and 3242 transitions. [2022-04-08 15:11:24,933 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:11:24,933 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:11:24,933 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:11:24,933 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:11:24,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3745318352059925) internal successors, (1835), 1385 states have internal predecessors, (1835), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 15:11:25,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2849 transitions. [2022-04-08 15:11:25,208 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2849 transitions. Word has length 22 [2022-04-08 15:11:25,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:11:25,209 INFO L478 AbstractCegarLoop]: Abstraction has 1985 states and 2849 transitions. [2022-04-08 15:11:25,209 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 3.2) internal successors, (16), 3 states have internal predecessors, (16), 2 states have call successors, (4), 4 states have call predecessors, (4), 1 states have return successors, (2), 2 states have call predecessors, (2), 2 states have call successors, (2) [2022-04-08 15:11:25,209 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 1985 states and 2849 transitions. [2022-04-08 15:11:32,745 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2849 edges. 2849 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:11:32,745 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2849 transitions. [2022-04-08 15:11:32,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-04-08 15:11:32,746 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:11:32,746 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:11:32,746 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-04-08 15:11:32,746 INFO L403 AbstractCegarLoop]: === Iteration 2 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:11:32,747 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:11:32,747 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 1 times [2022-04-08 15:11:32,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:11:32,747 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [430498691] [2022-04-08 15:11:32,759 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:11:32,759 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:11:32,759 INFO L85 PathProgramCache]: Analyzing trace with hash 1828450504, now seen corresponding path program 2 times [2022-04-08 15:11:32,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:11:32,760 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805387408] [2022-04-08 15:11:32,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:11:32,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:11:32,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:11:33,030 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:11:33,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:11:33,060 INFO L290 TraceCheckUtils]: 0: Hoare triple {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-08 15:11:33,061 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 15:11:33,061 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-08 15:11:33,086 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:11:33,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:11:33,097 INFO L290 TraceCheckUtils]: 0: Hoare triple {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19120#true} is VALID [2022-04-08 15:11:33,098 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 15:11:33,098 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {19120#true} {19121#false} #6457#return; {19121#false} is VALID [2022-04-08 15:11:33,100 INFO L272 TraceCheckUtils]: 0: Hoare triple {19120#true} call ULTIMATE.init(); {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:11:33,100 INFO L290 TraceCheckUtils]: 1: Hoare triple {19130#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-08 15:11:33,101 INFO L290 TraceCheckUtils]: 2: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 15:11:33,101 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-08 15:11:33,101 INFO L272 TraceCheckUtils]: 4: Hoare triple {19120#true} call #t~ret1155 := main(); {19120#true} is VALID [2022-04-08 15:11:33,102 INFO L290 TraceCheckUtils]: 5: Hoare triple {19120#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {19125#(= main_~i~24 0)} is VALID [2022-04-08 15:11:33,102 INFO L290 TraceCheckUtils]: 6: Hoare triple {19125#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {19125#(= main_~i~24 0)} is VALID [2022-04-08 15:11:33,102 INFO L290 TraceCheckUtils]: 7: Hoare triple {19125#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {19126#(<= main_~i~24 1)} is VALID [2022-04-08 15:11:33,103 INFO L290 TraceCheckUtils]: 8: Hoare triple {19126#(<= main_~i~24 1)} assume !(~i~24 < 4); {19121#false} is VALID [2022-04-08 15:11:33,103 INFO L290 TraceCheckUtils]: 9: Hoare triple {19121#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {19121#false} is VALID [2022-04-08 15:11:33,103 INFO L272 TraceCheckUtils]: 10: Hoare triple {19121#false} call _BLAST_init(); {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:11:33,103 INFO L290 TraceCheckUtils]: 11: Hoare triple {19131#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19120#true} is VALID [2022-04-08 15:11:33,103 INFO L290 TraceCheckUtils]: 12: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 15:11:33,103 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {19120#true} {19121#false} #6457#return; {19121#false} is VALID [2022-04-08 15:11:33,103 INFO L290 TraceCheckUtils]: 14: Hoare triple {19121#false} assume !(~status~31 >= 0); {19121#false} is VALID [2022-04-08 15:11:33,103 INFO L290 TraceCheckUtils]: 15: Hoare triple {19121#false} assume !(1 == ~pended~0); {19121#false} is VALID [2022-04-08 15:11:33,104 INFO L290 TraceCheckUtils]: 16: Hoare triple {19121#false} assume !(1 == ~pended~0); {19121#false} is VALID [2022-04-08 15:11:33,104 INFO L290 TraceCheckUtils]: 17: Hoare triple {19121#false} assume !(~s~0 == ~UNLOADED~0); {19121#false} is VALID [2022-04-08 15:11:33,104 INFO L290 TraceCheckUtils]: 18: Hoare triple {19121#false} assume !(-1 == ~status~31); {19121#false} is VALID [2022-04-08 15:11:33,104 INFO L290 TraceCheckUtils]: 19: Hoare triple {19121#false} assume !(~s~0 != ~SKIP2~0); {19121#false} is VALID [2022-04-08 15:11:33,104 INFO L290 TraceCheckUtils]: 20: Hoare triple {19121#false} assume 1 == ~pended~0; {19121#false} is VALID [2022-04-08 15:11:33,104 INFO L290 TraceCheckUtils]: 21: Hoare triple {19121#false} assume 259 != ~status~31; {19121#false} is VALID [2022-04-08 15:11:33,104 INFO L272 TraceCheckUtils]: 22: Hoare triple {19121#false} call errorFn(); {19121#false} is VALID [2022-04-08 15:11:33,104 INFO L290 TraceCheckUtils]: 23: Hoare triple {19121#false} assume !false; {19121#false} is VALID [2022-04-08 15:11:33,105 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:11:33,105 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:11:33,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805387408] [2022-04-08 15:11:33,105 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [805387408] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:11:33,105 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1965984904] [2022-04-08 15:11:33,105 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:11:33,105 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:11:33,105 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:11:33,106 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:11:33,107 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-04-08 15:11:33,734 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:11:33,734 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:11:33,741 INFO L263 TraceCheckSpWp]: Trace formula consists of 1266 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-08 15:11:33,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:11:33,774 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:11:33,840 INFO L272 TraceCheckUtils]: 0: Hoare triple {19120#true} call ULTIMATE.init(); {19120#true} is VALID [2022-04-08 15:11:33,840 INFO L290 TraceCheckUtils]: 1: Hoare triple {19120#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {19120#true} is VALID [2022-04-08 15:11:33,840 INFO L290 TraceCheckUtils]: 2: Hoare triple {19120#true} assume true; {19120#true} is VALID [2022-04-08 15:11:33,840 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {19120#true} {19120#true} #6857#return; {19120#true} is VALID [2022-04-08 15:11:33,840 INFO L272 TraceCheckUtils]: 4: Hoare triple {19120#true} call #t~ret1155 := main(); {19120#true} is VALID [2022-04-08 15:11:33,840 INFO L290 TraceCheckUtils]: 5: Hoare triple {19120#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {19120#true} is VALID [2022-04-08 15:11:33,840 INFO L290 TraceCheckUtils]: 6: Hoare triple {19120#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {19120#true} is VALID [2022-04-08 15:11:33,841 INFO L290 TraceCheckUtils]: 7: Hoare triple {19120#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {19120#true} is VALID [2022-04-08 15:11:33,841 INFO L290 TraceCheckUtils]: 8: Hoare triple {19120#true} assume !(~i~24 < 4); {19120#true} is VALID [2022-04-08 15:11:33,841 INFO L290 TraceCheckUtils]: 9: Hoare triple {19120#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {19120#true} is VALID [2022-04-08 15:11:33,841 INFO L272 TraceCheckUtils]: 10: Hoare triple {19120#true} call _BLAST_init(); {19120#true} is VALID [2022-04-08 15:11:33,842 INFO L290 TraceCheckUtils]: 11: Hoare triple {19120#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 15:11:33,842 INFO L290 TraceCheckUtils]: 12: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume true; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 15:11:33,842 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {19168#(= ~s~0 ~UNLOADED~0)} {19120#true} #6457#return; {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 15:11:33,843 INFO L290 TraceCheckUtils]: 14: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(~status~31 >= 0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 15:11:33,843 INFO L290 TraceCheckUtils]: 15: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 15:11:33,843 INFO L290 TraceCheckUtils]: 16: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(1 == ~pended~0); {19168#(= ~s~0 ~UNLOADED~0)} is VALID [2022-04-08 15:11:33,843 INFO L290 TraceCheckUtils]: 17: Hoare triple {19168#(= ~s~0 ~UNLOADED~0)} assume !(~s~0 == ~UNLOADED~0); {19121#false} is VALID [2022-04-08 15:11:33,844 INFO L290 TraceCheckUtils]: 18: Hoare triple {19121#false} assume !(-1 == ~status~31); {19121#false} is VALID [2022-04-08 15:11:33,844 INFO L290 TraceCheckUtils]: 19: Hoare triple {19121#false} assume !(~s~0 != ~SKIP2~0); {19121#false} is VALID [2022-04-08 15:11:33,844 INFO L290 TraceCheckUtils]: 20: Hoare triple {19121#false} assume 1 == ~pended~0; {19121#false} is VALID [2022-04-08 15:11:33,844 INFO L290 TraceCheckUtils]: 21: Hoare triple {19121#false} assume 259 != ~status~31; {19121#false} is VALID [2022-04-08 15:11:33,844 INFO L272 TraceCheckUtils]: 22: Hoare triple {19121#false} call errorFn(); {19121#false} is VALID [2022-04-08 15:11:33,844 INFO L290 TraceCheckUtils]: 23: Hoare triple {19121#false} assume !false; {19121#false} is VALID [2022-04-08 15:11:33,844 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:11:33,844 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:11:33,845 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1965984904] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:11:33,845 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:11:33,845 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [6] total 7 [2022-04-08 15:11:33,845 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:11:33,846 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [430498691] [2022-04-08 15:11:33,846 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [430498691] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:11:33,846 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:11:33,846 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 15:11:33,846 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2056305019] [2022-04-08 15:11:33,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:11:33,846 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-08 15:11:33,847 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:11:33,847 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 15:11:33,875 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 24 edges. 24 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:11:33,876 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 15:11:33,876 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:11:33,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 15:11:33,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-08 15:11:33,876 INFO L87 Difference]: Start difference. First operand 1985 states and 2849 transitions. Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 15:11:51,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:11:51,495 INFO L93 Difference]: Finished difference Result 2005 states and 2875 transitions. [2022-04-08 15:11:51,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 15:11:51,496 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) Word has length 24 [2022-04-08 15:11:51,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:11:51,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 15:11:51,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-08 15:11:51,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 15:11:51,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2874 transitions. [2022-04-08 15:11:51,709 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2874 transitions. [2022-04-08 15:11:53,925 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2874 edges. 2874 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:11:54,213 INFO L225 Difference]: With dead ends: 2005 [2022-04-08 15:11:54,213 INFO L226 Difference]: Without dead ends: 1985 [2022-04-08 15:11:54,214 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2022-04-08 15:11:54,215 INFO L913 BasicCegarLoop]: 2846 mSDtfsCounter, 7 mSDsluCounter, 2787 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 5633 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-08 15:11:54,215 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [7 Valid, 5633 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-08 15:11:54,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1985 states. [2022-04-08 15:11:54,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1985 to 1985. [2022-04-08 15:11:54,535 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:11:54,556 INFO L82 GeneralOperation]: Start isEquivalent. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 15:11:54,562 INFO L74 IsIncluded]: Start isIncluded. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 15:11:54,566 INFO L87 Difference]: Start difference. First operand 1985 states. Second operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 15:11:54,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:11:54,704 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-08 15:11:54,704 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-08 15:11:54,752 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:11:54,752 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:11:54,756 INFO L74 IsIncluded]: Start isIncluded. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-08 15:11:54,759 INFO L87 Difference]: Start difference. First operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) Second operand 1985 states. [2022-04-08 15:11:54,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:11:54,903 INFO L93 Difference]: Finished difference Result 1985 states and 2848 transitions. [2022-04-08 15:11:54,903 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-08 15:11:54,909 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:11:54,909 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:11:54,909 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:11:54,909 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:11:54,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1335 states have (on average 1.3737827715355806) internal successors, (1834), 1385 states have internal predecessors, (1834), 517 states have call successors, (517), 134 states have call predecessors, (517), 132 states have return successors, (497), 488 states have call predecessors, (497), 497 states have call successors, (497) [2022-04-08 15:11:55,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 2848 transitions. [2022-04-08 15:11:55,154 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 2848 transitions. Word has length 24 [2022-04-08 15:11:55,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:11:55,154 INFO L478 AbstractCegarLoop]: Abstraction has 1985 states and 2848 transitions. [2022-04-08 15:11:55,154 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (2), 2 states have call predecessors, (2), 1 states have call successors, (2) [2022-04-08 15:11:55,154 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 1985 states and 2848 transitions. [2022-04-08 15:12:02,678 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2848 edges. 2848 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:12:02,679 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 2848 transitions. [2022-04-08 15:12:02,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-04-08 15:12:02,679 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:12:02,679 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:12:02,700 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2022-04-08 15:12:02,887 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:12:02,888 INFO L403 AbstractCegarLoop]: === Iteration 3 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:12:02,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:12:02,888 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 1 times [2022-04-08 15:12:02,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:12:02,888 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1527594962] [2022-04-08 15:12:02,898 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:12:02,898 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:12:02,898 INFO L85 PathProgramCache]: Analyzing trace with hash -975584275, now seen corresponding path program 2 times [2022-04-08 15:12:02,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:12:02,899 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [516152992] [2022-04-08 15:12:02,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:12:02,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:12:02,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:03,155 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:12:03,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:03,188 INFO L290 TraceCheckUtils]: 0: Hoare triple {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-08 15:12:03,188 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 15:12:03,188 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-08 15:12:03,213 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:12:03,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:03,232 INFO L290 TraceCheckUtils]: 0: Hoare triple {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-08 15:12:03,232 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 15:12:03,232 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31155#false} #6457#return; {31155#false} is VALID [2022-04-08 15:12:03,246 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:12:03,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:03,264 INFO L290 TraceCheckUtils]: 0: Hoare triple {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {31154#true} is VALID [2022-04-08 15:12:03,264 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 15:12:03,264 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {31154#true} {31155#false} #6459#return; {31155#false} is VALID [2022-04-08 15:12:03,266 INFO L272 TraceCheckUtils]: 0: Hoare triple {31154#true} call ULTIMATE.init(); {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:12:03,266 INFO L290 TraceCheckUtils]: 1: Hoare triple {31167#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-08 15:12:03,268 INFO L290 TraceCheckUtils]: 2: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 15:12:03,268 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-08 15:12:03,268 INFO L272 TraceCheckUtils]: 4: Hoare triple {31154#true} call #t~ret1155 := main(); {31154#true} is VALID [2022-04-08 15:12:03,268 INFO L290 TraceCheckUtils]: 5: Hoare triple {31154#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {31159#(= main_~i~24 0)} is VALID [2022-04-08 15:12:03,268 INFO L290 TraceCheckUtils]: 6: Hoare triple {31159#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {31159#(= main_~i~24 0)} is VALID [2022-04-08 15:12:03,269 INFO L290 TraceCheckUtils]: 7: Hoare triple {31159#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {31160#(<= main_~i~24 1)} is VALID [2022-04-08 15:12:03,269 INFO L290 TraceCheckUtils]: 8: Hoare triple {31160#(<= main_~i~24 1)} assume !(~i~24 < 4); {31155#false} is VALID [2022-04-08 15:12:03,269 INFO L290 TraceCheckUtils]: 9: Hoare triple {31155#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {31155#false} is VALID [2022-04-08 15:12:03,271 INFO L272 TraceCheckUtils]: 10: Hoare triple {31155#false} call _BLAST_init(); {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:12:03,271 INFO L290 TraceCheckUtils]: 11: Hoare triple {31168#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-08 15:12:03,271 INFO L290 TraceCheckUtils]: 12: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 15:12:03,271 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {31154#true} {31155#false} #6457#return; {31155#false} is VALID [2022-04-08 15:12:03,272 INFO L290 TraceCheckUtils]: 14: Hoare triple {31155#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {31155#false} is VALID [2022-04-08 15:12:03,272 INFO L290 TraceCheckUtils]: 15: Hoare triple {31155#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {31155#false} is VALID [2022-04-08 15:12:03,272 INFO L272 TraceCheckUtils]: 16: Hoare triple {31155#false} call stub_driver_init(); {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:12:03,273 INFO L290 TraceCheckUtils]: 17: Hoare triple {31169#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {31154#true} is VALID [2022-04-08 15:12:03,273 INFO L290 TraceCheckUtils]: 18: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 15:12:03,273 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {31154#true} {31155#false} #6459#return; {31155#false} is VALID [2022-04-08 15:12:03,274 INFO L290 TraceCheckUtils]: 20: Hoare triple {31155#false} assume !!(~status~31 >= 0); {31155#false} is VALID [2022-04-08 15:12:03,274 INFO L290 TraceCheckUtils]: 21: Hoare triple {31155#false} assume !(0 == ~__BLAST_NONDET~3); {31155#false} is VALID [2022-04-08 15:12:03,281 INFO L290 TraceCheckUtils]: 22: Hoare triple {31155#false} assume 1 == ~__BLAST_NONDET~3; {31155#false} is VALID [2022-04-08 15:12:03,283 INFO L272 TraceCheckUtils]: 23: Hoare triple {31155#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {31155#false} is VALID [2022-04-08 15:12:03,283 INFO L290 TraceCheckUtils]: 24: Hoare triple {31155#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {31155#false} is VALID [2022-04-08 15:12:03,283 INFO L290 TraceCheckUtils]: 25: Hoare triple {31155#false} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {31155#false} is VALID [2022-04-08 15:12:03,283 INFO L272 TraceCheckUtils]: 26: Hoare triple {31155#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {31155#false} is VALID [2022-04-08 15:12:03,283 INFO L290 TraceCheckUtils]: 27: Hoare triple {31155#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31155#false} is VALID [2022-04-08 15:12:03,283 INFO L272 TraceCheckUtils]: 28: Hoare triple {31155#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {31155#false} is VALID [2022-04-08 15:12:03,283 INFO L290 TraceCheckUtils]: 29: Hoare triple {31155#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31155#false} is VALID [2022-04-08 15:12:03,283 INFO L290 TraceCheckUtils]: 30: Hoare triple {31155#false} assume !(~s~0 == ~NP~0); {31155#false} is VALID [2022-04-08 15:12:03,284 INFO L272 TraceCheckUtils]: 31: Hoare triple {31155#false} call errorFn(); {31155#false} is VALID [2022-04-08 15:12:03,284 INFO L290 TraceCheckUtils]: 32: Hoare triple {31155#false} assume !false; {31155#false} is VALID [2022-04-08 15:12:03,284 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:12:03,284 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:12:03,284 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [516152992] [2022-04-08 15:12:03,284 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [516152992] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:12:03,284 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [456748947] [2022-04-08 15:12:03,284 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:12:03,285 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:12:03,285 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:12:03,286 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:12:03,287 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-04-08 15:12:03,911 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:12:03,911 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:12:03,916 INFO L263 TraceCheckSpWp]: Trace formula consists of 1452 conjuncts, 15 conjunts are in the unsatisfiable core [2022-04-08 15:12:03,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:03,948 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:12:04,060 INFO L272 TraceCheckUtils]: 0: Hoare triple {31154#true} call ULTIMATE.init(); {31154#true} is VALID [2022-04-08 15:12:04,061 INFO L290 TraceCheckUtils]: 1: Hoare triple {31154#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {31154#true} is VALID [2022-04-08 15:12:04,061 INFO L290 TraceCheckUtils]: 2: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 15:12:04,061 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {31154#true} {31154#true} #6857#return; {31154#true} is VALID [2022-04-08 15:12:04,061 INFO L272 TraceCheckUtils]: 4: Hoare triple {31154#true} call #t~ret1155 := main(); {31154#true} is VALID [2022-04-08 15:12:04,061 INFO L290 TraceCheckUtils]: 5: Hoare triple {31154#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {31154#true} is VALID [2022-04-08 15:12:04,061 INFO L290 TraceCheckUtils]: 6: Hoare triple {31154#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {31154#true} is VALID [2022-04-08 15:12:04,061 INFO L290 TraceCheckUtils]: 7: Hoare triple {31154#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {31154#true} is VALID [2022-04-08 15:12:04,061 INFO L290 TraceCheckUtils]: 8: Hoare triple {31154#true} assume !(~i~24 < 4); {31154#true} is VALID [2022-04-08 15:12:04,062 INFO L290 TraceCheckUtils]: 9: Hoare triple {31154#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {31154#true} is VALID [2022-04-08 15:12:04,062 INFO L272 TraceCheckUtils]: 10: Hoare triple {31154#true} call _BLAST_init(); {31154#true} is VALID [2022-04-08 15:12:04,062 INFO L290 TraceCheckUtils]: 11: Hoare triple {31154#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {31154#true} is VALID [2022-04-08 15:12:04,062 INFO L290 TraceCheckUtils]: 12: Hoare triple {31154#true} assume true; {31154#true} is VALID [2022-04-08 15:12:04,062 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {31154#true} {31154#true} #6457#return; {31154#true} is VALID [2022-04-08 15:12:04,062 INFO L290 TraceCheckUtils]: 14: Hoare triple {31154#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {31154#true} is VALID [2022-04-08 15:12:04,062 INFO L290 TraceCheckUtils]: 15: Hoare triple {31154#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {31154#true} is VALID [2022-04-08 15:12:04,062 INFO L272 TraceCheckUtils]: 16: Hoare triple {31154#true} call stub_driver_init(); {31154#true} is VALID [2022-04-08 15:12:04,063 INFO L290 TraceCheckUtils]: 17: Hoare triple {31154#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,063 INFO L290 TraceCheckUtils]: 18: Hoare triple {31224#(= ~s~0 ~NP~0)} assume true; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,063 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {31224#(= ~s~0 ~NP~0)} {31154#true} #6459#return; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,064 INFO L290 TraceCheckUtils]: 20: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !!(~status~31 >= 0); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,064 INFO L290 TraceCheckUtils]: 21: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !(0 == ~__BLAST_NONDET~3); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,064 INFO L290 TraceCheckUtils]: 22: Hoare triple {31224#(= ~s~0 ~NP~0)} assume 1 == ~__BLAST_NONDET~3; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,065 INFO L272 TraceCheckUtils]: 23: Hoare triple {31224#(= ~s~0 ~NP~0)} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,065 INFO L290 TraceCheckUtils]: 24: Hoare triple {31224#(= ~s~0 ~NP~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,065 INFO L290 TraceCheckUtils]: 25: Hoare triple {31224#(= ~s~0 ~NP~0)} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,066 INFO L272 TraceCheckUtils]: 26: Hoare triple {31224#(= ~s~0 ~NP~0)} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,066 INFO L290 TraceCheckUtils]: 27: Hoare triple {31224#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,067 INFO L272 TraceCheckUtils]: 28: Hoare triple {31224#(= ~s~0 ~NP~0)} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,067 INFO L290 TraceCheckUtils]: 29: Hoare triple {31224#(= ~s~0 ~NP~0)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {31224#(= ~s~0 ~NP~0)} is VALID [2022-04-08 15:12:04,067 INFO L290 TraceCheckUtils]: 30: Hoare triple {31224#(= ~s~0 ~NP~0)} assume !(~s~0 == ~NP~0); {31155#false} is VALID [2022-04-08 15:12:04,067 INFO L272 TraceCheckUtils]: 31: Hoare triple {31155#false} call errorFn(); {31155#false} is VALID [2022-04-08 15:12:04,068 INFO L290 TraceCheckUtils]: 32: Hoare triple {31155#false} assume !false; {31155#false} is VALID [2022-04-08 15:12:04,068 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:12:04,068 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:12:04,068 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [456748947] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:12:04,068 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:12:04,068 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-08 15:12:04,068 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:12:04,068 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1527594962] [2022-04-08 15:12:04,068 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1527594962] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:12:04,069 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:12:04,069 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 15:12:04,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677372414] [2022-04-08 15:12:04,069 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:12:04,069 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 33 [2022-04-08 15:12:04,069 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:12:04,069 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 15:12:04,106 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 33 edges. 33 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:12:04,106 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 15:12:04,106 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:12:04,107 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 15:12:04,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 15:12:04,107 INFO L87 Difference]: Start difference. First operand 1985 states and 2848 transitions. Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 15:12:25,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:12:25,171 INFO L93 Difference]: Finished difference Result 5045 states and 7333 transitions. [2022-04-08 15:12:25,171 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 15:12:25,171 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) Word has length 33 [2022-04-08 15:12:25,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:12:25,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 15:12:25,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7332 transitions. [2022-04-08 15:12:25,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 15:12:25,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7332 transitions. [2022-04-08 15:12:25,655 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 7332 transitions. [2022-04-08 15:12:31,341 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 7332 edges. 7332 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:12:32,077 INFO L225 Difference]: With dead ends: 5045 [2022-04-08 15:12:32,078 INFO L226 Difference]: Without dead ends: 3732 [2022-04-08 15:12:32,082 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 15:12:32,083 INFO L913 BasicCegarLoop]: 3518 mSDtfsCounter, 2726 mSDsluCounter, 2556 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2726 SdHoareTripleChecker+Valid, 6074 SdHoareTripleChecker+Invalid, 147 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-04-08 15:12:32,083 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2726 Valid, 6074 Invalid, 147 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-04-08 15:12:32,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3732 states. [2022-04-08 15:12:32,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3732 to 3711. [2022-04-08 15:12:32,735 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:12:32,742 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-08 15:12:32,748 INFO L74 IsIncluded]: Start isIncluded. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-08 15:12:32,753 INFO L87 Difference]: Start difference. First operand 3732 states. Second operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-08 15:12:33,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:12:33,213 INFO L93 Difference]: Finished difference Result 3732 states and 5412 transitions. [2022-04-08 15:12:33,213 INFO L276 IsEmpty]: Start isEmpty. Operand 3732 states and 5412 transitions. [2022-04-08 15:12:33,224 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:12:33,225 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:12:33,231 INFO L74 IsIncluded]: Start isIncluded. First operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) Second operand 3732 states. [2022-04-08 15:12:33,236 INFO L87 Difference]: Start difference. First operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) Second operand 3732 states. [2022-04-08 15:12:33,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:12:33,687 INFO L93 Difference]: Finished difference Result 3732 states and 5412 transitions. [2022-04-08 15:12:33,687 INFO L276 IsEmpty]: Start isEmpty. Operand 3732 states and 5412 transitions. [2022-04-08 15:12:33,697 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:12:33,697 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:12:33,698 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:12:33,698 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:12:33,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3711 states, 2506 states have (on average 1.3699122106943336) internal successors, (3433), 2576 states have internal predecessors, (3433), 957 states have call successors, (957), 248 states have call predecessors, (957), 247 states have return successors, (996), 924 states have call predecessors, (996), 940 states have call successors, (996) [2022-04-08 15:12:34,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3711 states to 3711 states and 5386 transitions. [2022-04-08 15:12:34,496 INFO L78 Accepts]: Start accepts. Automaton has 3711 states and 5386 transitions. Word has length 33 [2022-04-08 15:12:34,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:12:34,496 INFO L478 AbstractCegarLoop]: Abstraction has 3711 states and 5386 transitions. [2022-04-08 15:12:34,497 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 3 states have call successors, (8), 3 states have call predecessors, (8), 2 states have return successors, (3), 2 states have call predecessors, (3), 1 states have call successors, (3) [2022-04-08 15:12:34,497 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3711 states and 5386 transitions. [2022-04-08 15:12:50,319 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5386 edges. 5386 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:12:50,319 INFO L276 IsEmpty]: Start isEmpty. Operand 3711 states and 5386 transitions. [2022-04-08 15:12:50,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-08 15:12:50,322 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:12:50,322 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:12:50,343 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-04-08 15:12:50,531 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable2 [2022-04-08 15:12:50,531 INFO L403 AbstractCegarLoop]: === Iteration 4 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:12:50,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:12:50,532 INFO L85 PathProgramCache]: Analyzing trace with hash -1905624997, now seen corresponding path program 1 times [2022-04-08 15:12:50,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:12:50,532 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [495859549] [2022-04-08 15:12:50,545 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:12:50,545 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:12:50,545 INFO L85 PathProgramCache]: Analyzing trace with hash -1905624997, now seen corresponding path program 2 times [2022-04-08 15:12:50,545 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:12:50,545 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [572648886] [2022-04-08 15:12:50,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:12:50,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:12:50,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:50,826 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:12:50,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:50,848 INFO L290 TraceCheckUtils]: 0: Hoare triple {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-08 15:12:50,848 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,848 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-08 15:12:50,869 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:12:50,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:50,880 INFO L290 TraceCheckUtils]: 0: Hoare triple {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-08 15:12:50,880 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,880 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56246#false} #6457#return; {56246#false} is VALID [2022-04-08 15:12:50,893 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:12:50,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:50,914 INFO L290 TraceCheckUtils]: 0: Hoare triple {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {56245#true} is VALID [2022-04-08 15:12:50,915 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,915 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {56245#true} {56246#false} #6459#return; {56246#false} is VALID [2022-04-08 15:12:50,925 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-08 15:12:50,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:50,951 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-08 15:12:50,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:50,960 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:12:50,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:50,969 INFO L290 TraceCheckUtils]: 0: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:50,969 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 15:12:50,969 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,970 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 15:12:50,970 INFO L290 TraceCheckUtils]: 0: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:50,970 INFO L272 TraceCheckUtils]: 1: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:12:50,970 INFO L290 TraceCheckUtils]: 2: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:50,970 INFO L290 TraceCheckUtils]: 3: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 15:12:50,971 INFO L290 TraceCheckUtils]: 4: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,971 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 15:12:50,971 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,971 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-08 15:12:50,971 INFO L290 TraceCheckUtils]: 0: Hoare triple {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {56245#true} is VALID [2022-04-08 15:12:50,971 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {56245#true} is VALID [2022-04-08 15:12:50,972 INFO L272 TraceCheckUtils]: 2: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:12:50,972 INFO L290 TraceCheckUtils]: 3: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:50,972 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:12:50,972 INFO L290 TraceCheckUtils]: 5: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:50,972 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 15:12:50,972 INFO L290 TraceCheckUtils]: 7: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,973 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 15:12:50,973 INFO L290 TraceCheckUtils]: 9: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,973 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-08 15:12:50,973 INFO L290 TraceCheckUtils]: 11: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-08 15:12:50,973 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,973 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56246#false} #6463#return; {56246#false} is VALID [2022-04-08 15:12:50,976 INFO L272 TraceCheckUtils]: 0: Hoare triple {56245#true} call ULTIMATE.init(); {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:12:50,976 INFO L290 TraceCheckUtils]: 1: Hoare triple {56272#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-08 15:12:50,976 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,976 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-08 15:12:50,976 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call #t~ret1155 := main(); {56245#true} is VALID [2022-04-08 15:12:50,976 INFO L290 TraceCheckUtils]: 5: Hoare triple {56245#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {56250#(= main_~i~24 0)} is VALID [2022-04-08 15:12:50,977 INFO L290 TraceCheckUtils]: 6: Hoare triple {56250#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {56250#(= main_~i~24 0)} is VALID [2022-04-08 15:12:50,977 INFO L290 TraceCheckUtils]: 7: Hoare triple {56250#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {56251#(<= main_~i~24 1)} is VALID [2022-04-08 15:12:50,977 INFO L290 TraceCheckUtils]: 8: Hoare triple {56251#(<= main_~i~24 1)} assume !(~i~24 < 4); {56246#false} is VALID [2022-04-08 15:12:50,978 INFO L290 TraceCheckUtils]: 9: Hoare triple {56246#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {56246#false} is VALID [2022-04-08 15:12:50,978 INFO L272 TraceCheckUtils]: 10: Hoare triple {56246#false} call _BLAST_init(); {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:12:50,978 INFO L290 TraceCheckUtils]: 11: Hoare triple {56273#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-08 15:12:50,978 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,978 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56246#false} #6457#return; {56246#false} is VALID [2022-04-08 15:12:50,978 INFO L290 TraceCheckUtils]: 14: Hoare triple {56246#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {56246#false} is VALID [2022-04-08 15:12:50,978 INFO L290 TraceCheckUtils]: 15: Hoare triple {56246#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {56246#false} is VALID [2022-04-08 15:12:50,978 INFO L272 TraceCheckUtils]: 16: Hoare triple {56246#false} call stub_driver_init(); {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:12:50,978 INFO L290 TraceCheckUtils]: 17: Hoare triple {56274#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {56245#true} is VALID [2022-04-08 15:12:50,978 INFO L290 TraceCheckUtils]: 18: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,978 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {56245#true} {56246#false} #6459#return; {56246#false} is VALID [2022-04-08 15:12:50,978 INFO L290 TraceCheckUtils]: 20: Hoare triple {56246#false} assume !!(~status~31 >= 0); {56246#false} is VALID [2022-04-08 15:12:50,979 INFO L290 TraceCheckUtils]: 21: Hoare triple {56246#false} assume !(0 == ~__BLAST_NONDET~3); {56246#false} is VALID [2022-04-08 15:12:50,979 INFO L290 TraceCheckUtils]: 22: Hoare triple {56246#false} assume 1 == ~__BLAST_NONDET~3; {56246#false} is VALID [2022-04-08 15:12:50,979 INFO L272 TraceCheckUtils]: 23: Hoare triple {56246#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:12:50,979 INFO L290 TraceCheckUtils]: 24: Hoare triple {56275#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {56245#true} is VALID [2022-04-08 15:12:50,979 INFO L290 TraceCheckUtils]: 25: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {56245#true} is VALID [2022-04-08 15:12:50,979 INFO L272 TraceCheckUtils]: 26: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:12:50,979 INFO L290 TraceCheckUtils]: 27: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:50,980 INFO L272 TraceCheckUtils]: 28: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56284#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:12:50,980 INFO L290 TraceCheckUtils]: 29: Hoare triple {56284#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:50,980 INFO L290 TraceCheckUtils]: 30: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 15:12:50,980 INFO L290 TraceCheckUtils]: 31: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,980 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 15:12:50,980 INFO L290 TraceCheckUtils]: 33: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,981 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-08 15:12:50,981 INFO L290 TraceCheckUtils]: 35: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-08 15:12:50,981 INFO L290 TraceCheckUtils]: 36: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:50,981 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {56245#true} {56246#false} #6463#return; {56246#false} is VALID [2022-04-08 15:12:50,984 INFO L290 TraceCheckUtils]: 38: Hoare triple {56246#false} assume -9223372036854775808 <= #t~ret1110 && #t~ret1110 <= 9223372036854775807;~status~31 := #t~ret1110;havoc #t~ret1110; {56246#false} is VALID [2022-04-08 15:12:50,984 INFO L290 TraceCheckUtils]: 39: Hoare triple {56246#false} assume !(0 != ~we_should_unload~0); {56246#false} is VALID [2022-04-08 15:12:50,985 INFO L290 TraceCheckUtils]: 40: Hoare triple {56246#false} assume !(1 == ~pended~0); {56246#false} is VALID [2022-04-08 15:12:50,985 INFO L290 TraceCheckUtils]: 41: Hoare triple {56246#false} assume !(1 == ~pended~0); {56246#false} is VALID [2022-04-08 15:12:50,985 INFO L290 TraceCheckUtils]: 42: Hoare triple {56246#false} assume !(~s~0 == ~UNLOADED~0); {56246#false} is VALID [2022-04-08 15:12:50,985 INFO L290 TraceCheckUtils]: 43: Hoare triple {56246#false} assume !(-1 == ~status~31); {56246#false} is VALID [2022-04-08 15:12:50,988 INFO L290 TraceCheckUtils]: 44: Hoare triple {56246#false} assume !(~s~0 != ~SKIP2~0); {56246#false} is VALID [2022-04-08 15:12:50,988 INFO L290 TraceCheckUtils]: 45: Hoare triple {56246#false} assume 1 == ~pended~0; {56246#false} is VALID [2022-04-08 15:12:50,989 INFO L290 TraceCheckUtils]: 46: Hoare triple {56246#false} assume 259 != ~status~31; {56246#false} is VALID [2022-04-08 15:12:50,989 INFO L272 TraceCheckUtils]: 47: Hoare triple {56246#false} call errorFn(); {56246#false} is VALID [2022-04-08 15:12:50,989 INFO L290 TraceCheckUtils]: 48: Hoare triple {56246#false} assume !false; {56246#false} is VALID [2022-04-08 15:12:50,989 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:12:50,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:12:50,989 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [572648886] [2022-04-08 15:12:50,989 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [572648886] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:12:50,989 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1645657126] [2022-04-08 15:12:50,989 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:12:50,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:12:50,990 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:12:50,999 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:12:51,001 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-04-08 15:12:51,658 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:12:51,658 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:12:51,663 INFO L263 TraceCheckSpWp]: Trace formula consists of 1479 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-08 15:12:51,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:12:51,703 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:12:51,802 INFO L272 TraceCheckUtils]: 0: Hoare triple {56245#true} call ULTIMATE.init(); {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L290 TraceCheckUtils]: 1: Hoare triple {56245#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L290 TraceCheckUtils]: 2: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {56245#true} {56245#true} #6857#return; {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L272 TraceCheckUtils]: 4: Hoare triple {56245#true} call #t~ret1155 := main(); {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L290 TraceCheckUtils]: 5: Hoare triple {56245#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L290 TraceCheckUtils]: 6: Hoare triple {56245#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L290 TraceCheckUtils]: 7: Hoare triple {56245#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L290 TraceCheckUtils]: 8: Hoare triple {56245#true} assume !(~i~24 < 4); {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L290 TraceCheckUtils]: 9: Hoare triple {56245#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {56245#true} is VALID [2022-04-08 15:12:51,803 INFO L272 TraceCheckUtils]: 10: Hoare triple {56245#true} call _BLAST_init(); {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 11: Hoare triple {56245#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 12: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {56245#true} {56245#true} #6457#return; {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 14: Hoare triple {56245#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 15: Hoare triple {56245#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L272 TraceCheckUtils]: 16: Hoare triple {56245#true} call stub_driver_init(); {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 17: Hoare triple {56245#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 18: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {56245#true} {56245#true} #6459#return; {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 20: Hoare triple {56245#true} assume !!(~status~31 >= 0); {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 21: Hoare triple {56245#true} assume !(0 == ~__BLAST_NONDET~3); {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L290 TraceCheckUtils]: 22: Hoare triple {56245#true} assume 1 == ~__BLAST_NONDET~3; {56245#true} is VALID [2022-04-08 15:12:51,804 INFO L272 TraceCheckUtils]: 23: Hoare triple {56245#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 24: Hoare triple {56245#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 25: Hoare triple {56245#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L272 TraceCheckUtils]: 26: Hoare triple {56245#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 27: Hoare triple {56245#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L272 TraceCheckUtils]: 28: Hoare triple {56245#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 29: Hoare triple {56245#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 30: Hoare triple {56245#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 31: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {56245#true} {56245#true} #6659#return; {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 33: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {56245#true} {56245#true} #5919#return; {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 35: Hoare triple {56245#true} #res := 0; {56245#true} is VALID [2022-04-08 15:12:51,805 INFO L290 TraceCheckUtils]: 36: Hoare triple {56245#true} assume true; {56245#true} is VALID [2022-04-08 15:12:51,806 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {56245#true} {56245#true} #6463#return; {56245#true} is VALID [2022-04-08 15:12:51,806 INFO L290 TraceCheckUtils]: 38: Hoare triple {56245#true} assume -9223372036854775808 <= #t~ret1110 && #t~ret1110 <= 9223372036854775807;~status~31 := #t~ret1110;havoc #t~ret1110; {56245#true} is VALID [2022-04-08 15:12:51,806 INFO L290 TraceCheckUtils]: 39: Hoare triple {56245#true} assume !(0 != ~we_should_unload~0); {56245#true} is VALID [2022-04-08 15:12:51,810 INFO L290 TraceCheckUtils]: 40: Hoare triple {56245#true} assume !(1 == ~pended~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 15:12:51,810 INFO L290 TraceCheckUtils]: 41: Hoare triple {56412#(not (= ~pended~0 1))} assume !(1 == ~pended~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 15:12:51,811 INFO L290 TraceCheckUtils]: 42: Hoare triple {56412#(not (= ~pended~0 1))} assume !(~s~0 == ~UNLOADED~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 15:12:51,811 INFO L290 TraceCheckUtils]: 43: Hoare triple {56412#(not (= ~pended~0 1))} assume !(-1 == ~status~31); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 15:12:51,811 INFO L290 TraceCheckUtils]: 44: Hoare triple {56412#(not (= ~pended~0 1))} assume !(~s~0 != ~SKIP2~0); {56412#(not (= ~pended~0 1))} is VALID [2022-04-08 15:12:51,812 INFO L290 TraceCheckUtils]: 45: Hoare triple {56412#(not (= ~pended~0 1))} assume 1 == ~pended~0; {56246#false} is VALID [2022-04-08 15:12:51,812 INFO L290 TraceCheckUtils]: 46: Hoare triple {56246#false} assume 259 != ~status~31; {56246#false} is VALID [2022-04-08 15:12:51,812 INFO L272 TraceCheckUtils]: 47: Hoare triple {56246#false} call errorFn(); {56246#false} is VALID [2022-04-08 15:12:51,812 INFO L290 TraceCheckUtils]: 48: Hoare triple {56246#false} assume !false; {56246#false} is VALID [2022-04-08 15:12:51,812 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:12:51,812 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:12:51,812 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1645657126] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:12:51,813 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:12:51,813 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2022-04-08 15:12:51,813 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:12:51,813 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [495859549] [2022-04-08 15:12:51,813 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [495859549] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:12:51,813 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:12:51,813 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 15:12:51,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [663807460] [2022-04-08 15:12:51,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:12:51,813 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-08 15:12:51,814 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:12:51,814 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:12:51,861 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:12:51,861 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 15:12:51,861 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:12:51,861 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 15:12:51,861 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-08 15:12:51,861 INFO L87 Difference]: Start difference. First operand 3711 states and 5386 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:03,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:13:03,198 INFO L93 Difference]: Finished difference Result 3829 states and 5529 transitions. [2022-04-08 15:13:03,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 15:13:03,199 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-08 15:13:03,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:13:03,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:03,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2934 transitions. [2022-04-08 15:13:03,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:03,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2934 transitions. [2022-04-08 15:13:03,404 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2934 transitions. [2022-04-08 15:13:05,780 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2934 edges. 2934 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:13:06,538 INFO L225 Difference]: With dead ends: 3829 [2022-04-08 15:13:06,539 INFO L226 Difference]: Without dead ends: 3810 [2022-04-08 15:13:06,540 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-08 15:13:06,540 INFO L913 BasicCegarLoop]: 2842 mSDtfsCounter, 2820 mSDsluCounter, 70 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2820 SdHoareTripleChecker+Valid, 2912 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-08 15:13:06,541 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2820 Valid, 2912 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-08 15:13:06,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3810 states. [2022-04-08 15:13:07,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3810 to 3804. [2022-04-08 15:13:07,215 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:13:07,251 INFO L82 GeneralOperation]: Start isEquivalent. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-08 15:13:07,256 INFO L74 IsIncluded]: Start isIncluded. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-08 15:13:07,262 INFO L87 Difference]: Start difference. First operand 3810 states. Second operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-08 15:13:07,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:13:07,761 INFO L93 Difference]: Finished difference Result 3810 states and 5502 transitions. [2022-04-08 15:13:07,761 INFO L276 IsEmpty]: Start isEmpty. Operand 3810 states and 5502 transitions. [2022-04-08 15:13:07,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:13:07,770 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:13:07,776 INFO L74 IsIncluded]: Start isIncluded. First operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) Second operand 3810 states. [2022-04-08 15:13:07,781 INFO L87 Difference]: Start difference. First operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) Second operand 3810 states. [2022-04-08 15:13:08,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:13:08,266 INFO L93 Difference]: Finished difference Result 3810 states and 5502 transitions. [2022-04-08 15:13:08,266 INFO L276 IsEmpty]: Start isEmpty. Operand 3810 states and 5502 transitions. [2022-04-08 15:13:08,274 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:13:08,274 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:13:08,274 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:13:08,274 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:13:08,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3804 states, 2571 states have (on average 1.3667833527810191) internal successors, (3514), 2646 states have internal predecessors, (3514), 971 states have call successors, (971), 262 states have call predecessors, (971), 261 states have return successors, (1012), 936 states have call predecessors, (1012), 954 states have call successors, (1012) [2022-04-08 15:13:09,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3804 states to 3804 states and 5497 transitions. [2022-04-08 15:13:09,185 INFO L78 Accepts]: Start accepts. Automaton has 3804 states and 5497 transitions. Word has length 49 [2022-04-08 15:13:09,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:13:09,185 INFO L478 AbstractCegarLoop]: Abstraction has 3804 states and 5497 transitions. [2022-04-08 15:13:09,186 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:09,186 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3804 states and 5497 transitions. [2022-04-08 15:13:24,982 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5497 edges. 5497 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:13:24,982 INFO L276 IsEmpty]: Start isEmpty. Operand 3804 states and 5497 transitions. [2022-04-08 15:13:24,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-04-08 15:13:24,984 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:13:24,984 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:13:25,007 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2022-04-08 15:13:25,191 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:13:25,192 INFO L403 AbstractCegarLoop]: === Iteration 5 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:13:25,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:13:25,192 INFO L85 PathProgramCache]: Analyzing trace with hash -1919969906, now seen corresponding path program 1 times [2022-04-08 15:13:25,192 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:13:25,192 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [540045048] [2022-04-08 15:13:25,200 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:13:25,200 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:13:25,200 INFO L85 PathProgramCache]: Analyzing trace with hash -1919969906, now seen corresponding path program 2 times [2022-04-08 15:13:25,200 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:13:25,200 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126336761] [2022-04-08 15:13:25,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:13:25,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:13:25,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:13:25,456 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:13:25,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:13:25,480 INFO L290 TraceCheckUtils]: 0: Hoare triple {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-08 15:13:25,480 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,480 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-08 15:13:25,512 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:13:25,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:13:25,538 INFO L290 TraceCheckUtils]: 0: Hoare triple {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-08 15:13:25,538 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,538 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79323#false} #6457#return; {79323#false} is VALID [2022-04-08 15:13:25,566 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:13:25,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:13:25,578 INFO L290 TraceCheckUtils]: 0: Hoare triple {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {79322#true} is VALID [2022-04-08 15:13:25,579 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,579 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {79322#true} {79323#false} #6459#return; {79323#false} is VALID [2022-04-08 15:13:25,592 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-08 15:13:25,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:13:25,615 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-08 15:13:25,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:13:25,624 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:13:25,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:13:25,634 INFO L290 TraceCheckUtils]: 0: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:25,634 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-08 15:13:25,634 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,634 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-08 15:13:25,634 INFO L290 TraceCheckUtils]: 0: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:25,635 INFO L272 TraceCheckUtils]: 1: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:13:25,635 INFO L290 TraceCheckUtils]: 2: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:25,635 INFO L290 TraceCheckUtils]: 3: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-08 15:13:25,636 INFO L290 TraceCheckUtils]: 4: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,636 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-08 15:13:25,637 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,637 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-08 15:13:25,637 INFO L290 TraceCheckUtils]: 0: Hoare triple {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {79322#true} is VALID [2022-04-08 15:13:25,637 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {79322#true} is VALID [2022-04-08 15:13:25,638 INFO L272 TraceCheckUtils]: 2: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:13:25,638 INFO L290 TraceCheckUtils]: 3: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:13:25,639 INFO L290 TraceCheckUtils]: 5: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L290 TraceCheckUtils]: 7: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L290 TraceCheckUtils]: 9: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L290 TraceCheckUtils]: 11: Hoare triple {79322#true} #res := 0; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,639 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79323#false} #6463#return; {79323#false} is VALID [2022-04-08 15:13:25,642 INFO L272 TraceCheckUtils]: 0: Hoare triple {79322#true} call ULTIMATE.init(); {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:13:25,642 INFO L290 TraceCheckUtils]: 1: Hoare triple {79349#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-08 15:13:25,643 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,643 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-08 15:13:25,643 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call #t~ret1155 := main(); {79322#true} is VALID [2022-04-08 15:13:25,643 INFO L290 TraceCheckUtils]: 5: Hoare triple {79322#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {79327#(= main_~i~24 0)} is VALID [2022-04-08 15:13:25,644 INFO L290 TraceCheckUtils]: 6: Hoare triple {79327#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {79327#(= main_~i~24 0)} is VALID [2022-04-08 15:13:25,644 INFO L290 TraceCheckUtils]: 7: Hoare triple {79327#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {79328#(<= main_~i~24 1)} is VALID [2022-04-08 15:13:25,644 INFO L290 TraceCheckUtils]: 8: Hoare triple {79328#(<= main_~i~24 1)} assume !(~i~24 < 4); {79323#false} is VALID [2022-04-08 15:13:25,644 INFO L290 TraceCheckUtils]: 9: Hoare triple {79323#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {79323#false} is VALID [2022-04-08 15:13:25,644 INFO L272 TraceCheckUtils]: 10: Hoare triple {79323#false} call _BLAST_init(); {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:13:25,644 INFO L290 TraceCheckUtils]: 11: Hoare triple {79350#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,645 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79323#false} #6457#return; {79323#false} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 14: Hoare triple {79323#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {79323#false} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 15: Hoare triple {79323#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {79323#false} is VALID [2022-04-08 15:13:25,645 INFO L272 TraceCheckUtils]: 16: Hoare triple {79323#false} call stub_driver_init(); {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 17: Hoare triple {79351#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {79322#true} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 18: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,645 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {79322#true} {79323#false} #6459#return; {79323#false} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 20: Hoare triple {79323#false} assume !!(~status~31 >= 0); {79323#false} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 21: Hoare triple {79323#false} assume !(0 == ~__BLAST_NONDET~3); {79323#false} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 22: Hoare triple {79323#false} assume 1 == ~__BLAST_NONDET~3; {79323#false} is VALID [2022-04-08 15:13:25,645 INFO L272 TraceCheckUtils]: 23: Hoare triple {79323#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 24: Hoare triple {79352#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {79322#true} is VALID [2022-04-08 15:13:25,645 INFO L290 TraceCheckUtils]: 25: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {79322#true} is VALID [2022-04-08 15:13:25,646 INFO L272 TraceCheckUtils]: 26: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:13:25,646 INFO L290 TraceCheckUtils]: 27: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L272 TraceCheckUtils]: 28: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79361#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:13:25,647 INFO L290 TraceCheckUtils]: 29: Hoare triple {79361#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L290 TraceCheckUtils]: 30: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L290 TraceCheckUtils]: 31: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {79322#true} {79322#true} #6659#return; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L290 TraceCheckUtils]: 33: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {79322#true} {79322#true} #5919#return; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L290 TraceCheckUtils]: 35: Hoare triple {79322#true} #res := 0; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L290 TraceCheckUtils]: 36: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:25,647 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {79322#true} {79323#false} #6463#return; {79323#false} is VALID [2022-04-08 15:13:25,647 INFO L290 TraceCheckUtils]: 38: Hoare triple {79323#false} assume -9223372036854775808 <= #t~ret1110 && #t~ret1110 <= 9223372036854775807;~status~31 := #t~ret1110;havoc #t~ret1110; {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 39: Hoare triple {79323#false} assume !(0 != ~we_should_unload~0); {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 40: Hoare triple {79323#false} assume !(1 == ~pended~0); {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 41: Hoare triple {79323#false} assume !(1 == ~pended~0); {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 42: Hoare triple {79323#false} assume !(~s~0 == ~UNLOADED~0); {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 43: Hoare triple {79323#false} assume !(-1 == ~status~31); {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 44: Hoare triple {79323#false} assume ~s~0 != ~SKIP2~0; {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 45: Hoare triple {79323#false} assume ~s~0 != ~IPC~0; {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 46: Hoare triple {79323#false} assume ~s~0 != ~DC~0; {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L272 TraceCheckUtils]: 47: Hoare triple {79323#false} call errorFn(); {79323#false} is VALID [2022-04-08 15:13:25,648 INFO L290 TraceCheckUtils]: 48: Hoare triple {79323#false} assume !false; {79323#false} is VALID [2022-04-08 15:13:25,649 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:13:25,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:13:25,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126336761] [2022-04-08 15:13:25,649 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [126336761] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:13:25,649 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [945059724] [2022-04-08 15:13:25,649 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:13:25,649 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:13:25,649 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:13:25,650 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:13:25,651 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-04-08 15:13:26,348 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:13:26,348 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:13:26,354 INFO L263 TraceCheckSpWp]: Trace formula consists of 1477 conjuncts, 3 conjunts are in the unsatisfiable core [2022-04-08 15:13:26,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:13:26,388 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:13:26,501 INFO L272 TraceCheckUtils]: 0: Hoare triple {79322#true} call ULTIMATE.init(); {79322#true} is VALID [2022-04-08 15:13:26,502 INFO L290 TraceCheckUtils]: 1: Hoare triple {79322#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {79322#true} is VALID [2022-04-08 15:13:26,502 INFO L290 TraceCheckUtils]: 2: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:26,502 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {79322#true} {79322#true} #6857#return; {79322#true} is VALID [2022-04-08 15:13:26,502 INFO L272 TraceCheckUtils]: 4: Hoare triple {79322#true} call #t~ret1155 := main(); {79322#true} is VALID [2022-04-08 15:13:26,502 INFO L290 TraceCheckUtils]: 5: Hoare triple {79322#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {79322#true} is VALID [2022-04-08 15:13:26,502 INFO L290 TraceCheckUtils]: 6: Hoare triple {79322#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {79322#true} is VALID [2022-04-08 15:13:26,502 INFO L290 TraceCheckUtils]: 7: Hoare triple {79322#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {79322#true} is VALID [2022-04-08 15:13:26,502 INFO L290 TraceCheckUtils]: 8: Hoare triple {79322#true} assume !(~i~24 < 4); {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L290 TraceCheckUtils]: 9: Hoare triple {79322#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L272 TraceCheckUtils]: 10: Hoare triple {79322#true} call _BLAST_init(); {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L290 TraceCheckUtils]: 11: Hoare triple {79322#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L290 TraceCheckUtils]: 12: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {79322#true} {79322#true} #6457#return; {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L290 TraceCheckUtils]: 14: Hoare triple {79322#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L290 TraceCheckUtils]: 15: Hoare triple {79322#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L272 TraceCheckUtils]: 16: Hoare triple {79322#true} call stub_driver_init(); {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L290 TraceCheckUtils]: 17: Hoare triple {79322#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {79322#true} is VALID [2022-04-08 15:13:26,503 INFO L290 TraceCheckUtils]: 18: Hoare triple {79322#true} assume true; {79322#true} is VALID [2022-04-08 15:13:26,504 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {79322#true} {79322#true} #6459#return; {79322#true} is VALID [2022-04-08 15:13:26,504 INFO L290 TraceCheckUtils]: 20: Hoare triple {79322#true} assume !!(~status~31 >= 0); {79322#true} is VALID [2022-04-08 15:13:26,504 INFO L290 TraceCheckUtils]: 21: Hoare triple {79322#true} assume !(0 == ~__BLAST_NONDET~3); {79322#true} is VALID [2022-04-08 15:13:26,504 INFO L290 TraceCheckUtils]: 22: Hoare triple {79322#true} assume 1 == ~__BLAST_NONDET~3; {79322#true} is VALID [2022-04-08 15:13:26,504 INFO L272 TraceCheckUtils]: 23: Hoare triple {79322#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {79322#true} is VALID [2022-04-08 15:13:26,515 INFO L290 TraceCheckUtils]: 24: Hoare triple {79322#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {79322#true} is VALID [2022-04-08 15:13:26,515 INFO L290 TraceCheckUtils]: 25: Hoare triple {79322#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {79322#true} is VALID [2022-04-08 15:13:26,515 INFO L272 TraceCheckUtils]: 26: Hoare triple {79322#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {79322#true} is VALID [2022-04-08 15:13:26,515 INFO L290 TraceCheckUtils]: 27: Hoare triple {79322#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:26,516 INFO L272 TraceCheckUtils]: 28: Hoare triple {79322#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {79322#true} is VALID [2022-04-08 15:13:26,516 INFO L290 TraceCheckUtils]: 29: Hoare triple {79322#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {79322#true} is VALID [2022-04-08 15:13:26,516 INFO L290 TraceCheckUtils]: 30: Hoare triple {79322#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,516 INFO L290 TraceCheckUtils]: 31: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,520 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #6659#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,521 INFO L290 TraceCheckUtils]: 33: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,522 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #5919#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,522 INFO L290 TraceCheckUtils]: 35: Hoare triple {79459#(= ~s~0 ~DC~0)} #res := 0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,522 INFO L290 TraceCheckUtils]: 36: Hoare triple {79459#(= ~s~0 ~DC~0)} assume true; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,523 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {79459#(= ~s~0 ~DC~0)} {79322#true} #6463#return; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,524 INFO L290 TraceCheckUtils]: 38: Hoare triple {79459#(= ~s~0 ~DC~0)} assume -9223372036854775808 <= #t~ret1110 && #t~ret1110 <= 9223372036854775807;~status~31 := #t~ret1110;havoc #t~ret1110; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,524 INFO L290 TraceCheckUtils]: 39: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(0 != ~we_should_unload~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,524 INFO L290 TraceCheckUtils]: 40: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(1 == ~pended~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,524 INFO L290 TraceCheckUtils]: 41: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(1 == ~pended~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,525 INFO L290 TraceCheckUtils]: 42: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(~s~0 == ~UNLOADED~0); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,525 INFO L290 TraceCheckUtils]: 43: Hoare triple {79459#(= ~s~0 ~DC~0)} assume !(-1 == ~status~31); {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,525 INFO L290 TraceCheckUtils]: 44: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~SKIP2~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,526 INFO L290 TraceCheckUtils]: 45: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~IPC~0; {79459#(= ~s~0 ~DC~0)} is VALID [2022-04-08 15:13:26,526 INFO L290 TraceCheckUtils]: 46: Hoare triple {79459#(= ~s~0 ~DC~0)} assume ~s~0 != ~DC~0; {79323#false} is VALID [2022-04-08 15:13:26,526 INFO L272 TraceCheckUtils]: 47: Hoare triple {79323#false} call errorFn(); {79323#false} is VALID [2022-04-08 15:13:26,526 INFO L290 TraceCheckUtils]: 48: Hoare triple {79323#false} assume !false; {79323#false} is VALID [2022-04-08 15:13:26,526 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:13:26,526 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:13:26,527 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [945059724] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:13:26,527 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:13:26,527 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [9] total 10 [2022-04-08 15:13:26,527 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:13:26,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [540045048] [2022-04-08 15:13:26,527 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [540045048] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:13:26,527 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:13:26,527 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 15:13:26,527 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333405250] [2022-04-08 15:13:26,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:13:26,528 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-08 15:13:26,528 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:13:26,528 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:26,578 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 49 edges. 49 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:13:26,578 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 15:13:26,578 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:13:26,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 15:13:26,578 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-08 15:13:26,579 INFO L87 Difference]: Start difference. First operand 3804 states and 5497 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:50,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:13:50,992 INFO L93 Difference]: Finished difference Result 4627 states and 6683 transitions. [2022-04-08 15:13:50,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 15:13:50,993 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 49 [2022-04-08 15:13:50,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:13:50,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:51,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4532 transitions. [2022-04-08 15:13:51,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:51,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4532 transitions. [2022-04-08 15:13:51,287 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 4532 transitions. [2022-04-08 15:13:54,973 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4532 edges. 4532 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:13:56,039 INFO L225 Difference]: With dead ends: 4627 [2022-04-08 15:13:56,039 INFO L226 Difference]: Without dead ends: 4622 [2022-04-08 15:13:56,040 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2022-04-08 15:13:56,041 INFO L913 BasicCegarLoop]: 4145 mSDtfsCounter, 1721 mSDsluCounter, 2715 mSDsCounter, 0 mSdLazyCounter, 87 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1721 SdHoareTripleChecker+Valid, 6860 SdHoareTripleChecker+Invalid, 92 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 87 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-08 15:13:56,041 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [1721 Valid, 6860 Invalid, 92 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 87 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-08 15:13:56,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4622 states. [2022-04-08 15:13:56,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4622 to 4578. [2022-04-08 15:13:56,839 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:13:56,848 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-08 15:13:56,855 INFO L74 IsIncluded]: Start isIncluded. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-08 15:13:56,862 INFO L87 Difference]: Start difference. First operand 4622 states. Second operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-08 15:13:57,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:13:57,576 INFO L93 Difference]: Finished difference Result 4622 states and 6676 transitions. [2022-04-08 15:13:57,576 INFO L276 IsEmpty]: Start isEmpty. Operand 4622 states and 6676 transitions. [2022-04-08 15:13:57,587 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:13:57,587 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:13:57,595 INFO L74 IsIncluded]: Start isIncluded. First operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) Second operand 4622 states. [2022-04-08 15:13:57,603 INFO L87 Difference]: Start difference. First operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) Second operand 4622 states. [2022-04-08 15:13:58,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:13:58,333 INFO L93 Difference]: Finished difference Result 4622 states and 6676 transitions. [2022-04-08 15:13:58,333 INFO L276 IsEmpty]: Start isEmpty. Operand 4622 states and 6676 transitions. [2022-04-08 15:13:58,341 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:13:58,342 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:13:58,342 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:13:58,342 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:13:58,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4578 states, 3047 states have (on average 1.3603544469970463) internal successors, (4145), 3130 states have internal predecessors, (4145), 1215 states have call successors, (1215), 313 states have call predecessors, (1215), 315 states have return successors, (1262), 1180 states have call predecessors, (1262), 1198 states have call successors, (1262) [2022-04-08 15:13:59,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4578 states to 4578 states and 6622 transitions. [2022-04-08 15:13:59,507 INFO L78 Accepts]: Start accepts. Automaton has 4578 states and 6622 transitions. Word has length 49 [2022-04-08 15:13:59,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:13:59,507 INFO L478 AbstractCegarLoop]: Abstraction has 4578 states and 6622 transitions. [2022-04-08 15:13:59,508 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:13:59,508 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4578 states and 6622 transitions. [2022-04-08 15:14:19,588 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6622 edges. 6622 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:14:19,588 INFO L276 IsEmpty]: Start isEmpty. Operand 4578 states and 6622 transitions. [2022-04-08 15:14:19,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-04-08 15:14:19,589 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:14:19,589 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:14:19,609 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-04-08 15:14:19,789 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:14:19,790 INFO L403 AbstractCegarLoop]: === Iteration 6 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:14:19,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:14:19,790 INFO L85 PathProgramCache]: Analyzing trace with hash 1061683448, now seen corresponding path program 1 times [2022-04-08 15:14:19,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:14:19,790 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [560164517] [2022-04-08 15:14:19,796 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:14:19,796 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:14:19,796 INFO L85 PathProgramCache]: Analyzing trace with hash 1061683448, now seen corresponding path program 2 times [2022-04-08 15:14:19,796 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:14:19,796 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393160657] [2022-04-08 15:14:19,796 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:14:19,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:14:19,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:14:20,034 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:14:20,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:14:20,056 INFO L290 TraceCheckUtils]: 0: Hoare triple {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-08 15:14:20,056 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,056 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-08 15:14:20,081 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:14:20,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:14:20,090 INFO L290 TraceCheckUtils]: 0: Hoare triple {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-08 15:14:20,091 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,091 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107168#false} #6457#return; {107168#false} is VALID [2022-04-08 15:14:20,105 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:14:20,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:14:20,115 INFO L290 TraceCheckUtils]: 0: Hoare triple {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {107167#true} is VALID [2022-04-08 15:14:20,115 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,115 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {107167#true} {107168#false} #6459#return; {107168#false} is VALID [2022-04-08 15:14:20,126 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 23 [2022-04-08 15:14:20,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:14:20,146 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-08 15:14:20,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:14:20,153 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:14:20,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:14:20,165 INFO L290 TraceCheckUtils]: 0: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:20,165 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 15:14:20,165 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,165 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 15:14:20,165 INFO L290 TraceCheckUtils]: 0: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:20,166 INFO L272 TraceCheckUtils]: 1: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:14:20,166 INFO L290 TraceCheckUtils]: 2: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:20,166 INFO L290 TraceCheckUtils]: 3: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 15:14:20,167 INFO L290 TraceCheckUtils]: 4: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,167 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 15:14:20,167 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,167 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-08 15:14:20,167 INFO L290 TraceCheckUtils]: 0: Hoare triple {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {107167#true} is VALID [2022-04-08 15:14:20,167 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {107167#true} is VALID [2022-04-08 15:14:20,168 INFO L272 TraceCheckUtils]: 2: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:14:20,168 INFO L290 TraceCheckUtils]: 3: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:14:20,169 INFO L290 TraceCheckUtils]: 5: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L290 TraceCheckUtils]: 7: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L290 TraceCheckUtils]: 9: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L290 TraceCheckUtils]: 11: Hoare triple {107167#true} #res := 0; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,169 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107168#false} #6463#return; {107168#false} is VALID [2022-04-08 15:14:20,172 INFO L272 TraceCheckUtils]: 0: Hoare triple {107167#true} call ULTIMATE.init(); {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:14:20,172 INFO L290 TraceCheckUtils]: 1: Hoare triple {107194#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-08 15:14:20,172 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,172 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-08 15:14:20,172 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call #t~ret1155 := main(); {107167#true} is VALID [2022-04-08 15:14:20,173 INFO L290 TraceCheckUtils]: 5: Hoare triple {107167#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {107172#(= main_~i~24 0)} is VALID [2022-04-08 15:14:20,173 INFO L290 TraceCheckUtils]: 6: Hoare triple {107172#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {107172#(= main_~i~24 0)} is VALID [2022-04-08 15:14:20,173 INFO L290 TraceCheckUtils]: 7: Hoare triple {107172#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {107173#(<= main_~i~24 1)} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 8: Hoare triple {107173#(<= main_~i~24 1)} assume !(~i~24 < 4); {107168#false} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 9: Hoare triple {107168#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {107168#false} is VALID [2022-04-08 15:14:20,174 INFO L272 TraceCheckUtils]: 10: Hoare triple {107168#false} call _BLAST_init(); {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 11: Hoare triple {107195#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,174 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107168#false} #6457#return; {107168#false} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 14: Hoare triple {107168#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {107168#false} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 15: Hoare triple {107168#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {107168#false} is VALID [2022-04-08 15:14:20,174 INFO L272 TraceCheckUtils]: 16: Hoare triple {107168#false} call stub_driver_init(); {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 17: Hoare triple {107196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {107167#true} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 18: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,174 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {107167#true} {107168#false} #6459#return; {107168#false} is VALID [2022-04-08 15:14:20,174 INFO L290 TraceCheckUtils]: 20: Hoare triple {107168#false} assume !!(~status~31 >= 0); {107168#false} is VALID [2022-04-08 15:14:20,175 INFO L290 TraceCheckUtils]: 21: Hoare triple {107168#false} assume !(0 == ~__BLAST_NONDET~3); {107168#false} is VALID [2022-04-08 15:14:20,175 INFO L290 TraceCheckUtils]: 22: Hoare triple {107168#false} assume 1 == ~__BLAST_NONDET~3; {107168#false} is VALID [2022-04-08 15:14:20,175 INFO L272 TraceCheckUtils]: 23: Hoare triple {107168#false} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:14:20,175 INFO L290 TraceCheckUtils]: 24: Hoare triple {107197#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {107167#true} is VALID [2022-04-08 15:14:20,175 INFO L290 TraceCheckUtils]: 25: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {107167#true} is VALID [2022-04-08 15:14:20,175 INFO L272 TraceCheckUtils]: 26: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:14:20,176 INFO L290 TraceCheckUtils]: 27: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:20,176 INFO L272 TraceCheckUtils]: 28: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107206#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:14:20,176 INFO L290 TraceCheckUtils]: 29: Hoare triple {107206#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:20,176 INFO L290 TraceCheckUtils]: 30: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 15:14:20,176 INFO L290 TraceCheckUtils]: 31: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,176 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 15:14:20,176 INFO L290 TraceCheckUtils]: 33: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,176 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-08 15:14:20,176 INFO L290 TraceCheckUtils]: 35: Hoare triple {107167#true} #res := 0; {107167#true} is VALID [2022-04-08 15:14:20,176 INFO L290 TraceCheckUtils]: 36: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:20,177 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {107167#true} {107168#false} #6463#return; {107168#false} is VALID [2022-04-08 15:14:20,179 INFO L290 TraceCheckUtils]: 38: Hoare triple {107168#false} assume -9223372036854775808 <= #t~ret1110 && #t~ret1110 <= 9223372036854775807;~status~31 := #t~ret1110;havoc #t~ret1110; {107168#false} is VALID [2022-04-08 15:14:20,179 INFO L290 TraceCheckUtils]: 39: Hoare triple {107168#false} assume !(0 != ~we_should_unload~0); {107168#false} is VALID [2022-04-08 15:14:20,179 INFO L290 TraceCheckUtils]: 40: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-08 15:14:20,179 INFO L290 TraceCheckUtils]: 41: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-08 15:14:20,179 INFO L290 TraceCheckUtils]: 42: Hoare triple {107168#false} assume !(~s~0 == ~UNLOADED~0); {107168#false} is VALID [2022-04-08 15:14:20,180 INFO L290 TraceCheckUtils]: 43: Hoare triple {107168#false} assume !(-1 == ~status~31); {107168#false} is VALID [2022-04-08 15:14:20,180 INFO L290 TraceCheckUtils]: 44: Hoare triple {107168#false} assume !(~s~0 != ~SKIP2~0); {107168#false} is VALID [2022-04-08 15:14:20,180 INFO L290 TraceCheckUtils]: 45: Hoare triple {107168#false} assume !(1 == ~pended~0); {107168#false} is VALID [2022-04-08 15:14:20,180 INFO L290 TraceCheckUtils]: 46: Hoare triple {107168#false} assume ~s~0 == ~DC~0; {107168#false} is VALID [2022-04-08 15:14:20,181 INFO L290 TraceCheckUtils]: 47: Hoare triple {107168#false} assume 259 == ~status~31; {107168#false} is VALID [2022-04-08 15:14:20,181 INFO L272 TraceCheckUtils]: 48: Hoare triple {107168#false} call errorFn(); {107168#false} is VALID [2022-04-08 15:14:20,181 INFO L290 TraceCheckUtils]: 49: Hoare triple {107168#false} assume !false; {107168#false} is VALID [2022-04-08 15:14:20,181 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:14:20,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:14:20,181 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393160657] [2022-04-08 15:14:20,181 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1393160657] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:14:20,181 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1851002154] [2022-04-08 15:14:20,181 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:14:20,181 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:14:20,182 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:14:20,182 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:14:20,224 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-04-08 15:14:20,870 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:14:20,870 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:14:20,885 INFO L263 TraceCheckSpWp]: Trace formula consists of 1481 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-08 15:14:20,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:14:20,917 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:14:21,061 INFO L272 TraceCheckUtils]: 0: Hoare triple {107167#true} call ULTIMATE.init(); {107167#true} is VALID [2022-04-08 15:14:21,061 INFO L290 TraceCheckUtils]: 1: Hoare triple {107167#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 2: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {107167#true} {107167#true} #6857#return; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L272 TraceCheckUtils]: 4: Hoare triple {107167#true} call #t~ret1155 := main(); {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 5: Hoare triple {107167#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 6: Hoare triple {107167#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 7: Hoare triple {107167#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 8: Hoare triple {107167#true} assume !(~i~24 < 4); {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 9: Hoare triple {107167#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L272 TraceCheckUtils]: 10: Hoare triple {107167#true} call _BLAST_init(); {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 11: Hoare triple {107167#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 12: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {107167#true} {107167#true} #6457#return; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 14: Hoare triple {107167#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 15: Hoare triple {107167#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L272 TraceCheckUtils]: 16: Hoare triple {107167#true} call stub_driver_init(); {107167#true} is VALID [2022-04-08 15:14:21,062 INFO L290 TraceCheckUtils]: 17: Hoare triple {107167#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 18: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {107167#true} {107167#true} #6459#return; {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 20: Hoare triple {107167#true} assume !!(~status~31 >= 0); {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 21: Hoare triple {107167#true} assume !(0 == ~__BLAST_NONDET~3); {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 22: Hoare triple {107167#true} assume 1 == ~__BLAST_NONDET~3; {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L272 TraceCheckUtils]: 23: Hoare triple {107167#true} call #t~ret1110 := PptDispatchClose(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 24: Hoare triple {107167#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~3.base, ~extension~3.offset;havoc ~status~2;havoc ~tmp~6;call #t~mem291.base, #t~mem291.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~3.base, ~extension~3.offset := #t~mem291.base, #t~mem291.offset;havoc #t~mem291.base, #t~mem291.offset;call #t~mem292 := read~int(~extension~3.base, 8 + ~extension~3.offset, 8); {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 25: Hoare triple {107167#true} assume 0 != (if 0 == #t~mem292 then 0 else (if 1 == #t~mem292 then 0 else ~bitwiseAnd(#t~mem292, 4096))) % 18446744073709551616;havoc #t~mem292;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := 0;call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L272 TraceCheckUtils]: 26: Hoare triple {107167#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 27: Hoare triple {107167#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L272 TraceCheckUtils]: 28: Hoare triple {107167#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 29: Hoare triple {107167#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 30: Hoare triple {107167#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 31: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L284 TraceCheckUtils]: 32: Hoare quadruple {107167#true} {107167#true} #6659#return; {107167#true} is VALID [2022-04-08 15:14:21,063 INFO L290 TraceCheckUtils]: 33: Hoare triple {107167#true} assume true; {107167#true} is VALID [2022-04-08 15:14:21,064 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {107167#true} {107167#true} #5919#return; {107167#true} is VALID [2022-04-08 15:14:21,064 INFO L290 TraceCheckUtils]: 35: Hoare triple {107167#true} #res := 0; {107319#(<= |PptDispatchClose_#res| 0)} is VALID [2022-04-08 15:14:21,064 INFO L290 TraceCheckUtils]: 36: Hoare triple {107319#(<= |PptDispatchClose_#res| 0)} assume true; {107319#(<= |PptDispatchClose_#res| 0)} is VALID [2022-04-08 15:14:21,065 INFO L284 TraceCheckUtils]: 37: Hoare quadruple {107319#(<= |PptDispatchClose_#res| 0)} {107167#true} #6463#return; {107326#(<= |main_#t~ret1110| 0)} is VALID [2022-04-08 15:14:21,066 INFO L290 TraceCheckUtils]: 38: Hoare triple {107326#(<= |main_#t~ret1110| 0)} assume -9223372036854775808 <= #t~ret1110 && #t~ret1110 <= 9223372036854775807;~status~31 := #t~ret1110;havoc #t~ret1110; {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,066 INFO L290 TraceCheckUtils]: 39: Hoare triple {107330#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,066 INFO L290 TraceCheckUtils]: 40: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,067 INFO L290 TraceCheckUtils]: 41: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,067 INFO L290 TraceCheckUtils]: 42: Hoare triple {107330#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,067 INFO L290 TraceCheckUtils]: 43: Hoare triple {107330#(<= main_~status~31 0)} assume !(-1 == ~status~31); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,068 INFO L290 TraceCheckUtils]: 44: Hoare triple {107330#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,068 INFO L290 TraceCheckUtils]: 45: Hoare triple {107330#(<= main_~status~31 0)} assume !(1 == ~pended~0); {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,068 INFO L290 TraceCheckUtils]: 46: Hoare triple {107330#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {107330#(<= main_~status~31 0)} is VALID [2022-04-08 15:14:21,069 INFO L290 TraceCheckUtils]: 47: Hoare triple {107330#(<= main_~status~31 0)} assume 259 == ~status~31; {107168#false} is VALID [2022-04-08 15:14:21,069 INFO L272 TraceCheckUtils]: 48: Hoare triple {107168#false} call errorFn(); {107168#false} is VALID [2022-04-08 15:14:21,069 INFO L290 TraceCheckUtils]: 49: Hoare triple {107168#false} assume !false; {107168#false} is VALID [2022-04-08 15:14:21,069 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:14:21,069 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:14:21,069 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1851002154] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:14:21,069 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:14:21,069 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-08 15:14:21,069 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:14:21,069 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [560164517] [2022-04-08 15:14:21,070 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [560164517] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:14:21,070 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:14:21,070 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 15:14:21,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [738931814] [2022-04-08 15:14:21,070 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:14:21,070 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 50 [2022-04-08 15:14:21,070 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:14:21,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:14:21,115 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 50 edges. 50 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:14:21,116 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 15:14:21,116 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:14:21,116 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 15:14:21,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 15:14:21,116 INFO L87 Difference]: Start difference. First operand 4578 states and 6622 transitions. Second operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:14:57,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:14:57,643 INFO L93 Difference]: Finished difference Result 4593 states and 6640 transitions. [2022-04-08 15:14:57,643 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 15:14:57,643 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 50 [2022-04-08 15:14:57,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:14:57,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:14:57,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2859 transitions. [2022-04-08 15:14:57,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:14:57,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2859 transitions. [2022-04-08 15:14:57,863 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2859 transitions. [2022-04-08 15:15:00,297 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2859 edges. 2859 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:15:01,350 INFO L225 Difference]: With dead ends: 4593 [2022-04-08 15:15:01,351 INFO L226 Difference]: Without dead ends: 4552 [2022-04-08 15:15:01,353 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 15:15:01,354 INFO L913 BasicCegarLoop]: 2840 mSDtfsCounter, 5 mSDsluCounter, 8500 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11340 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-08 15:15:01,354 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 11340 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-08 15:15:01,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4552 states. [2022-04-08 15:15:02,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4552 to 4552. [2022-04-08 15:15:02,151 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:15:02,158 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-08 15:15:02,165 INFO L74 IsIncluded]: Start isIncluded. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-08 15:15:02,171 INFO L87 Difference]: Start difference. First operand 4552 states. Second operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-08 15:15:02,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:15:02,826 INFO L93 Difference]: Finished difference Result 4552 states and 6585 transitions. [2022-04-08 15:15:02,826 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-08 15:15:02,833 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:15:02,833 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:15:02,839 INFO L74 IsIncluded]: Start isIncluded. First operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) Second operand 4552 states. [2022-04-08 15:15:02,843 INFO L87 Difference]: Start difference. First operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) Second operand 4552 states. [2022-04-08 15:15:03,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:15:03,506 INFO L93 Difference]: Finished difference Result 4552 states and 6585 transitions. [2022-04-08 15:15:03,506 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-08 15:15:03,513 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:15:03,513 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:15:03,513 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:15:03,513 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:15:03,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4552 states, 3031 states have (on average 1.3606070603761136) internal successors, (4124), 3114 states have internal predecessors, (4124), 1207 states have call successors, (1207), 311 states have call predecessors, (1207), 313 states have return successors, (1254), 1172 states have call predecessors, (1254), 1190 states have call successors, (1254) [2022-04-08 15:15:04,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4552 states to 4552 states and 6585 transitions. [2022-04-08 15:15:04,602 INFO L78 Accepts]: Start accepts. Automaton has 4552 states and 6585 transitions. Word has length 50 [2022-04-08 15:15:04,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:15:04,603 INFO L478 AbstractCegarLoop]: Abstraction has 4552 states and 6585 transitions. [2022-04-08 15:15:04,603 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 7.2) internal successors, (36), 4 states have internal predecessors, (36), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:15:04,603 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4552 states and 6585 transitions. [2022-04-08 15:15:25,642 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6585 edges. 6585 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:15:25,642 INFO L276 IsEmpty]: Start isEmpty. Operand 4552 states and 6585 transitions. [2022-04-08 15:15:25,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-04-08 15:15:25,643 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:15:25,643 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:15:25,666 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-04-08 15:15:25,851 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:15:25,851 INFO L403 AbstractCegarLoop]: === Iteration 7 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:15:25,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:15:25,852 INFO L85 PathProgramCache]: Analyzing trace with hash -1755528464, now seen corresponding path program 1 times [2022-04-08 15:15:25,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:15:25,852 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1142162972] [2022-04-08 15:15:25,857 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:15:25,857 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:15:25,857 INFO L85 PathProgramCache]: Analyzing trace with hash -1755528464, now seen corresponding path program 2 times [2022-04-08 15:15:25,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:15:25,858 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430351282] [2022-04-08 15:15:25,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:15:25,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:15:25,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:15:26,105 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:15:26,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:15:26,123 INFO L290 TraceCheckUtils]: 0: Hoare triple {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134757#true} is VALID [2022-04-08 15:15:26,123 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 15:15:26,123 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134757#true} #6857#return; {134757#true} is VALID [2022-04-08 15:15:26,150 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:15:26,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:15:26,158 INFO L290 TraceCheckUtils]: 0: Hoare triple {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134757#true} is VALID [2022-04-08 15:15:26,159 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 15:15:26,159 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134758#false} #6457#return; {134758#false} is VALID [2022-04-08 15:15:26,174 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:15:26,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:15:26,182 INFO L290 TraceCheckUtils]: 0: Hoare triple {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {134757#true} is VALID [2022-04-08 15:15:26,182 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 15:15:26,182 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {134757#true} {134758#false} #6459#return; {134758#false} is VALID [2022-04-08 15:15:26,182 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-08 15:15:26,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:15:26,190 INFO L290 TraceCheckUtils]: 0: Hoare triple {134757#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134757#true} is VALID [2022-04-08 15:15:26,190 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} assume 0 == ~__BLAST_NONDET~26; {134757#true} is VALID [2022-04-08 15:15:26,190 INFO L290 TraceCheckUtils]: 2: Hoare triple {134757#true} #res := 0; {134757#true} is VALID [2022-04-08 15:15:26,190 INFO L290 TraceCheckUtils]: 3: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 15:15:26,190 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {134757#true} {134758#false} #5849#return; {134758#false} is VALID [2022-04-08 15:15:26,193 INFO L272 TraceCheckUtils]: 0: Hoare triple {134757#true} call ULTIMATE.init(); {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:15:26,193 INFO L290 TraceCheckUtils]: 1: Hoare triple {134775#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134757#true} is VALID [2022-04-08 15:15:26,193 INFO L290 TraceCheckUtils]: 2: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 15:15:26,193 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134757#true} {134757#true} #6857#return; {134757#true} is VALID [2022-04-08 15:15:26,193 INFO L272 TraceCheckUtils]: 4: Hoare triple {134757#true} call #t~ret1155 := main(); {134757#true} is VALID [2022-04-08 15:15:26,194 INFO L290 TraceCheckUtils]: 5: Hoare triple {134757#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {134762#(= main_~i~24 0)} is VALID [2022-04-08 15:15:26,194 INFO L290 TraceCheckUtils]: 6: Hoare triple {134762#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {134762#(= main_~i~24 0)} is VALID [2022-04-08 15:15:26,194 INFO L290 TraceCheckUtils]: 7: Hoare triple {134762#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {134763#(<= main_~i~24 1)} is VALID [2022-04-08 15:15:26,194 INFO L290 TraceCheckUtils]: 8: Hoare triple {134763#(<= main_~i~24 1)} assume !(~i~24 < 4); {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 9: Hoare triple {134758#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L272 TraceCheckUtils]: 10: Hoare triple {134758#false} call _BLAST_init(); {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 11: Hoare triple {134776#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134757#true} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 12: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 15:15:26,195 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {134757#true} {134758#false} #6457#return; {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 14: Hoare triple {134758#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 15: Hoare triple {134758#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L272 TraceCheckUtils]: 16: Hoare triple {134758#false} call stub_driver_init(); {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 17: Hoare triple {134777#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {134757#true} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 18: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 15:15:26,195 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {134757#true} {134758#false} #6459#return; {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 20: Hoare triple {134758#false} assume !!(~status~31 >= 0); {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 21: Hoare triple {134758#false} assume !(0 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 22: Hoare triple {134758#false} assume !(1 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 23: Hoare triple {134758#false} assume !(3 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 15:15:26,195 INFO L290 TraceCheckUtils]: 24: Hoare triple {134758#false} assume !(4 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 25: Hoare triple {134758#false} assume !(5 == ~__BLAST_NONDET~3); {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 26: Hoare triple {134758#false} assume 6 == ~__BLAST_NONDET~3; {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L272 TraceCheckUtils]: 27: Hoare triple {134758#false} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 28: Hoare triple {134758#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L272 TraceCheckUtils]: 29: Hoare triple {134758#false} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 718 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {134757#true} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 30: Hoare triple {134757#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134757#true} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 31: Hoare triple {134757#true} assume 0 == ~__BLAST_NONDET~26; {134757#true} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 32: Hoare triple {134757#true} #res := 0; {134757#true} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 33: Hoare triple {134757#true} assume true; {134757#true} is VALID [2022-04-08 15:15:26,196 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {134757#true} {134758#false} #5849#return; {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 35: Hoare triple {134758#false} assume -9223372036854775808 <= #t~ret1077 && #t~ret1077 <= 9223372036854775807;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 36: Hoare triple {134758#false} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 37: Hoare triple {134758#false} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 38: Hoare triple {134758#false} assume 3 == #t~mem1080;havoc #t~mem1080; {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 39: Hoare triple {134758#false} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {134758#false} is VALID [2022-04-08 15:15:26,196 INFO L290 TraceCheckUtils]: 40: Hoare triple {134758#false} call #t~mem1082 := read~int(~Irp.base, 63 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 63 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);call write~$Pointer$(#t~mem1083.base, 68 + #t~mem1083.offset, ~Irp.base, 180 + ~Irp.offset, 8);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 40 + ~pDevExt~0.offset, 8); {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L272 TraceCheckUtils]: 41: Hoare triple {134758#false} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L290 TraceCheckUtils]: 42: Hoare triple {134758#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L290 TraceCheckUtils]: 43: Hoare triple {134758#false} assume 0 != ~compRegistered~0; {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L290 TraceCheckUtils]: 44: Hoare triple {134758#false} assume !(0 == ~routine~0); {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L290 TraceCheckUtils]: 45: Hoare triple {134758#false} assume !(1 == ~routine~0); {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L290 TraceCheckUtils]: 46: Hoare triple {134758#false} assume -1073741802 == ~compRetStatus~0; {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L272 TraceCheckUtils]: 47: Hoare triple {134758#false} call stubMoreProcessingRequired(); {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L290 TraceCheckUtils]: 48: Hoare triple {134758#false} assume !(~s~0 == ~NP~0); {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L272 TraceCheckUtils]: 49: Hoare triple {134758#false} call errorFn(); {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L290 TraceCheckUtils]: 50: Hoare triple {134758#false} assume !false; {134758#false} is VALID [2022-04-08 15:15:26,197 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:15:26,197 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:15:26,197 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430351282] [2022-04-08 15:15:26,197 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1430351282] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:15:26,198 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [797408677] [2022-04-08 15:15:26,198 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:15:26,198 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:15:26,198 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:15:26,199 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:15:26,199 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-04-08 15:15:26,894 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:15:26,895 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:15:26,899 INFO L263 TraceCheckSpWp]: Trace formula consists of 1578 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-08 15:15:26,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:15:26,929 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:15:27,041 INFO L272 TraceCheckUtils]: 0: Hoare triple {134757#true} call ULTIMATE.init(); {134757#true} is VALID [2022-04-08 15:15:27,044 INFO L290 TraceCheckUtils]: 1: Hoare triple {134757#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,045 INFO L290 TraceCheckUtils]: 2: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,045 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {134784#(= ~routine~0 0)} {134757#true} #6857#return; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,045 INFO L272 TraceCheckUtils]: 4: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1155 := main(); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,046 INFO L290 TraceCheckUtils]: 5: Hoare triple {134784#(= ~routine~0 0)} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,046 INFO L290 TraceCheckUtils]: 6: Hoare triple {134784#(= ~routine~0 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,046 INFO L290 TraceCheckUtils]: 7: Hoare triple {134784#(= ~routine~0 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,046 INFO L290 TraceCheckUtils]: 8: Hoare triple {134784#(= ~routine~0 0)} assume !(~i~24 < 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,047 INFO L290 TraceCheckUtils]: 9: Hoare triple {134784#(= ~routine~0 0)} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,047 INFO L272 TraceCheckUtils]: 10: Hoare triple {134784#(= ~routine~0 0)} call _BLAST_init(); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,047 INFO L290 TraceCheckUtils]: 11: Hoare triple {134784#(= ~routine~0 0)} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,047 INFO L290 TraceCheckUtils]: 12: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,048 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #6457#return; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,048 INFO L290 TraceCheckUtils]: 14: Hoare triple {134784#(= ~routine~0 0)} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,048 INFO L290 TraceCheckUtils]: 15: Hoare triple {134784#(= ~routine~0 0)} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,049 INFO L272 TraceCheckUtils]: 16: Hoare triple {134784#(= ~routine~0 0)} call stub_driver_init(); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,049 INFO L290 TraceCheckUtils]: 17: Hoare triple {134784#(= ~routine~0 0)} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,049 INFO L290 TraceCheckUtils]: 18: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,050 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #6459#return; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,050 INFO L290 TraceCheckUtils]: 20: Hoare triple {134784#(= ~routine~0 0)} assume !!(~status~31 >= 0); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,050 INFO L290 TraceCheckUtils]: 21: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,050 INFO L290 TraceCheckUtils]: 22: Hoare triple {134784#(= ~routine~0 0)} assume !(1 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,051 INFO L290 TraceCheckUtils]: 23: Hoare triple {134784#(= ~routine~0 0)} assume !(3 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,051 INFO L290 TraceCheckUtils]: 24: Hoare triple {134784#(= ~routine~0 0)} assume !(4 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,051 INFO L290 TraceCheckUtils]: 25: Hoare triple {134784#(= ~routine~0 0)} assume !(5 == ~__BLAST_NONDET~3); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,051 INFO L290 TraceCheckUtils]: 26: Hoare triple {134784#(= ~routine~0 0)} assume 6 == ~__BLAST_NONDET~3; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,052 INFO L272 TraceCheckUtils]: 27: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,052 INFO L290 TraceCheckUtils]: 28: Hoare triple {134784#(= ~routine~0 0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,053 INFO L272 TraceCheckUtils]: 29: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 718 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,053 INFO L290 TraceCheckUtils]: 30: Hoare triple {134784#(= ~routine~0 0)} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,054 INFO L290 TraceCheckUtils]: 31: Hoare triple {134784#(= ~routine~0 0)} assume 0 == ~__BLAST_NONDET~26; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,054 INFO L290 TraceCheckUtils]: 32: Hoare triple {134784#(= ~routine~0 0)} #res := 0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,054 INFO L290 TraceCheckUtils]: 33: Hoare triple {134784#(= ~routine~0 0)} assume true; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,057 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {134784#(= ~routine~0 0)} {134784#(= ~routine~0 0)} #5849#return; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,057 INFO L290 TraceCheckUtils]: 35: Hoare triple {134784#(= ~routine~0 0)} assume -9223372036854775808 <= #t~ret1077 && #t~ret1077 <= 9223372036854775807;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,058 INFO L290 TraceCheckUtils]: 36: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,058 INFO L290 TraceCheckUtils]: 37: Hoare triple {134784#(= ~routine~0 0)} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,058 INFO L290 TraceCheckUtils]: 38: Hoare triple {134784#(= ~routine~0 0)} assume 3 == #t~mem1080;havoc #t~mem1080; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,058 INFO L290 TraceCheckUtils]: 39: Hoare triple {134784#(= ~routine~0 0)} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,059 INFO L290 TraceCheckUtils]: 40: Hoare triple {134784#(= ~routine~0 0)} call #t~mem1082 := read~int(~Irp.base, 63 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 63 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);call write~$Pointer$(#t~mem1083.base, 68 + #t~mem1083.offset, ~Irp.base, 180 + ~Irp.offset, 8);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 40 + ~pDevExt~0.offset, 8); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,059 INFO L272 TraceCheckUtils]: 41: Hoare triple {134784#(= ~routine~0 0)} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,060 INFO L290 TraceCheckUtils]: 42: Hoare triple {134784#(= ~routine~0 0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,060 INFO L290 TraceCheckUtils]: 43: Hoare triple {134784#(= ~routine~0 0)} assume 0 != ~compRegistered~0; {134784#(= ~routine~0 0)} is VALID [2022-04-08 15:15:27,060 INFO L290 TraceCheckUtils]: 44: Hoare triple {134784#(= ~routine~0 0)} assume !(0 == ~routine~0); {134758#false} is VALID [2022-04-08 15:15:27,060 INFO L290 TraceCheckUtils]: 45: Hoare triple {134758#false} assume !(1 == ~routine~0); {134758#false} is VALID [2022-04-08 15:15:27,060 INFO L290 TraceCheckUtils]: 46: Hoare triple {134758#false} assume -1073741802 == ~compRetStatus~0; {134758#false} is VALID [2022-04-08 15:15:27,060 INFO L272 TraceCheckUtils]: 47: Hoare triple {134758#false} call stubMoreProcessingRequired(); {134758#false} is VALID [2022-04-08 15:15:27,061 INFO L290 TraceCheckUtils]: 48: Hoare triple {134758#false} assume !(~s~0 == ~NP~0); {134758#false} is VALID [2022-04-08 15:15:27,061 INFO L272 TraceCheckUtils]: 49: Hoare triple {134758#false} call errorFn(); {134758#false} is VALID [2022-04-08 15:15:27,061 INFO L290 TraceCheckUtils]: 50: Hoare triple {134758#false} assume !false; {134758#false} is VALID [2022-04-08 15:15:27,061 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:15:27,061 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:15:27,061 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [797408677] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:15:27,061 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:15:27,061 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-08 15:15:27,061 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:15:27,061 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1142162972] [2022-04-08 15:15:27,061 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1142162972] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:15:27,061 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:15:27,062 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 15:15:27,062 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021329059] [2022-04-08 15:15:27,062 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:15:27,062 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) Word has length 51 [2022-04-08 15:15:27,063 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:15:27,063 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 15:15:27,112 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:15:27,113 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 15:15:27,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:15:27,113 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 15:15:27,113 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 15:15:27,113 INFO L87 Difference]: Start difference. First operand 4552 states and 6585 transitions. Second operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 15:15:40,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:15:40,459 INFO L93 Difference]: Finished difference Result 7500 states and 10838 transitions. [2022-04-08 15:15:40,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 15:15:40,459 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) Word has length 51 [2022-04-08 15:15:40,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:15:40,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 15:15:40,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4966 transitions. [2022-04-08 15:15:40,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 15:15:40,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 4966 transitions. [2022-04-08 15:15:40,779 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 4966 transitions. [2022-04-08 15:15:45,090 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 4966 edges. 4966 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:15:46,178 INFO L225 Difference]: With dead ends: 7500 [2022-04-08 15:15:46,178 INFO L226 Difference]: Without dead ends: 4606 [2022-04-08 15:15:46,186 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 15:15:46,187 INFO L913 BasicCegarLoop]: 2819 mSDtfsCounter, 2710 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2710 SdHoareTripleChecker+Valid, 2964 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-08 15:15:46,187 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [2710 Valid, 2964 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-08 15:15:46,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4606 states. [2022-04-08 15:15:46,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4606 to 4521. [2022-04-08 15:15:46,982 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:15:46,988 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-08 15:15:46,991 INFO L74 IsIncluded]: Start isIncluded. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-08 15:15:46,994 INFO L87 Difference]: Start difference. First operand 4606 states. Second operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-08 15:15:47,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:15:47,651 INFO L93 Difference]: Finished difference Result 4606 states and 6629 transitions. [2022-04-08 15:15:47,651 INFO L276 IsEmpty]: Start isEmpty. Operand 4606 states and 6629 transitions. [2022-04-08 15:15:47,658 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:15:47,658 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:15:47,664 INFO L74 IsIncluded]: Start isIncluded. First operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) Second operand 4606 states. [2022-04-08 15:15:47,667 INFO L87 Difference]: Start difference. First operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) Second operand 4606 states. [2022-04-08 15:15:48,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:15:48,331 INFO L93 Difference]: Finished difference Result 4606 states and 6629 transitions. [2022-04-08 15:15:48,331 INFO L276 IsEmpty]: Start isEmpty. Operand 4606 states and 6629 transitions. [2022-04-08 15:15:48,338 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:15:48,338 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:15:48,338 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:15:48,338 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:15:48,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4521 states, 3006 states have (on average 1.3576180971390552) internal successors, (4081), 3088 states have internal predecessors, (4081), 1201 states have call successors, (1201), 311 states have call predecessors, (1201), 313 states have return successors, (1249), 1167 states have call predecessors, (1249), 1184 states have call successors, (1249) [2022-04-08 15:15:49,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4521 states to 4521 states and 6531 transitions. [2022-04-08 15:15:49,444 INFO L78 Accepts]: Start accepts. Automaton has 4521 states and 6531 transitions. Word has length 51 [2022-04-08 15:15:49,444 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:15:49,444 INFO L478 AbstractCegarLoop]: Abstraction has 4521 states and 6531 transitions. [2022-04-08 15:15:49,444 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 12.666666666666666) internal successors, (38), 2 states have internal predecessors, (38), 3 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (4), 1 states have call predecessors, (4), 2 states have call successors, (4) [2022-04-08 15:15:49,445 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4521 states and 6531 transitions. [2022-04-08 15:16:10,076 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6531 edges. 6531 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:16:10,076 INFO L276 IsEmpty]: Start isEmpty. Operand 4521 states and 6531 transitions. [2022-04-08 15:16:10,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-04-08 15:16:10,077 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:16:10,077 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:16:10,098 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-04-08 15:16:10,277 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:16:10,278 INFO L403 AbstractCegarLoop]: === Iteration 8 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:16:10,278 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:16:10,278 INFO L85 PathProgramCache]: Analyzing trace with hash -1561391810, now seen corresponding path program 1 times [2022-04-08 15:16:10,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:16:10,278 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1924960330] [2022-04-08 15:16:10,284 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:16:10,284 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:16:10,284 INFO L85 PathProgramCache]: Analyzing trace with hash -1561391810, now seen corresponding path program 2 times [2022-04-08 15:16:10,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:16:10,284 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668386137] [2022-04-08 15:16:10,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:16:10,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:16:10,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:16:10,532 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:16:10,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:16:10,550 INFO L290 TraceCheckUtils]: 0: Hoare triple {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-08 15:16:10,550 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,550 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-08 15:16:10,578 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:16:10,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:16:10,586 INFO L290 TraceCheckUtils]: 0: Hoare triple {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-08 15:16:10,586 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,586 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168186#false} #6457#return; {168186#false} is VALID [2022-04-08 15:16:10,602 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:16:10,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:16:10,612 INFO L290 TraceCheckUtils]: 0: Hoare triple {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {168185#true} is VALID [2022-04-08 15:16:10,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,612 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {168185#true} {168186#false} #6459#return; {168186#false} is VALID [2022-04-08 15:16:10,626 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-08 15:16:10,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:16:10,647 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-04-08 15:16:10,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:16:10,655 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:16:10,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:16:10,661 INFO L290 TraceCheckUtils]: 0: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:10,661 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 15:16:10,661 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,662 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 15:16:10,662 INFO L290 TraceCheckUtils]: 0: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:10,662 INFO L272 TraceCheckUtils]: 1: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:16:10,662 INFO L290 TraceCheckUtils]: 2: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:10,662 INFO L290 TraceCheckUtils]: 3: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 15:16:10,662 INFO L290 TraceCheckUtils]: 4: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,662 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 15:16:10,663 INFO L290 TraceCheckUtils]: 6: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,663 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-08 15:16:10,663 INFO L290 TraceCheckUtils]: 0: Hoare triple {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 8 + ~extension~0.offset, 8); {168185#true} is VALID [2022-04-08 15:16:10,663 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 18446744073709551616;havoc #t~mem68; {168185#true} is VALID [2022-04-08 15:16:10,663 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {168185#true} is VALID [2022-04-08 15:16:10,663 INFO L272 TraceCheckUtils]: 3: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:16:10,671 INFO L290 TraceCheckUtils]: 4: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:10,676 INFO L272 TraceCheckUtils]: 5: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:16:10,676 INFO L290 TraceCheckUtils]: 6: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:10,676 INFO L290 TraceCheckUtils]: 7: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 15:16:10,676 INFO L290 TraceCheckUtils]: 8: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,676 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 15:16:10,676 INFO L290 TraceCheckUtils]: 10: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,676 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-08 15:16:10,677 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} #res := 0; {168185#true} is VALID [2022-04-08 15:16:10,677 INFO L290 TraceCheckUtils]: 13: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,677 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {168185#true} {168186#false} #6475#return; {168186#false} is VALID [2022-04-08 15:16:10,680 INFO L272 TraceCheckUtils]: 0: Hoare triple {168185#true} call ULTIMATE.init(); {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:16:10,680 INFO L290 TraceCheckUtils]: 1: Hoare triple {168213#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-08 15:16:10,680 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,680 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-08 15:16:10,680 INFO L272 TraceCheckUtils]: 4: Hoare triple {168185#true} call #t~ret1155 := main(); {168185#true} is VALID [2022-04-08 15:16:10,681 INFO L290 TraceCheckUtils]: 5: Hoare triple {168185#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {168190#(= main_~i~24 0)} is VALID [2022-04-08 15:16:10,681 INFO L290 TraceCheckUtils]: 6: Hoare triple {168190#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {168190#(= main_~i~24 0)} is VALID [2022-04-08 15:16:10,681 INFO L290 TraceCheckUtils]: 7: Hoare triple {168190#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {168191#(<= main_~i~24 1)} is VALID [2022-04-08 15:16:10,682 INFO L290 TraceCheckUtils]: 8: Hoare triple {168191#(<= main_~i~24 1)} assume !(~i~24 < 4); {168186#false} is VALID [2022-04-08 15:16:10,682 INFO L290 TraceCheckUtils]: 9: Hoare triple {168186#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {168186#false} is VALID [2022-04-08 15:16:10,682 INFO L272 TraceCheckUtils]: 10: Hoare triple {168186#false} call _BLAST_init(); {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:16:10,682 INFO L290 TraceCheckUtils]: 11: Hoare triple {168214#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-08 15:16:10,682 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,682 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {168185#true} {168186#false} #6457#return; {168186#false} is VALID [2022-04-08 15:16:10,682 INFO L290 TraceCheckUtils]: 14: Hoare triple {168186#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {168186#false} is VALID [2022-04-08 15:16:10,682 INFO L290 TraceCheckUtils]: 15: Hoare triple {168186#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {168186#false} is VALID [2022-04-08 15:16:10,682 INFO L272 TraceCheckUtils]: 16: Hoare triple {168186#false} call stub_driver_init(); {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:16:10,682 INFO L290 TraceCheckUtils]: 17: Hoare triple {168215#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {168185#true} is VALID [2022-04-08 15:16:10,682 INFO L290 TraceCheckUtils]: 18: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,682 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {168185#true} {168186#false} #6459#return; {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 20: Hoare triple {168186#false} assume !!(~status~31 >= 0); {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 21: Hoare triple {168186#false} assume !(0 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 22: Hoare triple {168186#false} assume !(1 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 23: Hoare triple {168186#false} assume !(3 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 24: Hoare triple {168186#false} assume !(4 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 25: Hoare triple {168186#false} assume !(5 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 26: Hoare triple {168186#false} assume !(6 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 27: Hoare triple {168186#false} assume !(8 == ~__BLAST_NONDET~3); {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 28: Hoare triple {168186#false} assume 11 == ~__BLAST_NONDET~3; {168186#false} is VALID [2022-04-08 15:16:10,683 INFO L272 TraceCheckUtils]: 29: Hoare triple {168186#false} call #t~ret1116 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 30: Hoare triple {168216#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 8 + ~extension~0.offset, 8); {168185#true} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 31: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 18446744073709551616;havoc #t~mem68; {168185#true} is VALID [2022-04-08 15:16:10,683 INFO L290 TraceCheckUtils]: 32: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {168185#true} is VALID [2022-04-08 15:16:10,684 INFO L272 TraceCheckUtils]: 33: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:16:10,684 INFO L290 TraceCheckUtils]: 34: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L272 TraceCheckUtils]: 35: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168225#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 36: Hoare triple {168225#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 37: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 38: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 40: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 42: Hoare triple {168185#true} #res := 0; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 43: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:10,685 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {168185#true} {168186#false} #6475#return; {168186#false} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 45: Hoare triple {168186#false} assume -9223372036854775808 <= #t~ret1116 && #t~ret1116 <= 9223372036854775807;~status~31 := #t~ret1116;havoc #t~ret1116; {168186#false} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 46: Hoare triple {168186#false} assume !(0 != ~we_should_unload~0); {168186#false} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 47: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-08 15:16:10,685 INFO L290 TraceCheckUtils]: 48: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L290 TraceCheckUtils]: 49: Hoare triple {168186#false} assume !(~s~0 == ~UNLOADED~0); {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L290 TraceCheckUtils]: 50: Hoare triple {168186#false} assume !(-1 == ~status~31); {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L290 TraceCheckUtils]: 51: Hoare triple {168186#false} assume !(~s~0 != ~SKIP2~0); {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L290 TraceCheckUtils]: 52: Hoare triple {168186#false} assume !(1 == ~pended~0); {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L290 TraceCheckUtils]: 53: Hoare triple {168186#false} assume ~s~0 == ~DC~0; {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L290 TraceCheckUtils]: 54: Hoare triple {168186#false} assume 259 == ~status~31; {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L272 TraceCheckUtils]: 55: Hoare triple {168186#false} call errorFn(); {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L290 TraceCheckUtils]: 56: Hoare triple {168186#false} assume !false; {168186#false} is VALID [2022-04-08 15:16:10,686 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:16:10,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:16:10,686 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1668386137] [2022-04-08 15:16:10,687 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1668386137] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:16:10,687 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [467916625] [2022-04-08 15:16:10,687 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:16:10,687 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:16:10,687 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:16:10,688 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:16:10,689 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-04-08 15:16:11,405 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:16:11,405 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:16:11,410 INFO L263 TraceCheckSpWp]: Trace formula consists of 1487 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-08 15:16:11,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:16:11,443 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:16:11,612 INFO L272 TraceCheckUtils]: 0: Hoare triple {168185#true} call ULTIMATE.init(); {168185#true} is VALID [2022-04-08 15:16:11,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {168185#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {168185#true} is VALID [2022-04-08 15:16:11,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:11,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {168185#true} {168185#true} #6857#return; {168185#true} is VALID [2022-04-08 15:16:11,612 INFO L272 TraceCheckUtils]: 4: Hoare triple {168185#true} call #t~ret1155 := main(); {168185#true} is VALID [2022-04-08 15:16:11,612 INFO L290 TraceCheckUtils]: 5: Hoare triple {168185#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {168185#true} is VALID [2022-04-08 15:16:11,612 INFO L290 TraceCheckUtils]: 6: Hoare triple {168185#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {168185#true} is VALID [2022-04-08 15:16:11,612 INFO L290 TraceCheckUtils]: 7: Hoare triple {168185#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 8: Hoare triple {168185#true} assume !(~i~24 < 4); {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 9: Hoare triple {168185#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L272 TraceCheckUtils]: 10: Hoare triple {168185#true} call _BLAST_init(); {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 11: Hoare triple {168185#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 12: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {168185#true} {168185#true} #6457#return; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 14: Hoare triple {168185#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 15: Hoare triple {168185#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L272 TraceCheckUtils]: 16: Hoare triple {168185#true} call stub_driver_init(); {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 17: Hoare triple {168185#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 18: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {168185#true} {168185#true} #6459#return; {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 20: Hoare triple {168185#true} assume !!(~status~31 >= 0); {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 21: Hoare triple {168185#true} assume !(0 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 15:16:11,613 INFO L290 TraceCheckUtils]: 22: Hoare triple {168185#true} assume !(1 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 23: Hoare triple {168185#true} assume !(3 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 24: Hoare triple {168185#true} assume !(4 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 25: Hoare triple {168185#true} assume !(5 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 26: Hoare triple {168185#true} assume !(6 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 27: Hoare triple {168185#true} assume !(8 == ~__BLAST_NONDET~3); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 28: Hoare triple {168185#true} assume 11 == ~__BLAST_NONDET~3; {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L272 TraceCheckUtils]: 29: Hoare triple {168185#true} call #t~ret1116 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 30: Hoare triple {168185#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 8 + ~extension~0.offset, 8); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 31: Hoare triple {168185#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 18446744073709551616;havoc #t~mem68; {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 32: Hoare triple {168185#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L272 TraceCheckUtils]: 33: Hoare triple {168185#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 34: Hoare triple {168185#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L272 TraceCheckUtils]: 35: Hoare triple {168185#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 36: Hoare triple {168185#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 37: Hoare triple {168185#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L290 TraceCheckUtils]: 38: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:11,614 INFO L284 TraceCheckUtils]: 39: Hoare quadruple {168185#true} {168185#true} #6659#return; {168185#true} is VALID [2022-04-08 15:16:11,615 INFO L290 TraceCheckUtils]: 40: Hoare triple {168185#true} assume true; {168185#true} is VALID [2022-04-08 15:16:11,615 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {168185#true} {168185#true} #6241#return; {168185#true} is VALID [2022-04-08 15:16:11,615 INFO L290 TraceCheckUtils]: 42: Hoare triple {168185#true} #res := 0; {168359#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-08 15:16:11,615 INFO L290 TraceCheckUtils]: 43: Hoare triple {168359#(<= |PptDispatchCleanup_#res| 0)} assume true; {168359#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-08 15:16:11,616 INFO L284 TraceCheckUtils]: 44: Hoare quadruple {168359#(<= |PptDispatchCleanup_#res| 0)} {168185#true} #6475#return; {168366#(<= |main_#t~ret1116| 0)} is VALID [2022-04-08 15:16:11,616 INFO L290 TraceCheckUtils]: 45: Hoare triple {168366#(<= |main_#t~ret1116| 0)} assume -9223372036854775808 <= #t~ret1116 && #t~ret1116 <= 9223372036854775807;~status~31 := #t~ret1116;havoc #t~ret1116; {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,617 INFO L290 TraceCheckUtils]: 46: Hoare triple {168370#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,617 INFO L290 TraceCheckUtils]: 47: Hoare triple {168370#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,617 INFO L290 TraceCheckUtils]: 48: Hoare triple {168370#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,618 INFO L290 TraceCheckUtils]: 49: Hoare triple {168370#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,618 INFO L290 TraceCheckUtils]: 50: Hoare triple {168370#(<= main_~status~31 0)} assume !(-1 == ~status~31); {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,618 INFO L290 TraceCheckUtils]: 51: Hoare triple {168370#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,618 INFO L290 TraceCheckUtils]: 52: Hoare triple {168370#(<= main_~status~31 0)} assume !(1 == ~pended~0); {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,619 INFO L290 TraceCheckUtils]: 53: Hoare triple {168370#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {168370#(<= main_~status~31 0)} is VALID [2022-04-08 15:16:11,619 INFO L290 TraceCheckUtils]: 54: Hoare triple {168370#(<= main_~status~31 0)} assume 259 == ~status~31; {168186#false} is VALID [2022-04-08 15:16:11,619 INFO L272 TraceCheckUtils]: 55: Hoare triple {168186#false} call errorFn(); {168186#false} is VALID [2022-04-08 15:16:11,619 INFO L290 TraceCheckUtils]: 56: Hoare triple {168186#false} assume !false; {168186#false} is VALID [2022-04-08 15:16:11,619 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:16:11,619 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:16:11,620 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [467916625] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:16:11,620 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:16:11,620 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-08 15:16:11,620 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:16:11,620 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1924960330] [2022-04-08 15:16:11,620 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1924960330] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:16:11,620 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:16:11,620 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 15:16:11,620 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1915706405] [2022-04-08 15:16:11,620 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:16:11,620 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.6) internal successors, (43), 4 states have internal predecessors, (43), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 57 [2022-04-08 15:16:11,621 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:16:11,621 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 8.6) internal successors, (43), 4 states have internal predecessors, (43), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:16:11,673 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 57 edges. 57 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:16:11,674 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 15:16:11,674 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:16:11,674 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 15:16:11,674 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 15:16:11,674 INFO L87 Difference]: Start difference. First operand 4521 states and 6531 transitions. Second operand has 5 states, 5 states have (on average 8.6) internal successors, (43), 4 states have internal predecessors, (43), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:16:50,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:16:50,615 INFO L93 Difference]: Finished difference Result 4536 states and 6549 transitions. [2022-04-08 15:16:50,615 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 15:16:50,615 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.6) internal successors, (43), 4 states have internal predecessors, (43), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 57 [2022-04-08 15:16:50,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:16:50,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.6) internal successors, (43), 4 states have internal predecessors, (43), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:16:50,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2816 transitions. [2022-04-08 15:16:50,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.6) internal successors, (43), 4 states have internal predecessors, (43), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:16:50,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2816 transitions. [2022-04-08 15:16:50,822 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2816 transitions. [2022-04-08 15:16:53,445 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2816 edges. 2816 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:16:54,579 INFO L225 Difference]: With dead ends: 4536 [2022-04-08 15:16:54,579 INFO L226 Difference]: Without dead ends: 4518 [2022-04-08 15:16:54,581 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 15:16:54,581 INFO L913 BasicCegarLoop]: 2811 mSDtfsCounter, 5 mSDsluCounter, 8402 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11213 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-08 15:16:54,581 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 11213 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-08 15:16:54,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4518 states. [2022-04-08 15:16:55,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4518 to 4518. [2022-04-08 15:16:55,414 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:16:55,420 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4518 states. Second operand has 4518 states, 3004 states have (on average 1.3575233022636484) internal successors, (4078), 3086 states have internal predecessors, (4078), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 15:16:55,424 INFO L74 IsIncluded]: Start isIncluded. First operand 4518 states. Second operand has 4518 states, 3004 states have (on average 1.3575233022636484) internal successors, (4078), 3086 states have internal predecessors, (4078), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 15:16:55,429 INFO L87 Difference]: Start difference. First operand 4518 states. Second operand has 4518 states, 3004 states have (on average 1.3575233022636484) internal successors, (4078), 3086 states have internal predecessors, (4078), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 15:16:56,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:16:56,073 INFO L93 Difference]: Finished difference Result 4518 states and 6526 transitions. [2022-04-08 15:16:56,073 INFO L276 IsEmpty]: Start isEmpty. Operand 4518 states and 6526 transitions. [2022-04-08 15:16:56,081 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:16:56,081 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:16:56,087 INFO L74 IsIncluded]: Start isIncluded. First operand has 4518 states, 3004 states have (on average 1.3575233022636484) internal successors, (4078), 3086 states have internal predecessors, (4078), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4518 states. [2022-04-08 15:16:56,093 INFO L87 Difference]: Start difference. First operand has 4518 states, 3004 states have (on average 1.3575233022636484) internal successors, (4078), 3086 states have internal predecessors, (4078), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) Second operand 4518 states. [2022-04-08 15:16:56,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:16:56,746 INFO L93 Difference]: Finished difference Result 4518 states and 6526 transitions. [2022-04-08 15:16:56,746 INFO L276 IsEmpty]: Start isEmpty. Operand 4518 states and 6526 transitions. [2022-04-08 15:16:56,753 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:16:56,753 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:16:56,753 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:16:56,753 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:16:56,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4518 states, 3004 states have (on average 1.3575233022636484) internal successors, (4078), 3086 states have internal predecessors, (4078), 1200 states have call successors, (1200), 311 states have call predecessors, (1200), 313 states have return successors, (1248), 1166 states have call predecessors, (1248), 1183 states have call successors, (1248) [2022-04-08 15:16:57,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4518 states to 4518 states and 6526 transitions. [2022-04-08 15:16:57,867 INFO L78 Accepts]: Start accepts. Automaton has 4518 states and 6526 transitions. Word has length 57 [2022-04-08 15:16:57,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:16:57,867 INFO L478 AbstractCegarLoop]: Abstraction has 4518 states and 6526 transitions. [2022-04-08 15:16:57,867 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.6) internal successors, (43), 4 states have internal predecessors, (43), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:16:57,867 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4518 states and 6526 transitions. [2022-04-08 15:17:18,695 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6526 edges. 6526 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:17:18,695 INFO L276 IsEmpty]: Start isEmpty. Operand 4518 states and 6526 transitions. [2022-04-08 15:17:18,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-04-08 15:17:18,696 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:17:18,696 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:17:18,718 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-04-08 15:17:18,903 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:17:18,904 INFO L403 AbstractCegarLoop]: === Iteration 9 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:17:18,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:17:18,904 INFO L85 PathProgramCache]: Analyzing trace with hash 111621356, now seen corresponding path program 1 times [2022-04-08 15:17:18,904 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:17:18,904 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [874320611] [2022-04-08 15:17:18,909 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:17:18,909 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:17:18,909 INFO L85 PathProgramCache]: Analyzing trace with hash 111621356, now seen corresponding path program 2 times [2022-04-08 15:17:18,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:17:18,910 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1671565297] [2022-04-08 15:17:18,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:17:18,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:17:18,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:17:19,139 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:17:19,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:17:19,154 INFO L290 TraceCheckUtils]: 0: Hoare triple {195575#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195547#true} is VALID [2022-04-08 15:17:19,155 INFO L290 TraceCheckUtils]: 1: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,155 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195547#true} {195547#true} #6857#return; {195547#true} is VALID [2022-04-08 15:17:19,192 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:17:19,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:17:19,201 INFO L290 TraceCheckUtils]: 0: Hoare triple {195576#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195547#true} is VALID [2022-04-08 15:17:19,201 INFO L290 TraceCheckUtils]: 1: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,201 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195547#true} {195548#false} #6457#return; {195548#false} is VALID [2022-04-08 15:17:19,217 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:17:19,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:17:19,227 INFO L290 TraceCheckUtils]: 0: Hoare triple {195577#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {195547#true} is VALID [2022-04-08 15:17:19,228 INFO L290 TraceCheckUtils]: 1: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,228 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {195547#true} {195548#false} #6459#return; {195548#false} is VALID [2022-04-08 15:17:19,242 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 26 [2022-04-08 15:17:19,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:17:19,265 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 3 [2022-04-08 15:17:19,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:17:19,272 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:17:19,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:17:19,278 INFO L290 TraceCheckUtils]: 0: Hoare triple {195587#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:19,278 INFO L290 TraceCheckUtils]: 1: Hoare triple {195547#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {195547#true} is VALID [2022-04-08 15:17:19,278 INFO L290 TraceCheckUtils]: 2: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,278 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195547#true} {195547#true} #6659#return; {195547#true} is VALID [2022-04-08 15:17:19,278 INFO L290 TraceCheckUtils]: 0: Hoare triple {195587#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:19,279 INFO L272 TraceCheckUtils]: 1: Hoare triple {195547#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {195587#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:17:19,279 INFO L290 TraceCheckUtils]: 2: Hoare triple {195587#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:19,279 INFO L290 TraceCheckUtils]: 3: Hoare triple {195547#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {195547#true} is VALID [2022-04-08 15:17:19,279 INFO L290 TraceCheckUtils]: 4: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,279 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {195547#true} {195547#true} #6659#return; {195547#true} is VALID [2022-04-08 15:17:19,279 INFO L290 TraceCheckUtils]: 6: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,279 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {195547#true} {195547#true} #6241#return; {195547#true} is VALID [2022-04-08 15:17:19,280 INFO L290 TraceCheckUtils]: 0: Hoare triple {195578#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 8 + ~extension~0.offset, 8); {195547#true} is VALID [2022-04-08 15:17:19,280 INFO L290 TraceCheckUtils]: 1: Hoare triple {195547#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 18446744073709551616;havoc #t~mem68; {195547#true} is VALID [2022-04-08 15:17:19,280 INFO L290 TraceCheckUtils]: 2: Hoare triple {195547#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {195547#true} is VALID [2022-04-08 15:17:19,280 INFO L272 TraceCheckUtils]: 3: Hoare triple {195547#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {195587#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:17:19,280 INFO L290 TraceCheckUtils]: 4: Hoare triple {195587#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L272 TraceCheckUtils]: 5: Hoare triple {195547#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {195587#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:17:19,281 INFO L290 TraceCheckUtils]: 6: Hoare triple {195587#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L290 TraceCheckUtils]: 7: Hoare triple {195547#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L290 TraceCheckUtils]: 8: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {195547#true} {195547#true} #6659#return; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L290 TraceCheckUtils]: 10: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L284 TraceCheckUtils]: 11: Hoare quadruple {195547#true} {195547#true} #6241#return; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L290 TraceCheckUtils]: 12: Hoare triple {195547#true} #res := 0; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L290 TraceCheckUtils]: 13: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,281 INFO L284 TraceCheckUtils]: 14: Hoare quadruple {195547#true} {195548#false} #6469#return; {195548#false} is VALID [2022-04-08 15:17:19,284 INFO L272 TraceCheckUtils]: 0: Hoare triple {195547#true} call ULTIMATE.init(); {195575#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:17:19,284 INFO L290 TraceCheckUtils]: 1: Hoare triple {195575#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195547#true} is VALID [2022-04-08 15:17:19,284 INFO L290 TraceCheckUtils]: 2: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,284 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195547#true} {195547#true} #6857#return; {195547#true} is VALID [2022-04-08 15:17:19,284 INFO L272 TraceCheckUtils]: 4: Hoare triple {195547#true} call #t~ret1155 := main(); {195547#true} is VALID [2022-04-08 15:17:19,285 INFO L290 TraceCheckUtils]: 5: Hoare triple {195547#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {195552#(= main_~i~24 0)} is VALID [2022-04-08 15:17:19,285 INFO L290 TraceCheckUtils]: 6: Hoare triple {195552#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {195552#(= main_~i~24 0)} is VALID [2022-04-08 15:17:19,285 INFO L290 TraceCheckUtils]: 7: Hoare triple {195552#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {195553#(<= main_~i~24 1)} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 8: Hoare triple {195553#(<= main_~i~24 1)} assume !(~i~24 < 4); {195548#false} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 9: Hoare triple {195548#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {195548#false} is VALID [2022-04-08 15:17:19,286 INFO L272 TraceCheckUtils]: 10: Hoare triple {195548#false} call _BLAST_init(); {195576#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 11: Hoare triple {195576#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195547#true} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 12: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,286 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {195547#true} {195548#false} #6457#return; {195548#false} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 14: Hoare triple {195548#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {195548#false} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 15: Hoare triple {195548#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {195548#false} is VALID [2022-04-08 15:17:19,286 INFO L272 TraceCheckUtils]: 16: Hoare triple {195548#false} call stub_driver_init(); {195577#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 17: Hoare triple {195577#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {195547#true} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 18: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,286 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {195547#true} {195548#false} #6459#return; {195548#false} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 20: Hoare triple {195548#false} assume !!(~status~31 >= 0); {195548#false} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 21: Hoare triple {195548#false} assume !(0 == ~__BLAST_NONDET~3); {195548#false} is VALID [2022-04-08 15:17:19,286 INFO L290 TraceCheckUtils]: 22: Hoare triple {195548#false} assume !(1 == ~__BLAST_NONDET~3); {195548#false} is VALID [2022-04-08 15:17:19,287 INFO L290 TraceCheckUtils]: 23: Hoare triple {195548#false} assume !(3 == ~__BLAST_NONDET~3); {195548#false} is VALID [2022-04-08 15:17:19,287 INFO L290 TraceCheckUtils]: 24: Hoare triple {195548#false} assume !(4 == ~__BLAST_NONDET~3); {195548#false} is VALID [2022-04-08 15:17:19,287 INFO L290 TraceCheckUtils]: 25: Hoare triple {195548#false} assume 5 == ~__BLAST_NONDET~3; {195548#false} is VALID [2022-04-08 15:17:19,287 INFO L272 TraceCheckUtils]: 26: Hoare triple {195548#false} call #t~ret1113 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {195578#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:17:19,287 INFO L290 TraceCheckUtils]: 27: Hoare triple {195578#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 8 + ~extension~0.offset, 8); {195547#true} is VALID [2022-04-08 15:17:19,287 INFO L290 TraceCheckUtils]: 28: Hoare triple {195547#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 18446744073709551616;havoc #t~mem68; {195547#true} is VALID [2022-04-08 15:17:19,287 INFO L290 TraceCheckUtils]: 29: Hoare triple {195547#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {195547#true} is VALID [2022-04-08 15:17:19,287 INFO L272 TraceCheckUtils]: 30: Hoare triple {195547#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {195587#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:17:19,288 INFO L290 TraceCheckUtils]: 31: Hoare triple {195587#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:19,288 INFO L272 TraceCheckUtils]: 32: Hoare triple {195547#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {195587#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:17:19,288 INFO L290 TraceCheckUtils]: 33: Hoare triple {195587#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:19,288 INFO L290 TraceCheckUtils]: 34: Hoare triple {195547#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {195547#true} is VALID [2022-04-08 15:17:19,288 INFO L290 TraceCheckUtils]: 35: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,288 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {195547#true} {195547#true} #6659#return; {195547#true} is VALID [2022-04-08 15:17:19,288 INFO L290 TraceCheckUtils]: 37: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,288 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {195547#true} {195547#true} #6241#return; {195547#true} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 39: Hoare triple {195547#true} #res := 0; {195547#true} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 40: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:19,289 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {195547#true} {195548#false} #6469#return; {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 42: Hoare triple {195548#false} assume -9223372036854775808 <= #t~ret1113 && #t~ret1113 <= 9223372036854775807;~status~31 := #t~ret1113;havoc #t~ret1113; {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 43: Hoare triple {195548#false} assume !(0 != ~we_should_unload~0); {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 44: Hoare triple {195548#false} assume !(1 == ~pended~0); {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 45: Hoare triple {195548#false} assume !(1 == ~pended~0); {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 46: Hoare triple {195548#false} assume !(~s~0 == ~UNLOADED~0); {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 47: Hoare triple {195548#false} assume !(-1 == ~status~31); {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 48: Hoare triple {195548#false} assume !(~s~0 != ~SKIP2~0); {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 49: Hoare triple {195548#false} assume !(1 == ~pended~0); {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 50: Hoare triple {195548#false} assume ~s~0 == ~DC~0; {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 51: Hoare triple {195548#false} assume 259 == ~status~31; {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L272 TraceCheckUtils]: 52: Hoare triple {195548#false} call errorFn(); {195548#false} is VALID [2022-04-08 15:17:19,289 INFO L290 TraceCheckUtils]: 53: Hoare triple {195548#false} assume !false; {195548#false} is VALID [2022-04-08 15:17:19,290 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:17:19,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:17:19,290 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1671565297] [2022-04-08 15:17:19,290 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1671565297] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:17:19,290 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2054853248] [2022-04-08 15:17:19,290 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:17:19,290 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:17:19,290 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:17:19,291 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:17:19,292 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-04-08 15:17:20,053 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:17:20,053 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:17:20,058 INFO L263 TraceCheckSpWp]: Trace formula consists of 1484 conjuncts, 4 conjunts are in the unsatisfiable core [2022-04-08 15:17:20,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:17:20,095 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:17:20,249 INFO L272 TraceCheckUtils]: 0: Hoare triple {195547#true} call ULTIMATE.init(); {195547#true} is VALID [2022-04-08 15:17:20,249 INFO L290 TraceCheckUtils]: 1: Hoare triple {195547#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {195547#true} is VALID [2022-04-08 15:17:20,249 INFO L290 TraceCheckUtils]: 2: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:20,249 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {195547#true} {195547#true} #6857#return; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L272 TraceCheckUtils]: 4: Hoare triple {195547#true} call #t~ret1155 := main(); {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 5: Hoare triple {195547#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 6: Hoare triple {195547#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 7: Hoare triple {195547#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 8: Hoare triple {195547#true} assume !(~i~24 < 4); {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 9: Hoare triple {195547#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L272 TraceCheckUtils]: 10: Hoare triple {195547#true} call _BLAST_init(); {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 11: Hoare triple {195547#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 12: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {195547#true} {195547#true} #6457#return; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 14: Hoare triple {195547#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 15: Hoare triple {195547#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L272 TraceCheckUtils]: 16: Hoare triple {195547#true} call stub_driver_init(); {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 17: Hoare triple {195547#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {195547#true} is VALID [2022-04-08 15:17:20,250 INFO L290 TraceCheckUtils]: 18: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {195547#true} {195547#true} #6459#return; {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 20: Hoare triple {195547#true} assume !!(~status~31 >= 0); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 21: Hoare triple {195547#true} assume !(0 == ~__BLAST_NONDET~3); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 22: Hoare triple {195547#true} assume !(1 == ~__BLAST_NONDET~3); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 23: Hoare triple {195547#true} assume !(3 == ~__BLAST_NONDET~3); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 24: Hoare triple {195547#true} assume !(4 == ~__BLAST_NONDET~3); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 25: Hoare triple {195547#true} assume 5 == ~__BLAST_NONDET~3; {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L272 TraceCheckUtils]: 26: Hoare triple {195547#true} call #t~ret1113 := PptDispatchCleanup(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 27: Hoare triple {195547#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~0.base, ~extension~0.offset;havoc ~cancelIrql~0;call #t~mem67.base, #t~mem67.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~0.base, ~extension~0.offset := #t~mem67.base, #t~mem67.offset;havoc #t~mem67.base, #t~mem67.offset;call #t~mem68 := read~int(~extension~0.base, 8 + ~extension~0.offset, 8); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 28: Hoare triple {195547#true} assume 0 != (if 0 == #t~mem68 then 0 else (if 1 == #t~mem68 then 0 else ~bitwiseAnd(#t~mem68, 4096))) % 18446744073709551616;havoc #t~mem68; {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 29: Hoare triple {195547#true} ~myStatus~0 := 0;call write~int(0, ~Irp.base, 44 + ~Irp.offset, 8);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L272 TraceCheckUtils]: 30: Hoare triple {195547#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 31: Hoare triple {195547#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L272 TraceCheckUtils]: 32: Hoare triple {195547#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 33: Hoare triple {195547#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 34: Hoare triple {195547#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {195547#true} is VALID [2022-04-08 15:17:20,251 INFO L290 TraceCheckUtils]: 35: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:20,252 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {195547#true} {195547#true} #6659#return; {195547#true} is VALID [2022-04-08 15:17:20,252 INFO L290 TraceCheckUtils]: 37: Hoare triple {195547#true} assume true; {195547#true} is VALID [2022-04-08 15:17:20,252 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {195547#true} {195547#true} #6241#return; {195547#true} is VALID [2022-04-08 15:17:20,252 INFO L290 TraceCheckUtils]: 39: Hoare triple {195547#true} #res := 0; {195712#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-08 15:17:20,252 INFO L290 TraceCheckUtils]: 40: Hoare triple {195712#(<= |PptDispatchCleanup_#res| 0)} assume true; {195712#(<= |PptDispatchCleanup_#res| 0)} is VALID [2022-04-08 15:17:20,253 INFO L284 TraceCheckUtils]: 41: Hoare quadruple {195712#(<= |PptDispatchCleanup_#res| 0)} {195547#true} #6469#return; {195719#(<= |main_#t~ret1113| 0)} is VALID [2022-04-08 15:17:20,254 INFO L290 TraceCheckUtils]: 42: Hoare triple {195719#(<= |main_#t~ret1113| 0)} assume -9223372036854775808 <= #t~ret1113 && #t~ret1113 <= 9223372036854775807;~status~31 := #t~ret1113;havoc #t~ret1113; {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,254 INFO L290 TraceCheckUtils]: 43: Hoare triple {195723#(<= main_~status~31 0)} assume !(0 != ~we_should_unload~0); {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,254 INFO L290 TraceCheckUtils]: 44: Hoare triple {195723#(<= main_~status~31 0)} assume !(1 == ~pended~0); {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,255 INFO L290 TraceCheckUtils]: 45: Hoare triple {195723#(<= main_~status~31 0)} assume !(1 == ~pended~0); {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,255 INFO L290 TraceCheckUtils]: 46: Hoare triple {195723#(<= main_~status~31 0)} assume !(~s~0 == ~UNLOADED~0); {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,255 INFO L290 TraceCheckUtils]: 47: Hoare triple {195723#(<= main_~status~31 0)} assume !(-1 == ~status~31); {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,256 INFO L290 TraceCheckUtils]: 48: Hoare triple {195723#(<= main_~status~31 0)} assume !(~s~0 != ~SKIP2~0); {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,256 INFO L290 TraceCheckUtils]: 49: Hoare triple {195723#(<= main_~status~31 0)} assume !(1 == ~pended~0); {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,256 INFO L290 TraceCheckUtils]: 50: Hoare triple {195723#(<= main_~status~31 0)} assume ~s~0 == ~DC~0; {195723#(<= main_~status~31 0)} is VALID [2022-04-08 15:17:20,256 INFO L290 TraceCheckUtils]: 51: Hoare triple {195723#(<= main_~status~31 0)} assume 259 == ~status~31; {195548#false} is VALID [2022-04-08 15:17:20,256 INFO L272 TraceCheckUtils]: 52: Hoare triple {195548#false} call errorFn(); {195548#false} is VALID [2022-04-08 15:17:20,257 INFO L290 TraceCheckUtils]: 53: Hoare triple {195548#false} assume !false; {195548#false} is VALID [2022-04-08 15:17:20,257 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:17:20,257 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:17:20,257 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2054853248] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:17:20,257 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:17:20,257 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [9] total 12 [2022-04-08 15:17:20,257 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:17:20,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [874320611] [2022-04-08 15:17:20,257 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [874320611] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:17:20,257 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:17:20,257 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 15:17:20,257 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2046907859] [2022-04-08 15:17:20,257 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:17:20,258 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 54 [2022-04-08 15:17:20,258 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:17:20,258 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:17:20,335 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 54 edges. 54 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:17:20,335 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 15:17:20,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:17:20,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 15:17:20,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 15:17:20,336 INFO L87 Difference]: Start difference. First operand 4518 states and 6526 transitions. Second operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:17:58,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:17:58,979 INFO L93 Difference]: Finished difference Result 4533 states and 6544 transitions. [2022-04-08 15:17:58,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 15:17:58,979 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) Word has length 54 [2022-04-08 15:17:58,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:17:58,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:17:59,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2811 transitions. [2022-04-08 15:17:59,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:17:59,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 2811 transitions. [2022-04-08 15:17:59,160 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 2811 transitions. [2022-04-08 15:18:01,650 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2811 edges. 2811 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:18:02,689 INFO L225 Difference]: With dead ends: 4533 [2022-04-08 15:18:02,689 INFO L226 Difference]: Without dead ends: 4509 [2022-04-08 15:18:02,690 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2022-04-08 15:18:02,692 INFO L913 BasicCegarLoop]: 2806 mSDtfsCounter, 5 mSDsluCounter, 8389 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 11195 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-08 15:18:02,692 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 11195 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-08 15:18:02,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4509 states. [2022-04-08 15:18:03,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4509 to 4509. [2022-04-08 15:18:03,474 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:18:03,479 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4509 states. Second operand has 4509 states, 2998 states have (on average 1.3575717144763175) internal successors, (4070), 3080 states have internal predecessors, (4070), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) [2022-04-08 15:18:03,484 INFO L74 IsIncluded]: Start isIncluded. First operand 4509 states. Second operand has 4509 states, 2998 states have (on average 1.3575717144763175) internal successors, (4070), 3080 states have internal predecessors, (4070), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) [2022-04-08 15:18:03,489 INFO L87 Difference]: Start difference. First operand 4509 states. Second operand has 4509 states, 2998 states have (on average 1.3575717144763175) internal successors, (4070), 3080 states have internal predecessors, (4070), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) [2022-04-08 15:18:04,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:18:04,129 INFO L93 Difference]: Finished difference Result 4509 states and 6514 transitions. [2022-04-08 15:18:04,129 INFO L276 IsEmpty]: Start isEmpty. Operand 4509 states and 6514 transitions. [2022-04-08 15:18:04,135 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:18:04,136 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:18:04,141 INFO L74 IsIncluded]: Start isIncluded. First operand has 4509 states, 2998 states have (on average 1.3575717144763175) internal successors, (4070), 3080 states have internal predecessors, (4070), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) Second operand 4509 states. [2022-04-08 15:18:04,146 INFO L87 Difference]: Start difference. First operand has 4509 states, 2998 states have (on average 1.3575717144763175) internal successors, (4070), 3080 states have internal predecessors, (4070), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) Second operand 4509 states. [2022-04-08 15:18:04,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:18:04,802 INFO L93 Difference]: Finished difference Result 4509 states and 6514 transitions. [2022-04-08 15:18:04,802 INFO L276 IsEmpty]: Start isEmpty. Operand 4509 states and 6514 transitions. [2022-04-08 15:18:04,809 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:18:04,809 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:18:04,809 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:18:04,809 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:18:04,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4509 states, 2998 states have (on average 1.3575717144763175) internal successors, (4070), 3080 states have internal predecessors, (4070), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) [2022-04-08 15:18:05,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4509 states to 4509 states and 6514 transitions. [2022-04-08 15:18:05,963 INFO L78 Accepts]: Start accepts. Automaton has 4509 states and 6514 transitions. Word has length 54 [2022-04-08 15:18:05,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:18:05,964 INFO L478 AbstractCegarLoop]: Abstraction has 4509 states and 6514 transitions. [2022-04-08 15:18:05,964 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 8.0) internal successors, (40), 4 states have internal predecessors, (40), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (6), 2 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:18:05,964 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4509 states and 6514 transitions. [2022-04-08 15:18:27,540 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6514 edges. 6514 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:18:27,541 INFO L276 IsEmpty]: Start isEmpty. Operand 4509 states and 6514 transitions. [2022-04-08 15:18:27,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-04-08 15:18:27,541 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:18:27,541 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:18:27,564 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2022-04-08 15:18:27,742 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable8 [2022-04-08 15:18:27,743 INFO L403 AbstractCegarLoop]: === Iteration 10 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:18:27,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:18:27,743 INFO L85 PathProgramCache]: Analyzing trace with hash -851908546, now seen corresponding path program 1 times [2022-04-08 15:18:27,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:18:27,743 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [2116888501] [2022-04-08 15:18:27,754 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:18:27,754 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:18:27,754 INFO L85 PathProgramCache]: Analyzing trace with hash -851908546, now seen corresponding path program 2 times [2022-04-08 15:18:27,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:18:27,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489087104] [2022-04-08 15:18:27,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:18:27,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:18:27,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:18:27,994 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:18:28,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:18:28,015 INFO L290 TraceCheckUtils]: 0: Hoare triple {222876#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222858#true} is VALID [2022-04-08 15:18:28,016 INFO L290 TraceCheckUtils]: 1: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,016 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222858#true} {222858#true} #6857#return; {222858#true} is VALID [2022-04-08 15:18:28,039 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:18:28,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:18:28,049 INFO L290 TraceCheckUtils]: 0: Hoare triple {222877#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222858#true} is VALID [2022-04-08 15:18:28,049 INFO L290 TraceCheckUtils]: 1: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,049 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222858#true} {222859#false} #6457#return; {222859#false} is VALID [2022-04-08 15:18:28,065 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:18:28,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:18:28,074 INFO L290 TraceCheckUtils]: 0: Hoare triple {222878#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {222858#true} is VALID [2022-04-08 15:18:28,075 INFO L290 TraceCheckUtils]: 1: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,075 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {222858#true} {222859#false} #6459#return; {222859#false} is VALID [2022-04-08 15:18:28,075 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 29 [2022-04-08 15:18:28,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:18:28,083 INFO L290 TraceCheckUtils]: 0: Hoare triple {222858#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {222858#true} is VALID [2022-04-08 15:18:28,083 INFO L290 TraceCheckUtils]: 1: Hoare triple {222858#true} assume 0 == ~__BLAST_NONDET~26; {222858#true} is VALID [2022-04-08 15:18:28,083 INFO L290 TraceCheckUtils]: 2: Hoare triple {222858#true} #res := 0; {222858#true} is VALID [2022-04-08 15:18:28,083 INFO L290 TraceCheckUtils]: 3: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,083 INFO L284 TraceCheckUtils]: 4: Hoare quadruple {222858#true} {222859#false} #5849#return; {222859#false} is VALID [2022-04-08 15:18:28,085 INFO L272 TraceCheckUtils]: 0: Hoare triple {222858#true} call ULTIMATE.init(); {222876#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:18:28,086 INFO L290 TraceCheckUtils]: 1: Hoare triple {222876#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222858#true} is VALID [2022-04-08 15:18:28,086 INFO L290 TraceCheckUtils]: 2: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,086 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222858#true} {222858#true} #6857#return; {222858#true} is VALID [2022-04-08 15:18:28,086 INFO L272 TraceCheckUtils]: 4: Hoare triple {222858#true} call #t~ret1155 := main(); {222858#true} is VALID [2022-04-08 15:18:28,086 INFO L290 TraceCheckUtils]: 5: Hoare triple {222858#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {222863#(= main_~i~24 0)} is VALID [2022-04-08 15:18:28,086 INFO L290 TraceCheckUtils]: 6: Hoare triple {222863#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {222863#(= main_~i~24 0)} is VALID [2022-04-08 15:18:28,087 INFO L290 TraceCheckUtils]: 7: Hoare triple {222863#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {222864#(<= main_~i~24 1)} is VALID [2022-04-08 15:18:28,087 INFO L290 TraceCheckUtils]: 8: Hoare triple {222864#(<= main_~i~24 1)} assume !(~i~24 < 4); {222859#false} is VALID [2022-04-08 15:18:28,087 INFO L290 TraceCheckUtils]: 9: Hoare triple {222859#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {222859#false} is VALID [2022-04-08 15:18:28,087 INFO L272 TraceCheckUtils]: 10: Hoare triple {222859#false} call _BLAST_init(); {222877#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:18:28,087 INFO L290 TraceCheckUtils]: 11: Hoare triple {222877#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222858#true} is VALID [2022-04-08 15:18:28,087 INFO L290 TraceCheckUtils]: 12: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,087 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {222858#true} {222859#false} #6457#return; {222859#false} is VALID [2022-04-08 15:18:28,087 INFO L290 TraceCheckUtils]: 14: Hoare triple {222859#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 15: Hoare triple {222859#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L272 TraceCheckUtils]: 16: Hoare triple {222859#false} call stub_driver_init(); {222878#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 17: Hoare triple {222878#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {222858#true} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 18: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,088 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {222858#true} {222859#false} #6459#return; {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 20: Hoare triple {222859#false} assume !!(~status~31 >= 0); {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 21: Hoare triple {222859#false} assume !(0 == ~__BLAST_NONDET~3); {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 22: Hoare triple {222859#false} assume !(1 == ~__BLAST_NONDET~3); {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 23: Hoare triple {222859#false} assume !(3 == ~__BLAST_NONDET~3); {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 24: Hoare triple {222859#false} assume !(4 == ~__BLAST_NONDET~3); {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 25: Hoare triple {222859#false} assume !(5 == ~__BLAST_NONDET~3); {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 26: Hoare triple {222859#false} assume 6 == ~__BLAST_NONDET~3; {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L272 TraceCheckUtils]: 27: Hoare triple {222859#false} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 28: Hoare triple {222859#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {222859#false} is VALID [2022-04-08 15:18:28,088 INFO L272 TraceCheckUtils]: 29: Hoare triple {222859#false} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 718 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {222858#true} is VALID [2022-04-08 15:18:28,088 INFO L290 TraceCheckUtils]: 30: Hoare triple {222858#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {222858#true} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 31: Hoare triple {222858#true} assume 0 == ~__BLAST_NONDET~26; {222858#true} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 32: Hoare triple {222858#true} #res := 0; {222858#true} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 33: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,089 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {222858#true} {222859#false} #5849#return; {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 35: Hoare triple {222859#false} assume -9223372036854775808 <= #t~ret1077 && #t~ret1077 <= 9223372036854775807;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 36: Hoare triple {222859#false} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 37: Hoare triple {222859#false} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 38: Hoare triple {222859#false} assume 3 == #t~mem1080;havoc #t~mem1080; {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 39: Hoare triple {222859#false} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 40: Hoare triple {222859#false} call #t~mem1082 := read~int(~Irp.base, 63 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 63 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);call write~$Pointer$(#t~mem1083.base, 68 + #t~mem1083.offset, ~Irp.base, 180 + ~Irp.offset, 8);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 40 + ~pDevExt~0.offset, 8); {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L272 TraceCheckUtils]: 41: Hoare triple {222859#false} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 42: Hoare triple {222859#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 43: Hoare triple {222859#false} assume !(0 != ~compRegistered~0); {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 44: Hoare triple {222859#false} assume 0 == ~__BLAST_NONDET~14; {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 45: Hoare triple {222859#false} ~returnVal2~0 := 0; {222859#false} is VALID [2022-04-08 15:18:28,089 INFO L290 TraceCheckUtils]: 46: Hoare triple {222859#false} assume !(~s~0 == ~NP~0); {222859#false} is VALID [2022-04-08 15:18:28,090 INFO L290 TraceCheckUtils]: 47: Hoare triple {222859#false} assume !(~s~0 == ~MPR1~0); {222859#false} is VALID [2022-04-08 15:18:28,090 INFO L290 TraceCheckUtils]: 48: Hoare triple {222859#false} assume !(~s~0 == ~SKIP1~0); {222859#false} is VALID [2022-04-08 15:18:28,090 INFO L272 TraceCheckUtils]: 49: Hoare triple {222859#false} call errorFn(); {222859#false} is VALID [2022-04-08 15:18:28,090 INFO L290 TraceCheckUtils]: 50: Hoare triple {222859#false} assume !false; {222859#false} is VALID [2022-04-08 15:18:28,090 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:18:28,090 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:18:28,090 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489087104] [2022-04-08 15:18:28,090 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [489087104] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:18:28,090 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2038974241] [2022-04-08 15:18:28,090 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:18:28,090 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:18:28,091 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:18:28,091 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:18:28,092 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-04-08 15:18:28,830 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:18:28,830 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:18:28,836 INFO L263 TraceCheckSpWp]: Trace formula consists of 1576 conjuncts, 7 conjunts are in the unsatisfiable core [2022-04-08 15:18:28,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:18:28,867 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:18:28,980 INFO L272 TraceCheckUtils]: 0: Hoare triple {222858#true} call ULTIMATE.init(); {222858#true} is VALID [2022-04-08 15:18:28,980 INFO L290 TraceCheckUtils]: 1: Hoare triple {222858#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {222858#true} is VALID [2022-04-08 15:18:28,980 INFO L290 TraceCheckUtils]: 2: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,980 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {222858#true} {222858#true} #6857#return; {222858#true} is VALID [2022-04-08 15:18:28,980 INFO L272 TraceCheckUtils]: 4: Hoare triple {222858#true} call #t~ret1155 := main(); {222858#true} is VALID [2022-04-08 15:18:28,980 INFO L290 TraceCheckUtils]: 5: Hoare triple {222858#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 6: Hoare triple {222858#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 7: Hoare triple {222858#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 8: Hoare triple {222858#true} assume !(~i~24 < 4); {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 9: Hoare triple {222858#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L272 TraceCheckUtils]: 10: Hoare triple {222858#true} call _BLAST_init(); {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 11: Hoare triple {222858#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 12: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {222858#true} {222858#true} #6457#return; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 14: Hoare triple {222858#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 15: Hoare triple {222858#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L272 TraceCheckUtils]: 16: Hoare triple {222858#true} call stub_driver_init(); {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 17: Hoare triple {222858#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 18: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {222858#true} {222858#true} #6459#return; {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 20: Hoare triple {222858#true} assume !!(~status~31 >= 0); {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 21: Hoare triple {222858#true} assume !(0 == ~__BLAST_NONDET~3); {222858#true} is VALID [2022-04-08 15:18:28,981 INFO L290 TraceCheckUtils]: 22: Hoare triple {222858#true} assume !(1 == ~__BLAST_NONDET~3); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 23: Hoare triple {222858#true} assume !(3 == ~__BLAST_NONDET~3); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 24: Hoare triple {222858#true} assume !(4 == ~__BLAST_NONDET~3); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 25: Hoare triple {222858#true} assume !(5 == ~__BLAST_NONDET~3); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 26: Hoare triple {222858#true} assume 6 == ~__BLAST_NONDET~3; {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L272 TraceCheckUtils]: 27: Hoare triple {222858#true} call #t~ret1114 := PptDispatchSystemControl(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 28: Hoare triple {222858#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;call ~#disposition~0.base, ~#disposition~0.offset := #Ultimate.allocOnStack(4);havoc ~status~29;havoc ~pDevExt~0.base, ~pDevExt~0.offset;call #t~mem1076.base, #t~mem1076.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~pDevExt~0.base, ~pDevExt~0.offset := #t~mem1076.base, #t~mem1076.offset;havoc #t~mem1076.base, #t~mem1076.offset; {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L272 TraceCheckUtils]: 29: Hoare triple {222858#true} call #t~ret1077 := WmiSystemControl(~pDevExt~0.base, 718 + ~pDevExt~0.offset, ~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset, ~#disposition~0.base, ~#disposition~0.offset); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 30: Hoare triple {222858#true} ~WmiLibInfo.base, ~WmiLibInfo.offset := #in~WmiLibInfo.base, #in~WmiLibInfo.offset;~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~IrpDisposition.base, ~IrpDisposition.offset := #in~IrpDisposition.base, #in~IrpDisposition.offset;assume -2147483648 <= #t~nondet1153 && #t~nondet1153 <= 2147483647;~__BLAST_NONDET~26 := #t~nondet1153;havoc #t~nondet1153; {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 31: Hoare triple {222858#true} assume 0 == ~__BLAST_NONDET~26; {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 32: Hoare triple {222858#true} #res := 0; {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 33: Hoare triple {222858#true} assume true; {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L284 TraceCheckUtils]: 34: Hoare quadruple {222858#true} {222858#true} #5849#return; {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 35: Hoare triple {222858#true} assume -9223372036854775808 <= #t~ret1077 && #t~ret1077 <= 9223372036854775807;~status~29 := #t~ret1077;havoc #t~ret1077;call #t~mem1078 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 36: Hoare triple {222858#true} assume !(0 == #t~mem1078);havoc #t~mem1078;call #t~mem1079 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 37: Hoare triple {222858#true} assume !(1 == #t~mem1079);havoc #t~mem1079;call #t~mem1080 := read~int(~#disposition~0.base, ~#disposition~0.offset, 4); {222858#true} is VALID [2022-04-08 15:18:28,982 INFO L290 TraceCheckUtils]: 38: Hoare triple {222858#true} assume 3 == #t~mem1080;havoc #t~mem1080; {222858#true} is VALID [2022-04-08 15:18:28,983 INFO L290 TraceCheckUtils]: 39: Hoare triple {222858#true} assume ~s~0 == ~NP~0;~s~0 := ~SKIP1~0; {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,984 INFO L290 TraceCheckUtils]: 40: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} call #t~mem1082 := read~int(~Irp.base, 63 + ~Irp.offset, 1);call write~int((if (1 + #t~mem1082) % 256 <= 127 then (1 + #t~mem1082) % 256 else (1 + #t~mem1082) % 256 - 256), ~Irp.base, 63 + ~Irp.offset, 1);havoc #t~mem1082;call #t~mem1083.base, #t~mem1083.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);call write~$Pointer$(#t~mem1083.base, 68 + #t~mem1083.offset, ~Irp.base, 180 + ~Irp.offset, 8);havoc #t~mem1083.base, #t~mem1083.offset;call #t~mem1084.base, #t~mem1084.offset := read~$Pointer$(~pDevExt~0.base, 40 + ~pDevExt~0.offset, 8); {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,984 INFO L272 TraceCheckUtils]: 41: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} call #t~ret1085 := IofCallDriver(#t~mem1084.base, #t~mem1084.offset, ~Irp.base, ~Irp.offset); {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,985 INFO L290 TraceCheckUtils]: 42: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet1133 && #t~nondet1133 <= 2147483647;~__BLAST_NONDET~14 := #t~nondet1133;havoc #t~nondet1133;havoc ~returnVal2~0;havoc ~compRetStatus~0;~lcontext~0.base, ~lcontext~0.offset := 0, 0;havoc ~tmp~47;havoc ~tmp___0~14; {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,985 INFO L290 TraceCheckUtils]: 43: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} assume !(0 != ~compRegistered~0); {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,985 INFO L290 TraceCheckUtils]: 44: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} assume 0 == ~__BLAST_NONDET~14; {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,985 INFO L290 TraceCheckUtils]: 45: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} ~returnVal2~0 := 0; {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,986 INFO L290 TraceCheckUtils]: 46: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~NP~0); {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,986 INFO L290 TraceCheckUtils]: 47: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~MPR1~0); {222999#(= ~SKIP1~0 ~s~0)} is VALID [2022-04-08 15:18:28,986 INFO L290 TraceCheckUtils]: 48: Hoare triple {222999#(= ~SKIP1~0 ~s~0)} assume !(~s~0 == ~SKIP1~0); {222859#false} is VALID [2022-04-08 15:18:28,986 INFO L272 TraceCheckUtils]: 49: Hoare triple {222859#false} call errorFn(); {222859#false} is VALID [2022-04-08 15:18:28,986 INFO L290 TraceCheckUtils]: 50: Hoare triple {222859#false} assume !false; {222859#false} is VALID [2022-04-08 15:18:28,987 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:18:28,987 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:18:28,987 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2038974241] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:18:28,987 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:18:28,987 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2022-04-08 15:18:28,987 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:18:28,987 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [2116888501] [2022-04-08 15:18:28,987 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [2116888501] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:18:28,987 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:18:28,987 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-04-08 15:18:28,987 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1868863238] [2022-04-08 15:18:28,987 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:18:28,988 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 51 [2022-04-08 15:18:28,988 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:18:28,988 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 15:18:29,037 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 51 edges. 51 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:18:29,037 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-04-08 15:18:29,037 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:18:29,038 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-04-08 15:18:29,038 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 15:18:29,038 INFO L87 Difference]: Start difference. First operand 4509 states and 6514 transitions. Second operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 15:18:47,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:18:47,436 INFO L93 Difference]: Finished difference Result 4523 states and 6532 transitions. [2022-04-08 15:18:47,436 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-04-08 15:18:47,436 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 51 [2022-04-08 15:18:47,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:18:47,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 15:18:47,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2818 transitions. [2022-04-08 15:18:47,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 15:18:47,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 2818 transitions. [2022-04-08 15:18:47,634 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 3 states and 2818 transitions. [2022-04-08 15:18:50,230 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 2818 edges. 2818 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:18:51,248 INFO L225 Difference]: With dead ends: 4523 [2022-04-08 15:18:51,248 INFO L226 Difference]: Without dead ends: 4520 [2022-04-08 15:18:51,249 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2022-04-08 15:18:51,250 INFO L913 BasicCegarLoop]: 2778 mSDtfsCounter, 33 mSDsluCounter, 2713 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 5491 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-04-08 15:18:51,250 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 5491 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-04-08 15:18:51,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4520 states. [2022-04-08 15:18:52,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4520 to 4517. [2022-04-08 15:18:52,002 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:18:52,008 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4520 states. Second operand has 4517 states, 3006 states have (on average 1.3579507651363938) internal successors, (4082), 3087 states have internal predecessors, (4082), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) [2022-04-08 15:18:52,012 INFO L74 IsIncluded]: Start isIncluded. First operand 4520 states. Second operand has 4517 states, 3006 states have (on average 1.3579507651363938) internal successors, (4082), 3087 states have internal predecessors, (4082), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) [2022-04-08 15:18:52,016 INFO L87 Difference]: Start difference. First operand 4520 states. Second operand has 4517 states, 3006 states have (on average 1.3579507651363938) internal successors, (4082), 3087 states have internal predecessors, (4082), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) [2022-04-08 15:18:52,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:18:52,649 INFO L93 Difference]: Finished difference Result 4520 states and 6529 transitions. [2022-04-08 15:18:52,649 INFO L276 IsEmpty]: Start isEmpty. Operand 4520 states and 6529 transitions. [2022-04-08 15:18:52,656 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:18:52,656 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:18:52,662 INFO L74 IsIncluded]: Start isIncluded. First operand has 4517 states, 3006 states have (on average 1.3579507651363938) internal successors, (4082), 3087 states have internal predecessors, (4082), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) Second operand 4520 states. [2022-04-08 15:18:52,667 INFO L87 Difference]: Start difference. First operand has 4517 states, 3006 states have (on average 1.3579507651363938) internal successors, (4082), 3087 states have internal predecessors, (4082), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) Second operand 4520 states. [2022-04-08 15:18:53,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:18:53,324 INFO L93 Difference]: Finished difference Result 4520 states and 6529 transitions. [2022-04-08 15:18:53,324 INFO L276 IsEmpty]: Start isEmpty. Operand 4520 states and 6529 transitions. [2022-04-08 15:18:53,331 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:18:53,331 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:18:53,331 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:18:53,331 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:18:53,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4517 states, 3006 states have (on average 1.3579507651363938) internal successors, (4082), 3087 states have internal predecessors, (4082), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 312 states have return successors, (1246), 1164 states have call predecessors, (1246), 1181 states have call successors, (1246) [2022-04-08 15:18:54,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4517 states to 4517 states and 6526 transitions. [2022-04-08 15:18:54,498 INFO L78 Accepts]: Start accepts. Automaton has 4517 states and 6526 transitions. Word has length 51 [2022-04-08 15:18:54,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:18:54,498 INFO L478 AbstractCegarLoop]: Abstraction has 4517 states and 6526 transitions. [2022-04-08 15:18:54,498 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 13.0) internal successors, (39), 3 states have internal predecessors, (39), 3 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2022-04-08 15:18:54,498 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4517 states and 6526 transitions. [2022-04-08 15:19:16,689 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6526 edges. 6526 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:19:16,690 INFO L276 IsEmpty]: Start isEmpty. Operand 4517 states and 6526 transitions. [2022-04-08 15:19:16,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-08 15:19:16,690 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:19:16,690 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:19:16,712 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-04-08 15:19:16,891 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-04-08 15:19:16,891 INFO L403 AbstractCegarLoop]: === Iteration 11 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:19:16,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:19:16,892 INFO L85 PathProgramCache]: Analyzing trace with hash -1656471014, now seen corresponding path program 1 times [2022-04-08 15:19:16,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:19:16,892 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1363139088] [2022-04-08 15:19:16,898 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:19:16,898 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:19:16,898 INFO L85 PathProgramCache]: Analyzing trace with hash -1656471014, now seen corresponding path program 2 times [2022-04-08 15:19:16,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:19:16,899 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2087460362] [2022-04-08 15:19:16,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:19:16,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:19:16,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,135 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:19:17,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,150 INFO L290 TraceCheckUtils]: 0: Hoare triple {250195#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {250152#true} is VALID [2022-04-08 15:19:17,151 INFO L290 TraceCheckUtils]: 1: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,151 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {250152#true} {250152#true} #6857#return; {250152#true} is VALID [2022-04-08 15:19:17,178 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:19:17,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,186 INFO L290 TraceCheckUtils]: 0: Hoare triple {250196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {250152#true} is VALID [2022-04-08 15:19:17,186 INFO L290 TraceCheckUtils]: 1: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,186 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {250152#true} {250153#false} #6457#return; {250153#false} is VALID [2022-04-08 15:19:17,204 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:19:17,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,212 INFO L290 TraceCheckUtils]: 0: Hoare triple {250197#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {250152#true} is VALID [2022-04-08 15:19:17,213 INFO L290 TraceCheckUtils]: 1: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,213 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {250152#true} {250153#false} #6459#return; {250153#false} is VALID [2022-04-08 15:19:17,213 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-08 15:19:17,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,222 INFO L290 TraceCheckUtils]: 0: Hoare triple {250152#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {250152#true} is VALID [2022-04-08 15:19:17,222 INFO L290 TraceCheckUtils]: 1: Hoare triple {250152#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 8 * (#t~mem72 % 256), 8);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {250152#true} is VALID [2022-04-08 15:19:17,222 INFO L290 TraceCheckUtils]: 2: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,222 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {250152#true} {250153#false} #5941#return; {250153#false} is VALID [2022-04-08 15:19:17,238 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-08 15:19:17,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,284 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:19:17,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,312 INFO L290 TraceCheckUtils]: 0: Hoare triple {250152#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {250152#true} is VALID [2022-04-08 15:19:17,312 INFO L290 TraceCheckUtils]: 1: Hoare triple {250152#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {250218#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 15:19:17,313 INFO L290 TraceCheckUtils]: 2: Hoare triple {250218#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {250218#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 15:19:17,314 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {250218#(= |IoAcquireRemoveLockEx_#res| 0)} {250152#true} #6705#return; {250203#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-08 15:19:17,314 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-08 15:19:17,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,341 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:19:17,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,373 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:19:17,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:17,380 INFO L290 TraceCheckUtils]: 0: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,380 INFO L290 TraceCheckUtils]: 1: Hoare triple {250152#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {250152#true} is VALID [2022-04-08 15:19:17,380 INFO L290 TraceCheckUtils]: 2: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,380 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {250152#true} {250152#true} #6659#return; {250152#true} is VALID [2022-04-08 15:19:17,380 INFO L290 TraceCheckUtils]: 0: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,381 INFO L272 TraceCheckUtils]: 1: Hoare triple {250152#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {250227#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:19:17,381 INFO L290 TraceCheckUtils]: 2: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,381 INFO L290 TraceCheckUtils]: 3: Hoare triple {250152#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {250152#true} is VALID [2022-04-08 15:19:17,381 INFO L290 TraceCheckUtils]: 4: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,381 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {250152#true} {250152#true} #6659#return; {250152#true} is VALID [2022-04-08 15:19:17,381 INFO L290 TraceCheckUtils]: 6: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,381 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {250152#true} {250152#true} #6455#return; {250152#true} is VALID [2022-04-08 15:19:17,381 INFO L290 TraceCheckUtils]: 0: Hoare triple {250198#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := (if ~Status % 4294967296 <= 2147483647 then ~Status % 4294967296 else ~Status % 4294967296 - 4294967296);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {250152#true} is VALID [2022-04-08 15:19:17,382 INFO L272 TraceCheckUtils]: 1: Hoare triple {250152#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {250227#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:19:17,382 INFO L290 TraceCheckUtils]: 2: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,382 INFO L272 TraceCheckUtils]: 3: Hoare triple {250152#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {250227#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:19:17,383 INFO L290 TraceCheckUtils]: 4: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,383 INFO L290 TraceCheckUtils]: 5: Hoare triple {250152#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {250152#true} is VALID [2022-04-08 15:19:17,383 INFO L290 TraceCheckUtils]: 6: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,383 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {250152#true} {250152#true} #6659#return; {250152#true} is VALID [2022-04-08 15:19:17,383 INFO L290 TraceCheckUtils]: 8: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,383 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {250152#true} {250152#true} #6455#return; {250152#true} is VALID [2022-04-08 15:19:17,383 INFO L290 TraceCheckUtils]: 10: Hoare triple {250152#true} #res := ~Status; {250152#true} is VALID [2022-04-08 15:19:17,383 INFO L290 TraceCheckUtils]: 11: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,383 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {250152#true} {250153#false} #6707#return; {250153#false} is VALID [2022-04-08 15:19:17,384 INFO L290 TraceCheckUtils]: 0: Hoare triple {250198#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {250152#true} is VALID [2022-04-08 15:19:17,384 INFO L272 TraceCheckUtils]: 1: Hoare triple {250152#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {250152#true} is VALID [2022-04-08 15:19:17,384 INFO L290 TraceCheckUtils]: 2: Hoare triple {250152#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {250152#true} is VALID [2022-04-08 15:19:17,384 INFO L290 TraceCheckUtils]: 3: Hoare triple {250152#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {250218#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 15:19:17,384 INFO L290 TraceCheckUtils]: 4: Hoare triple {250218#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {250218#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 15:19:17,385 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {250218#(= |IoAcquireRemoveLockEx_#res| 0)} {250152#true} #6705#return; {250203#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-08 15:19:17,385 INFO L290 TraceCheckUtils]: 6: Hoare triple {250203#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {250204#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} is VALID [2022-04-08 15:19:17,386 INFO L290 TraceCheckUtils]: 7: Hoare triple {250204#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} assume !(~status~23 >= 0); {250153#false} is VALID [2022-04-08 15:19:17,386 INFO L272 TraceCheckUtils]: 8: Hoare triple {250153#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {250198#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:19:17,386 INFO L290 TraceCheckUtils]: 9: Hoare triple {250198#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := (if ~Status % 4294967296 <= 2147483647 then ~Status % 4294967296 else ~Status % 4294967296 - 4294967296);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {250152#true} is VALID [2022-04-08 15:19:17,386 INFO L272 TraceCheckUtils]: 10: Hoare triple {250152#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {250227#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:19:17,386 INFO L290 TraceCheckUtils]: 11: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L272 TraceCheckUtils]: 12: Hoare triple {250152#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {250227#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:19:17,387 INFO L290 TraceCheckUtils]: 13: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L290 TraceCheckUtils]: 14: Hoare triple {250152#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L290 TraceCheckUtils]: 15: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {250152#true} {250152#true} #6659#return; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L290 TraceCheckUtils]: 17: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {250152#true} {250152#true} #6455#return; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L290 TraceCheckUtils]: 19: Hoare triple {250152#true} #res := ~Status; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L290 TraceCheckUtils]: 20: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,387 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {250152#true} {250153#false} #6707#return; {250153#false} is VALID [2022-04-08 15:19:17,388 INFO L290 TraceCheckUtils]: 22: Hoare triple {250153#false} assume -9223372036854775808 <= #t~ret906 && #t~ret906 <= 9223372036854775807;havoc #t~ret906; {250153#false} is VALID [2022-04-08 15:19:17,388 INFO L290 TraceCheckUtils]: 23: Hoare triple {250153#false} #res := ~status~23; {250153#false} is VALID [2022-04-08 15:19:17,388 INFO L290 TraceCheckUtils]: 24: Hoare triple {250153#false} assume true; {250153#false} is VALID [2022-04-08 15:19:17,388 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {250153#false} {250153#false} #5943#return; {250153#false} is VALID [2022-04-08 15:19:17,390 INFO L272 TraceCheckUtils]: 0: Hoare triple {250152#true} call ULTIMATE.init(); {250195#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:19:17,390 INFO L290 TraceCheckUtils]: 1: Hoare triple {250195#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {250152#true} is VALID [2022-04-08 15:19:17,390 INFO L290 TraceCheckUtils]: 2: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,390 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {250152#true} {250152#true} #6857#return; {250152#true} is VALID [2022-04-08 15:19:17,390 INFO L272 TraceCheckUtils]: 4: Hoare triple {250152#true} call #t~ret1155 := main(); {250152#true} is VALID [2022-04-08 15:19:17,391 INFO L290 TraceCheckUtils]: 5: Hoare triple {250152#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {250157#(= main_~i~24 0)} is VALID [2022-04-08 15:19:17,391 INFO L290 TraceCheckUtils]: 6: Hoare triple {250157#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {250157#(= main_~i~24 0)} is VALID [2022-04-08 15:19:17,391 INFO L290 TraceCheckUtils]: 7: Hoare triple {250157#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {250158#(<= main_~i~24 1)} is VALID [2022-04-08 15:19:17,391 INFO L290 TraceCheckUtils]: 8: Hoare triple {250158#(<= main_~i~24 1)} assume !(~i~24 < 4); {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 9: Hoare triple {250153#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L272 TraceCheckUtils]: 10: Hoare triple {250153#false} call _BLAST_init(); {250196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 11: Hoare triple {250196#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {250152#true} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 12: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,392 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {250152#true} {250153#false} #6457#return; {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 14: Hoare triple {250153#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 15: Hoare triple {250153#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L272 TraceCheckUtils]: 16: Hoare triple {250153#false} call stub_driver_init(); {250197#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 17: Hoare triple {250197#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {250152#true} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 18: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,392 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {250152#true} {250153#false} #6459#return; {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 20: Hoare triple {250153#false} assume !!(~status~31 >= 0); {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 21: Hoare triple {250153#false} assume !(0 == ~__BLAST_NONDET~3); {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 22: Hoare triple {250153#false} assume !(1 == ~__BLAST_NONDET~3); {250153#false} is VALID [2022-04-08 15:19:17,392 INFO L290 TraceCheckUtils]: 23: Hoare triple {250153#false} assume 3 == ~__BLAST_NONDET~3; {250153#false} is VALID [2022-04-08 15:19:17,393 INFO L290 TraceCheckUtils]: 24: Hoare triple {250153#false} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(128);call write~int(1, ~#rl~0.base, 64 + ~#rl~0.offset, 8);call write~int(1, ~#rl~0.base, 52 + ~#rl~0.offset, 8);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 52 + ~pirp~0.offset, 8); {250153#false} is VALID [2022-04-08 15:19:17,393 INFO L272 TraceCheckUtils]: 25: Hoare triple {250153#false} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {250153#false} is VALID [2022-04-08 15:19:17,393 INFO L290 TraceCheckUtils]: 26: Hoare triple {250153#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {250153#false} is VALID [2022-04-08 15:19:17,393 INFO L272 TraceCheckUtils]: 27: Hoare triple {250153#false} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {250152#true} is VALID [2022-04-08 15:19:17,393 INFO L290 TraceCheckUtils]: 28: Hoare triple {250152#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {250152#true} is VALID [2022-04-08 15:19:17,393 INFO L290 TraceCheckUtils]: 29: Hoare triple {250152#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 8 * (#t~mem72 % 256), 8);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {250152#true} is VALID [2022-04-08 15:19:17,393 INFO L290 TraceCheckUtils]: 30: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,393 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {250152#true} {250153#false} #5941#return; {250153#false} is VALID [2022-04-08 15:19:17,393 INFO L272 TraceCheckUtils]: 32: Hoare triple {250153#false} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {250198#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:19:17,393 INFO L290 TraceCheckUtils]: 33: Hoare triple {250198#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {250152#true} is VALID [2022-04-08 15:19:17,393 INFO L272 TraceCheckUtils]: 34: Hoare triple {250152#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {250152#true} is VALID [2022-04-08 15:19:17,393 INFO L290 TraceCheckUtils]: 35: Hoare triple {250152#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {250152#true} is VALID [2022-04-08 15:19:17,394 INFO L290 TraceCheckUtils]: 36: Hoare triple {250152#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {250218#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 15:19:17,394 INFO L290 TraceCheckUtils]: 37: Hoare triple {250218#(= |IoAcquireRemoveLockEx_#res| 0)} assume true; {250218#(= |IoAcquireRemoveLockEx_#res| 0)} is VALID [2022-04-08 15:19:17,395 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {250218#(= |IoAcquireRemoveLockEx_#res| 0)} {250152#true} #6705#return; {250203#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} is VALID [2022-04-08 15:19:17,395 INFO L290 TraceCheckUtils]: 39: Hoare triple {250203#(= |PptAcquireRemoveLockOrFailIrp_#t~ret905| 0)} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {250204#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} is VALID [2022-04-08 15:19:17,395 INFO L290 TraceCheckUtils]: 40: Hoare triple {250204#(= PptAcquireRemoveLockOrFailIrp_~status~23 0)} assume !(~status~23 >= 0); {250153#false} is VALID [2022-04-08 15:19:17,396 INFO L272 TraceCheckUtils]: 41: Hoare triple {250153#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {250198#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:19:17,396 INFO L290 TraceCheckUtils]: 42: Hoare triple {250198#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := (if ~Status % 4294967296 <= 2147483647 then ~Status % 4294967296 else ~Status % 4294967296 - 4294967296);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {250152#true} is VALID [2022-04-08 15:19:17,396 INFO L272 TraceCheckUtils]: 43: Hoare triple {250152#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {250227#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:19:17,396 INFO L290 TraceCheckUtils]: 44: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L272 TraceCheckUtils]: 45: Hoare triple {250152#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {250227#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 46: Hoare triple {250227#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 47: Hoare triple {250152#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 48: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {250152#true} {250152#true} #6659#return; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 50: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {250152#true} {250152#true} #6455#return; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 52: Hoare triple {250152#true} #res := ~Status; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 53: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:17,397 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {250152#true} {250153#false} #6707#return; {250153#false} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 55: Hoare triple {250153#false} assume -9223372036854775808 <= #t~ret906 && #t~ret906 <= 9223372036854775807;havoc #t~ret906; {250153#false} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 56: Hoare triple {250153#false} #res := ~status~23; {250153#false} is VALID [2022-04-08 15:19:17,397 INFO L290 TraceCheckUtils]: 57: Hoare triple {250153#false} assume true; {250153#false} is VALID [2022-04-08 15:19:17,397 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {250153#false} {250153#false} #5943#return; {250153#false} is VALID [2022-04-08 15:19:17,398 INFO L290 TraceCheckUtils]: 59: Hoare triple {250153#false} assume -9223372036854775808 <= #t~ret599 && #t~ret599 <= 9223372036854775807;~status~11 := #t~ret599;havoc #t~ret599; {250153#false} is VALID [2022-04-08 15:19:17,398 INFO L290 TraceCheckUtils]: 60: Hoare triple {250153#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {250153#false} is VALID [2022-04-08 15:19:17,398 INFO L290 TraceCheckUtils]: 61: Hoare triple {250153#false} assume ~minorFunction~0 % 256 > 24; {250153#false} is VALID [2022-04-08 15:19:17,398 INFO L272 TraceCheckUtils]: 62: Hoare triple {250153#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {250153#false} is VALID [2022-04-08 15:19:17,398 INFO L290 TraceCheckUtils]: 63: Hoare triple {250153#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8); {250153#false} is VALID [2022-04-08 15:19:17,399 INFO L272 TraceCheckUtils]: 64: Hoare triple {250153#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {250153#false} is VALID [2022-04-08 15:19:17,399 INFO L290 TraceCheckUtils]: 65: Hoare triple {250153#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {250153#false} is VALID [2022-04-08 15:19:17,399 INFO L290 TraceCheckUtils]: 66: Hoare triple {250153#false} assume !(~s~0 == ~NP~0); {250153#false} is VALID [2022-04-08 15:19:17,399 INFO L272 TraceCheckUtils]: 67: Hoare triple {250153#false} call errorFn(); {250153#false} is VALID [2022-04-08 15:19:17,399 INFO L290 TraceCheckUtils]: 68: Hoare triple {250153#false} assume !false; {250153#false} is VALID [2022-04-08 15:19:17,399 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:19:17,399 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:19:17,399 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2087460362] [2022-04-08 15:19:17,399 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2087460362] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:19:17,399 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2051081284] [2022-04-08 15:19:17,399 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:19:17,400 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:19:17,400 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:19:17,400 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:19:17,431 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-04-08 15:19:18,177 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:19:18,177 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:19:18,183 INFO L263 TraceCheckSpWp]: Trace formula consists of 1862 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-08 15:19:18,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:19:18,234 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:19:18,400 INFO L272 TraceCheckUtils]: 0: Hoare triple {250152#true} call ULTIMATE.init(); {250152#true} is VALID [2022-04-08 15:19:18,400 INFO L290 TraceCheckUtils]: 1: Hoare triple {250152#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {250152#true} is VALID [2022-04-08 15:19:18,400 INFO L290 TraceCheckUtils]: 2: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:18,400 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {250152#true} {250152#true} #6857#return; {250152#true} is VALID [2022-04-08 15:19:18,400 INFO L272 TraceCheckUtils]: 4: Hoare triple {250152#true} call #t~ret1155 := main(); {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 5: Hoare triple {250152#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 6: Hoare triple {250152#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 7: Hoare triple {250152#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 8: Hoare triple {250152#true} assume !(~i~24 < 4); {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 9: Hoare triple {250152#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L272 TraceCheckUtils]: 10: Hoare triple {250152#true} call _BLAST_init(); {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 11: Hoare triple {250152#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 12: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {250152#true} {250152#true} #6457#return; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 14: Hoare triple {250152#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 15: Hoare triple {250152#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L272 TraceCheckUtils]: 16: Hoare triple {250152#true} call stub_driver_init(); {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 17: Hoare triple {250152#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 18: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {250152#true} {250152#true} #6459#return; {250152#true} is VALID [2022-04-08 15:19:18,401 INFO L290 TraceCheckUtils]: 20: Hoare triple {250152#true} assume !!(~status~31 >= 0); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 21: Hoare triple {250152#true} assume !(0 == ~__BLAST_NONDET~3); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 22: Hoare triple {250152#true} assume !(1 == ~__BLAST_NONDET~3); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 23: Hoare triple {250152#true} assume 3 == ~__BLAST_NONDET~3; {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 24: Hoare triple {250152#true} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(128);call write~int(1, ~#rl~0.base, 64 + ~#rl~0.offset, 8);call write~int(1, ~#rl~0.base, 52 + ~#rl~0.offset, 8);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 52 + ~pirp~0.offset, 8); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L272 TraceCheckUtils]: 25: Hoare triple {250152#true} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 26: Hoare triple {250152#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L272 TraceCheckUtils]: 27: Hoare triple {250152#true} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 28: Hoare triple {250152#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 29: Hoare triple {250152#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 8 * (#t~mem72 % 256), 8);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 30: Hoare triple {250152#true} assume true; {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {250152#true} {250152#true} #5941#return; {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L272 TraceCheckUtils]: 32: Hoare triple {250152#true} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 33: Hoare triple {250152#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L272 TraceCheckUtils]: 34: Hoare triple {250152#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {250152#true} is VALID [2022-04-08 15:19:18,402 INFO L290 TraceCheckUtils]: 35: Hoare triple {250152#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {250152#true} is VALID [2022-04-08 15:19:18,403 INFO L290 TraceCheckUtils]: 36: Hoare triple {250152#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {250343#(<= 0 |IoAcquireRemoveLockEx_#res|)} is VALID [2022-04-08 15:19:18,403 INFO L290 TraceCheckUtils]: 37: Hoare triple {250343#(<= 0 |IoAcquireRemoveLockEx_#res|)} assume true; {250343#(<= 0 |IoAcquireRemoveLockEx_#res|)} is VALID [2022-04-08 15:19:18,404 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {250343#(<= 0 |IoAcquireRemoveLockEx_#res|)} {250152#true} #6705#return; {250350#(<= 0 |PptAcquireRemoveLockOrFailIrp_#t~ret905|)} is VALID [2022-04-08 15:19:18,405 INFO L290 TraceCheckUtils]: 39: Hoare triple {250350#(<= 0 |PptAcquireRemoveLockOrFailIrp_#t~ret905|)} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {250354#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} is VALID [2022-04-08 15:19:18,405 INFO L290 TraceCheckUtils]: 40: Hoare triple {250354#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} assume !(~status~23 >= 0); {250153#false} is VALID [2022-04-08 15:19:18,405 INFO L272 TraceCheckUtils]: 41: Hoare triple {250153#false} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {250153#false} is VALID [2022-04-08 15:19:18,405 INFO L290 TraceCheckUtils]: 42: Hoare triple {250153#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := (if ~Status % 4294967296 <= 2147483647 then ~Status % 4294967296 else ~Status % 4294967296 - 4294967296);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {250153#false} is VALID [2022-04-08 15:19:18,405 INFO L272 TraceCheckUtils]: 43: Hoare triple {250153#false} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {250153#false} is VALID [2022-04-08 15:19:18,405 INFO L290 TraceCheckUtils]: 44: Hoare triple {250153#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L272 TraceCheckUtils]: 45: Hoare triple {250153#false} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 46: Hoare triple {250153#false} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 47: Hoare triple {250153#false} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 48: Hoare triple {250153#false} assume true; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {250153#false} {250153#false} #6659#return; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 50: Hoare triple {250153#false} assume true; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {250153#false} {250153#false} #6455#return; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 52: Hoare triple {250153#false} #res := ~Status; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 53: Hoare triple {250153#false} assume true; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {250153#false} {250153#false} #6707#return; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 55: Hoare triple {250153#false} assume -9223372036854775808 <= #t~ret906 && #t~ret906 <= 9223372036854775807;havoc #t~ret906; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 56: Hoare triple {250153#false} #res := ~status~23; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 57: Hoare triple {250153#false} assume true; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {250153#false} {250152#true} #5943#return; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 59: Hoare triple {250153#false} assume -9223372036854775808 <= #t~ret599 && #t~ret599 <= 9223372036854775807;~status~11 := #t~ret599;havoc #t~ret599; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 60: Hoare triple {250153#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {250153#false} is VALID [2022-04-08 15:19:18,406 INFO L290 TraceCheckUtils]: 61: Hoare triple {250153#false} assume ~minorFunction~0 % 256 > 24; {250153#false} is VALID [2022-04-08 15:19:18,407 INFO L272 TraceCheckUtils]: 62: Hoare triple {250153#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {250153#false} is VALID [2022-04-08 15:19:18,407 INFO L290 TraceCheckUtils]: 63: Hoare triple {250153#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8); {250153#false} is VALID [2022-04-08 15:19:18,407 INFO L272 TraceCheckUtils]: 64: Hoare triple {250153#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {250153#false} is VALID [2022-04-08 15:19:18,407 INFO L290 TraceCheckUtils]: 65: Hoare triple {250153#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {250153#false} is VALID [2022-04-08 15:19:18,407 INFO L290 TraceCheckUtils]: 66: Hoare triple {250153#false} assume !(~s~0 == ~NP~0); {250153#false} is VALID [2022-04-08 15:19:18,407 INFO L272 TraceCheckUtils]: 67: Hoare triple {250153#false} call errorFn(); {250153#false} is VALID [2022-04-08 15:19:18,407 INFO L290 TraceCheckUtils]: 68: Hoare triple {250153#false} assume !false; {250153#false} is VALID [2022-04-08 15:19:18,407 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:19:18,407 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:19:18,407 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2051081284] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:19:18,407 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:19:18,407 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [12] total 15 [2022-04-08 15:19:18,407 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:19:18,408 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1363139088] [2022-04-08 15:19:18,408 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1363139088] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:19:18,408 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:19:18,408 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-04-08 15:19:18,408 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089758511] [2022-04-08 15:19:18,408 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:19:18,408 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-08 15:19:18,408 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:19:18,408 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:19:18,473 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:19:18,474 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-04-08 15:19:18,474 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:19:18,474 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-04-08 15:19:18,474 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-08 15:19:18,474 INFO L87 Difference]: Start difference. First operand 4517 states and 6526 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:20:00,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:20:00,688 INFO L93 Difference]: Finished difference Result 8386 states and 12110 transitions. [2022-04-08 15:20:00,688 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-04-08 15:20:00,688 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-08 15:20:00,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:20:00,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:20:00,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5293 transitions. [2022-04-08 15:20:00,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:20:01,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 5293 transitions. [2022-04-08 15:20:01,070 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 5 states and 5293 transitions. [2022-04-08 15:20:06,531 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5293 edges. 5293 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:20:07,607 INFO L225 Difference]: With dead ends: 8386 [2022-04-08 15:20:07,608 INFO L226 Difference]: Without dead ends: 4521 [2022-04-08 15:20:07,616 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2022-04-08 15:20:07,616 INFO L913 BasicCegarLoop]: 2780 mSDtfsCounter, 3 mSDsluCounter, 8333 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 11113 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-04-08 15:20:07,616 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 11113 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-04-08 15:20:07,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4521 states. [2022-04-08 15:20:08,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4521 to 4521. [2022-04-08 15:20:08,411 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:20:08,416 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4521 states. Second operand has 4521 states, 3009 states have (on average 1.3575938850116318) internal successors, (4085), 3090 states have internal predecessors, (4085), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 313 states have return successors, (1248), 1165 states have call predecessors, (1248), 1181 states have call successors, (1248) [2022-04-08 15:20:08,421 INFO L74 IsIncluded]: Start isIncluded. First operand 4521 states. Second operand has 4521 states, 3009 states have (on average 1.3575938850116318) internal successors, (4085), 3090 states have internal predecessors, (4085), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 313 states have return successors, (1248), 1165 states have call predecessors, (1248), 1181 states have call successors, (1248) [2022-04-08 15:20:08,425 INFO L87 Difference]: Start difference. First operand 4521 states. Second operand has 4521 states, 3009 states have (on average 1.3575938850116318) internal successors, (4085), 3090 states have internal predecessors, (4085), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 313 states have return successors, (1248), 1165 states have call predecessors, (1248), 1181 states have call successors, (1248) [2022-04-08 15:20:09,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:20:09,156 INFO L93 Difference]: Finished difference Result 4521 states and 6531 transitions. [2022-04-08 15:20:09,156 INFO L276 IsEmpty]: Start isEmpty. Operand 4521 states and 6531 transitions. [2022-04-08 15:20:09,163 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:20:09,163 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:20:09,170 INFO L74 IsIncluded]: Start isIncluded. First operand has 4521 states, 3009 states have (on average 1.3575938850116318) internal successors, (4085), 3090 states have internal predecessors, (4085), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 313 states have return successors, (1248), 1165 states have call predecessors, (1248), 1181 states have call successors, (1248) Second operand 4521 states. [2022-04-08 15:20:09,175 INFO L87 Difference]: Start difference. First operand has 4521 states, 3009 states have (on average 1.3575938850116318) internal successors, (4085), 3090 states have internal predecessors, (4085), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 313 states have return successors, (1248), 1165 states have call predecessors, (1248), 1181 states have call successors, (1248) Second operand 4521 states. [2022-04-08 15:20:09,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:20:09,833 INFO L93 Difference]: Finished difference Result 4521 states and 6531 transitions. [2022-04-08 15:20:09,833 INFO L276 IsEmpty]: Start isEmpty. Operand 4521 states and 6531 transitions. [2022-04-08 15:20:09,841 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:20:09,841 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:20:09,841 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:20:09,841 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:20:09,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4521 states, 3009 states have (on average 1.3575938850116318) internal successors, (4085), 3090 states have internal predecessors, (4085), 1198 states have call successors, (1198), 310 states have call predecessors, (1198), 313 states have return successors, (1248), 1165 states have call predecessors, (1248), 1181 states have call successors, (1248) [2022-04-08 15:20:10,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4521 states to 4521 states and 6531 transitions. [2022-04-08 15:20:10,921 INFO L78 Accepts]: Start accepts. Automaton has 4521 states and 6531 transitions. Word has length 69 [2022-04-08 15:20:10,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:20:10,921 INFO L478 AbstractCegarLoop]: Abstraction has 4521 states and 6531 transitions. [2022-04-08 15:20:10,921 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 4 states have internal predecessors, (46), 2 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 3 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:20:10,922 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4521 states and 6531 transitions. [2022-04-08 15:20:34,382 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6531 edges. 6531 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:20:34,382 INFO L276 IsEmpty]: Start isEmpty. Operand 4521 states and 6531 transitions. [2022-04-08 15:20:34,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-04-08 15:20:34,383 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:20:34,383 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:20:34,405 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-04-08 15:20:34,584 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable10 [2022-04-08 15:20:34,584 INFO L403 AbstractCegarLoop]: === Iteration 12 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:20:34,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:20:34,584 INFO L85 PathProgramCache]: Analyzing trace with hash 454819355, now seen corresponding path program 1 times [2022-04-08 15:20:34,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:20:34,584 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [1485412632] [2022-04-08 15:20:34,590 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:20:34,590 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:20:34,590 INFO L85 PathProgramCache]: Analyzing trace with hash 454819355, now seen corresponding path program 2 times [2022-04-08 15:20:34,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:20:34,590 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393745298] [2022-04-08 15:20:34,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:20:34,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:20:34,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,828 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:20:34,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,852 INFO L290 TraceCheckUtils]: 0: Hoare triple {285340#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {285297#true} is VALID [2022-04-08 15:20:34,852 INFO L290 TraceCheckUtils]: 1: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,852 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {285297#true} {285297#true} #6857#return; {285297#true} is VALID [2022-04-08 15:20:34,880 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:20:34,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,888 INFO L290 TraceCheckUtils]: 0: Hoare triple {285341#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {285297#true} is VALID [2022-04-08 15:20:34,888 INFO L290 TraceCheckUtils]: 1: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,888 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {285297#true} {285298#false} #6457#return; {285298#false} is VALID [2022-04-08 15:20:34,904 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:20:34,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,913 INFO L290 TraceCheckUtils]: 0: Hoare triple {285342#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {285297#true} is VALID [2022-04-08 15:20:34,914 INFO L290 TraceCheckUtils]: 1: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,914 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {285297#true} {285298#false} #6459#return; {285298#false} is VALID [2022-04-08 15:20:34,914 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 27 [2022-04-08 15:20:34,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,925 INFO L290 TraceCheckUtils]: 0: Hoare triple {285297#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {285297#true} is VALID [2022-04-08 15:20:34,925 INFO L290 TraceCheckUtils]: 1: Hoare triple {285297#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 8 * (#t~mem72 % 256), 8);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {285297#true} is VALID [2022-04-08 15:20:34,925 INFO L290 TraceCheckUtils]: 2: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,925 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {285297#true} {285298#false} #5941#return; {285298#false} is VALID [2022-04-08 15:20:34,936 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 32 [2022-04-08 15:20:34,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,958 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:20:34,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,965 INFO L290 TraceCheckUtils]: 0: Hoare triple {285297#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {285297#true} is VALID [2022-04-08 15:20:34,965 INFO L290 TraceCheckUtils]: 1: Hoare triple {285297#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {285297#true} is VALID [2022-04-08 15:20:34,966 INFO L290 TraceCheckUtils]: 2: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,966 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {285297#true} {285297#true} #6705#return; {285297#true} is VALID [2022-04-08 15:20:34,966 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 8 [2022-04-08 15:20:34,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,981 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:20:34,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,989 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:20:34,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:34,996 INFO L290 TraceCheckUtils]: 0: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:34,996 INFO L290 TraceCheckUtils]: 1: Hoare triple {285297#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {285297#true} is VALID [2022-04-08 15:20:34,996 INFO L290 TraceCheckUtils]: 2: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,996 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {285297#true} {285297#true} #6659#return; {285297#true} is VALID [2022-04-08 15:20:34,996 INFO L290 TraceCheckUtils]: 0: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:34,997 INFO L272 TraceCheckUtils]: 1: Hoare triple {285297#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {285369#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:20:34,997 INFO L290 TraceCheckUtils]: 2: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:34,997 INFO L290 TraceCheckUtils]: 3: Hoare triple {285297#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {285297#true} is VALID [2022-04-08 15:20:34,997 INFO L290 TraceCheckUtils]: 4: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,997 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {285297#true} {285297#true} #6659#return; {285297#true} is VALID [2022-04-08 15:20:34,997 INFO L290 TraceCheckUtils]: 6: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,997 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {285297#true} {285297#true} #6455#return; {285297#true} is VALID [2022-04-08 15:20:34,997 INFO L290 TraceCheckUtils]: 0: Hoare triple {285343#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := (if ~Status % 4294967296 <= 2147483647 then ~Status % 4294967296 else ~Status % 4294967296 - 4294967296);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {285297#true} is VALID [2022-04-08 15:20:34,998 INFO L272 TraceCheckUtils]: 1: Hoare triple {285297#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {285369#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:20:34,998 INFO L290 TraceCheckUtils]: 2: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:34,998 INFO L272 TraceCheckUtils]: 3: Hoare triple {285297#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {285369#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:20:34,998 INFO L290 TraceCheckUtils]: 4: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:34,998 INFO L290 TraceCheckUtils]: 5: Hoare triple {285297#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 6: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L284 TraceCheckUtils]: 7: Hoare quadruple {285297#true} {285297#true} #6659#return; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 8: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L284 TraceCheckUtils]: 9: Hoare quadruple {285297#true} {285297#true} #6455#return; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 10: Hoare triple {285297#true} #res := ~Status; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 11: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L284 TraceCheckUtils]: 12: Hoare quadruple {285297#true} {285297#true} #6707#return; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 0: Hoare triple {285343#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L272 TraceCheckUtils]: 1: Hoare triple {285297#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 2: Hoare triple {285297#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 3: Hoare triple {285297#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 4: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {285297#true} {285297#true} #6705#return; {285297#true} is VALID [2022-04-08 15:20:34,999 INFO L290 TraceCheckUtils]: 6: Hoare triple {285297#true} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {285297#true} is VALID [2022-04-08 15:20:35,000 INFO L290 TraceCheckUtils]: 7: Hoare triple {285297#true} assume !(~status~23 >= 0); {285297#true} is VALID [2022-04-08 15:20:35,000 INFO L272 TraceCheckUtils]: 8: Hoare triple {285297#true} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {285343#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:20:35,000 INFO L290 TraceCheckUtils]: 9: Hoare triple {285343#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := (if ~Status % 4294967296 <= 2147483647 then ~Status % 4294967296 else ~Status % 4294967296 - 4294967296);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {285297#true} is VALID [2022-04-08 15:20:35,001 INFO L272 TraceCheckUtils]: 10: Hoare triple {285297#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {285369#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:20:35,001 INFO L290 TraceCheckUtils]: 11: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:35,001 INFO L272 TraceCheckUtils]: 12: Hoare triple {285297#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {285369#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 13: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 14: Hoare triple {285297#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 15: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L284 TraceCheckUtils]: 16: Hoare quadruple {285297#true} {285297#true} #6659#return; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 17: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L284 TraceCheckUtils]: 18: Hoare quadruple {285297#true} {285297#true} #6455#return; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 19: Hoare triple {285297#true} #res := ~Status; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 20: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L284 TraceCheckUtils]: 21: Hoare quadruple {285297#true} {285297#true} #6707#return; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 22: Hoare triple {285297#true} assume -9223372036854775808 <= #t~ret906 && #t~ret906 <= 9223372036854775807;havoc #t~ret906; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 23: Hoare triple {285297#true} #res := ~status~23; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L290 TraceCheckUtils]: 24: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,002 INFO L284 TraceCheckUtils]: 25: Hoare quadruple {285297#true} {285298#false} #5943#return; {285298#false} is VALID [2022-04-08 15:20:35,005 INFO L272 TraceCheckUtils]: 0: Hoare triple {285297#true} call ULTIMATE.init(); {285340#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:20:35,005 INFO L290 TraceCheckUtils]: 1: Hoare triple {285340#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {285297#true} is VALID [2022-04-08 15:20:35,005 INFO L290 TraceCheckUtils]: 2: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,006 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {285297#true} {285297#true} #6857#return; {285297#true} is VALID [2022-04-08 15:20:35,006 INFO L272 TraceCheckUtils]: 4: Hoare triple {285297#true} call #t~ret1155 := main(); {285297#true} is VALID [2022-04-08 15:20:35,006 INFO L290 TraceCheckUtils]: 5: Hoare triple {285297#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {285302#(= main_~i~24 0)} is VALID [2022-04-08 15:20:35,006 INFO L290 TraceCheckUtils]: 6: Hoare triple {285302#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {285302#(= main_~i~24 0)} is VALID [2022-04-08 15:20:35,006 INFO L290 TraceCheckUtils]: 7: Hoare triple {285302#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {285303#(<= main_~i~24 1)} is VALID [2022-04-08 15:20:35,007 INFO L290 TraceCheckUtils]: 8: Hoare triple {285303#(<= main_~i~24 1)} assume !(~i~24 < 4); {285298#false} is VALID [2022-04-08 15:20:35,007 INFO L290 TraceCheckUtils]: 9: Hoare triple {285298#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {285298#false} is VALID [2022-04-08 15:20:35,007 INFO L272 TraceCheckUtils]: 10: Hoare triple {285298#false} call _BLAST_init(); {285341#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:20:35,007 INFO L290 TraceCheckUtils]: 11: Hoare triple {285341#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {285297#true} is VALID [2022-04-08 15:20:35,007 INFO L290 TraceCheckUtils]: 12: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,007 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {285297#true} {285298#false} #6457#return; {285298#false} is VALID [2022-04-08 15:20:35,007 INFO L290 TraceCheckUtils]: 14: Hoare triple {285298#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {285298#false} is VALID [2022-04-08 15:20:35,007 INFO L290 TraceCheckUtils]: 15: Hoare triple {285298#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {285298#false} is VALID [2022-04-08 15:20:35,007 INFO L272 TraceCheckUtils]: 16: Hoare triple {285298#false} call stub_driver_init(); {285342#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:20:35,007 INFO L290 TraceCheckUtils]: 17: Hoare triple {285342#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {285297#true} is VALID [2022-04-08 15:20:35,007 INFO L290 TraceCheckUtils]: 18: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,008 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {285297#true} {285298#false} #6459#return; {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 20: Hoare triple {285298#false} assume !!(~status~31 >= 0); {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 21: Hoare triple {285298#false} assume !(0 == ~__BLAST_NONDET~3); {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 22: Hoare triple {285298#false} assume !(1 == ~__BLAST_NONDET~3); {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 23: Hoare triple {285298#false} assume 3 == ~__BLAST_NONDET~3; {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 24: Hoare triple {285298#false} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(128);call write~int(1, ~#rl~0.base, 64 + ~#rl~0.offset, 8);call write~int(1, ~#rl~0.base, 52 + ~#rl~0.offset, 8);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 52 + ~pirp~0.offset, 8); {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L272 TraceCheckUtils]: 25: Hoare triple {285298#false} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 26: Hoare triple {285298#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L272 TraceCheckUtils]: 27: Hoare triple {285298#false} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {285297#true} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 28: Hoare triple {285297#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {285297#true} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 29: Hoare triple {285297#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 8 * (#t~mem72 % 256), 8);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {285297#true} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 30: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,008 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {285297#true} {285298#false} #5941#return; {285298#false} is VALID [2022-04-08 15:20:35,008 INFO L272 TraceCheckUtils]: 32: Hoare triple {285298#false} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {285343#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:20:35,008 INFO L290 TraceCheckUtils]: 33: Hoare triple {285343#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {285297#true} is VALID [2022-04-08 15:20:35,008 INFO L272 TraceCheckUtils]: 34: Hoare triple {285297#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {285297#true} is VALID [2022-04-08 15:20:35,009 INFO L290 TraceCheckUtils]: 35: Hoare triple {285297#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {285297#true} is VALID [2022-04-08 15:20:35,009 INFO L290 TraceCheckUtils]: 36: Hoare triple {285297#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {285297#true} is VALID [2022-04-08 15:20:35,009 INFO L290 TraceCheckUtils]: 37: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,009 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {285297#true} {285297#true} #6705#return; {285297#true} is VALID [2022-04-08 15:20:35,009 INFO L290 TraceCheckUtils]: 39: Hoare triple {285297#true} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {285297#true} is VALID [2022-04-08 15:20:35,009 INFO L290 TraceCheckUtils]: 40: Hoare triple {285297#true} assume !(~status~23 >= 0); {285297#true} is VALID [2022-04-08 15:20:35,010 INFO L272 TraceCheckUtils]: 41: Hoare triple {285297#true} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {285343#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:20:35,010 INFO L290 TraceCheckUtils]: 42: Hoare triple {285343#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := (if ~Status % 4294967296 <= 2147483647 then ~Status % 4294967296 else ~Status % 4294967296 - 4294967296);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {285297#true} is VALID [2022-04-08 15:20:35,010 INFO L272 TraceCheckUtils]: 43: Hoare triple {285297#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {285369#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:20:35,010 INFO L290 TraceCheckUtils]: 44: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:35,011 INFO L272 TraceCheckUtils]: 45: Hoare triple {285297#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {285369#(= ~s~0 |old(~s~0)|)} is VALID [2022-04-08 15:20:35,011 INFO L290 TraceCheckUtils]: 46: Hoare triple {285369#(= ~s~0 |old(~s~0)|)} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:35,011 INFO L290 TraceCheckUtils]: 47: Hoare triple {285297#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {285297#true} is VALID [2022-04-08 15:20:35,011 INFO L290 TraceCheckUtils]: 48: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,011 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {285297#true} {285297#true} #6659#return; {285297#true} is VALID [2022-04-08 15:20:35,011 INFO L290 TraceCheckUtils]: 50: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,011 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {285297#true} {285297#true} #6455#return; {285297#true} is VALID [2022-04-08 15:20:35,011 INFO L290 TraceCheckUtils]: 52: Hoare triple {285297#true} #res := ~Status; {285297#true} is VALID [2022-04-08 15:20:35,021 INFO L290 TraceCheckUtils]: 53: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,021 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {285297#true} {285297#true} #6707#return; {285297#true} is VALID [2022-04-08 15:20:35,021 INFO L290 TraceCheckUtils]: 55: Hoare triple {285297#true} assume -9223372036854775808 <= #t~ret906 && #t~ret906 <= 9223372036854775807;havoc #t~ret906; {285297#true} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 56: Hoare triple {285297#true} #res := ~status~23; {285297#true} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 57: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:35,022 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {285297#true} {285298#false} #5943#return; {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 59: Hoare triple {285298#false} assume -9223372036854775808 <= #t~ret599 && #t~ret599 <= 9223372036854775807;~status~11 := #t~ret599;havoc #t~ret599; {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 60: Hoare triple {285298#false} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 61: Hoare triple {285298#false} assume ~minorFunction~0 % 256 > 24; {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L272 TraceCheckUtils]: 62: Hoare triple {285298#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 63: Hoare triple {285298#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8); {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L272 TraceCheckUtils]: 64: Hoare triple {285298#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 65: Hoare triple {285298#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 66: Hoare triple {285298#false} assume !(~s~0 == ~NP~0); {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L272 TraceCheckUtils]: 67: Hoare triple {285298#false} call errorFn(); {285298#false} is VALID [2022-04-08 15:20:35,022 INFO L290 TraceCheckUtils]: 68: Hoare triple {285298#false} assume !false; {285298#false} is VALID [2022-04-08 15:20:35,023 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:20:35,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:20:35,023 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393745298] [2022-04-08 15:20:35,023 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1393745298] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:20:35,023 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1216127210] [2022-04-08 15:20:35,023 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:20:35,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:20:35,023 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:20:35,024 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:20:35,025 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-04-08 15:20:35,804 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:20:35,804 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:20:35,811 INFO L263 TraceCheckSpWp]: Trace formula consists of 1863 conjuncts, 8 conjunts are in the unsatisfiable core [2022-04-08 15:20:35,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:20:35,856 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:20:36,083 INFO L272 TraceCheckUtils]: 0: Hoare triple {285297#true} call ULTIMATE.init(); {285297#true} is VALID [2022-04-08 15:20:36,083 INFO L290 TraceCheckUtils]: 1: Hoare triple {285297#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {285297#true} is VALID [2022-04-08 15:20:36,083 INFO L290 TraceCheckUtils]: 2: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:36,083 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {285297#true} {285297#true} #6857#return; {285297#true} is VALID [2022-04-08 15:20:36,083 INFO L272 TraceCheckUtils]: 4: Hoare triple {285297#true} call #t~ret1155 := main(); {285297#true} is VALID [2022-04-08 15:20:36,083 INFO L290 TraceCheckUtils]: 5: Hoare triple {285297#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {285297#true} is VALID [2022-04-08 15:20:36,083 INFO L290 TraceCheckUtils]: 6: Hoare triple {285297#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 7: Hoare triple {285297#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 8: Hoare triple {285297#true} assume !(~i~24 < 4); {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 9: Hoare triple {285297#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L272 TraceCheckUtils]: 10: Hoare triple {285297#true} call _BLAST_init(); {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 11: Hoare triple {285297#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 12: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {285297#true} {285297#true} #6457#return; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 14: Hoare triple {285297#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 15: Hoare triple {285297#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L272 TraceCheckUtils]: 16: Hoare triple {285297#true} call stub_driver_init(); {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 17: Hoare triple {285297#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 18: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {285297#true} {285297#true} #6459#return; {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 20: Hoare triple {285297#true} assume !!(~status~31 >= 0); {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 21: Hoare triple {285297#true} assume !(0 == ~__BLAST_NONDET~3); {285297#true} is VALID [2022-04-08 15:20:36,084 INFO L290 TraceCheckUtils]: 22: Hoare triple {285297#true} assume !(1 == ~__BLAST_NONDET~3); {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L290 TraceCheckUtils]: 23: Hoare triple {285297#true} assume 3 == ~__BLAST_NONDET~3; {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L290 TraceCheckUtils]: 24: Hoare triple {285297#true} call ~#rl~0.base, ~#rl~0.offset := #Ultimate.allocOnStack(128);call write~int(1, ~#rl~0.base, 64 + ~#rl~0.offset, 8);call write~int(1, ~#rl~0.base, 52 + ~#rl~0.offset, 8);call write~int(~#rl~0.base + ~#rl~0.offset, ~pirp~0.base, 52 + ~pirp~0.offset, 8); {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L272 TraceCheckUtils]: 25: Hoare triple {285297#true} call #t~ret1111 := PptDispatchPnp(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L290 TraceCheckUtils]: 26: Hoare triple {285297#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;assume -2147483648 <= #t~nondet598 && #t~nondet598 <= 2147483647;~__BLAST_NONDET~1 := #t~nondet598;havoc #t~nondet598;havoc ~status~11;havoc ~irpStack~3.base, ~irpStack~3.offset;havoc ~minorFunction~0; {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L272 TraceCheckUtils]: 27: Hoare triple {285297#true} call PptDebugDumpPnpIrpInfo(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L290 TraceCheckUtils]: 28: Hoare triple {285297#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~1.base, ~extension~1.offset;havoc ~irpStack~0.base, ~irpStack~0.offset;havoc ~irpName~0.base, ~irpName~0.offset;call #t~mem69.base, #t~mem69.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~1.base, ~extension~1.offset := #t~mem69.base, #t~mem69.offset;havoc #t~mem69.base, #t~mem69.offset;call #t~mem70.base, #t~mem70.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~0.base, ~irpStack~0.offset := #t~mem70.base, #t~mem70.offset;havoc #t~mem70.base, #t~mem70.offset;call #t~mem71 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1); {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L290 TraceCheckUtils]: 29: Hoare triple {285297#true} assume #t~mem71 % 256 <= 24;havoc #t~mem71;call #t~mem72 := read~int(~irpStack~0.base, 1 + ~irpStack~0.offset, 1);call #t~mem73.base, #t~mem73.offset := read~$Pointer$(~#PnpIrpName~0.base, ~#PnpIrpName~0.offset + 8 * (#t~mem72 % 256), 8);~irpName~0.base, ~irpName~0.offset := #t~mem73.base, #t~mem73.offset;havoc #t~mem72;havoc #t~mem73.base, #t~mem73.offset; {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L290 TraceCheckUtils]: 30: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {285297#true} {285297#true} #5941#return; {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L272 TraceCheckUtils]: 32: Hoare triple {285297#true} call #t~ret599 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L290 TraceCheckUtils]: 33: Hoare triple {285297#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L272 TraceCheckUtils]: 34: Hoare triple {285297#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {285297#true} is VALID [2022-04-08 15:20:36,085 INFO L290 TraceCheckUtils]: 35: Hoare triple {285297#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {285297#true} is VALID [2022-04-08 15:20:36,086 INFO L290 TraceCheckUtils]: 36: Hoare triple {285297#true} assume !(0 != ~__BLAST_NONDET~27);#res := -1073741738; {285485#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} is VALID [2022-04-08 15:20:36,086 INFO L290 TraceCheckUtils]: 37: Hoare triple {285485#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} assume true; {285485#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} is VALID [2022-04-08 15:20:36,087 INFO L284 TraceCheckUtils]: 38: Hoare quadruple {285485#(<= (+ |IoAcquireRemoveLockEx_#res| 1073741738) 0)} {285297#true} #6705#return; {285492#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#t~ret905|) 0)} is VALID [2022-04-08 15:20:36,087 INFO L290 TraceCheckUtils]: 39: Hoare triple {285492#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#t~ret905|) 0)} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-08 15:20:36,088 INFO L290 TraceCheckUtils]: 40: Hoare triple {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} assume !(~status~23 >= 0); {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-08 15:20:36,088 INFO L272 TraceCheckUtils]: 41: Hoare triple {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} call #t~ret906 := PptFailRequest(~Irp.base, ~Irp.offset, ~status~23); {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L290 TraceCheckUtils]: 42: Hoare triple {285297#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~Status := #in~Status;call write~int(~Status, ~Irp.base, 44 + ~Irp.offset, 8);~myStatus~0 := (if ~Status % 4294967296 <= 2147483647 then ~Status % 4294967296 else ~Status % 4294967296 - 4294967296);call write~int(0, ~Irp.base, 52 + ~Irp.offset, 8); {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L272 TraceCheckUtils]: 43: Hoare triple {285297#true} call PptCompleteRequest(~Irp.base, ~Irp.offset, 0); {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L290 TraceCheckUtils]: 44: Hoare triple {285297#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L272 TraceCheckUtils]: 45: Hoare triple {285297#true} call IofCompleteRequest(~Irp.base, ~Irp.offset, ~PriorityBoost); {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L290 TraceCheckUtils]: 46: Hoare triple {285297#true} ~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;~PriorityBoost := #in~PriorityBoost; {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L290 TraceCheckUtils]: 47: Hoare triple {285297#true} assume ~s~0 == ~NP~0;~s~0 := ~DC~0; {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L290 TraceCheckUtils]: 48: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L284 TraceCheckUtils]: 49: Hoare quadruple {285297#true} {285297#true} #6659#return; {285297#true} is VALID [2022-04-08 15:20:36,088 INFO L290 TraceCheckUtils]: 50: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:36,089 INFO L284 TraceCheckUtils]: 51: Hoare quadruple {285297#true} {285297#true} #6455#return; {285297#true} is VALID [2022-04-08 15:20:36,089 INFO L290 TraceCheckUtils]: 52: Hoare triple {285297#true} #res := ~Status; {285297#true} is VALID [2022-04-08 15:20:36,089 INFO L290 TraceCheckUtils]: 53: Hoare triple {285297#true} assume true; {285297#true} is VALID [2022-04-08 15:20:36,096 INFO L284 TraceCheckUtils]: 54: Hoare quadruple {285297#true} {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} #6707#return; {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-08 15:20:36,096 INFO L290 TraceCheckUtils]: 55: Hoare triple {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} assume -9223372036854775808 <= #t~ret906 && #t~ret906 <= 9223372036854775807;havoc #t~ret906; {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} is VALID [2022-04-08 15:20:36,097 INFO L290 TraceCheckUtils]: 56: Hoare triple {285496#(<= (+ 1073741738 PptAcquireRemoveLockOrFailIrp_~status~23) 0)} #res := ~status~23; {285548#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} is VALID [2022-04-08 15:20:36,097 INFO L290 TraceCheckUtils]: 57: Hoare triple {285548#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} assume true; {285548#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} is VALID [2022-04-08 15:20:36,098 INFO L284 TraceCheckUtils]: 58: Hoare quadruple {285548#(<= (+ 1073741738 |PptAcquireRemoveLockOrFailIrp_#res|) 0)} {285297#true} #5943#return; {285555#(<= (+ 1073741738 |PptDispatchPnp_#t~ret599|) 0)} is VALID [2022-04-08 15:20:36,098 INFO L290 TraceCheckUtils]: 59: Hoare triple {285555#(<= (+ 1073741738 |PptDispatchPnp_#t~ret599|) 0)} assume -9223372036854775808 <= #t~ret599 && #t~ret599 <= 9223372036854775807;~status~11 := #t~ret599;havoc #t~ret599; {285559#(<= (+ 1073741738 PptDispatchPnp_~status~11) 0)} is VALID [2022-04-08 15:20:36,099 INFO L290 TraceCheckUtils]: 60: Hoare triple {285559#(<= (+ 1073741738 PptDispatchPnp_~status~11) 0)} assume ~status~11 >= 0;call #t~mem600.base, #t~mem600.offset := read~$Pointer$(~Irp.base, 180 + ~Irp.offset, 8);~irpStack~3.base, ~irpStack~3.offset := #t~mem600.base, #t~mem600.offset;havoc #t~mem600.base, #t~mem600.offset;call #t~mem601 := read~int(~irpStack~3.base, 1 + ~irpStack~3.offset, 1);~minorFunction~0 := #t~mem601;havoc #t~mem601; {285298#false} is VALID [2022-04-08 15:20:36,099 INFO L290 TraceCheckUtils]: 61: Hoare triple {285298#false} assume ~minorFunction~0 % 256 > 24; {285298#false} is VALID [2022-04-08 15:20:36,099 INFO L272 TraceCheckUtils]: 62: Hoare triple {285298#false} call #t~ret602 := PptPnpUnhandledIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {285298#false} is VALID [2022-04-08 15:20:36,099 INFO L290 TraceCheckUtils]: 63: Hoare triple {285298#false} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~tmp~26;call #t~mem790.base, #t~mem790.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8); {285298#false} is VALID [2022-04-08 15:20:36,099 INFO L272 TraceCheckUtils]: 64: Hoare triple {285298#false} call #t~ret791 := PptPnpPassThroughPnpIrpAndReleaseRemoveLock(#t~mem790.base, #t~mem790.offset, ~Irp.base, ~Irp.offset); {285298#false} is VALID [2022-04-08 15:20:36,100 INFO L290 TraceCheckUtils]: 65: Hoare triple {285298#false} ~Extension.base, ~Extension.offset := #in~Extension.base, #in~Extension.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~status~19; {285298#false} is VALID [2022-04-08 15:20:36,100 INFO L290 TraceCheckUtils]: 66: Hoare triple {285298#false} assume !(~s~0 == ~NP~0); {285298#false} is VALID [2022-04-08 15:20:36,100 INFO L272 TraceCheckUtils]: 67: Hoare triple {285298#false} call errorFn(); {285298#false} is VALID [2022-04-08 15:20:36,100 INFO L290 TraceCheckUtils]: 68: Hoare triple {285298#false} assume !false; {285298#false} is VALID [2022-04-08 15:20:36,100 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:20:36,100 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:20:36,100 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1216127210] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:20:36,100 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:20:36,100 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [9] total 15 [2022-04-08 15:20:36,100 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:20:36,100 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [1485412632] [2022-04-08 15:20:36,100 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [1485412632] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:20:36,100 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:20:36,101 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-04-08 15:20:36,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1515925351] [2022-04-08 15:20:36,101 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:20:36,102 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-08 15:20:36,102 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:20:36,102 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:20:36,170 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 69 edges. 69 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:20:36,170 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-04-08 15:20:36,170 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:20:36,171 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-04-08 15:20:36,171 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2022-04-08 15:20:36,171 INFO L87 Difference]: Start difference. First operand 4521 states and 6531 transitions. Second operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:21:49,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:21:49,356 INFO L93 Difference]: Finished difference Result 7729 states and 11118 transitions. [2022-04-08 15:21:49,356 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-04-08 15:21:49,356 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) Word has length 69 [2022-04-08 15:21:49,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-04-08 15:21:49,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:21:49,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 5289 transitions. [2022-04-08 15:21:49,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:21:49,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 5289 transitions. [2022-04-08 15:21:49,712 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 8 states and 5289 transitions. [2022-04-08 15:21:55,932 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 5289 edges. 5289 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:21:56,895 INFO L225 Difference]: With dead ends: 7729 [2022-04-08 15:21:56,895 INFO L226 Difference]: Without dead ends: 4396 [2022-04-08 15:21:56,902 INFO L912 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2022-04-08 15:21:56,902 INFO L913 BasicCegarLoop]: 2776 mSDtfsCounter, 5 mSDsluCounter, 16617 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 19393 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-04-08 15:21:56,903 INFO L914 BasicCegarLoop]: SdHoareTripleChecker [5 Valid, 19393 Invalid, 71 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-04-08 15:21:56,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4396 states. [2022-04-08 15:21:57,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4396 to 4393. [2022-04-08 15:21:57,685 INFO L214 AbstractMinimizeNwa]: Start testing correctness of minimizeSevpa [2022-04-08 15:21:57,690 INFO L82 GeneralOperation]: Start isEquivalent. First operand 4396 states. Second operand has 4393 states, 2924 states have (on average 1.353625170998632) internal successors, (3958), 2991 states have internal predecessors, (3958), 1160 states have call successors, (1160), 290 states have call predecessors, (1160), 308 states have return successors, (1191), 1156 states have call predecessors, (1191), 1146 states have call successors, (1191) [2022-04-08 15:21:57,696 INFO L74 IsIncluded]: Start isIncluded. First operand 4396 states. Second operand has 4393 states, 2924 states have (on average 1.353625170998632) internal successors, (3958), 2991 states have internal predecessors, (3958), 1160 states have call successors, (1160), 290 states have call predecessors, (1160), 308 states have return successors, (1191), 1156 states have call predecessors, (1191), 1146 states have call successors, (1191) [2022-04-08 15:21:57,700 INFO L87 Difference]: Start difference. First operand 4396 states. Second operand has 4393 states, 2924 states have (on average 1.353625170998632) internal successors, (3958), 2991 states have internal predecessors, (3958), 1160 states have call successors, (1160), 290 states have call predecessors, (1160), 308 states have return successors, (1191), 1156 states have call predecessors, (1191), 1146 states have call successors, (1191) [2022-04-08 15:21:58,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:21:58,356 INFO L93 Difference]: Finished difference Result 4396 states and 6312 transitions. [2022-04-08 15:21:58,356 INFO L276 IsEmpty]: Start isEmpty. Operand 4396 states and 6312 transitions. [2022-04-08 15:21:58,362 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:21:58,363 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:21:58,368 INFO L74 IsIncluded]: Start isIncluded. First operand has 4393 states, 2924 states have (on average 1.353625170998632) internal successors, (3958), 2991 states have internal predecessors, (3958), 1160 states have call successors, (1160), 290 states have call predecessors, (1160), 308 states have return successors, (1191), 1156 states have call predecessors, (1191), 1146 states have call successors, (1191) Second operand 4396 states. [2022-04-08 15:21:58,372 INFO L87 Difference]: Start difference. First operand has 4393 states, 2924 states have (on average 1.353625170998632) internal successors, (3958), 2991 states have internal predecessors, (3958), 1160 states have call successors, (1160), 290 states have call predecessors, (1160), 308 states have return successors, (1191), 1156 states have call predecessors, (1191), 1146 states have call successors, (1191) Second operand 4396 states. [2022-04-08 15:21:59,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-04-08 15:21:59,006 INFO L93 Difference]: Finished difference Result 4396 states and 6312 transitions. [2022-04-08 15:21:59,006 INFO L276 IsEmpty]: Start isEmpty. Operand 4396 states and 6312 transitions. [2022-04-08 15:21:59,012 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2022-04-08 15:21:59,012 INFO L83 IsIncluded]: Finished isIncluded. Language is included [2022-04-08 15:21:59,012 INFO L88 GeneralOperation]: Finished isEquivalent. [2022-04-08 15:21:59,012 INFO L221 AbstractMinimizeNwa]: Finished testing correctness of minimizeSevpa [2022-04-08 15:21:59,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4393 states, 2924 states have (on average 1.353625170998632) internal successors, (3958), 2991 states have internal predecessors, (3958), 1160 states have call successors, (1160), 290 states have call predecessors, (1160), 308 states have return successors, (1191), 1156 states have call predecessors, (1191), 1146 states have call successors, (1191) [2022-04-08 15:22:00,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4393 states to 4393 states and 6309 transitions. [2022-04-08 15:22:00,037 INFO L78 Accepts]: Start accepts. Automaton has 4393 states and 6309 transitions. Word has length 69 [2022-04-08 15:22:00,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-04-08 15:22:00,038 INFO L478 AbstractCegarLoop]: Abstraction has 4393 states and 6309 transitions. [2022-04-08 15:22:00,038 INFO L479 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 5.75) internal successors, (46), 6 states have internal predecessors, (46), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (9), 4 states have call predecessors, (9), 2 states have call successors, (9) [2022-04-08 15:22:00,038 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with 4393 states and 6309 transitions. [2022-04-08 15:22:22,006 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 6309 edges. 6309 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:22:22,006 INFO L276 IsEmpty]: Start isEmpty. Operand 4393 states and 6309 transitions. [2022-04-08 15:22:22,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-04-08 15:22:22,007 INFO L491 BasicCegarLoop]: Found error trace [2022-04-08 15:22:22,008 INFO L499 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-04-08 15:22:22,031 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-04-08 15:22:22,208 WARN L460 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-04-08 15:22:22,210 INFO L403 AbstractCegarLoop]: === Iteration 13 === Targeting errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION === [errorFnErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2022-04-08 15:22:22,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-04-08 15:22:22,210 INFO L85 PathProgramCache]: Analyzing trace with hash 1515186020, now seen corresponding path program 1 times [2022-04-08 15:22:22,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy ACCELERATED_INTERPOLATION [2022-04-08 15:22:22,210 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleAcceleratedInterpolation [574702829] [2022-04-08 15:22:22,217 INFO L97 AcceleratorQvasr]: Qvasr could not accelerate loop because java.lang.UnsupportedOperationException: Qvasr do not support arrays. [2022-04-08 15:22:22,217 INFO L274 tedInterpolationCore]: Could not compute an accelerate. [2022-04-08 15:22:22,217 INFO L85 PathProgramCache]: Analyzing trace with hash 1515186020, now seen corresponding path program 2 times [2022-04-08 15:22:22,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-04-08 15:22:22,217 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1051170359] [2022-04-08 15:22:22,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-04-08 15:22:22,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-04-08 15:22:22,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:22:22,492 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 0 [2022-04-08 15:22:22,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:22:22,508 INFO L290 TraceCheckUtils]: 0: Hoare triple {318655#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318624#true} is VALID [2022-04-08 15:22:22,508 INFO L290 TraceCheckUtils]: 1: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,509 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318624#true} {318624#true} #6857#return; {318624#true} is VALID [2022-04-08 15:22:22,536 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 10 [2022-04-08 15:22:22,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:22:22,543 INFO L290 TraceCheckUtils]: 0: Hoare triple {318656#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318624#true} is VALID [2022-04-08 15:22:22,543 INFO L290 TraceCheckUtils]: 1: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,543 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318624#true} {318625#false} #6457#return; {318625#false} is VALID [2022-04-08 15:22:22,559 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 16 [2022-04-08 15:22:22,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:22:22,569 INFO L290 TraceCheckUtils]: 0: Hoare triple {318657#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {318624#true} is VALID [2022-04-08 15:22:22,569 INFO L290 TraceCheckUtils]: 1: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,569 INFO L284 TraceCheckUtils]: 2: Hoare quadruple {318624#true} {318625#false} #6459#return; {318625#false} is VALID [2022-04-08 15:22:22,582 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 22 [2022-04-08 15:22:22,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:22:22,596 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2022-04-08 15:22:22,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:22:22,605 INFO L376 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 1 [2022-04-08 15:22:22,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:22:22,612 INFO L290 TraceCheckUtils]: 0: Hoare triple {318624#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L290 TraceCheckUtils]: 1: Hoare triple {318624#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318624#true} {318624#true} #6705#return; {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L290 TraceCheckUtils]: 0: Hoare triple {318658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L272 TraceCheckUtils]: 1: Hoare triple {318624#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L290 TraceCheckUtils]: 2: Hoare triple {318624#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L290 TraceCheckUtils]: 3: Hoare triple {318624#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L290 TraceCheckUtils]: 4: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,612 INFO L284 TraceCheckUtils]: 5: Hoare quadruple {318624#true} {318624#true} #6705#return; {318624#true} is VALID [2022-04-08 15:22:22,613 INFO L290 TraceCheckUtils]: 6: Hoare triple {318624#true} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {318624#true} is VALID [2022-04-08 15:22:22,613 INFO L290 TraceCheckUtils]: 7: Hoare triple {318624#true} assume !!(~status~23 >= 0); {318624#true} is VALID [2022-04-08 15:22:22,613 INFO L290 TraceCheckUtils]: 8: Hoare triple {318624#true} #res := ~status~23; {318624#true} is VALID [2022-04-08 15:22:22,613 INFO L290 TraceCheckUtils]: 9: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,613 INFO L284 TraceCheckUtils]: 10: Hoare quadruple {318624#true} {318624#true} #5993#return; {318624#true} is VALID [2022-04-08 15:22:22,613 INFO L290 TraceCheckUtils]: 0: Hoare triple {318658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 8 + ~extension~2.offset, 8); {318624#true} is VALID [2022-04-08 15:22:22,613 INFO L290 TraceCheckUtils]: 1: Hoare triple {318624#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 18446744073709551616);havoc #t~mem287; {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L272 TraceCheckUtils]: 2: Hoare triple {318624#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {318658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:22:22,614 INFO L290 TraceCheckUtils]: 3: Hoare triple {318658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L272 TraceCheckUtils]: 4: Hoare triple {318624#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L290 TraceCheckUtils]: 5: Hoare triple {318624#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L290 TraceCheckUtils]: 6: Hoare triple {318624#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L290 TraceCheckUtils]: 7: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L284 TraceCheckUtils]: 8: Hoare quadruple {318624#true} {318624#true} #6705#return; {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L290 TraceCheckUtils]: 9: Hoare triple {318624#true} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L290 TraceCheckUtils]: 10: Hoare triple {318624#true} assume !!(~status~23 >= 0); {318624#true} is VALID [2022-04-08 15:22:22,614 INFO L290 TraceCheckUtils]: 11: Hoare triple {318624#true} #res := ~status~23; {318624#true} is VALID [2022-04-08 15:22:22,615 INFO L290 TraceCheckUtils]: 12: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,615 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {318624#true} {318624#true} #5993#return; {318624#true} is VALID [2022-04-08 15:22:22,615 INFO L290 TraceCheckUtils]: 14: Hoare triple {318624#true} assume -9223372036854775808 <= #t~ret289 && #t~ret289 <= 9223372036854775807;~status~1 := #t~ret289;havoc #t~ret289; {318624#true} is VALID [2022-04-08 15:22:22,615 INFO L290 TraceCheckUtils]: 15: Hoare triple {318624#true} assume !(~status~1 >= 0);#res := ~status~1; {318624#true} is VALID [2022-04-08 15:22:22,615 INFO L290 TraceCheckUtils]: 16: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,615 INFO L284 TraceCheckUtils]: 17: Hoare quadruple {318624#true} {318625#false} #6461#return; {318625#false} is VALID [2022-04-08 15:22:22,618 INFO L272 TraceCheckUtils]: 0: Hoare triple {318624#true} call ULTIMATE.init(); {318655#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} is VALID [2022-04-08 15:22:22,618 INFO L290 TraceCheckUtils]: 1: Hoare triple {318655#(and (= ~GUID_PARCLASS_DEVICE~0.Data1 |old(~GUID_PARCLASS_DEVICE~0.Data1)|) (= |old(~compRegistered~0)| ~compRegistered~0) (= ~PptPnpDispatchFunctionTable~0.base |old(~PptPnpDispatchFunctionTable~0.base)|) (= |old(~#PnpIrpName~0.offset)| |~#PnpIrpName~0.offset|) (= ~DC~0 |old(~DC~0)|) (= |~#LegacyZipModeQualifier___11~0.offset| |old(~#LegacyZipModeQualifier___11~0.offset)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= ~PptPnpDispatchFunctionTable~0.offset |old(~PptPnpDispatchFunctionTable~0.offset)|) (= |~#RegistryPath~0.offset| |old(~#RegistryPath~0.offset)|) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~#ModeQualifier___6~0.offset)| |~#ModeQualifier___6~0.offset|) (= |old(~#LegacyZipModeQualifier___11~0.base)| |~#LegacyZipModeQualifier___11~0.base|) (= ~PortInfoReferenceCount~0 |old(~PortInfoReferenceCount~0)|) (= |old(~#PptDebugLevel~0.offset)| |~#PptDebugLevel~0.offset|) (= |old(~#GUID_PARALLEL_DEVICE~0.base)| |~#GUID_PARALLEL_DEVICE~0.base|) (= ~isWin98~0 |old(~isWin98~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= |old(~PortInfoMutex~0.offset)| ~PortInfoMutex~0.offset) (= |old(~#PptWmiGuidList~0.base)| |~#PptWmiGuidList~0.base|) (= ~NP~0 |old(~NP~0)|) (= ~myStatus~0 |old(~myStatus~0)|) (= ~PptDot3Retries~0 |old(~PptDot3Retries~0)|) (= |~#PptWmiAllocFreeCountsGuid~0.base| |old(~#PptWmiAllocFreeCountsGuid~0.base)|) (= ~GUID_PARCLASS_DEVICE~0.Data3 |old(~GUID_PARCLASS_DEVICE~0.Data3)|) (= |old(~#PhysicalZero~0.base)| |~#PhysicalZero~0.base|) (= |~#PhysicalZero~0.offset| |old(~#PhysicalZero~0.offset)|) (= ~pirp~0.base |old(~pirp~0.base)|) (= ~pended~0 |old(~pended~0)|) (= |old(~#PptBreakOn~0.base)| |~#PptBreakOn~0.base|) (= |old(~#PptWmiAllocFreeCountsGuid~0.offset)| |~#PptWmiAllocFreeCountsGuid~0.offset|) (= |old(~#PptBreakOn~0.offset)| |~#PptBreakOn~0.offset|) (= ~IPC~0 |old(~IPC~0)|) (= ~Extension_FilterMode~0 |old(~Extension_FilterMode~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~#RegistryPath~0.base)| |~#RegistryPath~0.base|) (= |~#GUID_PARALLEL_DEVICE~0.offset| |old(~#GUID_PARALLEL_DEVICE~0.offset)|) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~GUID_PARCLASS_DEVICE~0.Data2 |old(~GUID_PARCLASS_DEVICE~0.Data2)|) (= ~GUID_PARCLASS_DEVICE~0.Data4 |old(~GUID_PARCLASS_DEVICE~0.Data4)|) (= |old(~isFixed~0)| ~isFixed~0) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= |~#PnpIrpName~0.base| |old(~#PnpIrpName~0.base)|) (= ~PortInfoMutex~0.base |old(~PortInfoMutex~0.base)|) (= |~#PptWmiGuidList~0.offset| |old(~#PptWmiGuidList~0.offset)|) (= |#NULL.offset| |old(#NULL.offset)|) (= ~s~0 |old(~s~0)|) (= |old(~routine~0)| ~routine~0) (= |~#PptDebugLevel~0.base| |old(~#PptDebugLevel~0.base)|) (= ~pirp~0.offset |old(~pirp~0.offset)|) (= |old(~#ModeQualifier___6~0.base)| |~#ModeQualifier___6~0.base|) (= |old(~_SLAM_alloc_dummy~0)| ~_SLAM_alloc_dummy~0) (= |old(#NULL.base)| |#NULL.base|))} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318624#true} is VALID [2022-04-08 15:22:22,618 INFO L290 TraceCheckUtils]: 2: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,618 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318624#true} {318624#true} #6857#return; {318624#true} is VALID [2022-04-08 15:22:22,618 INFO L272 TraceCheckUtils]: 4: Hoare triple {318624#true} call #t~ret1155 := main(); {318624#true} is VALID [2022-04-08 15:22:22,618 INFO L290 TraceCheckUtils]: 5: Hoare triple {318624#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {318629#(= main_~i~24 0)} is VALID [2022-04-08 15:22:22,618 INFO L290 TraceCheckUtils]: 6: Hoare triple {318629#(= main_~i~24 0)} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {318629#(= main_~i~24 0)} is VALID [2022-04-08 15:22:22,619 INFO L290 TraceCheckUtils]: 7: Hoare triple {318629#(= main_~i~24 0)} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {318630#(<= main_~i~24 1)} is VALID [2022-04-08 15:22:22,619 INFO L290 TraceCheckUtils]: 8: Hoare triple {318630#(<= main_~i~24 1)} assume !(~i~24 < 4); {318625#false} is VALID [2022-04-08 15:22:22,619 INFO L290 TraceCheckUtils]: 9: Hoare triple {318625#false} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {318625#false} is VALID [2022-04-08 15:22:22,619 INFO L272 TraceCheckUtils]: 10: Hoare triple {318625#false} call _BLAST_init(); {318656#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:22:22,619 INFO L290 TraceCheckUtils]: 11: Hoare triple {318656#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= ~DC~0 |old(~DC~0)|) (= |old(~SKIP1~0)| ~SKIP1~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~MPR3~0 |old(~MPR3~0)|) (= ~MPR1~0 |old(~MPR1~0)|) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= |old(~UNLOADED~0)| ~UNLOADED~0) (= ~NP~0 |old(~NP~0)|) (= ~pended~0 |old(~pended~0)|) (= ~IPC~0 |old(~IPC~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~SKIP2~0)| ~SKIP2~0) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318624#true} is VALID [2022-04-08 15:22:22,619 INFO L290 TraceCheckUtils]: 12: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,620 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {318624#true} {318625#false} #6457#return; {318625#false} is VALID [2022-04-08 15:22:22,620 INFO L290 TraceCheckUtils]: 14: Hoare triple {318625#false} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {318625#false} is VALID [2022-04-08 15:22:22,620 INFO L290 TraceCheckUtils]: 15: Hoare triple {318625#false} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {318625#false} is VALID [2022-04-08 15:22:22,620 INFO L272 TraceCheckUtils]: 16: Hoare triple {318625#false} call stub_driver_init(); {318657#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:22:22,620 INFO L290 TraceCheckUtils]: 17: Hoare triple {318657#(and (= |old(~compRegistered~0)| ~compRegistered~0) (= |old(~customIrp~0)| ~customIrp~0) (= ~setEventCalled~0 |old(~setEventCalled~0)|) (= ~pended~0 |old(~pended~0)|) (= |old(~compFptr~0.base)| ~compFptr~0.base) (= |old(~compFptr~0.offset)| ~compFptr~0.offset) (= ~lowerDriverReturn~0 |old(~lowerDriverReturn~0)|) (= ~s~0 |old(~s~0)|))} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {318624#true} is VALID [2022-04-08 15:22:22,620 INFO L290 TraceCheckUtils]: 18: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,620 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {318624#true} {318625#false} #6459#return; {318625#false} is VALID [2022-04-08 15:22:22,620 INFO L290 TraceCheckUtils]: 20: Hoare triple {318625#false} assume !!(~status~31 >= 0); {318625#false} is VALID [2022-04-08 15:22:22,620 INFO L290 TraceCheckUtils]: 21: Hoare triple {318625#false} assume 0 == ~__BLAST_NONDET~3; {318625#false} is VALID [2022-04-08 15:22:22,620 INFO L272 TraceCheckUtils]: 22: Hoare triple {318625#false} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {318658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:22:22,620 INFO L290 TraceCheckUtils]: 23: Hoare triple {318658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 8 + ~extension~2.offset, 8); {318624#true} is VALID [2022-04-08 15:22:22,620 INFO L290 TraceCheckUtils]: 24: Hoare triple {318624#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 18446744073709551616);havoc #t~mem287; {318624#true} is VALID [2022-04-08 15:22:22,621 INFO L272 TraceCheckUtils]: 25: Hoare triple {318624#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {318658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} is VALID [2022-04-08 15:22:22,621 INFO L290 TraceCheckUtils]: 26: Hoare triple {318658#(and (= |#memory_int| |old(#memory_int)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= ~myStatus~0 |old(~myStatus~0)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|) (= ~s~0 |old(~s~0)|))} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {318624#true} is VALID [2022-04-08 15:22:22,621 INFO L272 TraceCheckUtils]: 27: Hoare triple {318624#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {318624#true} is VALID [2022-04-08 15:22:22,621 INFO L290 TraceCheckUtils]: 28: Hoare triple {318624#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {318624#true} is VALID [2022-04-08 15:22:22,621 INFO L290 TraceCheckUtils]: 29: Hoare triple {318624#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {318624#true} is VALID [2022-04-08 15:22:22,621 INFO L290 TraceCheckUtils]: 30: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,621 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {318624#true} {318624#true} #6705#return; {318624#true} is VALID [2022-04-08 15:22:22,621 INFO L290 TraceCheckUtils]: 32: Hoare triple {318624#true} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {318624#true} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 33: Hoare triple {318624#true} assume !!(~status~23 >= 0); {318624#true} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 34: Hoare triple {318624#true} #res := ~status~23; {318624#true} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 35: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,622 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {318624#true} {318624#true} #5993#return; {318624#true} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 37: Hoare triple {318624#true} assume -9223372036854775808 <= #t~ret289 && #t~ret289 <= 9223372036854775807;~status~1 := #t~ret289;havoc #t~ret289; {318624#true} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 38: Hoare triple {318624#true} assume !(~status~1 >= 0);#res := ~status~1; {318624#true} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 39: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:22,622 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {318624#true} {318625#false} #6461#return; {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 41: Hoare triple {318625#false} assume -9223372036854775808 <= #t~ret1109 && #t~ret1109 <= 9223372036854775807;~status~31 := #t~ret1109;havoc #t~ret1109; {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 42: Hoare triple {318625#false} assume !(0 != ~we_should_unload~0); {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 43: Hoare triple {318625#false} assume !(1 == ~pended~0); {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 44: Hoare triple {318625#false} assume !(1 == ~pended~0); {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 45: Hoare triple {318625#false} assume !(~s~0 == ~UNLOADED~0); {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 46: Hoare triple {318625#false} assume !(-1 == ~status~31); {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 47: Hoare triple {318625#false} assume ~s~0 != ~SKIP2~0; {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 48: Hoare triple {318625#false} assume ~s~0 != ~IPC~0; {318625#false} is VALID [2022-04-08 15:22:22,622 INFO L290 TraceCheckUtils]: 49: Hoare triple {318625#false} assume ~s~0 != ~DC~0; {318625#false} is VALID [2022-04-08 15:22:22,623 INFO L272 TraceCheckUtils]: 50: Hoare triple {318625#false} call errorFn(); {318625#false} is VALID [2022-04-08 15:22:22,623 INFO L290 TraceCheckUtils]: 51: Hoare triple {318625#false} assume !false; {318625#false} is VALID [2022-04-08 15:22:22,623 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-04-08 15:22:22,623 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-04-08 15:22:22,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1051170359] [2022-04-08 15:22:22,623 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1051170359] provided 0 perfect and 1 imperfect interpolant sequences [2022-04-08 15:22:22,623 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1470428181] [2022-04-08 15:22:22,623 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-04-08 15:22:22,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-04-08 15:22:22,624 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-04-08 15:22:22,625 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-04-08 15:22:22,626 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-04-08 15:22:23,404 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2022-04-08 15:22:23,405 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-04-08 15:22:23,409 INFO L263 TraceCheckSpWp]: Trace formula consists of 1514 conjuncts, 5 conjunts are in the unsatisfiable core [2022-04-08 15:22:23,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-04-08 15:22:23,456 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-04-08 15:22:23,616 INFO L272 TraceCheckUtils]: 0: Hoare triple {318624#true} call ULTIMATE.init(); {318624#true} is VALID [2022-04-08 15:22:23,616 INFO L290 TraceCheckUtils]: 1: Hoare triple {318624#true} #NULL.base, #NULL.offset := 0, 0;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int(48, 1, 0, 1);call write~init~int(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);call #Ultimate.allocInit(41, 4);call #Ultimate.allocInit(41, 5);call #Ultimate.allocInit(41, 6);call #Ultimate.allocInit(41, 7);call #Ultimate.allocInit(41, 8);call #Ultimate.allocInit(41, 9);call #Ultimate.allocInit(41, 10);call #Ultimate.allocInit(41, 11);call #Ultimate.allocInit(41, 12);call #Ultimate.allocInit(41, 13);call #Ultimate.allocInit(41, 14);call #Ultimate.allocInit(41, 15);call #Ultimate.allocInit(41, 16);call #Ultimate.allocInit(41, 17);call #Ultimate.allocInit(41, 18);call #Ultimate.allocInit(41, 19);call #Ultimate.allocInit(41, 20);call #Ultimate.allocInit(41, 21);call #Ultimate.allocInit(41, 22);call #Ultimate.allocInit(41, 23);call #Ultimate.allocInit(41, 24);call #Ultimate.allocInit(41, 25);call #Ultimate.allocInit(41, 26);call #Ultimate.allocInit(41, 27);call #Ultimate.allocInit(41, 28);call #Ultimate.allocInit(41, 29);call #Ultimate.allocInit(8, 30);call #Ultimate.allocInit(7, 31);call write~init~int(117, 31, 0, 1);call write~init~int(116, 31, 1, 1);call write~init~int(105, 31, 2, 1);call write~init~int(108, 31, 3, 1);call write~init~int(46, 31, 4, 1);call write~init~int(99, 31, 5, 1);call write~init~int(0, 31, 6, 1);~isFixed~0 := 0;~isWin98~0 := 0;~s~0 := 0;~UNLOADED~0 := 0;~NP~0 := 0;~DC~0 := 0;~SKIP1~0 := 0;~SKIP2~0 := 0;~MPR1~0 := 0;~MPR3~0 := 0;~IPC~0 := 0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0;~myStatus~0 := 0;~routine~0 := 0;~#PnpIrpName~0.base, ~#PnpIrpName~0.offset := 32, 0;call #Ultimate.allocInit(200, 32);call write~init~$Pointer$(4, 0, ~#PnpIrpName~0.base, ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(5, 0, ~#PnpIrpName~0.base, 8 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(6, 0, ~#PnpIrpName~0.base, 16 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(7, 0, ~#PnpIrpName~0.base, 24 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(8, 0, ~#PnpIrpName~0.base, 32 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(9, 0, ~#PnpIrpName~0.base, 40 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(10, 0, ~#PnpIrpName~0.base, 48 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(11, 0, ~#PnpIrpName~0.base, 56 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(12, 0, ~#PnpIrpName~0.base, 64 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(13, 0, ~#PnpIrpName~0.base, 72 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(14, 0, ~#PnpIrpName~0.base, 80 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(15, 0, ~#PnpIrpName~0.base, 88 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(16, 0, ~#PnpIrpName~0.base, 96 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(17, 0, ~#PnpIrpName~0.base, 104 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(18, 0, ~#PnpIrpName~0.base, 112 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(19, 0, ~#PnpIrpName~0.base, 120 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(20, 0, ~#PnpIrpName~0.base, 128 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(21, 0, ~#PnpIrpName~0.base, 136 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(22, 0, ~#PnpIrpName~0.base, 144 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(23, 0, ~#PnpIrpName~0.base, 152 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(24, 0, ~#PnpIrpName~0.base, 160 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(25, 0, ~#PnpIrpName~0.base, 168 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(26, 0, ~#PnpIrpName~0.base, 176 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(27, 0, ~#PnpIrpName~0.base, 184 + ~#PnpIrpName~0.offset, 8);call write~init~$Pointer$(28, 0, ~#PnpIrpName~0.base, 192 + ~#PnpIrpName~0.offset, 8);~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset := 33, 0;call #Ultimate.allocInit(7, 33);call write~init~int(170, ~#ModeQualifier___6~0.base, ~#ModeQualifier___6~0.offset, 1);call write~init~int(85, ~#ModeQualifier___6~0.base, 1 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(0, ~#ModeQualifier___6~0.base, 2 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 3 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(135, ~#ModeQualifier___6~0.base, 4 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(120, ~#ModeQualifier___6~0.base, 5 + ~#ModeQualifier___6~0.offset, 1);call write~init~int(255, ~#ModeQualifier___6~0.base, 6 + ~#ModeQualifier___6~0.offset, 1);~Extension_FilterMode~0 := 0;~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset := 34, 0;call #Ultimate.allocInit(20, 34);call write~init~int(2549575408, ~#GUID_PARALLEL_DEVICE~0.base, ~#GUID_PARALLEL_DEVICE~0.offset, 8);call write~init~int(63619, ~#GUID_PARALLEL_DEVICE~0.base, 8 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(4560, ~#GUID_PARALLEL_DEVICE~0.base, 10 + ~#GUID_PARALLEL_DEVICE~0.offset, 2);call write~init~int(175, ~#GUID_PARALLEL_DEVICE~0.base, 12 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(31, ~#GUID_PARALLEL_DEVICE~0.base, 13 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 14 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 15 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(248, ~#GUID_PARALLEL_DEVICE~0.base, 16 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(0, ~#GUID_PARALLEL_DEVICE~0.base, 17 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(132, ~#GUID_PARALLEL_DEVICE~0.base, 18 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);call write~init~int(92, ~#GUID_PARALLEL_DEVICE~0.base, 19 + ~#GUID_PARALLEL_DEVICE~0.offset, 1);~GUID_PARCLASS_DEVICE~0.Data1 := 2166343333;~GUID_PARCLASS_DEVICE~0.Data2 := 63272;~GUID_PARCLASS_DEVICE~0.Data3 := 4560;~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[0 := 165];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[1 := 55];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[2 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[3 := 0];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[4 := 248];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[5 := 117];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[6 := 62];~GUID_PARCLASS_DEVICE~0.Data4 := ~GUID_PARCLASS_DEVICE~0.Data4[7 := 209];~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset := 35, 0;call #Ultimate.allocInit(8, 35);call write~init~int(0, ~#PptDebugLevel~0.base, ~#PptDebugLevel~0.offset, 8);~#PptBreakOn~0.base, ~#PptBreakOn~0.offset := 36, 0;call #Ultimate.allocInit(8, 36);call write~init~int(0, ~#PptBreakOn~0.base, ~#PptBreakOn~0.offset, 8);~#RegistryPath~0.base, ~#RegistryPath~0.offset := 37, 0;call #Ultimate.allocInit(12, 37);call write~init~int(0, ~#RegistryPath~0.base, ~#RegistryPath~0.offset, 2);call write~init~int(0, ~#RegistryPath~0.base, 2 + ~#RegistryPath~0.offset, 2);call write~init~$Pointer$(0, 0, ~#RegistryPath~0.base, 4 + ~#RegistryPath~0.offset, 8);~PortInfoReferenceCount~0 := -1;~PortInfoMutex~0.base, ~PortInfoMutex~0.offset := 0, 0;~#PhysicalZero~0.base, ~#PhysicalZero~0.offset := 38, 0;call #Ultimate.allocInit(16, 38);call write~init~int(0, ~#PhysicalZero~0.base, ~#PhysicalZero~0.offset, 8);call write~init~int(0, ~#PhysicalZero~0.base, 8 + ~#PhysicalZero~0.offset, 8);~PptDot3Retries~0 := 5;~PptPnpDispatchFunctionTable~0.base, ~PptPnpDispatchFunctionTable~0.offset := ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.base(), ~const~array~~LB~int~RB~~LC~base~COL~int~COM~offset~COL~int~RC~.offset();~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset := 39, 0;call #Ultimate.allocInit(3, 39);call write~init~int(0, ~#LegacyZipModeQualifier___11~0.base, ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(60, ~#LegacyZipModeQualifier___11~0.base, 1 + ~#LegacyZipModeQualifier___11~0.offset, 1);call write~init~int(32, ~#LegacyZipModeQualifier___11~0.base, 2 + ~#LegacyZipModeQualifier___11~0.offset, 1);~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset := 40, 0;call #Ultimate.allocInit(20, 40);call write~init~int(1270573546, ~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, 8);call write~init~int(26707, ~#PptWmiAllocFreeCountsGuid~0.base, 8 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(4562, ~#PptWmiAllocFreeCountsGuid~0.base, 10 + ~#PptWmiAllocFreeCountsGuid~0.offset, 2);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 12 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(206, ~#PptWmiAllocFreeCountsGuid~0.base, 13 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(0, ~#PptWmiAllocFreeCountsGuid~0.base, 14 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(192, ~#PptWmiAllocFreeCountsGuid~0.base, 15 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(79, ~#PptWmiAllocFreeCountsGuid~0.base, 16 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(142, ~#PptWmiAllocFreeCountsGuid~0.base, 17 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(244, ~#PptWmiAllocFreeCountsGuid~0.base, 18 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);call write~init~int(129, ~#PptWmiAllocFreeCountsGuid~0.base, 19 + ~#PptWmiAllocFreeCountsGuid~0.offset, 1);~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset := 41, 0;call #Ultimate.allocInit(24, 41);call write~init~$Pointer$(~#PptWmiAllocFreeCountsGuid~0.base, ~#PptWmiAllocFreeCountsGuid~0.offset, ~#PptWmiGuidList~0.base, ~#PptWmiGuidList~0.offset, 8);call write~init~int(1, ~#PptWmiGuidList~0.base, 8 + ~#PptWmiGuidList~0.offset, 8);call write~init~int(0, ~#PptWmiGuidList~0.base, 16 + ~#PptWmiGuidList~0.offset, 8);~pirp~0.base, ~pirp~0.offset := 0, 0;~_SLAM_alloc_dummy~0 := 0; {318624#true} is VALID [2022-04-08 15:22:23,616 INFO L290 TraceCheckUtils]: 2: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:23,616 INFO L284 TraceCheckUtils]: 3: Hoare quadruple {318624#true} {318624#true} #6857#return; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L272 TraceCheckUtils]: 4: Hoare triple {318624#true} call #t~ret1155 := main(); {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 5: Hoare triple {318624#true} call ~#d~0.base, ~#d~0.offset := #Ultimate.allocOnStack(328);assume -9223372036854775808 <= #t~nondet1096 && #t~nondet1096 <= 9223372036854775807;~status~31 := #t~nondet1096;havoc #t~nondet1096;assume -2147483648 <= #t~nondet1097 && #t~nondet1097 <= 2147483647;~we_should_unload~0 := #t~nondet1097;havoc #t~nondet1097;call ~#irp~0.base, ~#irp~0.offset := #Ultimate.allocOnStack(203);assume -2147483648 <= #t~nondet1098 && #t~nondet1098 <= 2147483647;~__BLAST_NONDET~3 := #t~nondet1098;havoc #t~nondet1098;assume -2147483648 <= #t~nondet1099 && #t~nondet1099 <= 2147483647;~irp_choice~0 := #t~nondet1099;havoc #t~nondet1099;call ~#devobj~0.base, ~#devobj~0.offset := #Ultimate.allocOnStack(327);call write~$Pointer$(~#devobj~0.base, ~#devobj~0.offset, ~#d~0.base, 4 + ~#d~0.offset, 8);call #t~malloc1100.base, #t~malloc1100.offset := #Ultimate.allocOnHeap(810);~e~0.base, ~e~0.offset := #t~malloc1100.base, #t~malloc1100.offset;havoc #t~malloc1100.base, #t~malloc1100.offset;call write~$Pointer$(~e~0.base, ~e~0.offset, ~#devobj~0.base, 76 + ~#devobj~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 56 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 56 + ~e~0.offset, ~e~0.base, 64 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 380 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 380 + ~e~0.offset, ~e~0.base, 388 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 72 + ~e~0.offset, 8);call write~$Pointer$(~e~0.base, 72 + ~e~0.offset, ~e~0.base, 80 + ~e~0.offset, 8);assume -2147483648 <= #t~nondet1101 && #t~nondet1101 <= 2147483647;~s~0 := #t~nondet1101;havoc #t~nondet1101;call #t~malloc1102.base, #t~malloc1102.offset := #Ultimate.allocOnHeap(272);call write~$Pointer$(#t~malloc1102.base, #t~malloc1102.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~malloc1102.base, #t~malloc1102.offset;~i~24 := 0; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 6: Hoare triple {318624#true} assume !!(~i~24 < 4);call #t~mem1104.base, #t~mem1104.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call #t~malloc1105.base, #t~malloc1105.offset := #Ultimate.allocOnHeap(128);call write~$Pointer$(#t~malloc1105.base, #t~malloc1105.offset, #t~mem1104.base, 4 + (#t~mem1104.offset + 68 * ~i~24), 8);havoc #t~mem1104.base, #t~mem1104.offset;havoc #t~malloc1105.base, #t~malloc1105.offset;call #t~malloc1106.base, #t~malloc1106.offset := #Ultimate.allocOnHeap(60);~l~0.base, ~l~0.offset := #t~malloc1106.base, #t~malloc1106.offset;havoc #t~malloc1106.base, #t~malloc1106.offset;call write~int(1, ~l~0.base, ~l~0.offset, 8);call write~int(1, ~l~0.base, 24 + ~l~0.offset, 8);call #t~mem1107.base, #t~mem1107.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(~l~0.base, ~l~0.offset, #t~mem1107.base, 12 + (#t~mem1107.offset + 68 * ~i~24), 8);havoc #t~mem1107.base, #t~mem1107.offset; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 7: Hoare triple {318624#true} #t~pre1103 := 1 + ~i~24;~i~24 := 1 + ~i~24;havoc #t~pre1103; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 8: Hoare triple {318624#true} assume !(~i~24 < 4); {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 9: Hoare triple {318624#true} call #t~mem1108.base, #t~mem1108.offset := read~$Pointer$(~#irp~0.base, 180 + ~#irp~0.offset, 8);call write~$Pointer$(#t~mem1108.base, 204 + #t~mem1108.offset, ~#irp~0.base, 180 + ~#irp~0.offset, 8);havoc #t~mem1108.base, #t~mem1108.offset;~pirp~0.base, ~pirp~0.offset := ~#irp~0.base, ~#irp~0.offset; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L272 TraceCheckUtils]: 10: Hoare triple {318624#true} call _BLAST_init(); {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 11: Hoare triple {318624#true} ~UNLOADED~0 := 0;~NP~0 := 1;~DC~0 := 2;~SKIP1~0 := 3;~SKIP2~0 := 4;~MPR1~0 := 5;~MPR3~0 := 6;~IPC~0 := 7;~s~0 := ~UNLOADED~0;~pended~0 := 0;~compFptr~0.base, ~compFptr~0.offset := 0, 0;~compRegistered~0 := 0;~lowerDriverReturn~0 := 0;~setEventCalled~0 := 0;~customIrp~0 := 0; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 12: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L284 TraceCheckUtils]: 13: Hoare quadruple {318624#true} {318624#true} #6457#return; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 14: Hoare triple {318624#true} assume ~status~31 >= 0;~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296);call write~int(0, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := 0; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 15: Hoare triple {318624#true} assume 0 == ~irp_choice~0;call write~int(-1073741637, ~pirp~0.base, 44 + ~pirp~0.offset, 8);~myStatus~0 := -1073741637; {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L272 TraceCheckUtils]: 16: Hoare triple {318624#true} call stub_driver_init(); {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 17: Hoare triple {318624#true} ~s~0 := ~NP~0;~customIrp~0 := 0;~setEventCalled~0 := ~customIrp~0;~lowerDriverReturn~0 := ~setEventCalled~0;~compRegistered~0 := ~lowerDriverReturn~0;~compFptr~0.base, ~compFptr~0.offset := 0, ~compRegistered~0;~pended~0 := (if (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 <= 2147483647 then (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 else (~compFptr~0.base + ~compFptr~0.offset) % 4294967296 - 4294967296); {318624#true} is VALID [2022-04-08 15:22:23,617 INFO L290 TraceCheckUtils]: 18: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L284 TraceCheckUtils]: 19: Hoare quadruple {318624#true} {318624#true} #6459#return; {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L290 TraceCheckUtils]: 20: Hoare triple {318624#true} assume !!(~status~31 >= 0); {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L290 TraceCheckUtils]: 21: Hoare triple {318624#true} assume 0 == ~__BLAST_NONDET~3; {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L272 TraceCheckUtils]: 22: Hoare triple {318624#true} call #t~ret1109 := PptDispatchCreate(~#devobj~0.base, ~#devobj~0.offset, ~pirp~0.base, ~pirp~0.offset); {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L290 TraceCheckUtils]: 23: Hoare triple {318624#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~2.base, ~extension~2.offset;havoc ~status~1;havoc ~tmp~5;call #t~mem286.base, #t~mem286.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~2.base, ~extension~2.offset := #t~mem286.base, #t~mem286.offset;havoc #t~mem286.base, #t~mem286.offset;~status~1 := 0;call #t~mem287 := read~int(~extension~2.base, 8 + ~extension~2.offset, 8); {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L290 TraceCheckUtils]: 24: Hoare triple {318624#true} assume !(0 != (if 0 == #t~mem287 then 0 else (if 1 == #t~mem287 then 0 else ~bitwiseAnd(#t~mem287, 4096))) % 18446744073709551616);havoc #t~mem287; {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L272 TraceCheckUtils]: 25: Hoare triple {318624#true} call #t~ret289 := PptAcquireRemoveLockOrFailIrp(~DeviceObject.base, ~DeviceObject.offset, ~Irp.base, ~Irp.offset); {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L290 TraceCheckUtils]: 26: Hoare triple {318624#true} ~DeviceObject.base, ~DeviceObject.offset := #in~DeviceObject.base, #in~DeviceObject.offset;~Irp.base, ~Irp.offset := #in~Irp.base, #in~Irp.offset;havoc ~extension~15.base, ~extension~15.offset;havoc ~removeLock~0.base, ~removeLock~0.offset;havoc ~status~23;havoc ~tmp~31;call #t~mem904.base, #t~mem904.offset := read~$Pointer$(~DeviceObject.base, 76 + ~DeviceObject.offset, 8);~extension~15.base, ~extension~15.offset := #t~mem904.base, #t~mem904.offset;havoc #t~mem904.base, #t~mem904.offset;~removeLock~0.base, ~removeLock~0.offset := ~extension~15.base, 558 + ~extension~15.offset; {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L272 TraceCheckUtils]: 27: Hoare triple {318624#true} call #t~ret905 := IoAcquireRemoveLockEx(~removeLock~0.base, ~removeLock~0.offset, ~Irp.base, ~Irp.offset, 31, 0, 33, 40); {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L290 TraceCheckUtils]: 28: Hoare triple {318624#true} ~RemoveLock.base, ~RemoveLock.offset := #in~RemoveLock.base, #in~RemoveLock.offset;~Tag.base, ~Tag.offset := #in~Tag.base, #in~Tag.offset;~File.base, ~File.offset := #in~File.base, #in~File.offset;~Line := #in~Line;~RemlockSize := #in~RemlockSize;assume -2147483648 <= #t~nondet1154 && #t~nondet1154 <= 2147483647;~__BLAST_NONDET~27 := #t~nondet1154;havoc #t~nondet1154; {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L290 TraceCheckUtils]: 29: Hoare triple {318624#true} assume 0 != ~__BLAST_NONDET~27;#res := 0; {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L290 TraceCheckUtils]: 30: Hoare triple {318624#true} assume true; {318624#true} is VALID [2022-04-08 15:22:23,618 INFO L284 TraceCheckUtils]: 31: Hoare quadruple {318624#true} {318624#true} #6705#return; {318624#true} is VALID [2022-04-08 15:22:23,619 INFO L290 TraceCheckUtils]: 32: Hoare triple {318624#true} assume -9223372036854775808 <= #t~ret905 && #t~ret905 <= 9223372036854775807;~tmp~31 := #t~ret905;havoc #t~ret905;~status~23 := ~tmp~31; {318624#true} is VALID [2022-04-08 15:22:23,622 INFO L290 TraceCheckUtils]: 33: Hoare triple {318624#true} assume !!(~status~23 >= 0); {318776#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} is VALID [2022-04-08 15:22:23,623 INFO L290 TraceCheckUtils]: 34: Hoare triple {318776#(<= 0 PptAcquireRemoveLockOrFailIrp_~status~23)} #res := ~status~23; {318780#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} is VALID [2022-04-08 15:22:23,623 INFO L290 TraceCheckUtils]: 35: Hoare triple {318780#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} assume true; {318780#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} is VALID [2022-04-08 15:22:23,624 INFO L284 TraceCheckUtils]: 36: Hoare quadruple {318780#(<= 0 |PptAcquireRemoveLockOrFailIrp_#res|)} {318624#true} #5993#return; {318787#(<= 0 |PptDispatchCreate_#t~ret289|)} is VALID [2022-04-08 15:22:23,624 INFO L290 TraceCheckUtils]: 37: Hoare triple {318787#(<= 0 |PptDispatchCreate_#t~ret289|)} assume -9223372036854775808 <= #t~ret289 && #t~ret289 <= 9223372036854775807;~status~1 := #t~ret289;havoc #t~ret289; {318791#(<= 0 PptDispatchCreate_~status~1)} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 38: Hoare triple {318791#(<= 0 PptDispatchCreate_~status~1)} assume !(~status~1 >= 0);#res := ~status~1; {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 39: Hoare triple {318625#false} assume true; {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L284 TraceCheckUtils]: 40: Hoare quadruple {318625#false} {318624#true} #6461#return; {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 41: Hoare triple {318625#false} assume -9223372036854775808 <= #t~ret1109 && #t~ret1109 <= 9223372036854775807;~status~31 := #t~ret1109;havoc #t~ret1109; {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 42: Hoare triple {318625#false} assume !(0 != ~we_should_unload~0); {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 43: Hoare triple {318625#false} assume !(1 == ~pended~0); {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 44: Hoare triple {318625#false} assume !(1 == ~pended~0); {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 45: Hoare triple {318625#false} assume !(~s~0 == ~UNLOADED~0); {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 46: Hoare triple {318625#false} assume !(-1 == ~status~31); {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 47: Hoare triple {318625#false} assume ~s~0 != ~SKIP2~0; {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 48: Hoare triple {318625#false} assume ~s~0 != ~IPC~0; {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 49: Hoare triple {318625#false} assume ~s~0 != ~DC~0; {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L272 TraceCheckUtils]: 50: Hoare triple {318625#false} call errorFn(); {318625#false} is VALID [2022-04-08 15:22:23,625 INFO L290 TraceCheckUtils]: 51: Hoare triple {318625#false} assume !false; {318625#false} is VALID [2022-04-08 15:22:23,626 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-04-08 15:22:23,626 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-04-08 15:22:23,626 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1470428181] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:22:23,626 INFO L184 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-04-08 15:22:23,626 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2022-04-08 15:22:23,626 INFO L136 FreeRefinementEngine]: Strategy ACCELERATED_INTERPOLATION found an infeasible trace [2022-04-08 15:22:23,626 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleAcceleratedInterpolation [574702829] [2022-04-08 15:22:23,626 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleAcceleratedInterpolation [574702829] provided 1 perfect and 0 imperfect interpolant sequences [2022-04-08 15:22:23,626 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-04-08 15:22:23,626 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-04-08 15:22:23,626 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513656079] [2022-04-08 15:22:23,626 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-04-08 15:22:23,627 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) Word has length 52 [2022-04-08 15:22:23,627 INFO L84 Accepts]: Finished accepts. word is accepted. [2022-04-08 15:22:23,627 INFO L86 InductivityCheck]: Starting inductivity check of a Floyd-Hoare automaton with has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6) [2022-04-08 15:22:23,688 INFO L122 InductivityCheck]: Floyd-Hoare automaton has 52 edges. 52 inductive. 0 not inductive. 0 times theorem prover too weak to decide inductivity. [2022-04-08 15:22:23,688 INFO L554 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-04-08 15:22:23,688 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy ACCELERATED_INTERPOLATION [2022-04-08 15:22:23,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-04-08 15:22:23,689 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2022-04-08 15:22:23,689 INFO L87 Difference]: Start difference. First operand 4393 states and 6309 transitions. Second operand has 6 states, 6 states have (on average 6.333333333333333) internal successors, (38), 5 states have internal predecessors, (38), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (6), 3 states have call predecessors, (6), 1 states have call successors, (6)